Integrated Device Technology Inc IDT74LVCH16245APV, IDT74LVCH16245APF, IDT74LVCH16245APA Datasheet
IDT74LVCH16245A
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 16-BIT
BUS TRANSCEIVER
WITH 3-STATE OUTPUTS,
5 VOLT TOLERANT I/O AND BUS-HOLD
FEA TURES:
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
•VCC = 3.3V ± 0.3V, Normal Range
•VCC = 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4
• All inputs, outputs, and I/O are 5V tolerant
• Available in SSOP, TSSOP, and TVSOP packages
DRIVE FEA TURES:
• High Output Drivers: ±24mA
• Reduced system switching noise
APPLICA TIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
µµ
µ W typ. static)
µµ
IDT74LVCH16245A
DESCRIPTION:
This 16-bit bus transceiver is built using advanced dual metal CMOS
technology. This high-speed, low power transceiver is ideal for asynchronous communication between two busses (A and B). The Direction and
Output Enable controls are designed to operate this device as either two
independent 8-bit transceivers or one 16-bit transceiver. The direction
control pin (DIR) controls the direction of data flow. The output enable pin
(OE) overrides the direction control and disables both ports. All inputs are
designed with hysteresis for improved noise margin.
All pins can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V supply system.
The LVCH16245A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
The LVCH16245A has “bus-hold” which retains the inputs' last state
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
FUNCTIONAL BLOCK DIAGRAM
1
1DIR
47
1A1
46
1
A2
44
A3
1
43
A4
1
41
A5
1
40
A6
1
38
A7
1
37
A8
1
24
2DIR
48
1
OE
2
B1
1
3
1
B2
5
1
B3
6
1
B4
8
1
B5
9
1
B6
11
1
B7
12
B8
1
2A1
2
2
2
2
A6
2
2
A7
2
A2
A3
A4
A5
A8
36
35
33
32
30
29
27
26
25
2
OE
13
B1
2
14
2
B2
16
2
B3
17
2
B4
19
2
B5
20
2
B6
22
2
B7
23
B8
2
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MARCH 1999INDUSTRIAL TEMPERATURE RANGE
© 1999 Integrated Device Technology, Inc. DSC-4596/1
1
IDT74LVCH16245A
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
1DIR
1B1
1B2
GND
B3
1
1
B4
CC
V
1
B5
B6
1
GND
1
B7
1
B8
B1
2
2
B2
GND
2
3
4
5
6
7
8
9
10
11
12
13
14
15
481
47
46
45
44
43
42
41
40
39
38
37
36
35
34
1OE
1A1
1A2
GND
A3
1
1
A4
CC
V
1
A5
1
A6
GND
1
A7
A8
1
2
A1
2
A2
GND
ABSOLUTE MAXIMUM RATINGS
Symbol Description Max Unit
VTERM Terminal Voltage with Respect to GND –0.5 to +6.5 V
TSTG Storage Temperature –65 to +150 °C
IOUT DC Output Current –50 to +50 mA
I
IK Continuous Clamp Current, –50 mA
IOK VI < 0 or VO < 0
I
CC Continuous Current through each ±100 mA
ISS VCC or GND
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
(1)
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Symbol Parameter
CIN Input Capacitance VIN = 0V 4.5 6 pF
COUT Output Capacitance VOUT = 0V 6.5 8 pF
C
I/O I/O Port Capacitance VIN = 0V 6.5 8 pF
NOTE:
1. As applicable to the device type.
(1)
Conditions Typ. Max. Unit
2B3
B4
2
VCC
B5
2
2
B6
GND
B7
2
2B8
DIR
2
16
17
18
19
20
21
22
23
24
SSOP/ TSSOP/ TVSOP
TOP VIEW
33
32
31
30
29
28
27
26
25
2A3
2
A4
VCC
A5
2
2
A6
GND
2
A7
2A8
OE
2
PIN DESCRIPTION
Pin Names Description
xOE Output Enable Inputs (Active LOW)
xDIR Direction Control Input
xAx Side A Inputs or 3-State Outputs
xBx Side B Inputs or 3-State Outputs
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
FUNCTION T ABLE (EACH 8-BIT SECTION)
Inputs
xOE xDIR Outputs
L L Bus B Data to Bus A
L H Bus A Data to Bus B
H X Isolation
NOTES:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
(1)
(1)
(1)
2
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