Integrated Device Technology Inc IDT74FST16163P245PV, IDT74FST16163P245PF, IDT74FST16163P245PA, IDT74FST16163245PV, IDT74FST16163245PF Datasheet

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Integrated Device Technology, Inc.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FEATURES:
• Bus switches provide zero delay paths
• Extended commercial range of –40°C to +85°C
• Low switch on-resistance: FST163xxx – 5 FST163Pxxx – 5 with precharge
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
• Available in SSOP, TSSOP and TVSOP
COMMERCIAL TEMPERATURE RANGE FEBRUARY 1997
1997 Integrated Device Technology, Inc. DSC-3513/-
1
IDT74FST163245
IDT74FST163P245
ADVANCE INFORMATION
16-BIT BUS SWITCH
no noise of their own while providing a low resistance path for an external driver. These devices connect input and output ports through an n-channel FET. When the gate-to-source junction of this FET is adequately forward-biased the device conducts and the resistance between input and output ports is small. Without adequate bias on the gate-to-source junction of the FET, the FET is turned off, therefore with no VCC applied, the device has hot insertion capability.
The low on-resistance and simplicity of the connection between input and output ports reduces the delay in this path to close to zero.
The FST163245 and FST163P245 are 16-bit TTL-compat­ible bus switches. The OE pins provide enable control. The
FST163P245 supports precharge on the B port. So when
OE
is high, A and B ports are isolated and B outputs are precharged to the bias voltage through the equivalent of a 10K resistor (1B1-8 precharged to VBIAS1 and 2B1-8 precharged to VBIAS1).
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION:
The FST163245/163P245 belong to IDT's family of Bus switches. Bus switch devices perform the function of connect­ing or isolating two ports without providing any inherent current sink or source capability. Thus they generate little or
PIN DESCRIPTION
1A1 1B1
1A8
1B8
2B1
2B8
2A1
2A8
1OE
2OE
1A1 1B1
1A8
1B8
2B1
2B8
2A1
2A8
1OE
2OE
VBIAS1
VBIAS1
FST163245 FST163P245
3513 drw 01
Pin Names I/O Description
1A1-8, 2A1-8 I/O Bus A
1B1-8, 2B1-8 I/O Bus B
1OE, 2
OE
I Bus Switch Enable (Active LOW)
VBIAS1 I Precharge Reference Voltage
3513 tbl 01
2
IDT74FST163245, IDT74FST163P245 16-BIT BUS SWITCH COMMERCIAL TEMPERATURE RANGE
ABSOLUTE MAXIMUM RATINGS
(1)
PIN CONFIGURATION
5
6 7 8 9 10
1 2
3 4
46
45 44
43 42 41
40 39
38
37
GND
1B1
1
B2
GND
1B3
1
B4
VCC
1
B5
1
B6
1
A2
GND
1A3
1
A4
VCC
1
A5
1
A6
GND
1OE 1A1
*NC/**VBIAS1
1B7
11
12
47
48
1B8
1
A7
1
A8
17
18 19
20 21 22
13 14
15 16
34
33 32
31 30 29
28 27
26 25
2B7
2
B2
GND
2B3
2
B4
VCC
2
B5
2
B6
GND
GND
2A3
2
A4
VCC
2
A5
2
A6
GND
2A7
2
A1
2
A2
2
B1
SO48-1 SO48-2 SO48-3
2B8
23 24
35
36
*NC/**GND
2A8
2
OE
SSOP/
TSSOP/TVSOP
TOP VIEW
*FST163245 **FST163P245
3513 drw 02
FUNCTION TABLE
3513 tbl 03
Inputs
x
OE
OE
Outputs
L Bus B Data to Bus A H High Z State (163245)
Precharge Bus B to V
BIAS (163P245)
3513 tbl 02
CAPACITANCE
(1)
Symbol Description Max. Unit
VTERM
(2)
Terminal Voltage with Respect to GND
–0.5 to +7.0 V
TSTG Storage Temperature –65 to +150 °C IOUT Maximum Continuous Channel
Current
128 mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT­INGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating condiitions for extended periods may affect reliability.
2. VCC, Control and Switch terminals.
Symbol Parameter Conditions
(2)
Typ. Unit
CIN Control Input Capacitance 4 pF CI/O
Switch Input/Output Capacitance
Switch Off
pF
3513 tbl 04
NOTES:
1. Capacitance is characterized but not tested
2. TA = 25°C, f = 1MHz, VIN = 0V, VOUT = 0V
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