Integrated Device Technology Inc IDT74FST16163232PF, IDT74FST16163232PA Datasheet

Integrated Device Technology, Inc.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FEATURES:
• Bus switches provide zero delay paths
• Extended commercial range of –40°C to +85°C
• Low switch on-resistance: FST163xxx – 4
• TTL-compatible input and output levels
• Available in SSOP, TSSOP and TVSOP
IDT74FST163232
ADVANCE INFORMATION
16-BIT SYNCHRONOUS 2:1 MUX/DEMUX SWITCH
driver. These devices connect input and output ports through an n-channel FET. When the gate-to-source junction of this FET is adequately forward-biased the device conducts and the resistance between input and output ports is small. With­out adequate bias on the gate-to-source junction of the FET, the FET is turned off, therefore with no VCC applied, the device has hot insertion capability.
The low on-resistance and simplicity of the connection between input and output ports reduces the delay in this path to close to zero.
The FST163232 provides three 16-bit TTL- compatible ports that support 2:1 multiplexing. The S0,1 pins control mux select and switch enable/disable. The S0,1 inputs are syn­chronous and clocked on the rising edge of CLK when
CLKEN
is low.
Port A can be connected to port B1 or port B2 or both ports B1 and B2.
PIN DESCRIPTION
FUNCTIONAL BLOCK DIAGRAM
CLKEN
CLK
S0
S1
D CE
CLK
D CE
CLK
1A
1B1
1
B
2
1 of 16 Channels
Pin Names I/O Description
A I/O Bus A
B1, B2 I/O Buses B1, B2
S0,1 I Control Pins
CLK I Clock Input. Clocks S0,1 on
Rising Edge
CLKEN
I Clock Enable Input
3511 drw 01
3511 tbl 01
COMMERCIAL TEMPERATURE RANGE FEBRUARY 1997
1997 Integrated Device Technology, Inc. DSC-3511/2
1
DESCRIPTION:
The FST163232 belong to IDT's family of Bus switches. Bus switch devices perform the function of connecting or isolating two ports without providing any inherent current sink or source capability. Thus they generate little or no noise of their own while providing a low resistance path for an external
2
IDT74FST163232 16-BIT SYNCHRONOUS 2:1 MUX/DEMUX SWITCH COMMERCIAL TEMPERATURE RANGE
ABSOLUTE MAXIMUM RATINGS
(1)
PIN CONFIGURATION
CAPACITANCE
(1)
FUNCTION TABLE
S1 S0 CLK
CLKEN
CLKEN
Description
XXXHLast state LLL Disconnect LH↑L A to B1 and A to B2 HLL A to B1 or B1 to A HHL A to B2 or B2 to A
5
6 7 8 9 10
1 2
3 4
54
53 52
51 50 49
48 47
46 45
8B1
2
B
1
2
B
2
3A
1A
4B1
4
B
2
5A
6B1
6
B
2
2A
3B1
3
B
2
4A
5B1
5
B
2
6A
7B1
1
B
1
1
B
2
11 12
55
56
7B2
8A
17
18 19 20 21
22
13 14
15 16
42
41 40
39 38 37
36 35
34 33
14B1
9A
10B1
10
B
2
11A
12B1
12
B
2
13A
9B1
9
B
2
10A 11B
1
11B
2
12A
13B1
13
B
2
GND V
CC
SO56-1 SO56-2 SO56-3
14B2
23 24
43
44
15A
14A
15B1
8
B
2
GND
Vcc
7A
25 26
32 31
30 29
16B2
16
B
115
B
2
16A
CLK
27 28
CLKEN
S
0
S
1
SSOP/
TSSOP/TVSOP
TOP VIEW
3511 drw 02
3511 tbl 04
Symbol Description Max. Unit
VTERM
(2)
Terminal Voltage with Respect to GND
–0.5 to +7.0 V
TSTG Storage Temperature –65 to +150 °C IOUT Maximum Continuous Channel
Current
128 mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT­INGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating condiitions for extended periods may affect reliability.
2. VCC, Control and Switch terminals.
3511 tbl 02
Symbol Parameter Conditions
(2)
Typ. Unit
CIN Control Input Capacitance 4 pF CI/O
Switch Input/Output Capacitance
Switch Off
pF
3511 tbl 03
NOTES:
1. Capacitance is characterized but not tested
2. TA = 25°C, f = 1MHz, VIN = 0V, VOUT = 0V
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