Integrated Device Technology Inc IDT74FCT543TPB, IDT74FCT543TP, IDT74FCT543TLB, IDT74FCT543TL, IDT74FCT543TEB Datasheet

IDT54/74FCT543T/AT/CT/DT

IDT54/74FCT2543T/AT/CT

Integrated Device Technology, Inc.

FAST CMOS
OCTAL LATCHED
TRANSCEIVER

MILITARY AND COMMERCIAL TEMPERATURE RANGES JANUARY 1995

1995 Integrated Device Technology, Inc. 6.17 DSC-4203/5

DESCRIPTION:

The FCT543T/FCT2543T is a non-inverting octal trans­ceiver built using an advanced dual metal CMOS technology.
This device contains two sets of eight D-type latches with
separate input and output controls for each set. For data flow
from A to B, for example, the A-to-B Enable (

CEAB

) input must
be LOW in order to enter data from A0–A7 or to take data from
B0–B7, as indicated in the Function Table. With

CEAB

LOW,

a LOW signal on the A-to-B Latch Enable (

LEAB

) input makes
the A-to-B latches transparent; a subsequent LOW-to-HIGH
transition of the

LEAB

signal puts the A latches in the storage
mode and their outputs no longer change with the A inputs.
With

CEAB

and

OEAB

both LOW, the 3-state B output buffers
are active and reflect the data present at the output of the A
latches. Control of data from B to A is similar, but uses the

CEBA, LEBA

and

OEBA

inputs.

The FCT2543T has balanced output drive with current
limiting resistors. This offers low ground bounce, minimal
undershoot and controlled output fall times-reducing the need
for external series terminating resistors. FCT2xxxT parts are
plug-in replacements for FCTxxxT parts.

1

FEATURES:

• Common features:

– Low input and output leakage ≤1µA (max.)
– CMOS power levels
– True TTL input and output compatibility

– VOH = 3.3V (typ.)
– V

OL = 0.3V (typ.)

– Meets or exceeds JEDEC standard 18 specifications
– Product available in Radiation Tolerant and Radiation

Enhanced versions

– Military product compliant to MIL-STD-883, Class B

and DESC listed (dual marked)

– Available in DIP, SOIC, SSOP, QSOP, CERPACK

and LCC packages

• Features for FCT543T:

– Std., A, C and D speed grades
– High drive outputs (-15mA IOH, 64mA IOL)
– Power off disable outputs permit “live insertion”

• Features for FCT2543T:

– Std., A, and C speed grades
– Resistor outputs (-15mA IOH, 12mA IOL Com.)

(-12mA IOH, 12mA IOL Mil.)

– Reduced system switching noise

2613 drw 01

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

FUNCTIONAL BLOCK DIAGRAM

A1

Q

OEBA

A2
A3
A4
A5
A6
A7

B1
B2
B3
B4
B5

B6
B7

CEBA

LEBA

OEAB

CEAB

LEAB

DETAIL A x 7

D

LE

Q

D

LE

DETAIL A

A

0

B0

IDT54/74FCT543T/AT/CT/DT - 2543T/AT/CT
FAST CMOS OCTAL LATCHED TRANSCEIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES

6.17 2

PIN CONFIGURATIONS

DIP/SOIC/SSOP/QSOP/CERPACK

TOP VIEW

5
6
7
8
9
10
11
12

GND

A

0

A1
A2

1
2
3
4

24
23
22
21
20
19
18
17

Vcc

16
15
14
13

P24-1

D24-1
SO24-2
SO24-7
SO24-8

&

E24-1

B

0

A3
A4
A5

A

6

A7

B1
B2
B3
B4
B5
B6
B7
LEAB
OEAB

LEBA

OEBA

CEAB

CEBA

LCC

TOP VIEW

5
6
7
8
9
10
11

L28-1

25
24
23
22
21
20
19

INDEX

A

1

A

2

A

3

A

4

A

5

A

6

NC

Vcc

GND

NC

NC

NC

B

1

B

2

B

3

B

4

B

5

B

6

A

0

LEBA

OEBA

B0CEBA

A

7

CEAB

B

7

LEAB

OEAB

12 13 14 15 16 17 18

432128 27 26

2613 drw 02

2613 drw 03

FUNCTION TABLE

(1, 2)

For A-to-B (Symmetric with B-to-A)

Latch Output

Inputs Status Buffers

CEAB

CEAB

LEAB

LEAB

OEAB

OEAB

A-to-B B

0–B7

H — — Storing High Z
— H — Storing —
— — H — High Z

L L L Transparent Current A Inputs
L H L Storing Previous* A Inputs

NOTES: 2613 tbl 02

1. * Before

LEAB

LOW-to-HIGH Transition
H = HIGH Voltage Level
L = LOW Voltage Level
— = Don’t Care or Irrelevant

2. A-to-B data flow shown; B-to-A flow control is the same, except using

CEBA, LEBA

and

OEBA

.

ABSOLUTE MAXIMUM RATINGS

(1)

Symbol Rating Commercial Military Unit

VTERM

(2)

Terminal Voltage
with Respect to
GND

–0.5 to +7.0 –0.5 to +7.0 V

VTERM

(3)

Terminal Voltage
with Respect to
GND

–0.5 to

V

CC +0.5

–0.5 to

VCC +0.5

V

TA Operating

Temperature

0 to +70 –55 to +125 °C

TBIAS Temperature

Under Bias

–55 to +125 –65 to +135 °C

TSTG Storage

Temperature

–55 to +125 –65 to +150 °C

PT Power Dissipation 0.5 0.5 W
IOUT DC Output

Current

–60 to +120 –60 to +120 mA

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT­INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability. No terminal voltage may exceed
V

CC by +0.5V unless otherwise noted.

2. Input and V

CC terminals only.

3. Outputs and I/O terminals only.

2613 lnk 03

PIN DESCRIPTION

Pin Names Description

OEAB

A-to-B Output Enable Input (Active LOW)

OEBA

B-to-A Output Enable Input (Active LOW)

CEAB

A-to-B Enable Input (Active LOW)

CEBA

B-to-A Enable Input (Active LOW)

LEAB

A-to-B Latch Enable Input (Active LOW)

LEBA

B-to-A Latch Enable Input (Active LOW)

A

0–A7 A-to-B Data Inputs or B-to-A 3-State Outputs

B

0–B7 B-to-A Data Inputs or A-to-B 3-State Outputs

2613 tbl 01

CAPACITANCE (TA = +25°C, f = 1.0MHz)

Symbol Parameter

(1)

Conditions Typ. Max. Unit

CIN Input

Capacitance

VIN = 0V 6 10 pF

COUT Output

Capacitance

VOUT = 0V 8 12 pF

NOTE:

1. This parameter is measured at characterization but not tested.

2613 lnk 04

IDT54/74FCT543T/AT/CT/DT - 2543T/AT/CT
FAST CMOS OCTAL LATCHED TRANSCEIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES

6.17 3

DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%

Symbol Parameter Test Conditions

(1)

Min. Typ.

(2)

Max. Unit

V

IH

Input HIGH Level Guaranteed Logic HIGH Level 2.0 — — V

V

IL

Input LOW Level Guaranteed Logic LOW Level — — 0.8 V

I

I H

Input HIGH Current

(4)

VCC = Max. VI = 2.7V — —

±

1

µ

A

I

I L

Input LOW Current

(4)

VI = 0.5V — —

±

1

I

OZH

High Impedance Output Current VCC = Max. VO = 2.7V — —

±

1

µ

A

I

OZL

(3-State Output pins)

(4)

VO = 0.5V — —

±

1

II Input HIGH Current

(4)

VCC = Max., VI = V

CC

(Max.) — —

±

1

µ

A

V

IK

Clamp Diode Voltage VCC = Min., I

IN

= –18mA — –0.7 –1.2 V

V

H

Input Hysteresis

—

— 200 — mV

I

CC

Quiescent Power Supply Current VCC = Max., VIN = GND or V

CC

— 0.01 1 mA

2613 lnk 05

OUTPUT DRIVE CHARACTERISTICS FOR 543T/AT/CT/DT

Symbol Parameter Test Conditions

(1)

Min. Typ.

(2)

Max. Unit

VOH Output HIGH Voltage VCC = Min.

V

IN = VIH or VIL

IOH = –6mA MIL.
I

OH = –8mA COM'L.

2.4 3.3 — V

IOH = –12mA MIL.
I

OH = –15mA COM'L.

2.0 3.0 — V

VOL Output LOW Voltage VCC = Min.

V

IN = VIH or VIL

IOL = 48mA MIL.
I

OL = 64mA COM'L.

— 0.3 0.55 V

IOS Short Circuit Current VCC = Max., VO = GND

(3)

–60 –120 –225 mA

IOFF Input/Output Power Off Leakage

(5)

VCC = 0V, VIN or VO ≤ 4.5V — — ±1 µA

2613 lnk 06

OUTPUT DRIVE CHARACTERISTICS FOR 2543T/AT/CT/DT

Symbol Parameter Test Conditions

(1)

Min. Typ.

(2)

Max. Unit

I

ODL

Output LOW Current VCC = 5V, V

IN

= V

IH or VIL, VOUT

= 1.5V

(3)

16 48 — mA

I

ODH

Output HIGH Current VCC = 5V, V

IN

= V

IH

or V

IL,VOUT

= 1.5V

(3)

–16 –48 — mA

V

OH

Output HIGH Voltage VCC = Min.

V

IN

= V

IH

or V

IL

IOH = –12mA MIL.
I

OH

= –15mA COM'L.

2.4 3.3 — V

V

OL

Output LOW Voltage VCC = Min.

V

IN

= V

IH

or V

IL

IOL = 12mA — 0.3 0.50 V

NOTES:

1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at Vcc = 5.0V, +25°C ambient.

3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.

4. The test limit for this parameter is ±5µA at T

A = –55°C.

5. This parameter is guaranteed but not tested.

2613 lnk 07