IDT IDT54FCT16841AT, IDT54FCT16841BT, IDT54FCT16841CT, IDT54FCT16841ET, IDT54FCT162841AT User Manual
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FAST CMOS 20-BIT
TRANSPARENT
LATCHES
Integrated Device Technology, Inc.
FEATURES:
• Common features:
– 0.5 MICRON CMOS Technology
– High-speed, low-power CMOS replacement for
ABT functions
– Typical tSK(o) (Output Skew) < 250ps
– Low input and output leakage ≤1µA (max.)
– ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
– Extended commercial range of -40°C to +85°C
–VCC = 5V ±10%
• Features for FCT16841AT/BT/CT/ET:
– High drive outputs (-32mA IOH, 64mA IOL)
– Power off disable outputs permit “live insertion”
– Typical V
VCC = 5V, TA = 25°C
• Features for FCT162841AT/BT/CT/ET:
– Balanced Output Drivers: ±24mA (commercial),
– Reduced system switching noise
– Typical VOLP (Output Ground Bounce) < 0.6V at
VCC = 5V,TA = 25°C
OLP (Output Ground Bounce) < 1.0V at
±16mA (military)
IDT54/74FCT16841AT/BT/CT/ET
IDT54/74FCT162841AT/BT/CT/ET
DESCRIPTION:
The FCT16841AT/BT/CT/ET and FCT162841AT/BT/CT/
ET 20-bit transparent D-type latches are built using advanced
dual metal CMOS technology. These high-speed, low-power
latches are ideal for temporary storage of data. They can be
used for implementing memory address latches, I/O ports,
and bus drivers. The Output Enable and Latch Enable controls
are organized to operate each device as two 10-bit latches or
one 20-bit latch. Flow-through organization of signal pins
simplifies layout. All inputs are designed with hysteresis for
improved noise margin.
The FCT16841AT/BT/CT/ET are ideally suited for driving
high-capacitance loads and low-impedance backplanes. The
output buffers are designed with power off disable capability
to allow "live insertion" of boards when used as backplane
drivers.
The FCT162841AT/BT/CT/ET have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimal undershoot, and controlled output fall times–reducing
the need for external series terminating resistors. The
FCT162841AT/BT/CT/ET are plug-in replacements for the
FCT16841AT/BT/CT/ET and ABT16841 for on-board interface applications.
FUNCTIONAL BLOCK DIAGRAM
1OE
1LE
1D1
TO 9 OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
D
C
2556 drw 01
1Q1
2
OE
2LE
2D1
D
C
TO 9 OTHER CHANNELS
2Q1
2556 drw 02
MILITARY AND COMMERCIAL TEMPERATURE RANGES JULY 1996
1996 Integrated Device Technology, Inc. 5.18 DSC-2556/7
1
IDT54/74FCT16841AT/BT/CT/ET, 162841AT/BT/CT/ET
FAST CMOS 20-BIT TRANSPARENT LATCHES MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
1
OE
1Q1
1Q2
GND
1Q3
Q4
1
VCC
Q5
1
Q6
1
1
Q7
GND
Q8
1
1
Q9
1Q10
2Q1
Q2
2
Q3
2
GND
2Q4
2
Q5
2
Q6
VCC
Q7
2
2
Q8
GND
Q9
2
Q10
2
2OE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SO56-1
SO56-2
15
SO56-3
16
17
18
19
20
21
22
23
24
26
27
28
SSOP/
TSSOP/TVSOP
TOP VIEW
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
3225
31
30
29
1LE
1D1
1
D2
GND
1D3
1
D4
VCC
1
D5
D6
1
1
D7
GND
D8
1
1
D9
1
D10
2D1
2
D2
2
D3
GND
D4
2
2
D5
2
D6
VCC
D7
2
2
D8
GND
2D9
2
D10
2
LE
2556 drw 03
OE
1
1Q1
Q2
1
GND
1Q3
1
Q4
VCC
1
Q5
1
Q6
1
Q7
GND
1
Q8
1
Q9
1Q10
2
Q1
2
Q2
Q3
2
GND
Q4
2
2
Q5
2
Q6
V
CC
2Q7
2
Q8
GND
2Q9
2
Q10
2OE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
CERPACK
TOP VIEW
E56-1
48
43
56
55
54
53
52
51
50
49
47
46
45
44
42
41
40
39
38
37
36
35
34
33
32
31
30
29
2556 drw 04
LE
1
1D1
1
D2
GND
1D3
1
D4
VCC
1
D5
1
D6
1
D7
GND
1
D8
1
D9
1
D10
D1
2
2
D2
2
D3
GND
2D4
D5
2
2
D6
VCC
2D7
D8
2
GND
2
D9
D10
2
2
LE
5.18 2
IDT54/74FCT16841AT/BT/CT/ET, 162841AT/BT/CT/ET
FAST CMOS 20-BIT TRANSPARENT LATCHES MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Pin Names Description
xDx Data Inputs
xLE Latch Enable Input (Active HIGH)
x
OE
xQx 3-State Outputs
ABSOLUTE MAXIMUM RATINGS
Symbol Description Max. Unit
(2)
VTERM
(3)
VTERM
TSTG Storage Temperature –65 to +150 °C
IOUT DC Output Current –60 to +120 mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
2. All device terminals except FCT162XXXT Output and I/O terminals.
3. Output and I/O terminals for FCT162XXXT.
Output Enable Input (Active LOW)
Terminal Voltage with Respect to
GND
Terminal Voltage with Respect to
GND
2556 tbl 01
(1)
–0.5 to +7.0 V
–0.5 to
CC +0.5
V
2556 lnk 03
V
FUNCTION TABLE
(1)
Inputs Outputs
xDx xLE x
OE
OE
xQx
HHLH
LHLL
XLLQ
(2)
XXHZ
NOTES: 2556 tbl 02
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
2. Output level before xLE HIGH-to-LOW Transition.
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol Parameter
C
IN
Input
Capacitance
C
OUT
Output
Capacitance
NOTE:
1. This parameter is measured at characterization but not tested.
(1)
Conditions Typ. Max. Unit
VIN = 0V 3.5 6.0
V
OUT
= 0V 3.5 8.0
pF
pF
2556 lnk 04
5.18 3
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