– Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
– Extended commercial range of -40°C to +85°C
–V
CC = 5V ±10%
• Features for FCT16601AT/CT/ET:
– High drive outputs (-32mA IOH, 64mA IOL)
– Power off disable outputs permit “live insertion”
– Typical VOLP (Output Ground Bounce) < 1.0V at
VCC = 5V, TA = 25°C
• Features for FCT162601AT/CT/ET:
– Balanced Output Drivers: ±24mA
– Reduced system switching noise
– Typical VOLP (Output Ground Bounce) < 0.6V at
VCC = 5V,TA = 25°C
DESCRIPTION:
The FCT16601AT/CT/ET and FCT162601AT/CT/ET 18-
bit registered transceivers are built using advanced dual metal
CMOS technology. These high-speed, low-power 18-bit registered bus transceivers combine D-type latches and D-type
flip-flops to allow data flow in either direction in a transparent,
latched or clocked mode. Each direction has an independent
latch enable, an independent clock with a clock enable, and an
independent output enable. The package is organized with a
flow-through signal pin organization to ease board layout. All
inputs are designed with hysteresis for improved noise margin.
This transceiver is ideally suited for high speed memory
interfaces which utilize high speed synchronous writes, by
clocking the data into a high speed register. Reads can then
be performed in a transparent or latched mode utilizing the
same transceiver.
The FCT16601AT/CT/ET are ideally suited for driving
high-capacitance loads and low-impedance backplanes. The
output buffers are designed with power off disable capability
to allow "live insertion" of boards when used as backplane
drivers.
The FCT162601AT/CT/ET have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimal undershoot, and controlled output fall times–reducing
the need for external series terminating resistors. The
FCT162601AT/CT/ET are plug-in replacements for the
FCT16601AT/CT/ET and ABT16601 for on-board bus interface applications.
FUNCTIONAL BLOCK DIAGRAM
OEAB
CLKENAB
CLKAB
LEAB
LEBA
CLKBA
CLKENBA
OEBA
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
B-to-A Output Enable Input (Active LOW)
LEABA-to-B Latch Enable Input
LEBAB-to-A Latch Enable Input
CLKABA-to-B Clock Input
CLKBAB-to-A Clock Input
AxA-to-B Data Inputs or B-to-A 3-State Outputs
BxB-to-A Data Inputs or A-to-B 3-State Outputs
CLKENABCLKENBA
A to B Clock Enable Input
B to A Clock Enable Input
PRODUCT PREVIEW
3247 tbl 01
ABSOLUTE MAXIMUM RATINGS
(1)
SymbolDescriptionMax.Unit
Terminal Voltage with Respect to
(2)
V
TERM
V
TERM
T
STG
I
OUT
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
2. All device terminals except FCT162XXXT Output and I/O terminals.
3. Output and I/O terminals for FCT162XXXT.
GND
Terminal Voltage with Respect to
(3)
GND
Storage Temperature–65 to +150°C
DC Output Current–60 to +120 mA
–0.5 to +7.0V
–0.5 to
V
CC
+0.5
3247 lnk 03
V
CAPACITANCE (TA = +25°C, f = 1.0MHz)
SymbolParameter
CINInput
Capacitance
CI/OI/O
Capacitance
NOTE:
1. This parameter is measured at characterization but not tested.
1. A-to-B data flow is shown. B-to-A data flow is similar but uses
LEBA and CLKBA.
2. Output level before the indicated steady-state input conditions were
established.
3. Output level before the indicated steady-state input conditions were
established, provided that CLKAB was HIGH before LEAB went LOW.
4. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High-impedance
↑ = LOW-to-HIGH Transition
OEAB
OEAB
(1)
ConditionsTyp.Max. Unit
VIN = 0V3.56.0pF
VOUT = 0V3.58.0pF
3247 lnk 04
(1,4)
Inputs Outputs
LEABCLKABAB
(2)
(2)
(3)
OEBA
,
5.92
IDT74FCT16601AT/CT/ET, 162601AT/CT/ET
FAST CMOS 18-BIT UNIVERSAL BUS TRANSCEIVERSCOMMERCIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = –40°C to +85°C, VCC = 5.0V ± 10%
SymbolParameterTest Conditions
(1)
Min.Typ.
VIHInput HIGH LevelGuaranteed Logic HIGH Level2.0——V
VILInput LOW LevelGuaranteed Logic LOW Level——0.8V
II HInput HIGH Current (Input pins)VCC = Max.VI = VCC——±1µA