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Integrated Device Technology, Inc.
FAST CMOS 16-BIT
BUFFER/LINE DRIVER
IDT54/74FCT16240T/AT/CT/ET
IDT54/74FCT162240T/AT/CT/ET
FEATURES:
• Common features:
– 0.5 MICRON CMOS Technology
– High-speed, low-power CMOS replacement for
ABT functions
– Typical tSK(o) (Output Skew) < 250ps
– Low input and output leakage ≤1µA (max.)
– ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
– Extended commercial range of -40°C to +85°C
–VCC = 5V ±10%
• Features for FCT16240T/AT/CT/ET:
– High drive outputs (-32mA IOH, 64mA IOL)
– Power off disable outputs permit “live insertion”
– Typical VOLP (Output Ground Bounce) < 1.0V at
VCC = 5V, TA = 25°C
• Features for FCT162240T/AT/CT/ET:
– Balanced Output Drivers: ±24mA (commercial),
±16mA (military)
– Reduced system switching noise
– Typical V
VCC = 5V,TA = 25°C
OLP (Output Ground Bounce) < 0.6V at
DESCRIPTION:
The FCT16240T/AT/CT/ET and FCT162240T/AT/CT/ET
16-bit buffer/line drivers are built using advanced dual metal
CMOS technology. These high-speed, low-power devices
offer bus/backplane interface capability with improved packing
density. The flow-through organization of signal pins simplifies
layout. The three-state controls are designed to operate these
devices in a Quad-Nibble, Dual-Byte or single 16-bit word
mode. All inputs are designed with hysteresis for improved
noise margin.
The FCT16240T/AT/CT/ET are ideally suited for driving
high capacitance loads and low-impedance backplanes. The
output buffers are designed with power off disable capability
to allow "live insertion" of boards when used as backplane
drivers.
The FCT162240T/AT/CT/ET have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimal undershoot, and controlled output fall times– reducing the need for external series terminating resistors. The
FCT162240T/AT/CT/ET are plug-in replacements for
FCT16240T/AT/CT/ET and 54/74ABT16240 for on-board interface applications.
FUNCTIONAL BLOCK DIAGRAM
1OE
1A1
1A2
1
A3
1
A4
OE
2
2A1
2A2
2
A3
2
A4
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
Y1
1
Y2
1
Y3
1
Y4
1
Y1
2
Y2
2
Y3
2
Y4
2
2541 drw 01
3OE
3A1
3A2
A3
3
A4
3
4
OE
4A1
4A2
A3
4
A4
4
3
Y1
3
Y2
3
Y3
Y4
3
Y1
4
Y2
4
Y3
4
Y4
4
2541 drw 02
MILITARY AND COMMERCIAL TEMPERATURE RANGES AUGUST 1996
1996 Integrated Device Technology, Inc. 5.1 DSC–4226/9
1
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IDT54/74FCT16240T/AT/CT/ET,162240T/AT/CT/ET
FAST CMOS 16-BIT BUFFER/LINE DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
1
OE
1Y1
1Y2
GND
1Y3
1Y4
V
CC
2Y1
2Y2
GND
2Y3
2Y4
Y
3
3Y2
GND
3Y3
3Y4
V
CC
1
2
3
4
5
6
7
8
9
10
11
SO48-1
12
SO48-2
SO48-3
1
13
14
15
16
17
18
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
2
OE
1A1
1
A
2
GND
1A3
1
A
4
V
CC
2
A
1
2
A
2
GND
A
3
2
2
A
4
3
A
1
3
A
2
GND
3
A
3
3
A
4
V
CC
1
OE
1Y1
1Y2
GND
1Y3
1Y4
V
CC
2Y1
2Y2
GND
2Y3
2Y4
Y
3
3Y2
GND
3Y3
3Y4
CC
V
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
E48-1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
2
OE
1A1
A
2
1
GND
1A3
1
A
4
V
CC
2
A
1
A
2
2
GND
2
A
3
2
A
4
A
1
3
3
A
2
GND
3
A
3
A
4
3
V
CC
4Y1
4Y2
GND
4Y3
4Y4
4
OE
19
20
21
22
23
24
SSOP/
TSSOP/TVSOP
TOP VIEW
30
29
28
27
26
25
4
A
1
A
2
4
GND
4
A
3
4
A
4
3
OE
2541 drw 03
4Y1
4Y2
GND
4Y3
4Y4
4
OE
19
20
21
22
23
24
CERPACK
TOP VIEW
30
29
28
27
26
25
2541drw 04
A
1
4
A
2
4
GND
4
A
3
4
A
4
3
OE
5.1 2
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IDT54/74FCT16240T/AT/CT/ET,162240T/AT/CT/ET
FAST CMOS 16-BIT BUFFER/LINE DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Pin Names Description
x
OE
xAx Data Inputs
xYx 3-State Outputs
ABSOLUTE MAXIMUM RATINGS
Symbol Description Max. Unit
(2)
VTERM
(3)
VTERM
TSTG Storage Temperature –65 to +150 °C
IOUT DC Output Current –60 to +120 mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
2. All device terminals except FCT162XXXT Output and I/O terminals.
3. Output and I/O terminals for FCT162XXXT.
3–State Output Enable Inputs (Active LOW)
Terminal Voltage with Respect to
GND
Terminal Voltage with Respect to
GND
2541 tbl 01
(1)
–0.5 to +7.0 V
–0.5 to
CC +0.5
V
2541 lnk 03
V
FUNCTION TABLE
(1)
Inputs Outputs
x
OEOE xAx x
YYx
LLH
LHL
HXZ
NOTE:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High Impedance
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol Parameter
C
IN
Input
Capacitance
C
OUT
Output
Capacitance
NOTE:
1. This parameter is measured at characterization but not tested.
(1)
Conditions Typ. Max. Unit
VIN = 0V 3.5 6.0
V
OUT
= 0V 3.5 8.0
2541 tbl 02
pF
pF
2541 lnk 04
5.1 3