Integrated Device Technology Inc IDT54FCT138ATD, IDT54FCT138ATDB, IDT54FCT138ATE, IDT54FCT138ATEB, IDT54FCT138ATL Datasheet

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Integrated Device Technology, Inc.
FAST CMOS 1-OF-8 DECODER WITH ENABLE
IDT54/74FCT138T/AT/CT
FEATURES:
• Std., A and C speed grades
• Low input and output leakage 1µA (max.)
• CMOS power levels
• True TTL input and output compatibility – VOH = 3.3V (typ.) – VOL = 0.3V (typ.)
• High drive outputs (-15mA I
OH, 48mA IOL)
• Meets or exceeds JEDEC standard 18 specifications
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
• Available in DIP, SOIC, QSOP, CERPACK and
LCC packages
FUNCTIONAL BLOCK DIAGRAM
A2 A1 A0 E1 E2 E3
DESCRIPTION:
The IDT54/74FCT138T/AT/CT are 1-of-8 decoders built using an advanced dual metal CMOS technology. The IDT54/ 74FCT138T/AT/CT accepts three binary weighted inputs (A0, A1, A2) and, when enabled, provides eight mutually exclusive active LOW outputs (
features three enable inputs, two active LOW ( active HIGH (E3). All outputs will be HIGH unless
O0-O
7). The IDT54/74FCT138T/AT/CT
E
1, E2) and one
E
1 and E2 are
LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four IDT54/74FCT138T/AT/CT devices and one inverter.
PIN CONFIGURATIONS
A
0
1 2
1
A A
E E
E O
GND
2 1 2
3
7
P16-1
3
D16-1
4
SO16-1 SO16-7
5 6
E16-1
7 89
DIP/SOIC/QSOP/CERPACK
TOP VIEW
16 15 14 13 12
&
11 10
V
CC
O
0
O
1
O
2
O
3
O
4
O
5
O
6
2570 drw 02
O7 O6 O5 O4 O3 O2 O1 O0
2570 drw 01
INDEX
NC
A2
E E3
E1
A0
A1
3 2 20 19
4
1
5 6
L20-2
2
7 8
NC
CC
V
0
O
18 17 16 15 14
O1 O2
NC O O4
3
9 10111213
O7
NC
GND
O5
O6
2570 drw 03
LCC
TOP VIEW
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES APRIL 1995
1995 Integrated Device Technology, Inc. 6.3 DSC-4213/5
1
IDT54/74FCT138T/AT/CT FAST CMOS 1-OF-8 DECODER-WITH ENABLE MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Pin Names Description
A0–A
E1,
E
3
O0–
2
E
2
O
7
Address Inputs
Enable Inputs (Active LOW) Enable Input (Active HIGH) Outputs (Active LOW)
2570 tbl 01
FUNCTION TABLE
Inputs
E
1
E
H X X
L L L L L L L L
E
2 E3 A0 A1 A2
E
X H X
L L L L L L L L
X X
L
H H H H H H H H
X X X
L
H
L
H
L
H
L
H
X X X
L
L H H
L
L H H
O
0
O
X X X
L L L
L H H H H
H H H
L H H H H H H H
O
1
O
H H H
H L H H H H H H
O
2
O
H H H
H H L H H H H H
Outputs
O
3
O
H H H
H H H L H H H H
O
4
O
H H H
H H H H L H H H
O
5
O
H H H
H H H H H L H H
O
6
O
H H H
H H H H H H L H
O
7
O
H H H
H H H H H H H L
2570 tbl 02
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol Rating Commercial Military Unit
(2)
VTERM
Terminal Voltage
–0.5 to +7.0 –0.5 to +7.0 V with Respect to GND
(3)
VTERM
TA Operating
Terminal Voltage with Respect to GND
–0.5 to
V
CC +0.5
–0.5 to
VCC +0.5
0 to +70 –55 to +125 °C
V
Temperature
TBIAS Temperature
–55 to +125 –65 to +135 °C Under Bias
TSTG Storage
–55 to +125 –65 to +150 °C Temperature
PT Power Dissipation 0.5 0.5 W IOUT DC Output
–60 to +120 –60 to +120 mA Current
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT­INGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed
CC by +0.5V unless otherwise noted.
V
2. Input and V
3. Outputs and I/O terminals only.
CC terminals only.
2570 lnk 03
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol Parameter
C
IN
Input Capacitance
C
OUT
Output Capacitance
NOTE:
1. This parameter is measured at characterization but not tested.
(1)
Conditions Typ. Max. Unit
VIN = 0V 6 10
V
OUT
= 0V 8 12
pF
pF
2570 lnk 04
6.3 2
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