Integrated Device Technology Inc IDT71V256SA10Y, IDT71V256SA12PZ, IDT71V256SA12Y, IDT71V256SA15PZ, IDT71V256SA15PZI Datasheet

Integrated Device Technology, Inc.

LOW POWER

3.3V CMOS FAST SRAM
256K (32K x 8-BIT)

IDT71V256SA

FEATURES

• Ideal for high-performance processor secondary cache

• Commercial (0° to 70°C) and Industrial (-40° to 85°C)
temperature options

• Fast access times:
— Commercial: 10/12/15/20ns
— Industrial: 15ns

• Low standby current (maximum):
— 2mA full standby

• Small packages for space-efficient layouts:
— 28-pin 300 mil SOJ
— 28-pin 300 mil plastic DIP (Commercial only)
— 28-pin TSOP Type I

• Produced with advanced high-performance CMOS
technology

• Inputs and outputs are LVTTL-compatible

• Single 3.3V(±0.3V) power supply

FUNCTIONAL BLOCK DIAGRAM

DESCRIPTION

The IDT71V256SA is a 262,144-bit high-speed static RAM
organized as 32K x 8. It is fabricated using IDT’s high­performance, high-reliability CMOS technology.

The IDT71V256SA has outstanding low power character­istics while at the same time maintaining very high perfor­mance. Address access times of as fast as10 ns are ideal for

3.3V secondary cache in 3.3V desktop designs.

When power management logic puts the IDT71V256SA in
standby mode, its very low power characteristics contribute to
extended battery life. By taking CS HIGH, the SRAM will

automatically go to a low power standby mode and will remain
in standby as long as CS remains HIGH. Furthermore, under
full standby mode (CS at CMOS level, f=0), power consump­tion is guaranteed to always be less than 6.6mW and typically
will be much smaller.

The IDT71V256SA is packaged in 28-pin 300 mil SOJ, 28­pin 300 mil plastic DIP, and 28-pin 300 mil TSOP Type I
packaging.

A0

ADDRESS
DECODER

A14

I/O0

INPUT

DATA

I/O7

CS

OE

WE

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

CONTROL

CIRCUIT

CIRCUIT

262,144 BIT

MEMORY ARRAY

I/O CONTROL

VCC
GND

3101 drw 01

INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES MAY 1997

1997 Integrated Device Technology, Inc. DSC-3101/04

1

IDT71V256SA

3.3V CMOS STATIC RAM 256K (32K x 8-BIT) INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES

PIN CONFIGURATIONS ABSOLUTE MAXIMUM RATINGS

A
A

A
A
A
A
A
A
A

A
I/O
I/O
I/O

GND

1

14
12

2
3

7

4

6

5

5
4

6
7
8
9
10
11
12
13
14

SO28-5

P28-2

3
2
1
0
0
1
2

DIP/SOJ

28

V

CC

27

WE

26

A

13

25

A

8

24

A

9

23

A

11

22

OE

21

A

10

20

CS

19
18
17
16
15

7

I/O

6

I/O
I/O

5

I/O

4

I/O

3

3101 drw 02

TOP VIEW

22

OE

23

A

11

24

A

9

25

A

8

26

A

13

27

WE

28

V

CC

1

A

14

2

A

12

3

A

7

4

A

6

5

A

5

6

A

4

7

A

3

SO28-8

21
20
19
18
17
16
15
14
13
12
11
10

9
8

A

10

CS

I/O

7

I/O

6

I/O

5

I/O

4

I/O

3

GND
I/O

2

I/O

1

I/O

0

A

0

A

1

A

2

3101 drw 11

TSOP

TOP VIEW

Symbol Rating Value Unit

CC Supply Voltage –0.5 to +4.6 V

V

Relative to GND

(2)

V

TERM

Terminal Voltage –0.5 to VCC+0.5 V
Relative to GND

T

BIAS Temperature Under Bias –55 to +125 °C

T

STG Storage Temperature –55 to +125 °C

P

T Power Dissipation 1.0 W

I

OUT DC Output Current 50 mA

NOTES: 3101 tbl 03

1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.

2. Input, Output, and I/O terminals; 4.6V maximum.

CAPACITANCE

(TA = +25°C, f = 1.0MHz, SOJ package)

Symbol Parameter

C

IN Input Capacitance VIN = 3dV 6 pF

C

OUT Output Capacitance VOUT = 3dV 7 pF

NOTE: 3101 tbl 04

1. This parameter is determined by device characterization, but is not
production tested.

(1)

Conditions Max. Unit

(1)

PIN DESCRIPTIONS

Name Description

A

0–A14 Addresses

I/O

0–I/O7 Data Input/Output

CS
WE
OE

GND Ground
V

CC Power

TRUTH TABLE

WE

WE

X H X High-Z Standby (ISB)
XV
H L H High-Z Output Disable
HLLD

LLXD

NOTE: 3101 tbl 02

1. H = VIH, L = VIL, X = Don’t Care

CS

CS

HC X High-Z Standby (ISB1)

Chip Select
Write Enable
Output Enable

(1)

OE

OE

3101 tbl 01

I/O Function

OUT Read

IN Write

RECOMMENDED OPERATING
TEMPERATURE AND SUPPLY VOLTAGE

Grade Temperature GND VCC

Commercial 0°C to +70°C 0V 3.3V ± 0.3V
Industrial -40°C to +85°C 0V 3.3V ± 0.3V

3101 tbl 05

RECOMMENDED DC OPERATING
CONDITIONS

Symbol Parameter Min. Typ. Max. Unit

VCC Supply Voltage 3.0 3.3 3.6 V
GND Supply Voltage 0 0 0 V
VIH Input High Voltage - Inputs 2.0 — 5.0 V
VIH Input High Voltage - I/O 2.0 — Vcc+0.3 V
V

IL Input Low Voltage –0.3

NOTE: 3101 tbl 06

1. VIL (min.) = –2.0V for pulse width less than 5ns, once per cycle.

(1)

— 0.8 V

2