Integrated Device Technology Inc IDT71V016SA10BF8, IDT71V016SA10PH8, IDT71V016SA10Y8, IDT71V016SA12BF8, IDT71V016SA12BFI8 Datasheet

3.3V CMOS Static RAM
1 Meg (64K x 16-Bit)

IDT71V016SA

Features

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64K x 16 advanced high-speed CMOS Static RAM

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Equal access and cycle times

— Commercial: 10/12/15/20ns
— Industrial: 12/15/20ns

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One Chip Select plus one Output Enable pin

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Bidirectional data inputs and outputs directly
LVTTL-compatible

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Low power consumption via chip deselect

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Upper and Lower Byte Enable Pins

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Single 3.3V power supply

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Available in 44-pin Plastic SOJ, 44-pin TSOP, and
48-Ball Plastic FBGA packages

Functional Block Diagram

Output
Enable
Buffer

Address
Buffers

A0–A

OE

15

Row / Column

Decoders

Description

The IDT71V016 is a 1,048,576-bit high-speed Static RAM organized
as 64K x 16. It is fabricated using IDT’s high-perfomance, high-reliability
CMOS technology. This state-of-the-art technology, combined with inno­vative circuit design techniques, provides a cost-effective solution for high­speed memory needs.

The IDT71V016 has an output enable pin which operates as fast
as 5ns, with address access times as fast as 10ns. All bidirectional
inputs and outputs of the IDT71V016 are LVTTL-compatible and operation
is from a single 3.3V supply. Fully static asynchronous circuitry is used,
requiring no clocks or refresh for operation.

The IDT71V016 is packaged in a JEDEC standard 44-pin Plastic
SOJ, a 44-pin TSOP Type II, and a 48-ball plastic 7 x 7 mm FBGA.

CS

WE

BHE

BLE

©2000 Integrated Device Technology, Inc.

Chip
Enable
Buffer

Write
Enable
Buffer

Byte
Enable
Buffers

64K x 16
Memory

Array

I/O

15

8

Sense

16

Amps
and
Write
Drivers

8

High
Byte

I/O

Buffer

Low
Byte

I/O

Buffer

8

8

3834 drw01

I/O

I/O

I/O

8

7

0

JUNE 2002

1

DSC-3834/06

IDT71V016SA, 3.3V CMOS Static RAM

I/O0-I/O7I/O8-I/O15Function

1 Meg (64K x 16-Bit) Commercial and Industrial Temperature Ranges

Pin Configurations

1

4

2

3

3

2

1

4

0

5
6
7

0

8

1
2

9

3

10
11
12

4

13

5

14

6

15

7

16

SO44-1
SO44-2

17
18
19
20
21
22

I/O
I/O
I/O
I/O
V

V
I/O
I/O
I/O
I/O

WE

A
A
A
A

A
A
A
A
A

CS

DD

SS

15
14
13
12

NC

44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23

A

5

A

6

A

7

OE
BHE
BLE

I/O
I/O
I/O
I/O
V

SS

V

DD

I/O
I/O
I/O
I/O
NC
A

8

A

9

A

10

A

11

NC

123456

A

BLE OE

BI/O

CI/O9I/O

15
14
13
12

DVSSI/O

EVDDI/O

FI/O14I/O

11
10
9
8

GI/O15NC A

8

BHE

10

11

12

13

HNC A8A

A

0

3

A

A

5

NC A

A

1

4

A

A

6

7

NC NC I/O

14

A

12

9

15

A

13

A

10

A

FBGA (BF48-1)

A

CS

I/O

I/O

I/O

WE

A

1

3

4

5

NC

0

I/O

I/O

2

DD

V

SS

V

6

I/O

7

I/O

NC

3834 tbl 02a

2

11

Top View

Pin Description

15

SOJ/TSOP

Top View

3834 drw 02

A0 – A

CS

WE

OE

Address Inputs Input
Chip Select Input
Write Enable Input

Output En able Input
BHE High By te Enable Input
BLE Low By te En able Input

0

15

Truth Table

(1)

I/O
V
V

– I/O

DD

SS

Data Input/Output I/O

3.3V Pow er Pow er

Ground Gnd

CS OE WE BLE BHE

H X X X X High-Z High-Z Deselected – Stan dby

LLHL H DATA
L L H H L High-Z DATA
LLHL L DATA
LXL L L DATA
LXL L H DATA
L X L H L High-Z DATA

OUT

OUT

High-Z Low By t e Read

OUT

OUT

DATA

IN

IN

IN

DATA

High-Z Low By t e Write

IN

High Byt e Read
Word Re ad
Word Write

High Byt e Write
L H H X X H igh-Z High-Z Outputs D isabled
L X X H H H igh-Z High-Z Outputs D isabled

NOTE:

1. H = VIH, L = VIL, X = Don't care.

3834 tbl 01

3834 tbl 02

6.42

2

IDT71V016SA, 3.3V CMOS Static RAM

Symbol

Parameter

71V016SA10

71V016SA12

71V016SA15

71V016SA20

Unit

Com'l Only

Com'l

Ind

Com'l

Ind

Com'l

Ind

Max.

Typ.

(4)

Symbol

Rating

Value

Unit

Grade

Temperature

VSSV

DD

Symbol

Parameter

Min.

Typ.

Max.

Unit

(1 )

___

___

___

___

1 Meg (64K x 16-Bit) Commercial and Industrial Temperature Ranges

Absolute Maximum Ratings

(1)

Recommended Operating
Temperature and Supply Voltage

DD

V

IN

, V

V

BIAS

T

STG

T

T

P

OUT

I

NOTE:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.

Capacitance

(TA = +25°C, f = 1.0MHz, SOJ package)

Symbol Parameter

C

IN

C

I/O

NOTE:

1. This parameter is guaranteed by device characterization, but not production tested.

Supply Voltage Relativ e to

SS

V
Terminal Voltage Relative

OUT

SS

to V

–0.5 t o +4. 6 V

–0.5 t o VDD+0.5 V

Tem perature Under Bias –55 to +125
Storage Temperature –55 to + 125
Pow er Dissipation 1.25 W
DC Out put C urrent 50 mA

Con ditio ns M ax. Unit

Input Capacitance VIN = 3dV 6 pF
I/O C apacitance V

= 3dV 7 pF

OUT

o

C

o

C

3834 tbl 03

3834 tbl 0 6

Com me rc ial 0° C to +7 0°C 0V Se e Be lo w

Indus trial -40° C to + 85°C 0V Se e B e lo w

Recommended DC Operating
Conditions

(1)

V

Supply Voltage 3.15 3.3 3.6 V

DD

(2)

DD

V

Supply Voltage 3.0 3.3 3.6 V

Vss Ground 0 0 0 V

IH

V

Input H igh Voltage 2.0

IL

V

Input L ow Voltage –0.3

NOTES:

1. For 71V016SA10 only.

2. For all speed grades except 71V016SA10.

3. VIH (max.) = VDD+2V for pulse width less than 5ns, once per cycle.

4. VIL (min.) = –2V for pulse width less than 5ns, once per cycle.

____

VDD+0.3

(4 )

____

0.8 V

3834 tbl 04

(3)

3834 tbl 05

V

DC Electrical Characteristics

(VDD = Min. to Max., Commercial and Industrial Temperature Ranges)

Symbol Parameter Test Condition

LI

|I

| Input Leakage C urrent VDD = Max., VIN = VSS to V

LO

|I

| O utput Leakage Current VDD = Max., CS = VIH, V

OL

V

OH

V

DC Electrical Characteristics

Output Low Voltage IOL = 8mA, VDD = Min.
Output H igh Voltage IOH = –4mA, VDD = M in. 2.4

(1,2)

(VDD = Min. to Max., VLC = 0.2V, VHC = VDD – 0.2V)

Dynamic Operating Current

CC

I

LC

CS ≤ V

Dynamic Standby Power Supply Current

SB

I

CS ≥ V

Full Stand b y Po we r Sup p ly Current (static )

SB1

I

CS ≥ V

, Outputs Open, VDD = Max., f = f

HC

, Outputs Open, VDD = Max., f = f

HC

, Outputs Open, VDD = Max., f = 0

MAX

MAX

(3)

(3)

(3)

NOTES:

1. All values are maximum guaranteed values.

2. All inputs switch between 0.2V (Low) and VDD – 0.2V (High).

3. fMAX = 1/tRC (all address inputs are cycling at fMAX); f = 0 means no address input lines are changing .

4. Typical values are measured at 3.3V, 25°C and with equal read and write cycles.

6.42

160 150 160 130 130 120 120
125 120 -- 110 -- 110 --

45 40 45 35 35 30 30

10 10 10 10 10 10 10 mA

3

DD

OUT

= VSS to V

IDT71V016SA

UnitMin. Max.

5µA

DD

5µA

0.4 V
V

3834 tbl 0 7

mA

mA

3834 tbl 08