Integrated Device Technology Inc IDT71342SA35PF, IDT71342SA45J, IDT71342SA45PF, IDT71342SA55J, IDT71342SA55PF Datasheet

Integrated Device Technology, Inc.

HIGH-SPEED
4K x 8 DUAL-PORT
STATIC RAM WITH SEMAPHORE

IDT71342SA/LA

FEATURES:

• High-speed access
— Commercial: 20/25/35/45/55/70ns (max.)

• Low-power operation
— IDT71342SA

Active: 500mW (typ.)
Standby: 5mW (typ.)

— IDT71342LA

Active: 500mW (typ.)
Standby: 1mW (typ.)

• Fully asynchronous operation from either port

• Full on-chip hardware support of semaphore signalling
between ports

• Battery backup operation—2V data retention

• TTL-compatible; single 5V (±10%) power supply

• Available in plastic packages

• Industrial temperature range (–40°C to +85°C) is avail-

able, tested to military electrical specifications

FUNCTIONAL BLOCK DIAGRAM

R/

W

L

CE

L

DESCRIPTION:

The IDT71342 is an extremely high-speed 4K x 8 Dual-Port
Static RAM with full on-chip hardware support of semaphore
signalling between the two ports.

The IDT71342 provides two independent ports with separate
control, address, and I/O pins that permit independent,
asynchronous access for reads or writes to any location in
memory. To assist in arbitrating between ports, a fully
independent semaphore logic block is provided. This block
contains unassigned flags which can be accessed by either
side; however, only one side can control the flag at any time.
An automatic power down feature, controlled by CE and
permits the on-chip circuitry of each port to enter a very low
standby power mode (both CE and

SEM

High).

Fabricated using IDT’s CMOS high-performance
technology, this device typically operates on only 500mW of
power. Low-power (LA) versions offer battery backup data
retention capability, with each port typically consuming 200µW
from a 2V battery. The device is packaged in either a 64-pin
TQFP, thin quad plastic flatpack, or a 52-pin PLCC.

R/

W

R

CE

R

SEM

,

OE

I/O

R

0R

- I/O

7R

OE

I/O0L- I/O

7L

L

COLUMN

I/O

COLUMN

I/O

MEMORY

ARRAY

SEMAPHORE

LOGIC

SEM

SEM

L

LEFT SIDE

A0L- A

11L

ADDRESS

DECODE

LOGIC

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

RIGHT SIDE

ADDRESS

DECODE

LOGIC

R

A0R- A

11R

2721 drw 01

COMMERCIAL TEMPERATURE RANGE OCTOBER 1996

©1996 Integrated Device Technology, Inc. DSC-2721/4

For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.

6.05

1

IDT71342SA/LA
HIGH-SPEED 4K x 8 DUAL-PORT STATIC RAM WITH SEMAPHORE COMMERCIAL TEMPERATURE RANGE

PIN CONFIGURATIONS

L

INDEX

I/O
I/O
I/O
I/O

INDEX

OE

A

0L

A

1L

A

2L

A

3L

A

4L

A

5L

A

6L

N/C

A

7L

A

8L

A

9L

N/C

I/O

0L

I/O

1L

I/O

2L

0L

A

8

A

1L

9

A

2L

10

A

3L

11

A

4L

12

A

5L

13

A

6L

14

A

7L

15

A

8L

16

A

9L

17

0L

18

1L

19

2L

20

3L

4L

I/O

N/C

64

1

L

2
3

4
5
6

7
8
9

10
11
12

13
14
15

16

171819

3L

I/O

11L

10L

OE

A

A

5L

7L

I/O

I/O6LI/O

L

10L

11L

SEM

A

A

N/C

636261605958575655

20

21

N/C

I/O4LI/O5LI/O6LI/O

(1,2)

L

L

L

W

CC

V

R/

CE

SEM

234567

1

IDT71342

J52-1

PLCC

TOP VIEW

N/C

GND

I/O0RI/O1RI/O

L

L

W

CC

CE

R/

V

N/C

71342

PN64-1

64-PIN TQFP

TOP VIEW

25

24

23

22

7L

N/C

N/C

GND

R

R

R

W

11R

SEM

I/O4RI/O5RI/O

11R

A

52

53

29

A

10R

A

51

30

N/C

474849505152

33323130292827262524232221

10R

A

46
45
44
43
42
41
40
39
38
37
36
35
34

6R

N/C

50

31

N/C

49

32

5R

R/

CE

(3)

2R

3R

I/O

R

R

R

W

CE

R/

SEM

54

(3)

28

27

26

I/O0RI/O1RI/O2RI/O3RI/O4RI/O

OE

A
A
A
A
A
A
A
A
A
A
N/C
I/O

2721 drw 02

48
47

46
45

44
43

42
41
40

39
38
37

36
35
34
33

2721 drw 03

NOTES:

1. All Vcc pins must be connected to the power supply.

2. All GND pins must be connected to the ground supply.

3. This text does not indicate orientation of the actual part-marking.

ABSOLUTE MAXIMUM RATINGS

(1)

Symbol Rating Com’l. Mil. Unit

(2)

V

TERM

Terminal Voltage –0.5 to +7.0 –0.5 to +7.0 V
with Respect
to Ground

R
0R
1R
2R
3R
4R
5R
6R
7R
8R
9R

7R

OE

R

A

0R

A

1R

A

2R

A

3R

A

4R

A

5R

A

6R

N/C
A

7R

A

8R

A

9R

N/C
N/C
I/O

7R

I/O

6R

T

A Operating 0 to +70 –55 to +125 °C

Temperature

T

BIAS Temperature –55 to +125 –65 to +135 °C

Under Bias

STG Storage –55 to +125 –65 to +150 °C

T

Temperature

(3)

P

T

Power Dissipation 1.5 1.5 W

OUT DC Output Current 50 50 mA

I

NOTES: 2721 tbl 01

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.

2. V

TERM must not exceed Vcc + 0.5V for more than 25%of the cycle time or

10 ns maximum, and is limited to

< 20mA for the period of VTERM > Vcc

+0.5V.

CAPACITANCE

(1)

(TA = +25°C, f = 1.0MHz) TQFP Only

Symbol Parameter Conditions

C

IN Input Capacitance VIN = 3dV 9 pF
OUT Output Capacitance VOUT = 3dV 10 pF

C

NOTES: 2721 tbl 02

1. This parameter is determined by device characterization but is not
production tested.

2. 3dv references the interpolated capacitance when the input and output
signals switch from 0V to 3V and from 3V to 0V.

(2)

Max. Unit

RECOMMENDED OPERATING
TEMPERATURE AND SUPPLY VOLTAGE

Ambient

Grade Temperature GND V

CC

Commercial 0°C to +70°C 0V 5.0V ± 10%

2721 tbl 03

RECOMMENDED DC OPERATING CONDITIONS

Symbol Parameter Min. Typ. Max. Unit

CC Supply Voltage 4.5 5.0 5.5 V

V
GND Ground 0 0 0 V

IH Input High Voltage 2.2 — 6.0

V
V

IL Input Low Voltage –0.5

(1)

— 0.8 V

NOTES: 2721 tbl 04

1. VIL (min.) > -1.5V for pulse width less than 10ns.

TERM must not exceed Vcc + 0.5V.

2. V

(2)

V

6.05 2

IDT71342SA/LA
HIGH-SPEED 4K x 8 DUAL-PORT STATIC RAM WITH SEMAPHORE COMMERCIAL TEMPERATURE RANGE

DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE

Symbol Parameter Test Conditions Min. Max. Min. Max. Unit

LI| Input Leakage Current

|I
|I

LO| Output Leakage Current

OL Output Low Voltage IOL = 6mA — 0.4 — 0.4 V

V

OH Output High Voltage IOH = –4mA 2.4 — 2.4 — V

V

NOTE:

1. At Vcc < 2.0V input leakages are undefined.

(1)

VCC = 5.5V, VIN = 0V to VCC —10— 5µA

CE

= VIH, VOUT = 0V to VCC —10— 5µA

OL = 8mA — 0.5 — 0.5 V

I

(VCC = 5V ± 10%)

IDT71342SA IDT71342LA

2721 tbl 05

DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE

71342X20 71342X25 71342X35 71342X45 71342X55 71342X70

Symbol Parameter Test Conditions Version Typ.

ICC Dynamic Operating

IL COM’L. S — 280 — 280 — 260 — 240 — 240 — 240 mA

CE

= V

(2)

Max. Typ.

Current Outputs Open L — 240 — 240 — 220 — 200 — 200 — 200
(Both Ports Active)

ICC1 Dynamic Operating

SEM

= Don't Care

(3)

f = f

MAX

CE

= VIH COM’L. S — 280 — 200 — 185 — 170 — 170 — 170 mA

Current Outputs Open L — 240 — 170 — 155 — 140 — 140 — 140
(Semaphores
Both Sides) f = fMAX

ISB1 Standby Current

(Both Ports—TTL
Level Inputs) f = f

ISB2 Standby Current

(One Port—TTL
Level Inputs) Active Port Outputs

ISB3 Full Standby Current Both Ports

(Both Ports—All
CMOS Level Inputs) V

ISB4 Full Standby Current One Port

(One Port—All
CMOS Level Inputs) V

SEM

< VIL

(3)

CE

L and CER = VIH COM’L. S 25 80 25 80 25 75 25 70 25 70 25 70 mA

SEM

L =

SEM

R > VIH L 25 80 25 50 25 45 25 40 25 40 25 40

(3)

MAX

CE

"A"

= VIL and COM’L. S — 180 — 180 — 170 — 160 — 160 — 160 mA

CE

Open, f = f

CE

IN > VCC - 0.2V or
IN < 0.2V

V

SEM

V

CC - 0.2V, f = 0

CE

IN > VCC - 0.2V or
IN < 0.2V

V

SEM

CC - 0.2V

V
Active Port Outputs
Open, f = f

(5)

"B" = VIH

MAX

CE

R > VCC - 0.2V L 0.2 4.5 0.2 4.0 0.2 4.0 0.2 4.0 0.2 4.0 0.2 4.0

L =

SEM

CE

"B" > VCC - 0.2V L — 140 — 140 — 130 — 120 — 120 — 120

L =

SEM

MAX

L — 150 — 150 — 140 — 130 — 130 — 130

(3)

L and COM’L. S 1.0 15 1.0 15 1.0 15 1.0 15 1.0 15 1.0 15 mA

R >

(4)

"A" or COM’L. S — 170 — 170 — 150 — 150 — 150 — 150 mA

R >

(3)

NOTES:

1. “X” in part number indicates power rating (SA or LA).

CC = 5V, TA = +25°C for typical values, and parameters are not production tested.

2. V

MAX = 1/tRC = All inputs cycling at f = 1/tRC (except Output Enable).

3. f

4. f = 0 means no address or control lines change. Applies only to inputs at CMOS level standby I

5. Port "A" may be either left or right port. Port "B" is opposite from port "A".

(2)

Max. Typ.

(1)

(VCC = 5.0V ± 10%)

(2)

SB3.

Max. Typ.

(2)

Max. Typ.

(2)

Max. Typ.

(2)

Max. Unit

2721 tbl 06

6.05 3

IDT71342SA/LA

+5V

1250Ω

5pF *775Ω

DATA

OUT

2721 drw 06

HIGH-SPEED 4K x 8 DUAL-PORT STATIC RAM WITH SEMAPHORE COMMERCIAL TEMPERATURE RANGE

DATA RETENTION CHARACTERISTICS

(LA Version Only) VLC = 0.2V, VHC = VCC - 0.2V

Symbol Parameter Test Condition Min. Typ.

V

DR VCC for Data Retention — 2.0 — — V

CCDR Data Retention Current VCC = 2V,

I

SEM

(3)

tCDR

(3)

t

R

NOTES:

1. V

CC = 2V, TA = +25°C, and are not production tested.

RC = Read Cycle Time.

2. t

3. This parameter is guaranteed by device characterization, but is not production tested.

Chip Deselect to Data Retention Time VIN ≥ VHC or ≤ VLC 0——ns
Operation Recovery Time tRC

≥ V

CE

≥ VHC COM’L. — 100 1500 µA

HC

(2)

(1)

Max. Unit

——ns

2721 tbl 07

DATA RETENTION WAVEFORM

DATA RETENTION MODE

V

CC

t

CDR

CE

V

IH

AC TEST CONDITIONS

Input Pulse Levels GND to 3.0V
Input Rise/Fall Times 5ns
Input Timing Reference Levels 1.5V
Output Reference Levels 1.5V
Output Load Figures 1 and 2

+5V

1250Ω

OUT

DATA

30pF775Ω

2721 tbl 08

V

DR

≥ 2V

V

DR

4.5V4.5V
t

R

V

IH

2721 drw 04

Figure 1. AC Output Test Load

2721 drw 05

Figure 2. Output Test Load

6.05 4

LZ, tHZ, tWZ, tOW)

(for t

*Including scope and jig