Integrated Device Technology Inc IDT7026L20G, IDT7026S35JB, IDT7026S55GB, IDT7026S55J, IDT7026S55JB Datasheet

HIGH-SPEED
16K x 16 DUAL-PORT
STATIC RAM

Integrated Device Technology, Inc.

FEATURES:

• True Dual-Ported memory cells which allow simulta­neous access of the same memory location

• High-speed access
— Military: 25/35/55ns (max.)
— Commercial: 20/25/35/55ns (max.)

• Low-power operation
— IDT7026S

Active: 750mW (typ.)
Standby: 5mW (typ.)

— IDT7026L

Active: 750mW (typ.)
Standby: 1mW (typ.)

• Separate upper-byte and lower-byte control for
multiplexed bus compatibility

FUNCTIONAL BLOCK DIAGRAM

IDT7026S/L

• IDT7026 easily expands data bus width to 32 bits or
more using the Master/Slave select when cascading
more than one device

•M/S = H for
M/S = L for

• On-chip port arbitration logic

• Full on-chip hardware support of semaphore signaling
between ports

• Fully asynchronous operation from either port

• TTL-compatible, single 5V (±10%) power supply

• Available in 84-pin PGA and 84-pin PLCC

• Industrial temperature range (–40°C to +85°C) is avail­able, tested to military electrical specifications

BUSY

output flag on Master,

BUSY

input on Slave

I/O8L-I/O

I/O0L-I/O

BUSY

R/

UB

CE
OE

A

LB

A

W

15L

(1,2)
L

13L

L

L

L
L
L

I/O

14

Control

MEMORY

ARRAY

ARBITRATION

SEMAPHORE

LOGIC

7L

Address

0L

Decoder

CE

L

I/O

Control

Address
Decoder

14

CE

R

W

R

R/

UB

R

LB

R

CE

R

OE

R

I/O8R-I/O

I/O0R-I/O

BUSY

R

A

13R

A

0R

15R

7R

(1,2)

SEM

SEM

L

NOTES:

1. (MASTER):

2.

BUSY

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

BUSY

outputs are non-tri-stated push-pull.

is output; (SLAVE):

BUSY

is input.

M/

S

R

2939 drw 01

MILITARY AND COMMERCIAL TEMPERATURE RANGES OCTOBER 1996

©1996 Integrated Device Technology, Inc. DSC 2939/3

For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.

6.17

1

IDT7026S/L
HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM MILITARY AND COMMERCIAL TEMPERATURE RANGES

DESCRIPTION:

The IDT7026 is a high-speed 16K x 16 Dual-Port Static
RAM. The IDT7026 is designed to be used as a stand-alone
Dual-Port RAM or as a combination MASTER/SLAVE Dual­Port RAM for 32-bit-or-more word systems. Using the IDT
MASTER/SLAVE Dual-Port RAM approach in 32-bit or wider
memory system applications results in full-speed, error-free
operation without the need for additional discrete logic.

This device provides two independent ports with separate
control, address, and I/O pins that permit independent,
asynchronous access for reads or writes to any location in

memory. An automatic power down feature controlled by

CE

permits the on-chip circuitry of each port to enter a very low
standby power mode.

Fabricated using IDT’s CMOS high-performance technol-

ogy, these devices typically operate on only 750mW of power.

The IDT7026 is packaged in a ceramic 84-pin PGA, and a
84-pin PLCC. Military grade product is manufactured in com­pliance with the latest revision of MIL-STD-883, Class B,
making it ideally suited to military temperature applications
demanding the highest level of performance and reliability.

PIN CONFIGURATIONS

INDEX

8L

I/O
I/O

9L

I/O

10L

I/O

11L

I/O

12L

I/O

13L

GND

I/O

14L

I/O

15L

V

CC

GND

I/O

0R

I/O

1R

I/O

2R

V

CC

I/O

3R

I/O

4R

I/O

5R

I/O

6R

I/O

7R

I/O

8R

(1,2)

7L

I/O

6L

I/O

5L

I/O

4L

I/O

3L

I/O

2L

I/O

GND

1L

I/O

0L

I/O

L

OE

CC

V

11109876543218483

12
13
14
15
16
17
18
19
20
21
22
23

IDT7026

J84-1

84-PIN PLCC
TOP VIEW

24
25
26
27
28
29
30
31
32

33 34 35 36 37 38 39 40 41 42 43 44 45

R

GND

15R

I/O

R

OE

W

R/

GND

9R

I/O

10R

I/O

11R

I/O

12R

I/O

13R

I/O

14R

I/O

L

L

W

R/

SEM

L

CE

L

UB

L

LB

13L

A

82 81 80 79 78 77 76 75

(3)

46 47 48 49 50 51 52 53

R

R

R

R

12R

UB

LB

13R

A

A

SEM

CE

12L

A

11R

A

11L

A

10R

A

9R

A

10L

A

74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54

8R

A

9L

A

A

8L

A

7L

A

6L

A

5L

A

4L

A

3L

A

2L

A

1L
0L

A

L

BUSY

GND
M/

S

BUSY

R

0R

A
A

1R

A

2R

A

3R

A

4R

A

5R

A

6R

A

7R

2939 drw 02

NOTES:

1. All Vcc pins must be connected to the power supply.

2. All GND pins must be connected to the ground supply.

3. This text does not indicate orientation of the actual part-marking.

6.17 2

IDT7026S/L
HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM MILITARY AND COMMERCIAL TEMPERATURE RANGES

PIN CONFIGURATIONS (CONT'D)

63 61 60 58 55 54 51 48 46 45

11

I/O

7L

I/O

5L

I/O

4L

66

10

67

09

69

08

72

07

75

06

76

05

79

04

81

03

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

10L

11L

13L

15L

0R

1R

3R

5R

64

I/O

65

I/O

68

I/O

71

I/O

70

GND

77

I/O

80

I/O

83

I/O

8L

9L

12L

14L

2R

4R

7R

62

I/O

73

V

CC

74

GND

78

V

CC

6L

(1,2)

A

A

I/O

2L

I/O

0L

59 56 49 50 40

I/O

3L

I/O

1L

57 53 52

GND

IDT7026

84-PIN PGA

TOP VIEW

7

OE

L

UB

L

V

CC

G84-3

GNDGND

SEM

CE

R/

(3)

12

SEM

L

L

W

L

R

LB

47 44

A

13L

L

12L

A

10L

33 35

BUSY

32 31

GND

28 29

A

1R

11L

43

A

9L

41

A

7L

38

A

4L

A

1L

L

M/

S

A

0R

26

A

3R

23

A

6R

42

A

8L

A

6L

39

A

5L

37

A

3L

34

A

0L

36

A

2L

30

BUSY

27

A

2R

25

A

4R

R

82

02

84346915131618

01

125

I/O

6R

I/O

9R

I/O8RI/O

11R

I/O

I/O

10R

12R

I/O

I/O

13R

14R

81110

I/O

OE

ABCDEFGHJ KL

Index

NOTES:

CC pins must be connected to power supply.

1. All V

2. All GND pins must be connected to ground supply.

3. This text does not indicate orientation of the actual part-marking.

PIN NAMES

Left Port Right Port Names

CE

L

R/

W

L R/WR Read/Write Enable

OE

L

A

0L – A13L A0R – A13R Address

I/O

0L – I/O15L I/O0R – I/O15R Data Input/Output

SEM

L

UB

L

LB

L

BUSY

L

CE

R Chip Enable

OE

R Output Enable

SEM

R Semaphore Enable

UB

R Upper Byte Select

LB

R Lower Byte Select

BUSY

R Busy Flag

M/

S

V

CC Power

Master or Slave Select

GND Ground

15R

R

2939 tbl 01

A

A

9R

11R

22 24

A

7R

19 21

A

10R

A

5R

A

8R

2939 drw 03

14 17 20

R

R/

W

LB

R

UB

CE

A

12R

R

R

A

13R

RECOMMENDED OPERATING
TEMPERATURE AND SUPPLY VOLTAGE

Ambient

Grade Temperature GND V

Military –55°C to +125°C 0V 5.0V ± 10%
Commercial 0°C to +70°C 0V 5.0V ± 10%

CC

2939 tbl 02

6.17 3

IDT7026S/L
HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM MILITARY AND COMMERCIAL TEMPERATURE RANGES

TRUTH TABLE I – NON-CONTENTION READ/WRITE CONTROL

(1)

Inputs

CECE

CE

CECE

R/

WW

W

WW

OEOE

OE

OEOE

UBUB

UB

UBUB

LBLB

LB

LBLB

SEMSEM

SEM

SEMSEM

H X X X X H High-Z High-Z Deselected: Power-Down
X X X H H H High-Z High-Z Both Bytes Deselected

L L X L H H DATA
L L X H L H High-Z DATA
L L X L L H DATA
L H L L H H D ATA
L H L H L H High-Z DATA
L H L L L H DATA

X X H X X X High-Z High-Z Outputs Disabled

NOTE: 2939 tbl 03

1. A0L — A13L ≠ A0R — A13R.

TRUTH TABLE II – SEMAPHORE READ/WRITE CONTROL

Inputs Outputs

CECE

CE

CECE

H H L X X L DATA
X H L H H L DATA
H X X X L DATA
X

L X X L X L — — Not Allowed
L X X X L L — — Not Allowed

NOTE:

1. There are eight semaphore flags written to via I/O

R/

WW

W

WW

OEOE

OE

OEOE

UBUB

UB

UBUB

LBLB

LB

LBLB

SEMSEM

SEM

SEMSEM

X H H L DATAIN DATAIN Write I/O0 into Semaphore Flag

0 and read from all I/O's (I/O0-I/O15). These eight semaphores are addressed by A0 - A2.

Outputs

8-15 I/O0-7 Mode

I/O

IN High-Z Write to Upper Byte Only

IN Write to Lower Byte Only

IN DATAIN Write to Both Bytes

OUT High-Z Read Upper Byte Only

OUT Read Lower Byte Only

OUT DATAOUT Read Both Bytes

(1)

8-15 I/O0-7 Mode

I/O

OUT DATAOUT Read Data in Semaphore Flag
OUT DATAOUT Read Data in Semaphore Flag

IN DATAIN Write I/O0 into Semaphore Flag

2939 tbl 04

ABSOLUTE MAXIMUM RATINGS

(1)

Symbol Rating Commercial Military Unit

(2)

TERM

V

Terminal Voltage –0.5 to +7.0 –0.5 to +7.0 V
with Respect
to GND

T

A Operating 0 to +70 –55 to +125 °C

Temperature

T

BIAS Temperature –55 to +125 –65 to +135 °C

Under Bias

STG Storage –55 to +125 –65 to +150 °C

T

Temperature

I

OUT DC Output 50 50 mA

Current

NOTES: 2939 tbl 05

1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.

TERM must not exceed Vcc + 0.5V for more than 25% of the cycle time

2. V
or 10ns maximum, and is limited to
+ 0.5V.

< 20mA for the period of VTERM > Vcc

RECOMMENDED DC OPERATING
CONDTIONS

Symbol Parameter Min. Typ. Max. Unit

CC Supply Voltage 4.5 5.0 5.5 V

V
GND Supply Voltage 0 0 0 V

IH Input High Voltage 2.2 — 6.0

V
V

IL Input Low Voltage –0.5

NOTES: 2939 tbl 06

1. VIL > -1.5V for pulse width less than 10ns.

TERM must not exceed Vcc + 0.5V.

2. V

CAPACITANCE

(1)

(TA = +25°C, f = 1.0MHz)

Symbol Parameter Conditions

IN Input Capacitance VIN = 3dv 9 pF

C

OUT Output VOUT = 3dv 10 pF

C

(1)

— 0.8 V

(2)

Capacitance

NOTES: 2939 tbl 07

1. This parameter is determined by device characterization but is not
production tested.

2. 3dV represents the interpolated capacitance when the input and output
signals switch from 0V to 3V or from 3V to 0V.

(2)

V

Max. Unit

6.17 4

IDT7026S/L
HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM MILITARY AND COMMERCIAL TEMPERATURE RANGES

DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE

Symbol Parameter Test Conditions Min. Max. Min. Max. Unit

LI| Input Leakage Current

|I

LO| Output Leakage Current

|I

OL Output Low Voltage IOL = 4mA — 0.4 — 0.4 V

V

OH Output High Voltage IOH = –4mA 2.4 — 2.4 — V

V

NOTE: 2939 tbl 08

1. At Vcc = 2.0V, input leakages are undefined.

(1)

VCC = 5.5V, VIN = 0V to VCC —10—5µA

CE

= VIH, VOUT = 0V to VCC —10—5µA

(VCC = 5.0V ± 10%)

IDT7026S IDT7026L

DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE

Test Com'l. Only

Symbol Parameter Condition Version Typ.

CC Dynamic Operating

I

Current
(Both Ports Active) f = f

SB1 Standby Current

I

(Both Ports — TTL
Level Inputs) f = f

SB2 Standby Current

I

(One Port — TTL Active Port Outputs Open, L — — 105 200
Level Inputs) f = f

SB3 Full Standby Current Both Ports CEL and MIL. S — — 1.0 30 mA

I

(Both Ports — All
CMOS Level Inputs) V

SB4 Full Standby Current

I

(One Port — All
CMOS Level Inputs)

NOTES: 2939 tbl 09

1. "X" in part numbers indicates power rating (S or L).

CC = 5V, TA = +25°C, and are not production tested. ICCDC = 120mA (Typ.)

2. V

3. At f = f

4. f = 0 means no address or control lines change.

5. Port "A" may be either left or right port. Port "B" is the opposite from port "A".

MAX, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1 / tRC, and using “AC Test Conditions”

of input levels of GND to 3V.

CE

= VIL, Outputs Open MIL. S — — 170 345 mA

SEM

= V

IH L — — 170 305

(3)

MAX

CE

R = CEL = VIH MIL. S — — 25 100 mA

SEM

R =

SEM

L = VIH L——2580

(3)

MAX

CE

"A" = VIL and CE"B" = VIH

(3)

MAX

SEM

R =

SEM

L = VIH L 115 180 105 170

CE

R > VCC - 0.2V L — — 0.2 10

IN > VCC - 0.2V or COM’L. S 1.0 15 1.0 15

V

IN < 0.2V, f = 0

SEM

R =

CE

"A" < 0.2V and MIL. S — — 100 200 mA

CE

"B" > VCC - 0.2V

SEM

R =

V

IN > VCC - 0.2V or COM’L. S 110 185 100 170
IN < 0.2V L 110 160 100 145

V
Active Port Outputs Open,
f = f

MAX

(3)

SEM

L > VCC - 0.2V

SEM

L > VCC - 0.2V

(4)

(5)

(5)

(1)

(VCC = 5.0V ± 10%)

7026X20 7026X25

(2)

Max. Typ.

(2)

Max. Unit

COM’L. S 180 315 170 305

L 180 275 170 265

COM’L. S 30 85 25 85

L 30602560

MIL. S — — 105 230 mA

COM’L. S 115 210 105 200

L 0.2 5 0.2 5

L — — 100 175

6.17 5

IDT7026S/L
HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM MILITARY AND COMMERCIAL TEMPERATURE RANGES

DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE

Test

Symbol Parameter Condition Version Typ.

CC Dynamic Operating

I

Current
(Both Ports Active) f = f

SB1 Standby Current

I

(Both Ports — TTL
Level Inputs) f = f

SB2 Standby Current

I

(One Port — TTL Active Port Outputs Open, L 95 185 85 165
Level Inputs) f = f

SB3 Full Standby Current Both Ports CEL and MIL. S 1.0 30 1.0 30 mA

I

(Both Ports — All
CMOS Level Inputs) V

SB4 Full Standby Current

I

(One Port — All
CMOS Level Inputs)

NOTES: 2939 tbl 10

1. "X" in part numbers indicates power rating (S or L).

CC = 5V, TA = +25°C, and are not production tested. ICCDC = 120mA (Typ.)

2. V

3. At f = f

4. f = 0 means no address or control lines change.

5. Port "A" may be either left or right port. Port "B" is the opposite from port "A".

MAX, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/ tRC, and using

“AC Test Conditions” of input levels of GND to 3V.

CE

= VIL, Outputs Open MIL. S 160 335 150 310 mA

SEM

= V

IH L 160 295 150 270

(3)

MAX

CE

L = CER = VIH MIL. S 20 100 13 100 mA

SEM

R =

SEM

L = VIH L 20801380

(3)

MAX

CE

"A"=VIL and CE"B"=VIH

(3)

MAX

SEM

R =

SEM

L = VIH L 95 155 85 135

CE

R > VCC - 0.2V L 0.2 10 0.2 10

IN > VCC - 0.2V or COM’L. S 1.0 15 1.0 15

V

IN < 0.2V, f = 0

SEM

R =

CE

"A" < 0.2V and MIL. S 90 190 80 175 mA

CE

"B" > VCC - 0.2V

SEM

R =

IN > VCC - 0.2V or COM’L. S 90 160 80 135 mA

V
V

IN < 0.2V L 90 135 80 110

SEM

L >VCC - 0.2V

SEM

L >VCC - 0.2V

(4)

(5)

(5)

COM’L. S 160 295 150 270

COM’L. S 20 85 13 85

MIL. S 95 215 85 195 mA

COM’L. S 95 185 85 165

Active Port Outputs Open,

MAX

(3)

f = f

(1)

(Con't.) (VCC = 5.0V ± 10%)

7026X35 7026X55

(2)

Max. Typ.

(2)

L 160 255 150 230

L 20601360

L 0.2 5 0.2 5

L 90 165 80 150

Max. Unit

6.17 6