Integrated Device Technology Inc. IDT7006S User Manual

CMOS Static RAM

I

I

,

256K (32K x 8-Bit)

IDT71256S

IDT71256L

Features

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High-speed address/chip select time

– Military: 25/35/45/55/70/85/100ns (max.)
– Industrial: 25/35ns (max.)
– Commercial: 20/25/35ns (max.) low power only

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Low-power operation

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Battery Backup operation – 2V data retention

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Produced with advanced high-performance CMOS
technology

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Input and output directly TTL-compatible

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Available in standard 28-pin (300 or 600 mil) ceramic DIP,
28-pin (600 mil) plastic DIP, 28-pin (300 mil) SOJ and
32-pin LCC

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Military product compliant to MIL-STD-883, Class B

Functional Block Diagram

Description

The IDT 71256 is a 262,144-bit high-speed static RAM organized as
32K x 8. It is fabricated using IDT's high-performance, high-reliability
CMOS technology.

Address access times as fast as 20ns are available with power
consumption of only 350mW (typ.). The circuit also offers a reduced power
standby mode. When CS goes HIGH, the circuit will automatically go to and
remain in, a low-power standby mode as long as CS remains HIGH. In
the full standby mode, the low-power device consumes less than 15µW,
typically. This capability provides significant system level power and
cooling savings. The low-power (L) version also offers a battery backup
data retention capability where the circuit typically consumes only 5µW
when operating off a 2V battery.

The IDT71256 is packaged in a 28-pin (300 or 600 mil) ceramic DIP,
a 28-pin 300 mil SOJ, a 28-pin (600 mil) plastic DIP, and a 32-pin LCC
providing high board level packing densities.

The IDT71256 military RAM is manufactured in compliance with the
latest revision of MIL-STD-883, Class B, making it ideally suited to military
temperature applications demanding the highest level of performance and
reliability.

A

0

ADDRESS
DECODER

A

14

/O

0

INPUT

DATA

/O

7

CS

OE

WE

CONTROL

CIRCUIT

CIRCUIT

262,144 BIT

MEMORY ARRAY

I/O CONTROL

V

CC

GND

2946drw 01

©2000 Integrated Device Technology, Inc.

FEBRUARY 2001

1

DSC-2946/9

IDT71256S/L

2

G

,

CMOS Static RAM 256K (32K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges

Pin Configurations

1

A

14

2

A

12

3

A

7

4

A

6

5

A

5

6
7
8

9
10
11
12
13
14

D28-3
P28-1
D28-1

SO28-5

I/O
I/O
I/O

ND

A

4

A

3

A

2

A

1

A

0
0
1
2

DIP/SOJ

Top View

28
27
26
25
24
23
22
21
20
19
18
17
16
15

2946 drw 0

V

CC

WE

13

A
A

8

A

9

A

11

OE
A

10

CS
I/O
I/O
I/O
I/O
I/O

Truth Table

WE CS OE

X H X High-Z Standby (I
XV

HC

H L H High-Z Output Disabled
HLLD
LLXD

7
6
5
4
3

NOTE:

IH, L = VIL, X = Don't care.

1. H = V

Absolute Maximum Ratings

Symbol Rating Com'l. Ind. Mil. Unit

TERM

V

Te rminal Voltage

(1)

I/O Function

X High-Z Standby (I

OUT

IN

Re ad Data
Write Data

(1)

-0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 V

SB

SB1

)

)

with Re s p e ct
to GN D

INDEX

A

6

A

5

A

4

A

3

A

2

A

1

A

0

NC

0

I/O

2

1

A7A

4

3

5
6

7
8
9

10
11
12
13

14

15

1

2

O

O

/

/

I

I

32-Pin LCC

4

1

A

1,1

A

2

L32-1

16

D
N
G

1

C
N

32 31

C
N

C

3

E

C

1

V

W

A

V

A

30

29

A

8

28

A

9

27

A

11

26

NC

25

OE

24

10

A

23

CS

22
21

20191817

3

4

5

O

O

O

/

/

/

I

I

I

7

I/O
I/O

8

2946drw03

T

T

T

P

I

OUT

NOTE:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS

Operating

A

0 to + 70 -40 to + 85 -55 to + 125oC

Temperature

BIAS

Temperature

-55 to + 125 -55 to +125 -65 to +135oC

Unde r Bias
Storage

STG

T

Temperature

Power
Dissipation

-55 to + 125 -55 to +125 -65 to +150

1.0 1.0 1.0 W

DC Output Current505050mA

may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those
indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect
reliability.

Top View

2 9 46 t b l 02

o

C

29 46 tb l 03

Capacitance (TA = +25°C, f = 1.0MHz)

Pin Descriptions

Name Description

0

- A

14

A

0

- I/O

7

I/O

CS

WE

OE

Address Inputs

Data Inp ut/ Outp ut

Chip Se le ct

Write Enable

Output Enable

Symbol Parameter

C

IN

C

I/O

NOTE:

1. This parameter is determined by device characterization, but is not production
tested.

Inp ut Cap ac ita nc e VIN = 0V 11 pF
I/O Capaci tance V

GND Ground

CC

V

Power

2946 tbl 01

2

(1)

Conditions Max. Unit

OUT

= 0V 11 p F

2946 tbl 04

IDT71256S/L
CMOS Static RAM 256K (32K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges

Recommended Operating
Temperature and Supply Voltage

Grade Temperature GND Vcc

O

Military -55
Industrial -40
Commercial 0

DC Electrical Characteristics

Symbol Parameter

I

CC

Dynamic Operating Current

VIL, Outputs Ope n

CS <

CC

= Max., f

V

SB

Stand by Po wer Supply Current

I

(TTL Le ve l), CS >
Outputs Open, f = f

SB1

Full Standby Power Supply Current

I

(CMOS Le v e l), CS >

CC

= Max. , f = 0

V

C to +1 25OC 0V 5V ± 10%

O

C to +8 5OC 0V 5V ± 10%

O

C to +70OC 0V 5V ± 10%

(1,2)

(2)

MAX

VIH, VCC = Max.,

(2)

MAX

VHC,

Recommended DC Operating
Conditions

Symbol Parameter Min. Typ. Max. Unit

CC

Supply Voltage 4.5 5.0 5.5 V

V

GND Ground 0 0 0 V

V

IH

Inp ut Hig h Vol tag e 2 .2

2 9 46 t b l 05

V

IL

Input Low Voltage -0.5

NOTE:

1. VIL (min.) = –3.0V for pulse width less than 20ns, once per cycle.

(VCC = 5.0V ± 10%, VLC = 0.2V, VHC = VCC - 0.2V)

71256S/L20 71256S/L25 71256S/L3 5 712 56S/L45

Power Com'l. Mil. Com'l

& In d

____ ____ ____

S
L135
S
L3
S
L0.4

____

____ ____ ____

____

____ ____ ____

____

Mil. Com'l.

& In d

____

150

11 5 130 105 120

____

20

3333

____

20

0.4 1.5 0.4 1.5

____

(1)

____

6.0 V

0.8 V

Mil. Com'l. Mil.

____

140

20

20

____

____

____

____

____

135
115

20 mA

20 mA

1.5

2946 tb l 06

Unit

mA

3

2946 tbl 07

71256S/L55 71256S/L70 71256S/L85 71256S/L100

Symbol Parameter Power Mil. Mil. Mil. Mil. Unit

CC

I

SB

I

SB1

I

NOTES:

Dynamic Operating Current
CS <

VIL, Outputs Open

V

CC

= Max ., f

MAX

(2)

Standby Power Supp ly Current
(TTL Lev e l), CS >
Ou tputs Open, f = f

VIH, VCC = Max.,

(2)

MAX

Full Standby Power Supply Current
(CMOS Le v el ), CS >

CC

= Max. , f = 0

V

VHC,

S 135 135 135 135 mA
L 115 115 115 115
S20202020
L3 3 3 3
S20202020
L 1.5 1.5 1.5 1.5

2946 tbl 08

1. All values are maximum guaranteed values.

2. fMAX = 1/tRC, all address inputs are cycling at fMAX; f = 0 means no address pins are cycling.

6.42

3

mA

mA