Integrated Device Technology Inc IDT7006L15F, IDT7006L15G, IDT7006L20J, IDT7006L20JB, IDT7006L20PF Datasheet

Integrated Device Technology, Inc.

HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM

IDT7006S/L

FEATURES:

• True Dual-Ported memory cells which allow simultaneous access of the same memory location

• High-speed access — Military: 20/25/35/55/70ns (max.) — Commercial: 15/17/20/25/35/55ns (max.)

• Low-power operation — IDT7006S

Active: 750mW (typ.) Standby: 5mW (typ.)

— IDT7006L

Active: 750mW (typ.) Standby: 1mW (typ.)

• IDT7006 easily expands data bus width to 16 bits or more using the Master/Slave select when cascading more than one device

•M/S = H for M/S = L for

BUSY

output flag on Master,

BUSY

input on Slave

• Busy and Interrupt Flags

FUNCTIONAL BLOCK DIAGRAM

OE

L

CE

L

R/

W

L

• On-chip port arbitration logic

• Full on-chip hardware support of semaphore signaling between ports

• Fully asynchronous operation from either port

• Devices are capable of withstanding greater than 2001V electrostatic discharge

• Battery backup operation—2V data retention

• TTL-compatible, single 5V (±10%) power supply

• Available in a 68-pin PGA, a 68-pin quad flatpack, a 68pin PLCC, and a 64-pin TQFP

• Industrial temperature range (–40°C to +85°C) is available, tested to military electrical specifications

DESCRIPTION:

The IDT7006 is a high-speed 16K x 8 Dual-Port Static RAM. The IDT7006 is designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/SLAVE DualPort RAM for 16-bit-or-more word systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 16-bit or wider

OE

R

CE

R

R/

W

R

I/O0L- I/O

NOTES:

1. (MASTER):

BUSY

is output; (SLAVE):

BUSY

2.

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

is input.

BUSY

outputs

and

INT

outputs are non-tri-stated push-pull.

BUSY

(1,2)

L

A

SEM

INT

13L

7L

Address

0L

L

(2)

L

Decoder

CE

OE

R/

W

L L L

14

I/O

Control

MEMORY

ARRAY

ARBITRATION

INTERRUPT

SEMAPHORE

LOGIC

M/

S

I/O

Control

Address Decoder

14

CE

R

OE

R

R/

W

R

I/O0R-I/O

BUSY

A

13R

A

0R

SEM

R

(2)

INT

R

2739 drw 01

7R

(1,2)

R

MILITARY AND COMMERCIAL TEMPERATURE RANGES OCTOBER 1996

For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.

6.07

1

IDT7006S/L

INDEX

IDT7006

PN-64

TQFP

TOP VIEW

(3)

8

9 10 11

12 13

14 15

16

1

2

3

4

5

6

7

46 45

44 43 42 41 40 39 38 37

36 35 34

47

48

33

17

18

19

20

32

31

30

29

28

27

26

25

24

23

22

21

49

50

51

52

63

62

61

60

59

58

57

56

55

54

53

64

I/O

2L

V

CC

GND

A

4R

BUSY

L

BUSY

R

INT

R

INT

L

GND M/

S

OE

L

A

5L

I/O

1L

R/

W

L

CE

L

SEM

L

V

CC

OE

R

CE

R

R/

W

R

SEM

R

A

12R

GND

I/O

3L

I/O

4L

I/O

5L

I/O

6L

I/O

7L

I/O

0R

I/O

1R

I/O

2R

V

CC

I/O

3R

I/O

4R

I/O

5R

I/O

6R

I/O

7R

A

11R

A

10R

A

9R

A

8R

A

7R

A

6R

A

5R

A

3R

A

2R

A

1R

A

0R

A

0L

A

1L

A

2L

A

3L

A

4L

A

6L

A

7L

A

8L

A

9L

A

10L

A

11L

A

12L

I/O

0L

2739 drw 03

A

13R

A

13L

HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM MILITARY AND COMMERCIAL TEMPERATURE RANGES

memory system applications results in full-speed, error-free operation without the need for additional discrete logic.

This device provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature controlled by

CE

permits the on-chip circuitry of each port to enter a very low standby power mode.

Fabricated using IDT’s CMOS high-performance technology, these devices typically operate on only 750mW of power.

L

W

SEM

CE

R/

IDT7006

J68-1

F68-1

TOP VIEW

R

N/C

CE

(1,2)

13R

A

N/C

GND

13L

A

(3)

12R

A

CC

V

11R

A

12L

A

10R

A

10L

11L

A

64 63 62 61

40 41 42 43

9R

8R

A

7R

A

6L

7L

8L

A

60

A

5L

59

4L

A

58

A

3L

57

A

2L

56

A

1L

55

A

0L

54

INT

53

BUSY

52

GND

51

M/

50

BUSY

49

INT

48

A

0R

47

A

1R

46

A

2R

45

A

3R

44

A

4R

2739 drw 02

5R

6R

A

9L

A

PIN CONFIGURATIONS

N/C

L

0L

OE

N/C

I/O

PLCC / FLATPACK

R

W

OE

R/

SEM

INDEX

I/O

2L

I/O

3L

I/O

4L

I/O

5L

GND I/O

6L

I/O

7L

V

CC

GND

I/O

0R

I/O

1R

I/O

2R

V

CC

I/O

3R

I/O

4R

I/O

5R

I/O

6R

1L

I/O

98765432168676665 10 11

12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

27 28 29 30 31 32 33 34 35 36 37 38 39

7R

I/O

Low-power (L) versions offer battery backup data retention capability with typical power consumption of 500µW from a 2V battery.

The IDT7006 is packaged in a ceramic 68-pin PGA, a 68pin quad flatpack, a 68-pin PLCC, and a 64-pin TQFP (thin plastic quad flatpack) . Military grade product is manufactured in compliance with the latest revision of MIL-STD-883, Class B, making it ideally suited to military temperature applications demanding the highest level of performance and reliability.

L

S

R

NOTES:

1. All Vcc pins must be connected to the power supply.

2. All GND pins must be connected to the ground supply.

3. This text does not indicate orientation of the the actual part-marking.

6.07 2

IDT7006S/L HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM MILITARY AND COMMERCIAL TEMPERATURE RANGES

PIN CONFIGURATIONS (CONT'D)

11

10

09

08

07

06

05

04

03

02

01

51 50 48 46 44 42 40 38 36

A

5L

525449 39 37

53

A

7L

A

6L

55

A

9L

A

8L

56

57

A

11L

A

10L

58

59

V

CC

A

12L

60

61

N/C

A

13L

62

63

SEM

L

CE

L

64

65

OE

L

R/

W

L

676866

I/O

0L

N/C

13579

I/O

1L

I/O

2L

246810121416

I/O

3L

(1,2)

INT

A

1R

R

M/

4L

A

2L

A

0L

BUSY

S

L

47 45 43 41 34

GND

BUSY

R

A

2R

A

0R

INT

3L

A

1L

L

IDT7006

G68-1

68-PIN PGA

(3)

11 13 15

V

1R

CC

I/O

I/O2RI/O3RI/O

4R

5R

GND GND

4L

5L

I/O

6L

TOP VIEW

I/O

7L

I/O

V

CC

0R

A

3R

35

A

4R

33

32

A

7R

31

30

A

9R

29

28

A

11R

27

26

GND

25

24

N/C

23

22

SEM

R

21

20

R

OE

18 19 I/O

7R

17 I/O

6R

A

CE

R/

A

5R

A

6R

A

8R

10R

12R

13R

W

N/C

R

INDEX

ABCDEFGH JKL

NOTES:

CC pins must be connected to power supply.

1. All V

2. All GND pins must be connected to ground supply.

3. This text does not indicate orientation of the actual part-marking.

PIN NAMES

Left Port Right Port Names

CE

L

R/

W

L R/WR Read/Write Enable

OE

L

A

0L – A13L A0R – A13R Address

I/O

0L – I/O7L I/O0R – I/O7R Data Input/Output

SEM

L

INT

L

BUSY

L

CE

R Chip Enable

OE

R Output Enable

SEM

R Semaphore Enable

INT

R Interrupt Flag

BUSY

R Busy Flag

M/

S

V

CC Power

Master or Slave Select

GND Ground

2739 drw 04

2739 tbl 01

6.07 3

IDT7006S/L HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM MILITARY AND COMMERCIAL TEMPERATURE RANGES

TRUTH TABLE I – NON-CONTENTION READ/WRITE CONTROL

Inputs

CECE

CE

CECE

R/

WW

W

WW

H X X H High-Z Deselected: Power-Down L L X H DATA L H L H DATA X X H X High-Z Outputs Disabled

NOTE: 2739 tbl 02

1. A0L — A13L is not equal to A0R — A13R.

(1)

OEOE

OE

OEOE

SEMSEM

SEM

SEMSEM

Outputs

0-7 Mode

I/O

IN Write to Memory

OUT Read Memory

TRUTH TABLE II – SEMAPHORE READ/WRITE CONTROL

Inputs Outputs

CECE

CE

CECE

H H L L DATA H L X X L — Not Allowed

NOTE:

1. There are eight semaphore flags written to via I/O

ABSOLUTE MAXIMUM RATINGS

Symbol Rating Commercial Military Unit

V

TERM

T

A Operating 0 to +70 –55 to +125 °C

T

BIAS Temperature –55 to +125 –65 to +135 °C

STG Storage –55 to +125 –65 to +150 °C

T

I

OUT DC Output 50 50 mA

NOTES: 2739 tbl 04

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

TERM must not exceed Vcc + 0.5V for more than 25% of the cycle time

2. V or 10ns maximum, and is limited to + 0.5V.

WW

R/

W

WW

u

(2)

Terminal Voltage –0.5 to +7.0 –0.5 to +7.0 V

OEOE

SEMSEM

OE

OEOE

SEM

SEMSEM

I/O

X L DATA

0-7 Mode

OUT Read Data in Semaphore Flag Data Out

IN Write I/O0 into Semaphore Flag

0 and read from I/O0 - I/O15. These eight semaphores are addressed by A0 - A2.

(1)

with Respect to GND

Temperature

Under Bias

Temperature

Current

< 20mA for the period of VTERM < Vcc

RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE

Grade Temperature GND V

Military –55°C to +125°C 0V 5.0V ± 10% Commercial 0°C to +70°C 0V 5.0V ± 10%

RECOMMENDED DC OPERATING CONDITIONS

Symbol Parameter Min. Typ. Max. Unit

CC Supply Voltage 4.5 5.0 5.5 V

V GND Supply Voltage 0 0 0 V

IH Input High Voltage 2.2 — 6.0

V V

IL Input Low Voltage –0.5

NOTES: 2739 tbl 06

1. VIL≥ -1.5V for pulse width less than 10ns.

TERM must not exceed Vcc + 0.5V.

2. V

CAPACITANCE

(TA = +25°C, f = 1.0MHz)TQFP PACKAGE

Symbol Parameter Conditions

IN Input Capacitance VIN = 3dV 9 pF

C

OUT Output VOUT = 3dV 10 pF

C

NOTES: 2739 tbl 07

1. This parameter is determined by device characterization, but is not production tested.

2. 3dv references the interpolated capacitance when the input and output signals switch from 0V to 3V or from 3V to 0V.

(1)

Capacitance

Ambient

(1)

— 0.8 V

(2)

2739 tbl 03

CC

2739 tbl 05

(2)

V

Max. Unit

6.07 4

IDT7006S/L HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM MILITARY AND COMMERCIAL TEMPERATURE RANGES

DC ELECTRICAL CHARACTERISTICS OVER THE OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE

Symbol Parameter Test Conditions Min. Max. Min. Max. Unit

LI| Input Leakage Current

|I

LO| Output Leakage Current

|I

OL Output Low Voltage IOL = 4mA — 0.4 — 0.4 V

V

OH Output High Voltage IOH = -4mA 2.4 — 2.4 — V

V

NOTE:

1. At Vcc

≤ 2.0V input leakages are undefined.

(1)

VCC = 5.5V, VIN = 0V to VCC —10—5µA

CE

= VIH, VOUT = 0V to VCC —10—5µA

(VCC = 5.0V ± 10%)

IDT7006S IDT7006L

2739 tbl 08

DC ELECTRICAL CHARACTERISTICS OVER THE OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE

7006X15 7006X17 7006X20 7006X25

Test

Symbol Parameter Condition Version

CC Dynamic Operating

I

Current (Both Ports Active) f = f

SB1 Standby Current

I

(Both Ports — TTL Level Inputs f = f

SB2 Standby Current

I

CE

= VIL, Outputs Open MIL. S — — — — 160 370 155 340 mA

SEM

= V

IH L — — — — 150 320 145 280

(3)

MAX

CE

L = CER = VIH MIL. S — — — — 20 90 16 80 mA

SEM

R =

SEM

L = VIH L — — — — 10 70 10 65

(3)

MAX

CE

"A"=VIL and CE"B"=VIH

COM.

(5)

MIL. S — — — — 95 240 90 215 mA

(One Port — TTL Active Port Outputs Open Level Inputs) f = f

I

SB3 Full Standby Current Both Ports CEL and MIL. S — — — — 1.0 30 1.0 30 mA

(Both Ports — All CMOS Level Inputs) V

SB4 Full Standby CurrentCE"A" < 0.2V and MIL. S — — — — 90 225 85 200 mA

I

(One Port — All CMOS Level Inputs)

Active Port Outputs Open,

NOTES: 2739 tbl 09

1. "X" in part numbers indicates power rating (S or L).

2. V

CC = 5V, TA = +25°C, and are not production tested. ICC DC = 120mA (typ.).

3. At f = f

4. f = 0 means no address or control lines change.

5. Port "A"may be either left or right port. Port "B" is the port opposite port "A".

MAX, address and I/O'S are cycling at the maximum frequency read cycle of 1/tRC, and using “AC Test Conditions” of input levels of GND to 3V.

(3)

MAX

SEM

R =

SEM

L > VIH L 95 160 95 160 85 150 80 140

CE

R > VCC - 0.2V L — — — — 0.2 10 0.2 10

IN > VCC - 0.2V or

V

IN < 0.2V, f = 0

SEM

R =

SEM

CE

"B" > VCC - 0.2V

SEM

R =

SEM

IN > VCC - 0.2V or

V V

IN < 0.2v

(3)

f = f

MAX

(4)

L > VCC-0.2V

(5)

L > VCC-0.2V L — — — — 80 200 75 170

COM.

COM

Com'l. Only Com'l. Only

(2)

Typ.

S 170 310 170 310 160 290 155 265

L 160 260 160 260 150 240 145 220

S 20 60 20 60 20 60 16 60

L 10 50 10 50 10 50 10 50

L — — — — 85 210 80 180

S 105 190 105 190 95 180 90 170

S 1.0 15 1.0 15 1.0 15 1.0 15

L 0.2 5 0.2 5 0.2 5 0.2 5

.S100 170 100 170 90 155 85 145

L 90 140 90 140 80 130 75 120

Max.

(1)

(VCC = 5.0V ± 10%)

(2)

Typ.

Max. Typ.

(2)

Max. Typ.

(2)

Max.

Unit

6.07 5

IDT7006S/L HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM MILITARY AND COMMERCIAL TEMPERATURE RANGES

DC ELECTRICAL CHARACTERISTICS OVER THE OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE

Test Mil Only

Symbol Parameter Condition Version Typ.

CC Dynamic Operating

I

Current (Both Ports Active) f = f

SB1 Standby Current

I

(Both Ports — TTL Level Inputs) f = f

I

SB2 Standby Current

(One Port — TTL Active Port Outputs Open, L 75 160 75 160 70 160 Level Inputs) f = f

I

SB3 Full Standby Current Both Ports CEL and MIL. S 1.0 30 1.0 30 1.0 30 mA

(Both Ports — All CMOS Level Inputs) V

SEM

R =

SEM

L≥ VCC-0.2V

I

SB4 Full Standby Current CE"A" < 0.2V and MIL. S 80 175 80 175 75 175 mA

(One Port — All CMOS Level Inputs)

NOTES: 2739 tbl 10

1. "X" in part numbers indicates power rating (S or L).

CC = 5V, TA = +25°C, and are not production tested. ICC DC =120mA (typ).

2. V

3. At f = fMAX, address and I/O'S are cycling at the maximum frequency read cycle of 1/tRC, and using “AC Test Conditions” of input levels of GND to 3V.

4. f = 0 means no address or control lines change.

5. Port "A" may be either left or right port. Port "B"is the opposite from port "A".

CE

= VIL, Outputs Open MIL. S 150 300 150 300 140 300 mA

SEM

= V

IH L 140 250 140 250 130 250

(3)

MAX

COM’L. S 150 250 150 250 — —

L 140 210 140 210 — —

CE

L = CER = VIH MIL. S 13 80 13 80 10 80 mA

SEM

R =

SEM

L = VIH L10 65 10 65 8 65

(3)

MAX

COM’L. S 13 60 13 60 — —

L10 50 10 50 — —

(5)

MIL. S 85 190 85 190 80 190 mA

COM’L. S 85 155 85 155 — —

L 0.2 5 0.2 5 — —

CE

"A"=VIL and CEL"B"=VIH

(3)

MAX

SEM

R =

SEM

L = VIH L 75 130 75 130 — —

CE

R > VCC - 0.2V L 0.2 10 0.2 10 0.2 10

IN > VCC - 0.2V or COM’L. S 1.0 15 1.0 15 — —

V

IN < 0.2V, f = 0

CE

"B" > VCC - 0.2V

SEM

R =

SEM

IN > VCC - 0.2V or COM’L. S 80 135 80 135 — —

V V

IN < 0.2V

Active Port Outputs Open, L 70 110 70 110 — —

(3)

f = f

MAX

(4)

L≥ VCC - 0.2V L 70 150 70 150 65 150

(1)

(Cont'd.) (VCC = 5.0V ± 10%)

7006X35 7006X55 7006X70

(2)

Max. Typ.

(2)

Max. Typ.

(2)

Max. Unit

DATA RETENTION CHARACTERISTICS OVER ALL TEMPERATURE RANGES (L Version Only)

(VLC = 0.2V, VHC = VCC - 0.2V)

Symbol Parameter Test Condition Min. Typ.

DR VCC for Data Retention VCC = 2V 2.0 — — V

V

CCDR Data Retention Current

I

(3)

CDR

t

(3)

R

t

NOTES: 2739 tbl 11

1. TA = +25°C, VCC = 2V, and are not production tested.

2. t

RC = Read Cycle Time

3. This parameter is guaranteed by characterization, but are not production tested.

4. At Vcc = 2V input leakages are undefined

Chip Deselect to Data Retention Time Operation Recovery Time tRC

(4)

(1)

Max. Unit

CE

≥ VHC MIL. — 100 4000 µA

IN ≥ VHC or ≤ VLC COM’L. — 100 1500

V

SEM

≥ VHC 0——ns

(2)

——ns

DATA RETENTION WAVEFORM

DATA RETENTION MODE

≥

V

CC

CE

4.5V

t

CDR

V

IH

DR

2V

V

DR

6.07 6

4.5V t

R

V

IH

2739 drw 05