• IDT7005 easily expands data bus width to 16 bits or
more using the Master/Slave select when cascading
more than one device
•M/S = H for
M/S = L for
BUSY
output flag on Master,
BUSY
input on Slave
FUNCTIONAL BLOCK DIAGRAM
OE
L
CE
L
L
R/
W
• Busy and Interrupt Flags
• On-chip port arbitration logic
• Full on-chip hardware support of Semaphore signaling
between ports
• Fully asynchronous operation from either port
• Devices are capable of withstanding greater than 2001V
electrostatic discharge
• Battery backup operation—2V data retention
• TTL-compatible, single 5V (±10%) power supply
• Available in 68-pin PGA, 68-pin quad flatpack, 68-pin
PLCC, and a 64-pin TQFP
• Industrial temperature range (–40°C to +85°C) is available, tested to military electrical specifications
DESCRIPTION:
The IDT7005 is a high-speed 8K x 8 Dual-Port Static RAM.
The IDT7005 is designed to be used as a stand-alone DualPort RAM or as a combination MASTER/SLAVE Dual-Port
OE
R
CE
R
R/
W
R
I/O0L- I/O
NOTES:
1. (MASTER):
BUSY
is output;
(SLAVE):
is input.
2.
BUSY
and
are non-tri-stated
push-pull.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
outputs
INT
BUSY
outputs
7L
(1,2)(1,2)
BUSY
L
A
A
SEM
INT
12L
0L
L
(2)
L
Address
Decoder
CE
OE
R/
W
L
L
L
13
I/O
Control
MEMORY
ARRAY
ARBITRATION
INTERRUPT
SEMAPHORE
LOGIC
M/
S
I/O
Control
Address
Decoder
13
CE
R
OE
R
R/
W
R
I/O0R-I/O
BUSY
A
12R
A
0R
SEM
R
(2)
INT
R
2738 drw 01
7R
R
MILITARY AND COMMERCIAL TEMPERATURE RANGESOCTOBER 1996
For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.
6.06
1
IDT7005S/L
HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAMMILITARY AND COMMERCIAL TEMPERATURE RANGES
RAM for 16-bit-or-more word systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 16-bit or wider
memory system applications results in full-speed, error-free
operation without the need for additional discrete logic.
This device provides two independent ports with separate
control, address, and I/O pins that permit independent,
asynchronous access for reads or writes to any location in
memory. An automatic power down feature controlled by
CE
permits the on-chip circuitry of each port to enter a very low
standby power mode.
Fabricated using IDT’s CMOS high-performance technol-
PIN CONFIGURATIONS
L
L
1L
0L
INDEX
I/O
2L
I/O
3L
I/O
4L
I/O
5L
GND
I/O
6L
I/O
7L
V
CC
GND
0R
I/O
I/O
1R
I/O
2R
V
CC
I/O
3R
I/O
4R
I/O
5R
I/O
6R
I/O
98765432168676665
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27 28 29 30 31 32 33 34 35 36 37 38 39
7R
N/C
I/O
W
OE
N/C
R/
I/O
PLCC / FLATPACK
R
R
R
W
OE
R/
SEM
R
CE
(1,2)
L
L
N/C
CE
N/C
SEM
IDT7005
J68-1
F68-1
TOP VIEW
N/C
N/C
GND
12R
A
CC
V
(3)
11R
A
12L
A
10R
A
10L
11L
A
A
64 63 62 61
40 41 42 43
9R
8R
A
A
6L
7L
8L
9L
A
A
A
A
60
A
5L
59
4L
A
58
A
3L
57
A
2L
56
A
1L
55
A
0L
54
INT
BUSY
GND
M/
BUSY
INT
A
0R
A
1R
A
2R
A
3R
A
4R
2738 drw 02
L
L
S
R
R
53
52
51
50
49
48
47
46
45
44
5R
7R
6R
A
A
A
ogy, these devices typically operate on only 750mW of power.
Low-power (L) versions offer battery backup data retention
capability with typical power consumption of 500µW from a 2V
battery.
The IDT7005 is packaged in a ceramic 68-pin PGA, a 68pin quad flatpack, a 68-pin PLCC and a 64-pin Thin Plastic
Quad Flatpack (TQFP). Military grade product is manufactured in compliance with the latest revision of MIL-STD-883,
Class B, making it ideally suited to military temperature
applications demanding the highest level of performance and
reliability.
L
L
L
0L
INDEX
I/O
I/O
I/O
I/O
GND
I/O
I/O
V
CC
GND
I/O
I/O
I/O
V
CC
I/O
I/O
I/O
1L
I/O
I/O
64
63
62
1
2L
2
3L
3
4L
4
5L
5
6
6L
7
7L
8
9
10
0R
11
1R
12
2R
13
14
3R
15
4R
16
5R
17
181920
OE
W
SEM
R/
61
60
21
L
12L
CC
CE
A
V
N/C
57
58
59
56
IDT7005
PN-64
TQFP
TOP VIEW
24
23
25
22
11L
A
55
26
8L
9L
10L
A
A
54
53
(3)
27
28
5L
6L
7L
A
A
A
A
52
51
49
50
48
A
4L
47
A
3L
46
A
2L
45
A
1L
44
A
0L
43
INT
BUSY
GND
M/
S
BUSY
INT
A
0R
A
1R
A
2R
A
3R
A
4R
L
L
R
R
42
41
40
39
38
37
36
35
34
33
31
29
32
30
NOTES:
1. All Vcc pins must be connected to the power supply.
2. All GND pins must be connected to the ground supply.
3. This text does not indicate orientation of the the actual part-marking.
R
R
6R
I/O
7R
I/O
R
OE
R
W
R/
SEM
CE
N/C
GND
12R
A
11R
A
10R
A
8R
9R
A
A
2738 drw 03
7R
5R
6R
A
A
A
6.062
IDT7005S/L
HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAMMILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS (CON'T.)
11
10
09
08
07
06
05
04
515048464442403836
A
4L
A
2L
A
0L
INT
68-PIN PGA
TOP VIEW
53
A
55
A
57
A
59
V
61
N/C
63
SEM
65
OE
7L
9L
11L
CC
A
5L
52
A
6L
4745434134
493937
A
3L
A
1L
54
A
8L
56
A
10L
58
A
12L
60
N/C
62
L
CE
L
64
L
R/
W
L
(1,2)
BUSY
L
GND
IDT7005
G68-1
L
BUSY
M/
(3)
S
INT
1R
A
A
R
3R
35
R
A
0R
A
2R
4R
32
A
7R
30
A
9R
28
A
11R
26
GND
24
N/C
22
SEM
A
5R
33
A
6R
31
A
8R
29
A
10R
27
A
12R
25
N/C
23
R
CE
R
A
676866
03
I/O
0L
N/C
02
13579
I/O
1L
I/O
2L
I/O
GNDGND
4L
I/O
7L
111315
I/O
246810121416
01
I/O
3L
I/O
5L
I/O
6L
0R
I/O2RI/O3RI/O
I/O
V
CC
ABCDEFGH JKL
INDEX
NOTES:
CC pins must be connected to power supply.
1. All V
2. All GND pins must be connected to ground supply.
3. This text does not indicate oriention of the actual part-marking
1R
V
CC
I/O
PIN NAMES
CE
R/
OE
A
I/O
SEMINTBUSY
20
21
R
OE
R/
W
R
1819
I/O
7R
4R
N/C
17
I/O
5R
6R
2738 drw 04
Left PortRight PortNames
L
W
LR/WRRead/Write Enable
L
0L – A12LA0R – A12RAddress
0L – I/O7LI/O0R – I/O7RData Input/Output
L
L
L
CE
RChip Enable
OE
ROutput Enable
SEM
RSemaphore Enable
INT
RInterrupt Flag
BUSY
RBusy Flag
M/
S
V
CCPower
Master or Slave Select
GNDGround
2738 tbl 01
6.063
IDT7005S/L
HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAMMILITARY AND COMMERCIAL TEMPERATURE RANGES
TRUTH TABLE I – NON-CONTENTION READ/WRITE CONTROL
Inputs
CECE
CE
CECE
R/
WW
W
WW
HXXHHigh-ZDeselected: Power-Down
LLXHDATA
LHLHDATA
XXHXHigh-ZOutputs Disabled
NOTE:
1. A0L — A12L is not equal to A0R — A12R.
(1)
OEOE
OE
OEOE
SEMSEM
SEM
SEMSEM
Outputs
0-7 Mode
I/O
INWrite to Memory
OUTRead Memory
2738 tbl 02
TRUTH TABLE II – SEMAPHORE READ/WRITE CONTROL
InputsOutputs
CECE
CE
CECE
HHLLDATA
H
LXXL—Not Allowed
NOTE:
1. There are eight semaphore flags written to via I/O
ABSOLUTE MAXIMUM RATINGS
SymbolRatingCommercialMilitaryUnit
V
TERM
T
AOperating0 to +70–55 to +125°C
BIASTemperature–55 to +125–65 to +135°C
T
T
STGStorage–55 to +125 –65 to +150°C
OUTDC Output5050mA
I
NOTES:2738 tbl 04
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
TERM must not exceed Vcc + 0.5V for more than 25% of the cycle time
2. V
or 10% maximum, and is limited to
+ 0.5V.
WW
R/
W
WW
u
(2)
Terminal Voltage –0.5 to +7.0–0.5 to +7.0V
OEOE
SEMSEM
OE
OEOE
SEM
SEMSEM
I/O
XLDATA
0-7 Mode
OUTRead in Semaphore Flag Data 0ut
INWrite I/O0 into Semaphore Flag
0 and read from I/O0 - I/O15. These eight semaphores are addressed by A0 - A2.
(1)
with Respect
to GND
Temperature
Under Bias
Temperature
Current
< 20mA for the period of VTERM > Vcc
RECOMMENDED OPERATING
TEMPERATURE AND SUPPLY VOLTAGE
GradeTemperatureGNDV
Military–55°C to +125°C0V5.0V ± 10%
Commercial0°C to +70°C0V5.0V ± 10%
RECOMMENDED DC OPERATING
CONDITIONS
SymbolParameterMin.Typ.Max. Unit
CCSupply Voltage4.55.05.5V
V
GNDSupply Voltage000V
IHInput High Voltage2.2—6.0
V
V
ILInput Low Voltage–0.5
NOTES:2738 tbl 06
1. VIL > -1.5V for pulse width less than 10ns.
TERM must not exceed Vcc + 0.5V.
2. V
CAPACITANCE
(TA = +25°C, f = 1.0MHz) TQFP PACKAGE
SymbolParameterConditions
INInput CapacitanceVIN = 3dV9pF
C
OUTOutputVOUT = 3dV10pF
C
NOTES:2738 tbl 07
1. This parameter is determined by device characterization but is not
production tested.
2. 3dv references the interpolated capacitance when the input and output
signals switch from 0V to 3V or from 3V to 0V.
(1)
Capacitance
Ambient
(1)
(1)
—0.8V
(2)
2738 tbl 03
CC
2738 tbl 05
(2)
V
Max.Unit
6.064
IDT7005S/L
HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAMMILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE