IDT IDT29FCT520AT, IDT29FCT520BT, IDT29FCT520CT, IDT29FCT520DT, IDT29FCT521AT User Manual
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MULTILEVEL
PIPELINE REGISTERS
Integrated Device Technology, Inc.
FEATURES:
• A, B, C and D speed grades
• Low input and output leakage ≤1µA (max.)
• CMOS power levels
• True TTL input and output compatibility
– VOH = 3.3V (typ.)
– VOL = 0.3V (typ.)
• High drive outputs (-15mA IOH, 48mA IOL)
• Meets or exceeds JEDEC standard 18 specifications
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
• Available in DIP, SOIC, SSOP, QSOP, CERPACK and
LCC packages
IDT29FCT520AT/BT/CT/DT
IDT29FCT521AT/BT/CT/DT
DESCRIPTION:
The IDT29FCT520AT/BT/CT/DT and IDT29FCT521AT/
BT/CT/DT each contain four 8-bit positive edge-triggered
registers. These may be operated as a dual 2-level or as a
single 4-level pipeline. A single 8-bit input is provided and any
of the four registers is available at the 8-bit, 3-state output.
These devices differ only in the way data is loaded into and
between the registers in 2-level operation. The difference is
illustrated in Figure 1. In the IDT29FCT520AT/BT/CT/DT
when data is entered into the first level (I = 2 or I = 1), the
existing data in the first level is moved to the second level. In
the IDT29FCT521AT/BT/CT/DT, these instructions simply
cause the data in the first level to be overwritten. Transfer of
data to the second level is achieved using the 4-level shift
instruction (I = 0). This transfer also causes the first level to
change. In either part I=3 is for hold.
FUNCTIONAL BLOCK DIAGRAM
2
I ,I10
CLK
REGISTER
CONTROL
1
S ,S10
OCTAL REG. A1
OCTAL REG. A2
2
D -D70
8
MUX
OCTAL REG. B1
OCTAL REG. B2
MUX
OE
8
2619 drw 01
Y -Y70
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES APRIL 1994
1994 Integrated Device Technology, Inc. DSC-4215/4
6.2
1
IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT
MULTILEVEL PIPELINE REGISTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
I
0
D0
D
D
D3
D4
D
D
D7
CLK
GND
1
I1
2
3
1
2
5
6
4
5
6
7
8
9
10
11
12
P24-1
D24-1
SO24-2
SO24-7
SO24-8*
E24-1
24
Vcc
23
S
0
22
S
1
21
Y
0
20
Y1
19
Y2
18
Y
3
&
17
Y
4
16
Y5
15
Y
6
14
Y
7
13
OE
2619 drw 02
DIP/SOIC/SSOP/QSOP/CERPACK
*FCT520 only
TOP VIEW
DEFINITION OF FUNCTIONAL TERMS
Pin Names Description
n Register input Port.
D
CLK Clock input. Enter data into registers on LOW-
to-HIGH transitions.
I
0, I1 Instruction inputs. See Figure 1 and in-
struction Control Tables.
0, S1 Multiplexer select. Inputs either register A1, A2,
S
B
1 or B2 data to be available at the output port.
OE
n Register output port.
Y
Output enable for 3-state output port.
INDEX
D
1
D
2
D
3
NC
D
4
D
5
D
6
5
6
7
8
9
10
11
12 13 14 15 16 17 18
0
1
I
D0I
432128 27 26
L28-1
7
D
CLK
GND
LCC
TOP VIEW
REGISTER SELECTION
S1 S0 Register
00B
01B1
10A2
11A1
NC
NC
Vcc
OE
0S1
S
25
0
Y
24
Y
1
23
Y
2
NC
22
21
Y
3
20
Y
4
19
Y
5
6Y7
Y
2619 drw 03
2
2619 tbl 02
IDT29FCT520T
IDT29FCT521T
NOTE:
1. I = 3 for hold.
2619 tbl 01
DUAL 2-LEVEL SINGLE 4-LEVEL
A1
A2
B1
B2
A1
A2
I = 2 I = 1
A
1
A2
B1
B2
A1
A2
I = 2 I = 1
Figure 1. Data Loading in 2-Level Operation
B1
B2
B1
B2
A
A2
A
A2
1
B1
B2
I = 0
1
B1
B2
I = 0
2619 drw 04
6.2 2
IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT
MULTILEVEL PIPELINE REGISTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
(1)
Symbol Rating Commercial Military Unit
(2)
VTERM
Terminal Voltage
–0.5 to +7.0 –0.5 to +7.0 V
with Respect to
GND
(3)
VTERM
TA Operating
Terminal Voltage
with Respect to
GND
–0.5 to
CC +0.5
V
–0.5 to
VCC +0.5
0 to +70 –55 to +125 °C
V
Temperature
TBIAS Temperature
–55 to +125 –65 to +135 °C
Under Bias
TSTG Storage
–55 to +125 –65 to +150 °C
Temperature
PT Power Dissipation 0.5 0.5 W
IOUT DC Output
–60 to +120 –60 to +120 mA
Current
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability. No terminal voltage may exceed
V
CC by +0.5V unless otherwise noted.
2. Input and V
3. Outputs and I/O terminals only.
CC terminals only.
2619 lnk 03
CAPACITANCE (TA = +25°C, f = 1.0MHz)ABSOLUTE MAXIMUM RATINGS
Symbol Parameter
CIN Input
Capacitance
COUT Output
Capacitance
NOTE:
1. This parameter is measured at characterization but not tested.
(1)
Conditions Typ. Max. Unit
VIN = 0V 6 10 pF
VOUT = 0V 8 12 pF
2619 lnk 04
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol Parameter Test Conditions
IH Input HIGH Level Guaranteed Logic HIGH Level 2.0 — — V
V
IL Input LOW Level Guaranteed Logic LOW Level — — 0.8 V
V
(4)
(4)
(4)
(4)
VCC = Max. VI = 2.7V — — ±1 µA
VCC = Max. VI = 0.5V — — ±1 µA
VCC = Max. VO = 2.7V — — ±1 µA
VCC = Max., VI = VCC (Max.) — — ±1 µA
(3)
, VO = GND –60 –120 –225 mA
IN = VIH or VIL IOH = –8mA COM’L.
V
IN = VIH or VIL IOL = 48mA COM’L.
V
IN = GND or VCC
IH Input HIGH Current
I
IL Input LOW Current
I
OZH High Impedance
I
OZL Output Current VO = 0.5V — — ±1
I
I Input HIGH Current
I
IK Clamp Diode Voltage VCC = Min., IN = –18mA — –0.7 –1.2 V
V
OS Short Circuit Current VCC = Max.
I
OH Output HIGH Voltage VCC = Min. IOH = –6mA MIL. 2.4 3.3 — V
V
OL Output LOW Voltage VCC = Min. IOL = 32mA MIL. — 0.3 0.5 V
V
H Input Hysteresis — — 200 — mV
V
CC Quiescent Power VCC = Max. — 0.01 1 mA
I
Supply Current V
(1)
OH = –12mA MIL. 2.0 3.0 —
I
OH = –15mA COM’L.
I
Min. Typ.
(2)
Max. Unit
NOTES: 2619 tbl 05
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. The test limit for this parameter is ±5µA at T
CC = 5.0V, +25°C ambient.
A = -55°C.
6.2 3
IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT
MULTILEVEL PIPELINE REGISTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol Parameter Test Conditions
CC Quiescent Power Supply VCC = Max. — 0.5 2.0 mA
∆I
Current, TTL Inputs HIGH V
ICCD Dynamic Power Supply Current
IN = 3.4V
(4)
VCC = Max., Outputs Open VIN = VCC — 0.15 0.25 mA/
OE
(3)
= GND V
(1)
IN = GND MHz
Min. Typ.
One Input Toggling
50% Duty Cycle
I
C Total Power Supply Current
(6)
VCC = Max., Outputs Open VIN = VCC — 1.5 3.5 mA
f
CP = 10MHz VIN = GND
50% Duty Cycle
OE
= GND
One Bit Toggling V
at f
i = 5MHz VIN = GND
IN = 3.4V — 2.0 5.5
50% Duty Cycle
CC = Max., Outputs Open VIN = VCC — 3.8 7.3
V
fCP = 10MHz VIN = GND
50% Duty Cycle
OE
= GND
Eight Bits Toggling V
IN = 3.4V — 6.0 16.3
at fi = 2.5MHz VIN = GND
50% Duty Cycle
(2)
Max. Unit
(5)
(5)
NOTES: 2619 tbl 06
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
3. Per TTL driven input (V
CC = 5.0V, +25°C ambient.
IN = 3.4V); all other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. Values for these conditions are examples of the I
C = IQUIESCENT +IINPUTS + IDYNAMIC
6. I
CC formula. These limits are guaranteed but not tested.
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi)
CC = Quiescent Current
I
∆I
CC = Power Supply Current for a TTL HIgh Input (VIN = 3.4V)
H = Duty Cycle for TTL Inputs High
D
T = Number of TTL inputs at DH
N
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
i = Input Frequency
f
i = Number of Inputs at fi
N
All currents are in milliamps and all frequencies are in megahertz.
6.2 4
IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT
MULTILEVEL PIPELINE REGISTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT520AT/521AT FCT520BT/521BT
Com'l. Mil. Com'l. Mil.
Symbol Parameter Condition
tPHL
tPLH
tPHL
tPLH
Propagation Delay
CLK to Yn
Propagation Delay
0 or S1 to Yn
S
CL = 50pF
L = 500Ω
R
tSU Set-up Time, HIGH or LOW
Dn to CLK
tH Hold Time, HIGH or LOW
Dn to CLK
tSU Set-up Time, HIGH or LOW
0 or I1 to CLK
I
tH Hold Time, HIGH or LOW
0 or I1 to CLK
I
tPHZ
Output Disable Time
tPLZ
tPZH
Output Enable Time
tPZL
tW Clock Pulse Width
HIGH or LOW
(1)
Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Unit
2.0 14.0 2.0 16.0 2.0 7.5 2.0 8.0 ns
2.0 13.0 2.0 15.0 2.0 7.5 2.0 8.0 ns
5.0 — 6.0 — 2.5 — 2.8 — ns
2.0 — 2.0 — 2.0 — 2.0 — ns
5.0 — 6.0 — 4.0 — 4.5 — ns
2.0 — 2.0 — 2.0 — 2.0 — ns
1.5 12.0 1.5 13.0 1.5 7.0 1.5 7.5 ns
1.5 15.0 1.5 16.0 1.5 7.5 1.5 8.0 ns
7.0 — 8.0 — 5.5 — 6.0 — ns
2619 tbl 07
FCT520CT/521CT FCT520DT/521DT
Com'l. Mil. Com'l. Mil.
Symbol Parameter Condition
tPHL
tPLH
tPHL
tPLH
Propagation Delay
CLK to Yn
Propagation Delay
0 or S1 to Yn
S
CL = 50pF
L = 500Ω
R
(1)
tSU Set-up Time, HIGH or LOW
Dn to CLK
tH Hold Time, HIGH or LOW
Dn to CLK
tSU Set-up Time, HIGH or LOW
0 or I1 to CLK
I
tH Hold Time, HIGH or LOW
0 or I1 to CLK
I
tPHZ
Output Disable Time
tPLZ
tPZH
Output Enable Time
tPZL
tW Clock Pulse Width
HIGH or LOW
NOTES: 2619 tbl 08
1. See test circuit and waveforms.
2. Minimum units are guaranteed but not tested on Propagation Delays.
(3)
Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Unit
2.0 6.0 2.0 7.0 2.0 5.2 — — ns
2.0 6.0 2.0 7.0 2.0 4.8 — — ns
2.5 — 2.8 — 1.5 — — — ns
2.0 — 2.0 — 1.0 — — — ns
4.0 — 4.5 — 2.0 — — — ns
2.0 — 2.0 — 1.0 — — — ns
1.5 6.0 1.5 6.0 1.5 4.8 — — ns
1.5 6.0 1.5 7.0 1.5 4.0 — — ns
5.5 — 6.0 — 3.0 — — — ns
6.2 5
IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT
MULTILEVEL PIPELINE REGISTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
SWITCH POSITION
Test
V
Pulse
Generator
CC
500
V
V
IN
OUT
D.U.T.
50pF
T
R
C
500
L
Ω
Ω
2619 drw 05
7.0V
Open Drain
Disable Low
Enable Low
All Other Tests
DEFINITIONS:
L= Load capacitance: includes jig and probe capacitance.
C
T = Termination resistance: should be equal to ZOUT of the Pulse
R
Generator.
SET-UP, HOLD AND RELEASE TIMES PULSE WIDTH
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
t
t
REM
t
H
H
t
SU
t
SU
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
2619 drw 06
LOW-HIGH-LOW
PULSE
HIGH-LOW-HIGH
PULSE
Switch
Closed
Open
2619 lnk 09
1.5V
t
W
1.5V
2619 drw 07
SAME PHASE
INPUT TRANSITION
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
t
PLH
t
PLH
t
PHL
t
PHL
3V
1.5V
0V
OH
V
1.5V
V
OL
3V
1.5V
0V
2619 drw 08
ENABLE AND DISABLE TIMESPROPAGATION DELAY
ENABLE DISABLE
3V
CONTROL
INPUT
t
t
PHZ
PLZ
F ≤ 2.5ns; tR ≤ 2.5ns
t
PZL
OUTPUT
NORMALLY
OUTPUT
NORMALLY
HIGH
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; t
LOW
SWITCH
CLOSED
t
PZH
SWITCH
OPEN
3.5V
1.5V
1.5V
0V
0.3V
0.3V
1.5V
0V
3.5V
V
OL
V
OH
0V
2619 drw 09
6.2 6
IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT
MULTILEVEL PIPELINE REGISTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
XX
Temperature
Range
29FCT
X
Family
XX
Device Type
X
Package
X
Process
Blank
B
P
D
L
SO
PY
E
Q
520AT
521AT
520BT
521BT
520CT
521CT
520DT
521DT
Blank
2
54
74
Commercial
MIL-STD-883, Class B
Plastic DIP
CERDIP
Leadless Chip Carrier
Small Outline IC
Shrink Small Outline Package
CERPACK
Quarter-size Small Outline Package
Multilevel Pipeline Register
Multilevel Pipeline Register
High Drive
Balanced Drive
°
C to +125°C
-55
°
C to +70°C
0
2619 drw 10
6.2 7
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