IDT ICS1493-17 Schematic [ru]

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CLOCK SYNTHESIZER FOR PORTABLE SYSTEMS

Description

The ICS1493-17 is a low-power, low-jitter clock synthesizer designed to replace multiple crystals and oscillators in portable audio/video systems. The device generates a 37 MHz processor clock, a 48 MHz USB clock, a fixed 22.5792 MHz audio clock, a selectable

24.576 MHz or 22.5792 MHz audio clock, and a 27MHz reference clock for video. Using ICS’ proprietary mix of analog and digital Phase-Locked Loop (PLL) technology, the device spreads the frequency spectrum of the 37 MHz output, reducing the peak amplitude of by up to 16 dB. An output enable (OE) pin lowers the chip power consumption while tri-stating all outputs.

Features

• Extremely low operating current (11 mA)

• Packaged in 20-pin QFN (Pb-free)

• Input crystal or clock frequency of 27 MHz

• Output reference frequency of 27 MHz

• Fixed output frequencies of 37 MHz, 48 MHz and

22.5792 MHz

• Selectable output frequency of either 22.5792 MHz

or 24.576 MHz

• Configurable spread spectrum on 37 MHz output

• Operating core voltage of 1.8 V

• Output voltage of 1.8 V or 2.5 V

• Advanced, low-power CMOS process

Block Diagram

ICS1493-17

27 MHz clock or crystal input

SCK

SDATA

Optional tuning capacitors

IIC

Control

Logic

Crystal

Oscillator/

Clock

Buffer

VDD

PLL1

(Spread)

PLL2

PLL3 22/24M

PLL4 22M

GND

VDDO

37M

48M

27M

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Pin Assignment Output Enable Table

GND

48M

VDDO

VDD

22M

GND

20-pin QFN

Pin Descriptions

Number

1 GND Power Connect to ground.

2 48M Output 48 MHz clock output. High impedance state when OE

3 VDDO Power Output voltage level. Connect to +1.8 or 2.5 V. Same voltage as pin

4OE

VDD

27M

SCK

SDATA

Name

GND

Clock Output State

0 Normal Operation

GND

VDD

37M

VDDO

22/24M

GND

Note: OE pin has an internal pull-down resistor.

1 Hi-Z

Pin Description

Type

12.

Input Output Enable pin. See table above. Internal pull-down resistor.

=1.

5 VDD Power Connect to +1.8 V.

6 22M Output 22.5792 MHz clock output. Internal pull-down. High impedance state

when OE

=1.

7 GND Power Connect to ground.

8 SCK Input I

9 SDATA Input I

C bus clock pin. Internal pull-up resistor.

C bus data pin. Internal pull-up resistor.

10 GND Power Connect to ground.

11 22/24M Output Selectable output clock of either 22.5792M or 24.576M. See table.

Internal pull-down. High impedance state. OE

=1.

12 VDDO Power Output voltage level. Connect to +1.8 or 2.5 V. Same voltage as pin 3.

37M

Output Spread spectrum 37 MHz clock output. See table. Internal pull-down.

High impedance state when OE

=1.

14 VDD Power Connect to +1.8 V.

15 GND Power Connect to ground.

16 GND Power Connect to ground.

17 27M Output 27 MHz reference clock output. Internal pull-down. High impedance

state when OE

=1.

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Number

18 VDD Power Connect to +1.8 V.

19 X2 Output Connect to 27 MHz crystal or float for clock input.

20 X1 Input Crystal connection. Connect to 27 MHz crystal or clock input.

Name

Type

External Components

Decoupling Capacitor

As with any high-performance mixed-signal IC, the ICS1493-17 must be isolated from system power supply noise to perform optimally.

A decoupling capacitor of 0.01µF must be connected between each VDD and the PCB ground plane.

Series Termination Resistor

Clock output traces over one inch should use series termination. To series terminate a 50Ω trace (a commonly used trace impedance), place a 33Ω resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20Ω.

I2C External Resistor Connection

The SCK and SDATA pins can be connected to any voltage between 1.71 V and 2.625 V.

Pin Description

PCB Layout Recommendations

For optimum device performance and lowest output phase noise, the following guidelines should be observed.

1) The 0.01µF decoupling capacitors should be mounted on the component side of the board as close to the VDD pin as possible. No vias should be used between the decoupling capacitors and VDD pins. The PCB trace to VDD pins should be kept as short as possible, as should the PCB trace to the ground via.

2) The external crystal should be mounted just next to the device with short traces. The X1 and X2 traces should not be routed next to each other with minimum spaces, instead they should be separated and away from other traces.

3) To minimize EMI, the 33Ω series termination resistor should be placed close to the clock output.

Crystal Load Capacitors

No external crystal load capacitors are required. To save discrete component cost, the ICS1493-17 integrates on-chip capacitance to support a crystal with CL=10 pF. It is important to keep stray capacitance to a minimum by using very short PCB traces (and no vias) between the crystal and device.

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CLOCK SYNTHESIZER FOR PORTABLE SYSTEMS 3

4) An optimum layout is one with all components on the same side of the board, minimizing vias through other signal layers. Other signal traces should be routed away from the ICS1493-17. This includes signal traces just underneath the device, or on layers adjacent to the ground plane layer used by the device.

ICS1493-17 REV A 101005

ICS1493-17 CLOCK SYNTHESIZER FOR PORTABLE SYSTEMS SYNTHESIZERS

Absolute Maximum Ratings

Stresses above the ratings listed below can cause permanent damage to the ICS1493-17. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.

Item Rating

Supply Voltage, VDD -0.5 V to 5 V

All Inputs -0.5 V to VDD+0.5 V

All Outputs -0.5 V to 2.5V+0.5 V

Storage Temperature -65 to +150°C

Junction Temperature 125°C

Soldering Temperature 260°C

ESD (HBM) 2000V min.

MSL (Moisture Sensitivity Level) 3

Recommended Operation Conditions

Parameter Min. Typ. Max. Units

Ambient Operating Temperature -10 +80 °C

Power Supply Voltage (measured in respect to GND) +1.70 +2.00 V

Output Power Supply Voltage (with respect to GND) +1.71 +2.625 V

DC Electrical Characteristics

Unless stated otherwise, VDD = 1.8 V -0.1 V/+0.2 V, VDDO=2.5 V ±5%, Ambient Temp -10°C to +80°C

Parameter Symbol Conditions Min. Typ. Max. Units

Operating Voltage VDD 1.7 2.0 V

Supply Current IDD

Input High Voltage V

Input Low Voltage V

Output High Voltage V

Output Low Voltage V

Input Capacitance, inputs C

Load Capacitance, X1 and X2 C

No load,VDDO=2.5 V

No load,VDDO=1.8 V

IOL = +2 mA 0.2VDDO V

No internal load

capacitance

13 16 mA

11 15 mA

0.7VDD V

0.3VDD V

= -2 mA 0.8VDDO V

5pF

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