IDT EVK-UFT285-6-7 User Manual

EVK-UFT285-6-7 Evaluation Board User Guide
USER GUIDE
Introduction
The EVK-UFT285-6-7 is designed to help the customer evaluate the 8T49N285, 8T49N286, and 8T49N287 devices, members of IDT's 3rd generation Universal Frequency Translator family. When the board is connected to a PC running IDT Timing Commander™ software through USB, the device can be configured and programmed to generate frequencies with best-in-class performances.
The EVK-UFT285-6-7 evaluation board ships with the following:
1 – EVK-UFT285-6-7 Evaluation Board
1 – USB Cable
Requirements
1. PC Requirements:
IDT Timing Commander software installed.
USB 2.0 interface. The evaluation board USB module is not compatible with USB 3.0. If using a computer with high speed
USB ports, please check if there's a standard USB 2.0 port available for use. The hardware drivers are automatically installed during the Timing Commander installation.
Windows XP SP3 or later.
Processor: Minimum 1GHz.
Memory: Minimum 512MB, recommended 1GB.
Available Disk Space: Min 600MB (1.5GB 64bit), recommended 1GB (2GB 64bit)
Network access during installation if the .NET framework is not currently installed on the system.
2. Power Supply with 3.3V and 1000mA rating
3. Three banana plug cables to connect the power supply to the board.
Quick Start: Powering Up the Board
(1) Set 3.3V supply current limit to 500mA.
(2) Remove all output terminations.
(3) Set Dip Switch selectors to the middle position.
(4) Connect a cable from a PC to the USB port.
(5) Connect VEE to the black GND jack.
(6) Connect 3.3V to VCC_J and VDDO_J.
(7) Power on the Power Supply.
(8) Press the Reset Button.
Once correct operation is verified, set the power supply limit for the number of outputs to be active.
The USB port must be powered by the PC in order to have the correct I
The board ships with a 38.88MHz crystal and will have a default frequency of 155.52MHz on Q0. If all outputs are unterminated, current should measure ~256mA with 3.3V on VCC_J and VDDO_J. If all outputs are terminated, current should measure ~262mA.
When evaluating performance with the default hardware configuration, it is recommended that all active outputs be terminated 50ohms to VEE by either terminator plugs or an instrument.
2
C bus voltage levels.
REVISION B 04/01/15 1 ©2015 Integrated Device Technology, Inc.
EVK-UFT285-6-7 EVALUATION BOARD USER GUIDE
8T49N286I_EVB
Board Overview
Use the following diagram to identify: power supply jacks, USB connector, input and output SMA connectors, reset button, EEPROM, etc.
Figure 1. Evaluation Board Top View
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EVK-UFT285-6-7 EVALUATION BOARD USER GUIDE
Legend–Evaluation Board Top View
Inputs
CLK0_S Clock 0 sense lines.
CLK0 Clock 0 input lines. Can be configured for differential or single-ended input.
CLK1_S Clock 1 sense lines.
CLK1 Clock 1 input lines. Can be configured for differential or single-ended input.
CLK2 Clock 2 input lines. Can be configured for differential or single-ended input.
CLK3 Clock 3 input lines. Can be configured for differential or single-ended input.
Outputs
Q0 Output Q0. Can be a differential pair or two individual single-ended outputs.
Q1 Output Q1. Can be a differential pair or two individual single-ended outputs
Q2 Output Q2. Can be a differential pair or two individual single-ended outputs.
Q3 Output Q3. Can be a differential pair or two individual single-ended outputs.
Q4 Output Q4. Can be a differential pair or two individual single-ended outputs.
Q5 Output Q5. Can be a differential pair or two individual single-ended outputs.
Q6 Output Q6. Can be a differential pair or two individual single-ended outputs.
Q7 Output Q7. Can be a differential pair or two individual single-ended outputs.
Other
A Dip Switch for DC control signals (CLK_SEL, PLL_BYPASS, etc)
B VCCO_J
C VCC_J
D GPIOs
E RESET
F IDT8T49N286 – the device to be evaluated
G USB connector
H EEPROM – AT24CO4C
J Ground Jack
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Figure 2. Evaluation Board Bottom View
EVK-UFT285-6-7 EVALUATION BOARD USER GUIDE
Legend–Evaluation Board Bottom View
X1 3.2 x 2.5 mm SMD Fox-603-38.88-4 Crystal
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EVK-UFT285-6-7 EVALUATION BOARD USER GUIDE
Schematics
The following figures are schematics that are applicable to specific sections of this User Guide. The complete schematics are available in a separate document.
Figure 3. Inputs Schematic
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Figure 4. Output Termination Schematic
EVK-UFT285-6-7 EVALUATION BOARD USER GUIDE
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