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VersaClock® 3S - 5P35021 Evaluation Board
USER GUIDE
Introduction
The evaluation board is designed to help the customer eval uate the 5 P35021, the late st addition to the family o f programmable
devices in IDT's Timing portfolio. When the board is connected to a PC running IDT Timing Commander™ Software through
USB, the device can be configured and programmed to generate different combinations of frequencies.
Board Overview
Use Figure 1 and Table 1 to identify: power supply jacks, USB connector, input and output frequency SMA connectors.
Figure 1. 5P35021 Evaluation Board Overview
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VERSACLOCK® 3S - 5P35021 Evaluation Board
Table 1: Evaluation Board Pins and Functions
Item Name On-Board Connector Label Function
0 Power supply jack J18 Connect to 1.8V, 2.5V, or 3.3V for the output voltage of
the device
1 Ground jack J19 If J18 & J17are used for power supply, this is the return
power
2 Output voltage jack J17 Connect to 3.3V core voltage of the device
3 USB connector J3 Connect this USB to your PC to run IDT Timing
Commander
4 DIP switch U6 This is used to configure the device in different modes
5 Differential clock input CLKIN/CLKINB A differential clock can be connected as source for the
device
5
Single-ended clock input CLKINB A Single-ended clock can be connected as source for
(cont.)
6 Crystal, 25 MHz Y1 This crystal is used as a reference source for the clock
the device using CLKINB only
signal
7 Differential output DIFF_C1/T1 This can be a differential pair, or two single-ended
outputs. By default, it’s a LPHCSL differential output.
8 Differential output DIFF_C0/T0 This can be a differential pair, or two single-ended
outputs. By default, it’s a LPHCSL differential output.
9 Single-ended output SE_1 This is the single-ended output. By default it’s an
LVCMOS single-ended output
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VERSACLOCK® 3S - 5P35021 Evaluation Board
Figure 2A. (JP5: Pin 1 - 2 to Voltage Regulators)
Figure 2B. (JP5: Pin 2 - 3 to Banana Jack)
Board Power Supply
Power Supply Options
The core voltage includes a digital voltage VDD33 and an analog voltage VDDA. Both core voltages can be powered by an
external bench power supply or by USB.
• Bench Power Supply – To supply VDD33 with a bench power supply, connect power to J17. To supply VDDA with a bench
power supply, connect power to J18. At the same time, place the jumpers as shown in Figure 2B.
• USB Power Supply – When the board is connected to a PC through a USB cable, on-board voltage regulators will generate
a 3.3V for the device. In this case, place the jumper as sho wn in Figure 2A. See JP5 jum per position for the o n-board voltage
regulators in the following figure. USB power source is recommended because it's readily available right from your laptop.
Figure 2. Jumping to the Pin configuration as shown (Figure 2A.) will select power source from on-board
voltage regulators powered by USB; Jumping to the Pin configuration as shown (Figure 2B.) will
select the bench power supply
Output Clock Voltages
Like VDDA an d VDD33 having two sources, each output voltage is also provided with two sou rces to choose from: bench power
supply or powered from USB. The selection is made by a 4-way header as shown in Figure 3 below.
The jumper can be used to select a voltage for E1, E2, E3, E4, and E5 respectively. The on-board voltage regulators powered
by USB are 1.8V, 2.5V and 3.3V; VDDOJ is from bench power supply connecting to JP17 and JP18. Each output voltage can
be individually selected. Use the label on the evaluation board: E1 for VDDDIFF1, E2 for VDDSE1, E3 for VDDDIFF2, E4 for
VDDSE2 and E5 for VDDSE3. The JP6 on the EVB needs to be in the default position as supplied by the manufacturer.
Note: Connect the USB to the board when using external power supply
Figure 3. Jumper Configuration for On-board Voltage Regulators
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VERSACLOCK® 3S - 5P35021 Evaluation Board
Connecting the Board
The board is connected to a PC through a USB connector for configuring and programming the device, as shown in Figure 4
below. The USB interface will also provide +5V power supply to the board, from which on-board voltage regulators generate
various voltages for the core as well as for each output.
The board can also be powered b y a bench power supply by connecting two banan a jacks J17, J18 for output and core voltages,
respectively. Please see board power supply section for details.
Note: The USB port only supports USB 2.0; USB 3.0 is not supported at this time.
Figure 4. Connecting the Board with USB Port for Communications with Timing Commander Software
On-Board Crystal
A 25MHz crystal is installed on the board. It is used as a source for reference frequency.
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VERSACLOCK® 3S - 5P35021 Evaluation Board
Board Default Frequency Output
Table 2: Board Default Frequency Output
Serial Output Output Frequency
1 SE_1 (Single-ended) –
2 DIFF_CO/TO (Differential Output) 100 MHz
3 DIFF_C1/T1 (Differential Output) 100 MHz
DIP Switch (U6)
Table 3: DIP Switch (U6)
Serial DIP Switch Pin Number DIP Switch Pin Name State Mode
A 1 SDA_DFCO Floating/Tristate –
B 2 SCL_DFC1 High or 1 I2C
C 3, 5, 7 SMA_OE1, SMA_OE2, SMA_OE3 High or 1 –
D 4, 6, 8 OE1, OE2, OE3 High or 1 –
Configuration and Setup
Table 4: Configuration and Setup from I2C Port
Step No. Steps Comments
1 Set SCL_OFC1 Pin (DIP Switch PIN 2) High or 1
2 Launch 5P35021 Timing Commander Software Refer to 5P35021 Timing Commander User Guide
Timing Commander Software
3 Follow the “Getting Started Steps” – in Timing
Commander Software
4 Using the Timing Commander GUI, start a new settings
file, or open a pre-optimized file.
5 Connect J3 to a USB Port using the supplied I2C cable An I2C connection is established between GUI
6 Connect to the EVB by clicking on the microchip icon
located at the right of the timing commander
Configure the T iming Command er Software fo r the
required sets of Outputs
software and VC3S device
–
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Step No. Steps Comments
7 Once configured, new options will be available on a
green background indicating that the EVB has
successfully connected with the board.
8 Write the se tting to the device by clicking on the write all
registers to the chip option
9 All intended outputs should be available for
measurement.
Board Schematics
Evaluation board schematics are shown on the following pages.
Figure 5. Evaluation Board Schematic (I)
–
–
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Figure 6. Evaluation Board Schematic (II)
VERSACLOCK® 3S - 5P35021 Evaluation Board
Figure 7. Evaluation Board Schematic (III)
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Figure 8. Evaluation Board Schematic (IV)
DIFF_CO/TO
DIFF_C1/T1
VERSACLOCK® 3S - 5P35021 Evaluation Board
Signal Termination Options
Termination options for Differential Output 1 - 2 in the evaluation board are displayed in Figure 9. The termination circuits are
designed to optionally terminate the output clocks in LVPECL, LVDS, LVCMOS and HCSL signal types by populating (or
not-populating) some resistors. DC or AC coupling of these outputs are also supported.
Table 5 and Table 6, below, tabulates component installations to support LVPECL, HCSL, LVCMOS and L VDS signal types for
OUTPUT1 - 2, respectively. Please note that by doing so, the output signals will be measured and terminated by an oscilloscope
with a 50 internal termination.
Figure 9. Output Termination Options
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Table 5: Termination Options for Differential Output 1 (DIFF_CO/TO)
VERSACLOCK® 3S - 5P35021 Evaluation Board
Signal Type
**LPHCSL 33 2pF Not installed
Series Resistors:
R79, R80
Series Capacitors:
C19, C20
Resistor Network:
R25, R26, R27, R29, R32
Table 6: Termination Options for Differential Output 2 (DIFF_C1/T1)
Signal Type
**LPHCSL 33 2pF Not installed
As noted, 4-resistor network is not installed in Table 5 and Table 6 because oscilloscope with internal 50 termination is utilized
for signal termination and measurement. If an AC-coupled, stand-alone LVPECL output is needed (without oscilloscope
connections), the 4-resistor network need s to be inst alle d ac co rd ing ly.
Series Resistors:
R81, R82
Series Capacitors:
C21, C22
Resistor Network:
R38, R42, R43, R44, R45
Table 7: Termination for Single-ended Output 1 (SE_1)
Signal Type
*LVCMOS 33 Not installed
Series Resistors:
R1
Series Capacitors:
C16
Table 8: Termination for Differential and Single-ended Input)
Signal Type
Series Resistor:
R8
Series Resistor:
R5
Differential Clock Input Not installed Not installed
Single-ended Clock Input Not installed Not installed
Note: ** The differential output is applicable to LPHCSL which is the default configuration of the board.
* The single-ended output is applicable to LVCMOS which is the default configuration of the board.
Contact IDT if user wants to change termination configuration to support other output signal types.
Orderable Part Numbers
The following evaluation board part numbers are available for order.
Table 9: Orderable Part Numbers
Part Number Description
EVK5P35021 Evaluation board with all differential outputs terminated as LPHCSL, Single-ended
terminated as LVCMOS
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