ICST MK3233-02S, MK3233-02STR, MK3233-01S, MK3233-01STR Datasheet
MK3233
ICRO
C
LOCK
Description
The MK3233 is the smallest size, lowest power system
clock synthesizer available. It is the ideal way to
generate clocks for smart cell phones, PDAs, and other
devices where low power is required. Using analog
Phase-Locked Loop (PLL) techniques, the device
operates from a single 32.768 kHz crystal to produce
the 32.768 kHz, CPU, and serial communications
output clocks.
The device has multiple power down modes for the
CPU, communications, and 32.768 kHz clocks.
The MK3233 can save board space and cost even if it
only replaces the 32 kHz oscillator circuitry and one
additional surface mount crystal or oscillator. The
extremely low IDD, the ease of surface mounting, the
upgradeability of CPU frequencies, and the power
down capability are added benefits in using the part.
Block Diagram
VDD GND
Handheld System Clock Synthesizer
Features
• Input crystal frequency of 32.768 kHz
• Lowest power solution available
• Operating temperature of -20 to 70 °C
• Output clock frequencies up to 50 MHz
• Three output clocks
• 3.3 V or 5.0 V operation
• Duty cycle of 45/55
• Eight selectable CPU frequencies
• CPU or Communication clock power down
• Separate battery supply pin for 32 kHz runs to 2V
• IDD less than 4µA when 32 kHz running
• Serial port clocks of 1.8432 MHz (-01 version) or
3.6864 MHz (-02 version)
• Packaged in 16 pin narrow SOIC
CPUS0
CPUS1
CPUS2
PDCPU
PDCOMM
VDD32
32.768 kHz
crystal
or
clock
X1
X2
PD
Crystal
Oscillator
CPU
Clock Synthesis
and Control
Circuitry
Communications
Clock Synthesis
and Control
Circuitry
Output
Buffer
Output
Buffer
Output
Buffer
CPUCLK
1.843 or
3.686 MHz
32.768 kHz
MDS 3233 F 1 Revision 11070 Printed 11/16/00
Integrated Circuit Systems, Inc.• 525 Race Street• San Jose • CA • 95126• (408) 295-9800 tel • www.icst.com
MK3233
Handheld System Clock Synthesizer
CPU Clock Decoding
CPUS2 CPUS1 CPUS0 CPUCLK (MHz)
0 0 0 8.00
0 0 1 13.00
0 1 0 16.00
0 1 1 20.00
1 0 0 40.00
1 0 1 25.00
1 1 0 50.00
1 1 1 33.33
Pin Assignment
CPUS2
VDD32
VDD
GND
COMMCLK
ICRO
X2
X1
C
LOCK
1
2
3
4
5
6
16
15
14
13
12
11
7 10
CPUS1
CPUS0
CPUCLK
VDD
GND
PD
PDCPU
Frequency transitions will occur smoothly.
32K
8 9
PDCOMM
Pin Descriptions
Number Name Type Description
1 CPUS2 I Select 2 for CPUCLK frequencies. See Table above.
2 X2 O Crystal connection. Connect to 32.768 kHz crystal.
3 X1 I Crystal connection. Connect to 32.768 kHz crystal.
4 VDD32 P Separate power supply connection for 32.768 kHz clock. Will operate to 2.0 V.
5 VDD P Connect to +3.3 V or +5 V. Must be the same voltage as pin 13.
6 GND P Connect to ground.
7 COMMCLK O Serial communications (1.84 on -01 version, or 3.68MHz on -02 version) clock output.
8 32K O 32.768 kHz square wave clock output.
9 PDCOMM I Power Down serial Communications clock output (stops low) when low.
10 PDCPU I Power Down CPU clock output (stops low) when low.
11 PD I Powers Down everything but 32 kHz oscillator internally. 32 kHz output buffer is off.
12 GND P Connect to ground.
13 VDD P Connect to +3.3 V or +5 V. Must be the same voltage as pin 5.
14 CPUCLK O CPUCLK output. See Table above.
15 CPUS0 I Select 0 for CPUCLK frequencies. See Table above.
16 CPUS1 I Select 1 for CPUCLK frequencies. See Table above.
Type: I = Input, O = output, P = power supply connection
Power Down status: Output clocks will stop in a low state when powered down
External Components
The MK3233 requires a minimum number of external components for proper operation. Decoupling
capacitors of 0.1µF should be connected between VDD and GND, and VDD32 and GND, as close to the
MK3233 as possible. A series resistor should be used on the VDD32 supply. A series termination resistor of
33Ω may be used for each clock output, except the 32.768 kHz. For tuning the real time clock output, use
a 32.768 kHz crystal with a load capacitance of 12.5pF, and connect a 20pF±5% (NPO dielectric)
capacitor between each crystal pin and ground. The 32.768 kHz crystal must be connected as close to the
chip as possible. Consult MicroClock for a recommended external circuit schematic.
MDS 3233 F 2 Revision 11070 Printed 11/16/00
Integrated Circuit Systems, Inc.• 525 Race Street• San Jose • CA • 95126• (408) 295-9800 tel • www.icst.com
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