ICST ICS8701-01Y, ICS8701-01YT Datasheet

Integrated Circuit Systems, Inc.
ICS8701-01
L
OW SKEW ¸1, ¸2 CLOCK
GENERAT OR W/POLARITY CONTROL
GENERAL DESCRIPTION
The ICS8701-01 is a low skew, ÷1, ÷2 Clock
,&6
HiPerClockS™
minated transmission lines. The effective fanout can be in­creased from 20 to 40 by utilizing the ability of the outputs to drive two series terminated lines.
The divide select inputs, DIV_SELx, control the output fre­quency of each bank. The outputs can be utilized in the ÷1, ÷2 or a combination of ÷1 and ÷2 modes. The master reset/ output enable input, nMR/OE, resets the internal dividers and controls the active and high impedance states of all outputs. The output polarity inputs, INV0:1, control the polarity (invert­ing or non-inverting) of the outputs of each bank. Outputs QA0-QA4 are inverting for every combination of the INV0:1 input. The timing relationship between the inverting and non­inverting outputs at different frequencies is shown in the Tim­ing Diagrams.
The ICS8701-01 is characterized at 3.3V and mixed 3.3V in­put supply, and 2.5V output supply operating modes. Guar­anteed bank, output and part-to-part skew characteristics make the ICS8701-01 ideal for those clock distribution appli­cations demanding well defined performance and repeatabil­ity.
Generator and a member of the HiPerClockS fa mil y of Hi gh Performance Clock Solutions from ICS. The low impedance LVCMOS outputs
are designed to drive 50 series or parallel ter-
FE ATURES
 20 LVCMOS outputs, 7 typical output impedance
 Output frequency up to 250 MHz
 250ps bank skew, 300ps output skew, 350ps multiple
frequency skew, 700ps part-to-part skew
 Selectable inverting and non-inverting outputs
 LVCMOS / LVTTL clock input
 LVCMOS / LVTTL control inputs
 Bank enable logic allows unused banks to be disabled
in reduced fanout applications
 3.3V or mixed 3.3V input, 2.5V output operating
supply modes
 48 lead low-profile QFP (LQFP), 7mm x 7mm x 1.4mm
package body, 0.5mm package lead pitch
 0°C to 70°C ambient operating temperature
 Other divide values available on request
BLOCK DIAGRAM PIN ASSIGNMENT
GND
LVCMOS_CLK
DIV_SELA
DIV_SELB
DIV_SELC
DIV_SELD
nMR/OE
INV0
INV1
÷1 ÷2
1 0
1 0
1 0
1 0
Output Polarity Control
QAO - QA4
QB0 - QB4
QC0 - QC4
QD0 - QD4
QC3
VDDOC
QC4 QD0
VDDOD
QD1
GND
QD2
GND
QD3
VDDOD
QD4
GND
48 47 46 45 44 43 42 41 40 39 38 37
13 14 15 16 17 18 19 20 21 22 23 24
DIV_SELD
QC1
QC2
ICS8701-01
VDDI
nMR/OE
DIV_SELC
48-Pin LQFP
VDDOC
INV1
QC0
GND
QB4
INV0
VDDOB
VDDI
Y Package
Top View
GND
QB2
QB3
DIV_SELB
LVCMOS_CLK
GND
GND
36 35 34 33 32 31 30 29 28 27 26 25
DIV_SELA
QB1 VDDOB QB0 QA4 VDDOA QA3 GND QA2 GND QA1 VDDOA QA0
8701-01 www.icst.com REV. A - AUGUST 28, 2000
Integrated Circuit Systems, Inc.
TABLE 1. PIN DESCRIPTIONS
rebmuNemaNepyTnoitpircseD
44,2CODDVrewoP .V5.2roV3.3ottcennoC.ylppusrewopCknaBtuptuO
11,5DODDVrewoP .V5.2roV3.3ottcennoC.ylppusrewopDknaBtuptuO
23,62AODDVrewoP .V5.2roV3.3ottcennoC.ylppusrewopCknaBtuptuO
14,53BODDVrewoP .V5.2roV3.3ottcennoC.ylppusrewopBknaBtuptuO
,81,9,7
,03,82,12 ,64,93,73
84
02,61IDDVrewoP.V3.3ottcennoC.ylppusrewoptupnI
,92,72,52
33,13
,83,63,43
24,04
,74,54,34
3,1
,8,6,4
21,01
22KLC_SOMCVLtupnIpulluP.slevelecafretniSOMCVL.tupnikcolC
31DLES_VIDtupnIpulluP .slevelecafretniSOMCVL.stuptuoDknabrofnoisividycneuqerfslortnoC
41CLES_VIDtupnIpulluP .slevelecafretniSOMCVL.stuptuoCknabrofnoisividycneuqerfslortnoC
32BLES_VIDtupnIpulluP .slevelecafretniSOMCVL.stuptuoBknabrofnoisividycneuqerfslortnoC
42ALES_VIDtupnIpulluP .slevelecafretniSOMCVL.stuptuoAknabrofnoisividycneuqerfslortnoC
91,710VNI,1VNItupnIpulluP .slevelecafretniSOMCVL.sknabybstuptuofoytiralopsenimreteD
51EO/RMntupnIpulluP
DNGrewoP.dnuorgottcennoC.dnuorG
,2AQ,1AQ,0AQ
4AQ,3AQ
,2BQ,1BQ,0BQ
4BQ,3BQ
,2CQ,1CQ,0CQ
4CQ,3CQ
,2DQ,1DQ,0DQ
4DQ,3DQ
tuptuO7.slevelecafretniSOMCVL.stuptuoAknaB .ecnadepmituptuolacipyt
tuptuO7.slevelecafretniSOMCVL.stuptuoBknaB .ecnadepmituptuolacipyt
tuptuO7.slevelecafretniSOMCVL.stuptuoCknaB .ecnadepmituptuolacipyt
tuptuO7.slevelecafretniSOMCVL.stuptuoDknaB .ecnadepmituptuolacipyt
ICS8701-01
L
OW SKEW ¸1, ¸2 CLOCK
GENERAT O R W/POLARITY CONTROL
steS.WOLotstuptuognitrevni-nonsteseR.elbanetuptuodnateserretsaM
.slevel
ecafretniSOMCVL.stuptuollaselbasiddnaselbanE.HGIHotstuptuognitrevni
TABLE 2. PIN CHARACTERISTICS
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
NICecnaticapaCtupnI Fp
PULLUPRrotsiseRpulluPtupnI 15K
DPCecnaticapaCnoitapissiDrewoP
)tuptuorep(
TUORecnadepmItuptuO 7
V564.3=xODDV,IDDV Fp
V526.2=xODDV,V564.3=IDDV Fp
TABLE 3. FUNCTION TABLE
stupnI stuptuO
EO/RMnxLES_VID1VNI0VNIAKNABBKNABCKNABDKNABycneuqerfxQ
0XX X ZiHZiHZiHZiHorez
10 0 0 gnitrevnIgnitrevni-noNgnitrevni-noNgnitrevni-noN2/NIf
10 0 1 gnitrevnIgnitrevnIgnitrevni-noNgnitrevni-noN2/NIf
10 1 0 gnitrevnIgnitrevnIgnitrevnIgnitrevni-noN2/NIf
10 1 1 gnitrevnIgnitrevnIgnitrevnIgnitrevnI2/NIf
110 0 gnitrevnIgnitrevni-noNgnitrevni-noNgnitrevni-noNNIf
110 1 gnitrevnIgnitrevnIgnitrevni-noNgnitrevni-noNNIf
111 0 gnitrevnIgnitrevnIgnitrevnIgnitrevni-noNNIf
111 1 gnitrevnIgnitrevnIgnitrevnIgnitrevnINIf
8701-01 www.icst.com REV. A - AUGUST 28, 2000
Integrated Circuit
L
OW SKEW ¸1, ¸2 CLOCK
ICS8701-01
Systems, Inc.
GENERAT OR W/POLARITY CONTROL
ABSOLUTE MAXIMUM RATINGS
Supply Voltage 4.6V
Inputs -0.5V to VDDI + 0.5V Outputs -0.5V to VDDOx + 0.5V Ambient Operating Temperature 0°C to 70°C Storage Temperature -65°C to 150°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of product at these condition or any conditions beyond those listed in the DC Electrical Characteristics or AC Electrical Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
TABLE 4A. DC ELECTRICAL CHARACTERISTICS, VDDI = VDDOX = 3.3V±5%, TA = 0°C TO 70°C
lobmySretemaraP snoitidnoCtseTmuminiMlacipyTmumixaMstinU
IDDVegatloVylppuSrewoPtupnI 531.33.3564.3V
xODDVegatloVylppuSrewoPtuptuO 531.33.3564.3V
HIVegatloVhgiHtupnI
LIVegatloVwoLtupnI
HIItnerruChgiHtupnI V564.3=NIV=IDDV5Aµ
LIItnerruCwoLtupnI V0=NIV=IDDV051-Aµ
DDItnerruCylppuSrewoPtnecseiuQ 07Am
HOVegatloVhgiHtuptuO
LOVegatloVwoLtuptuO
KLC_SOMCVL2567.3V
KLC_SOMCVL3.0-3.1V
KLC_SOMCVLtpecxellA
KLC_SOMCVLtpecxellA
V564.3=IDDV
V531.3=IDDV
V531.3=xODDV
Am63-=HOI
V531.3=xODDV
Am63=LOI
2567.3V
3.0-8.0V
6.2V
5.0V
TABLE 5A. AC ELECTRICAL CHARACTERISTICS, VDDI = VDDOX = 3.3V±5%, TA=0°C TO 70°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
XAMfycneuqerFtupnImumixaM 052zHM
HLpthgiH-ot-woL,yaleDnoitagaporPZHM0 < f zHM0025.25.3sn
LHptwoL-ot-hgiH,yaleDnoitagaporPZHM0 < f zHM0025.25.3sn
)b(kst2ETON;wekSknaB 2/xODDVtaegdegnillafnoderusaeM052sp
)o(kst3ETON;wekStuptuO 2/xODDVtaegdegnillafnoderusaeM003sp
(kst ω)4ETON;wekSycneuqerFelpitluM 2/xODDVtaegdegnillafnoderusaeM053sp
)pp(kst5ETON;wekStraPottraP 2/xODDVtaegdegnillafnoderusaeM007sp
Rt6ETON;emiTesiRtuptuO 051007sp
Ft6ETON;emiTllaFtuptuO 051007sp
05htiwdetanimretstuptuollA.esiwrehtodetonsselnuzHM002taderusaemsretemarapllA:1ETON .2/xODDVot
2/ELCYCt
5.0-
2/ELCYCt
.snoitidnocdaollauqehtiwdnasegatlovylppusemasehttastuptuofoknabanihtiwwekssadenifeD:2ETON
WPthtdiWesluPtuptuO
NEtemiTelbanEtuptuO6ETON; 6sn
SIDtemiTelbasiDtuptuO6ETON; 6sn
.snoitidnoc
.snoitidnocdaollauqednasegatlov
.snoitidnocdaollauqehtiwdna
ZHM0 < f < zHM002
zHM002=f25.23sn
.noitcudorpnidetsettoN.noitaziretcarahcybdeetnaraugerasretemarapesehT:6ETON
2/ELCYCt
5.0+
daollauqehtiwdnasegatlovylppusemasehttanoitceridemasehtnignihctiwsstuptuofosknabssorcawekssadenifeD:3ETON
sn
ylppusemasehthtiwseicneuqerftnereffidtagnitareponoitceridemasehtnignihctiwsstuptuofosknabssorcawekssadenifeD:4ETON
segatlovylppusemasehttagnitareposecivedtnereffidnonoitceridemasehtnignihctiwsstuptuotnereffidtaweksehtsadenifeD:5ETON
8701-01 www.icst.com REV. A - AUGUST 28, 2000
Loading...
+ 7 hidden pages