can accept most standard differential input levels. The
ICS8344I is designed to translate any differential signal levels to LVCMOS levels. The low impedance L VCMOS outputs
are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased to 48 by
utilizing the ability of the outputs to drive two series terminated lines. Redundant clock applications can make use of
the dual clock input. The dual clock inputs also facilitate board
level testing. ICS8344I is characterized at full 3.3V , full 2.5V
and mixed 3.3V input and 2.5V output operating supply modes.
Guaranteed output and part-to-part skew characteristics
make the ICS8344I ideal for those clock distribution applications demanding well defined performance and repeatability .
The ICS8344I is a low voltage, low skew fanout
buffer and a member of the HiPerClockS™
family of High Performance Clock Solutions from
ICS. The ICS8344I has two selectable clock inputs. The CLK0, nCLK0 and CLK1, nCLK1 pairs
FEATURES
• 24 L VCMOS outputs, 7Ω typical output impedance
• 2 selectable differential clock input pairs for redundant clock
applications
• CLKx, nCLKx pair can accept the following differential input
levels: L VDS, L VPECL, L VHSTL, SSTL, HCSL
• Maximum output frequency up to 100MHz
• Translates any single-ended input signal to L VCMOS with
resistor bias on nCLK input
• Multiple output enable pins for disabling unused outputs in
reduced fanout applications
8344BYIwww.icst.com/products/hiperclocks.htmlREV. A AUGUST 9, 2001
3
Integrated
Circuit
Systems, Inc.
LOW SKEW, 1-TO-24
ICS8344I
DIFFERENTIAL-TO-L VCMOS FANOUT BUFFER
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
Inputs, V
I
Outputs, V
Package Thermal Impedance, θ
Storage T emperature, T
DD
O
JA
STG
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings
are stress specifications only . Functional operation of product at these conditions or any conditions beyond those listed in the
DC Characteristics
or
AC Characteristics
ods may affect product reliability.
4.6V
-0.5V to VDD + 0.5V
-0.5V to V
DDO
+ 0.5V
47.9°C/W (0lfpm)
-65°C to 150°C
is not implied. Exposure to absolute maximum rating conditions for extended peri-