ICST ICS525-01R, ICS525-01RI, ICS525-01RIT, ICS525-01RT, ICS525R-02I Datasheet

OSCaR™ User Configurable Clock

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Description Features

The ICS525-01 and ICS525-02 OSCaR™ are
the most flexible way to generate a high quality,
high accuracy, high frequency clock output from
an inexpensive crystal or clock input. The name
OSCaR stands for OSCillator Replacement, as
they are designed to replace crystal oscillators in
almost any electronic system. The user can easily
configure the device to produce nearly any
output frequency from any input frequency by
grounding or floating the select pins. Neither
microcontroller nor software nor device
programmer are needed to set the frequency.
Using Phase-Locked-Loop (PLL) techniques, the
device accepts a standard fundamental mode,
inexpensive crystal to produce output clocks up
to 250 MHz. It can also produce a highly
accurate output clock from a given input clock,
keeping them frequency locked together.

For similar capability with a serial interface, use
the ICS307. For simple multipliers to produce
common frequencies, refer to the LOCO family
of parts, which are smaller and more cost
effective.

• Packaged as 28 pin SSOP (150 mil body)

• ICS525-01 with output frequencies up to 160 MHz

• ICS525-02 with output frequencies up to 250 MHz

• User determines the output frequency by
setting all internal dividers

• Eliminates need for custom oscillators

• No software needed

• Online ICS525 calculator at
www.icst.com/products/ics525inputForm.html

• Pull-ups on all select inputs

• Input crystal frequency of 5 - 27 MHz

• Input clock frequency of 2 - 50 MHz

• Very low jitter

• Duty cycle of 45/55 up to 200 MHz

• Operating voltages of 3.0 to 5.5V

• Ideal for oscillator replacement

• Industrial temperature versions available

• For Zero Delay, refer to the ICS527

ICS525-01/02

Block Diagram

VDD GND S2:S0

2

Reference

PD

Crystal or
clock in

MDS 525-01/02 I 1Revision 071100 Printed 11/13/00

Integrated Circuit Systems, Inc. • 525 Race Street •San Jose• CA • 95126•[phone]tel• www.icst.com

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X1/ICLK

Crystal

Oscillator

X2

optional

Divider

7

R6:R0 V8:V0

Phase Comparator,

2

Charge Pump,

and Loop Filter

VCO

Divider

9

VCO

3

Output

Divider

Output

Buffer

Output

Buffer

CLK

REF

ICS525-01/02

OSCaR™ User Configurable Clock

Pin Assignments

R5
R6
S0

S1
S2

VDD

X1/ICLK

X2

GND

V0
V1

V2
V3

V4

1
2
3
4
5

6
7
8
9
10

11
12
13
14

28
27
26
25
24
23
22
21
20
19

18
17
16
15

R4
R3

R2
R1
R0
VDD
REF

CLK

GND

PD
V8
V7

V6

V5

R5
R6

S0
S1
S2

VDD

X1/ICLK

X2

GND

V0

V1
V2
V3

V4

1
2
3
4
5

6
7
8
9
10

11
12
13
14

28
27
26
25
24
23
22
21
20
19

18
17
16
15

R4
R3

R2
R1
R0

VDD
REF
CLK
GND

PDTS
V8
V7
V6

V5

ICS525-01 ICS525-02

ICS525-01 Pin Descriptions

Pin # Name Type Description

1, 2, 24-28 R5, R6, R0-R4 I(PU) Reference divider word input pins determined by user. Forms a binary number from 0 to 127.

3, 4, 5 S0, S1, S2 I(PU) Select pins for output divider determined by user. See table on page 3.

6, 2 3 VDD P Connect to VDD.

7 X1/ICLK X1 Crystal connection. Connect to a parallel resonant fundamental crystal, or input clock.
8 X2 X2 Crystal connection. Connect to a crystal, or leave unconnected for clock.

9, 20 GND P Connect to ground.

10-18 V0-V8 I(PU) VCO divider word input pins determined by user. Forms a binary number from 0 to 511.

19 PD I(PU) Power Down. Active low. Turns off entire chip when low. Clock outputs stop low.
21 CLK O Output Clock determined by status of R0-R6, V0-V8, S0-S2 and input frequency.
22 REF O Reference output. Buffered crystal oscillator (or clock) output.

ICS525-02 Pin Descriptions

Pin # Name Type Description

1, 2, 24-28 R5, R6, R0-R4 I(PU) Reference divider word input pins determined by user. Forms a binary number from 0 to 127.

3, 4, 5 S0, S1, S2 I(PU) Select pins for output divider determined by user. See table on page 3.

6, 2 3 VDD P Connect to VDD.

7 X1/ICLK X1 Crystal connection. Connect to a parallel resonant fundamental crystal, or input clock.
8 X2 X2 Crystal connection. Connect to a crystal, or leave unconnected for clock.

9, 20 GND P Connect to ground.

10-18 V0-V8 I(PU) VCO divider word input pins determined by user. Forms a binary number from 0 to 511.

19 PDTS I(PU) Power Down and Tri-state. Active low. Turns off entire chip and tri-states the outputs when low.
21 CLK O Output Clock determined by status of R0-R6, V0-V8, S0-S2 and input frequency.
22 REF O Reference output. Buffered crystal oscillator (or clock) output.

Key: I(PU) = Input with internal pull-up resistor; X1, X2 = Crystal connections; O = Output;

P = Power supply connection

MDS 525-01/02 I 2Revision 071100 Printed 11/13/00

Integrated Circuit Systems, Inc. • 525 Race Street •San Jose• CA • 95126•[phone]tel• www.icst.com

OSCaR™ User Configurable Clock

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ICS525-01 Output Divider and Maximum Output Frequency Table

ICS525-01/02

S2 S1 S0 CL K

pin 5 pin 4 pin 3 Output Divider VDD = 5 V VDD = 3.3V

000 10 26 23 18 16
001 2 160 140 100 90
010 8 40 36 25 22
011 4 80 72 50 45
100 5 50 45 34 30
101 7 40 36 26 23
110 9 33.3 30 20 18
111 6 53 47 27 24

Max. Output Frequency ((MHz)

0-70 °C -40 to +85 °C 0-70 °C -40 to +85 °C

ICS525-02 Output Divider and Maximum Output Frequency Table

S2 S1 S0 CLK

pin 5 pin 4 pin 3 Output Divider VDD = 5V VDD = 3.3V

0 0 0 6 67 40
0 0 1 2 200 120
0 1 0 8 50 30
0 1 1 4 100 60
1 0 0 5 80 48
1 0 1 7 57 34
1 1 0 1 250 200
1 1 1 3 133 80

Max. Output Frequency (MHz)

-40 to +85 °C -40 to +85 °C

The ICS525-02 is only offered in the
industrial tem

erature range.

External Components / Crystal Selection

The ICS525 requires two 0.01µF decoupling capacitors to be connected between VDD and GND, one on
each side of the chip. They must be connected close to the ICS525 to minimize lead inductance. No
external power supply filtering is required for this device. A 33Ω series terminating resistor can be used
next to the CLK and REF pins. The approximate total on-chip capacitance for a crystal is 16pF, so a
parallel resonant, fundamental mode crystal with this value of load (correlation) capacitance should be
used. For example, using the ICS525-01 with crystals having a specified load capacitance greater than
16 pF, crystal capacitors may be connected from each of the pins X1 and X2 to Ground as shown in the
Block Diagram on page 1. The value (in pF) of these crystal caps should be = (CL-16)*2, where CL is the

crystal load capacitance in pF. These external capacitors are only required for applications where the exact
fre

uency is critical. For a clock input, connect to X1 and leave X2 unconnected (no capacitors on either).

MDS 525-01/02 I 3Revision 071100 Printed 11/13/00

Integrated Circuit Systems, Inc. • 525 Race Street •San Jose• CA • 95126•[phone]tel• www.icst.com