ICST GSP2694M, AV2694N, AV2694M, ICS2694M, ICS2694N Datasheet

ICS2694

Mother board C lock Genera tor

Integrated
Circuit
Systems, Inc.

Description

The ICS2694 Mother board Clock Generat or is an i ntegrat ed
circuit using PLL and VCO technology to generate virtually all
the clock signals required in a PC. The use of the device can be
generalized to satisfy the timing needs of most digital systems
by reprogramming the VCO or reconfiguring the counter stages
which derive the output frequencies from the VCO’s.

The primary VCO is customarily used to generate the CPU
clock and is so labeled on the ICS2694. Pre-programmed
frequency sets are listed on page 6. These choices were made
to match the major microprocessor families. CPUSEL (0-3)
allow the user to select the appropriate frequency for the
application.

Due to the filter in the phase-locked loop, the CPUCLK will
move in a linear fashion from one frequency to a newly­selected fre qu ency without gl itches. If a fi xed CPUC LK v alue
is desired, CPUSEL (0-3) may be hard wired to the desired
address with STROBE tied high. (It has a pull-up.) For board
test and debug, pulling OUTPUTE to Ground will tristate all
the outpu ts.

Features

•• Low cost - eliminates multiple oscillators and Count

Down Logic

•• Primary VCO has 16 Mask Programmable frequencies

(normall y CPU clock)

•• Secondary VCO has 1 Mask Programmable frequency

(usually 96 MHz)

•• Pre-progra m m ed ver sions for typic al PC appli c atio ns

•• 10 Outputs in addition to the primary CPU clock

•• Capability to reconfigure counter stages to change the

frequencies of the outputs via mask options

•• Advance d PLL desig n

•• On-chip PLL filte rs

•• Very Fle xi ble Archi te c tu re

OUT2 1 24 OUT3
OUT1 2 23 OUT4
OUT0 3 22 OUT5
OUT9 4 21 OUT6

CPUCLK 5 20 OUT7

(CPUCLK/2)

VSS 6 19 OUT8

DVDD 7 18 A VDD

STROBE 8 17 XTAL2
CPUSEL0 9 16 XTAL1
CPUSEL1 10 15 A VSS
CPUSEL2 11 1 4 OUTPUTE
CPUSEL3 12 13 CLKIN

24-Pin DIP or SOIC

ICS2694

Pin Configuration

ICS2694RevA1094

Applications

•• CPU clock and Co-processor c lock

•• Hard Disk and Floppy Disk cloc k

•• Keyboard clock

•• Serial Port clock

•• Bus clock

•• System count ing or timing fu nc tions

Pin Description

PIN NUMBER NAME DESCRIPTION

1 OUT2 4mA Output.
2 OUT1 4mA Output.
3 OUT0 4mA Output
4 OUT9 4mA Output.
5 CPUCLK 4mA Output driv en by Vo ltag e Controlle d Oscillat or 1 (VC01). VC01 is cont rolled

by a 16 word ROM.
6 VSS Ground for digital po rtion of chip.
7 DVDD Plus supply for digital portion of chip.
8 STROBE Input control for transparent latches a ssoc iat ed wit h CPU ( 0-3) which se lec t one of

16 values for CPUCL K. Holding ST ROBE high ca uses the latc hes to be transparent.
9 CPUSEL0 LSB CPUCLK address bit.

10 CPUSEL1 CPUCLK ad dres s bit.
11 CPUSEL2 CPUCL K ad dres s bit.
12 CPUSEL3 MSB CPUCLK ad dres s bit.
13 CLKIN An altern ative input for the ref erence c lock. The crystal osci llator out put and CLKIN

are gated togethe r to genera t e the ref er ence cl oc k for the VCO’s. If CLKIN is u sed,

XTAL1 should be held high and XTAL 2 lef t open . If the inter nal oscil lat or is used,

hold CLKIN high.

14 OUTPUTE Pulling this line low trista tes al l outpu ts.
15 AVS S Ground for analo g port io n of chip .
16 XTAL1 Input of intern al cr ysta l oscil lat or sta ge .
17 XTAL2 Output of internal crystal oscillator stage. This pin should have nothing connected

to it but one of the quar tz crystal termina ls.

18 AVD D Positive supply for analog portion of chip.
19 OUT8 4mA Output.
20 OUT7 4mA Out put . (Usually assigne d a s CPUCLK/ 2 for co-processor use.)
21 OUT6 4mA Output.
22 OUT5 4mA Output.
23 OUT4 4mA Output.
24 OUT3 4mA Output.

ICS2694

2

Frequency Reference

The internal reference oscillator contains all of the passive
components required. An appropriate series-resonant crystal
should be connected between XTAL1 (1) and XTAL2 (2). In
IBM-compatible applications, this will typically be a

14.31818 MHz crystal, but fundamental mode crystals be­tween 10 MHz and 25 MHz have been tested. Maintain short
lead lengths between the crystal and the ICS2694. In order to
optimize the quality of the quartz crystal oscillator, the input
switching threshold of XTAL1 is VDD/2 rather than the con­ventiona l 1.4V of TTL. Therefore, XTAL1 may not respond
properly to a legal TTL signal since TTL is not required to
exceed VDD/2. Theref ore, another clock input CLKIN (pin 13)
has been added to the chip which is sized to have an input
switching point of 1.4V. Inside the chip, these two inputs are
ANDED. Therefore, when using the XTAL1 and XTAL2,
CLKIN should be held high. (It has a pull-up.) When using
CLKIN, XTAL1 should be held high. (It does not have a
pull-up because a pull-up would interfere with the oscillator
bias.)

It is anticipated that some applications will use both clock
inputs, properly gated, for either board test or unique system
functio ns. By gene rating all the system cl ocks from one refer­ence input, the phase and delay relationships between the
various outp uts wil l rem a in re lat iv el y fi xe d, the re by e lim ina t ­ing problems ari sing from totally u nsynchroniz ed clock s inter­acting in a system.

Power Supply Conditioning

The ICS2694 is a membe r of the sec ond ge nerat ion of dot cl ock
products. By inc orp orating the loop fi lte r on chi p and upgr ad ­ing the VCO, the ease of application has been substantially
improved o ver earl ier produc ts. If a stable and noise-fre e power
supply is availa ble, no extern al componen ts are required. How­ever , in some appl ica ti ons it may be jud icio us to de couple the
power supply as shown in Figure s 1 or 2. Figure 1 is the normal
configuration for 5 volt only applications. Which of the two
provid es sup erior perfo rm ance d epen ds on the noise conte nt of
the power supplie s. In gene ral , the confi guratio n of Figure 1 is
satisfactory. Figure 2 is the more conventional if a 12 volt
analog suppl y is available, althoug h the improved perfor mance
comes at a c ost of an extr a compo nent; ho wever , the cost of the
discretes used i n Figure 1’s are le ss than the co st of Fig ure 1’s
discre t e components.

Since the ICS2694 outputs a large number of high-frequency
clocks, conservative design practices are recommended. Care
should be exercised in the board layout of supply and ground
traces, an d adequate power sup ply dec oupl ing c apa c itors c on ­sistent with the application shoul d be used .

R1

33

+5

+5

DVDD

VSS, A VSS

AVDD

C2
22µV

C1

C3

.µ1F

.µ1F

Figure 1

D1R1

470

+120

+50

DVDD

VSS, AVSS

AVDD

4.7V

C1

C2

.µ1F

.µ1F

Figure 2

ICS2694

3