ICST AV9169CF-40, ICS9169CF-40 Datasheet

Integrated
Circuit
Systems, Inc.

General Description Features

ICS9169C-40

Block Diagram

System Clock Chip

9169C-40RevA072897P

Pin Configuration

34-Pin SSOP

Functionality

3.3V±10%, 0-70°C
Crystal (X1, X2) = 14.31818 MHz

Pentium is a trademark on Intel Corporation.

 8 selectable CPU clocks up to 75MHz
 Six synchronous PCI clocks
 One Referance Clock at 14.318MHz
 Power-up stabilization time = 2ms on all CPU and PCI

clocks, which meets Intel PentiumPro power-up
 Low CPU and PCI clock jitter <500ps
 Low skew output
 Improved output drivers are designed for low EMI
 Test Mode
 Optional common or mixed supply mode:

(VDD = VDDL1 =VDDL2 = 3.3V)
(VDD = 3.3V, VDDL1=VDDL2 = 2.5)

(VDD = 3.3V, VDDL1 = 3.3V, VDDL2 = 2.5V)

 Space saving and low cost 34-pin SSOP package

The ICS9169C-40 is a Clock Synthesizer chip for Pentium or
Cyrix CPU based motherboards using PCI.

Features include eight CPU clocks and six PCI clocks. A
Reference Output is available equal to the crystal frequency.
The device meets the Pentium power-up stabilization, which
requires that CPU and PCI clocks be stable within 2ms after
power-up.

The ICS9169C-40 clock output are designed for low EMI
emissions. Controlled rise and fall times, unique output
driver circuits and innovative circuit layout techniques enable
the ICS9169C-40 to have lower EMI than other clock
devices.

The ICS9169C-40 accepts a 14.318MHz reference crystal or
clock as its input and runs from a 3.3V supply.

FS2 FS1 FS0 CPU PCI

0 0 0 50MHz 33.3MHz
0 0 1 55MHz 36.67MHz
0 1 0 REF/2 REF/4
0 1 1 75MHz 37.5MHz
1 0 0 50MHz 25MHz
1 0 1 55MHz 27.6MHz
1 1 0 60MHz 30MHz
1 1 1 66.6MHz 33.3MHz

ICS reserves the right to make changes in the device data identified in this
publication without further notice. ICS advises its customers to obtain the latest
version of all device data to verify that any information being relied upon by the
customer is current and accurate.

2

ICS169C-40

Pin Descriptions

PIN NUMBER PIN NAME TYPE DESCRIPTION

1, 9 VDD PWR Power supply

2 REF OUT Buffered output refe rence. 3.3V

3, 5, 18, 26, 32 GND PWR Digital Ground.

4 N/C - Not connected.

6, 7, 8, 10, 11, 12 PCI (1:6) OUT Clock output s - controlled by 3.3V V

DD

13, 19, 20 FS (0:2) IN Frequency select inputs, these inputs have internal pull-ups.

14 PD# IN

Input for tristate. If PD# = 0, then all outputs are tristated and
the device is in shutdown mode (VCO’s off, crystal oscillator
is off and all logic is reset) When PD# = 1, the device is in
normal operating mode. Has internal pull-up

15 AGND PWR Analog Ground
16 N/C - Not connected
17 AVDD PWR Analog Power Supply
21 VDDL1 PWR 3.3/2.5V Power Supply for CPU (1:4)

22, 23, 24, 25, 27, 28, 29, 30 CPU (1:8) OUT Clock outputs.

31 VDDL2 PWR 3.3/2.5V Power Supply for CPU (5:8)
33 X2 OUT Reference oscillator
34 X1 IN Re ference oscillator