ICST AV9133X-01CW20, ICS9133X-01CW20 Datasheet

Integrated
Circuit
Systems, Inc.

General Description

Features

ICS9133X

ICS reserves the right to make changes in the device data identified in this publication
without further notice. ICS advises its customers to obtain the latest version of all device
data to verify that any information being relied upon by the customer is current and accurate.

The ICS9133X is designed to generate clocks for all 286, 386,
486, Pentium and RISC-based motherboards, including lap­tops and notebook computers. T he only e xternal components
required are a 32.768 kHz crystal and decoupling capacitors.
The device generates the 14.318 MHz system c lock, eliminating
the need for a 14.318 MHz crystal. High performance applications
may require high speed clock termination components. The
chip includes three independent clock generators plus the

32.768 kHz reference clock to produce all necessary frequencies,
including real time clock/DRAM refresh, master clock, CPU
clock, twice CPUclock frequency, keyboard clock, floppy
disk controller clock, serial communications clock and bus
clocks. Different frequencies from clock #2 can be selected
using the frequency select pins, but clock #1 will be at 14.318
MHz for all standard versions.

• Single 32.768 kHz crystal generates all PC
motherboard clocks

• Cost-reduced version of popular ICS9132

• Contains internal crystal load capacitors and
feedback bias

• 3 independent clock generators

• Generates CPU clocks from 12.5 to 100 MHz

• Up to 7 output clocks

• Separate VDD for 32 kHz clock

• Output enable tristates outputs

• Power-down options available

• Operates from 3.3V or 5.0V supply

• Operates up to 66 MHz at 3.3V

• Skew controlled 1X and 2X CPU clocks

• 20-pin PDIP or SOIC package

9133X Rev A 052897P

Block Diagram

32 kHz Motherboard Frequency Generator

VDD32 Supply

The ICS9133X has a sep arate power supply for the 32.768
kHz oscillator circuitry. This allows the 32 kHz clock to run
from a battery or other source while the main power to the
chip is disconnected. The VDD32 supply is guaranteed to
operate down to +2.0V, with the clock consuming less than
10µA at +3.3V with the main VDD at 0V.

The frequencies and power-down options in the ICS9133X
are mask programmable. Customer specific masks can be
made and prototypes delivered within 6-8 weeks fr om receipt
of order. Integrated Circuit Systems also of fers standard versions,
such as that described in this data sheet.

Applications

Notebook/Palmtop Computers : The ICS9133X works with
+3V and +5V and a single 32.768 kHz crystal, making it the
ideal solution for generating clocks in portables with minimum
board space. The user can save po wer by using this single part
instead of oscillators or other frequency generators. The
ICS9133X further reduces the current consumption by having
the ability to completely shut down the individual clocks
when not in use, while still maintaining the separately powered

32.768 kHz clock.

2

ICS9133X

Pin Configuration Decoding Tabl e for CPU Clock

Pin Descriptions

* Only at 5V supply voltage

20-Pin PDIP or SOIC

PIN

NUMBER

PIN NAME TYPE DESCRIPTION

1 32 kHz Output 32.768 kHz buffered output, powered by VDD32.
2 X2 Output Connect 32.768 kHz crystal. Includes internal XTAL load capacitance.

3 X1 Input

Connect 32.768 kHz crystal. This pin includes internal XTAL load capacitance and
feedback bias for a 32.768 kHz crystal.

4 VDD32 - Power supply for 32 kHz oscillator only.
5 VDD - Power supply (+3.3 to +5.0V).
6 GND - GROUND.
7 16 MHz Output 16 MHz clock output.
8 24 MHz Output 24 MHz clock output.

9 12 MHz Output 12 MHz clock output.
10 GND - GROUND.
11 OE Input OE tristate outputs when low. Has internal pull-up.
12 VDD - Power supply (+3.3 to +5.0V).
13 14.318 MHz Output 14.318 MHz clock output.
14 GND - GROUND.
15 VDD - Power supply (+3.3 to +5.0V).
16 2XCPU Output 2XCPU clock output (see decoding table).
17 CPU Output CPU clock output (see decoding table).
18 SCLK2 Input CPU clock frequency SELECT2. Has internal pull-up.
19 SCLK1 Input CPU clock frequency SELECT1. Has internal pull-up.
20 SCLK0 Input CPU clock frequency SELECT0. Has internal pull-up.

SCLK22 SCLK21 SCLK20 2XCPU CPU

0
0
0
0
1
1
1
1

0
0
1
1
0
0
1
1

0
1
0
1
0
1
0
1

8
16
32
40
50

66.6
80*

100*

4

8
16
20
25

33.3
40*
50*

3

ICS9133X

Block Diagram for ICS9133X

Recommended External Circuit

Reference

Clock

32.768 kHz
crystal

32.768 kHz

14.318 MHz

14.318 MHz
Clock

Generator

Output
Buffers

CPU

OE

16 MHz
12 MHz
24 MHz

CPU Clock

2XCPU

Peripheral

Clocks

Output
Buffers

Output
Buffers

Frequency Select

3

/

Notes:

1. The external components shown should be placed as close to the device as possible.

2. Pins 5 and 15 should be connected together externally. One decoupling capacitor may suffice for both pins.

3. May be part of system decoupling.

4. Crystal load capacitance and feedback bias contained internally on the X1, X2 pins.

20

19

18

17

16

15

14

13

12

11

1

2

3

4

5

6

7

8

9

10

0.1µF

0.1µF

0.1µF

2.2µF

0.1µF

(Note 3)

32.768
kHz

VDDX

(Note 4)

VDD

IC S 91 33 X