ICST AV9120M-56 Datasheet

Integrated Circuit Systems, Inc.
General Description
Features
ICS9120-56
Frequency Timing Generator for EtherNet & Hard Drives
Block Diagram
100ps one sigma jitter maintains 16-bit performance
Output rise/fall times less than 2.0ns
On-chip loop filter components
3.3V-5V supply range
8-pin, 150-mil SOIC
Applications
Specifically designed to support the high performance requirements of high speed EtherNet systems using 10Base-T/100Base-TX Integrataed PHYceiver .
Designed to support the requirements for high performance hard drives.
The ICS9120-56 is a high performance frequency generator designed to support hard disk drive and EtherNet systems. It offers all clock frequencies required for the servo and decoder sections of these devices. These frequencies are synthesized from a single 25.00 MHz on-chip oscillator.
High accuracy, low jitter PLLs meet the 100 ppm frequency tolerance required by these systems. Fast output clock edge rates minimize board induced jitter.
Pin Configuration
8-Pin SOIC
9120-56 Rev A 040697P
2
ICS9120-56
Pin Descriptions for ICS9120-56
PIN
NUMBER
PIN
NAME
TYPE DESCRIPTION
1 X1 Input
Crystal or external clock source. Has feedback bias for crystal, and internal
crystal loa d capacito rs to GND . 2 VDD Power +Power supply input. 3 GND Power Ground return for Pin 2. 4 CLK1 Output 40.00 MHz clock output. 5 CLK2 Output 22.5 MHz output clock. 6 CLK3 Output 20.00 MHz output clock. 7 REF Output Reference clock 8 X2 Outpu t C rystal ou tpu t drive, inclu des internal cr ystal load capa citor to GN D.
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