ICST AV9112M-07, AV9112M-06, ICS9112M-06, ICS9112M-07 Datasheet

Integrated Circuit Systems, Inc.
General Description Features
ICS9112-06/07
Block Diagram
Low Skew Output Buffer
9112-06 9112-07 Rev H 1/22/99
16 pin SOIC
Zero input - output delay
Frequency range 25 - 75 MHz (3.3V), 30-90MHz (5.0V)
Less than 200 ps Jitter between outputs
Skew controlled outputs
Skew less than 250 ps between outputs
Available in 8 or 16 pin versions, 150 mil SOIC packages
3.3V ±10%, 5.0V±10% operation
The ICS9112 is a high performance, low skew , low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in PC systems operating at speeds from 25 to 75 MHz (30 to 90mHz for 5V operation).
ICS9112 is a zero delay buffer that provides synchronization between the input and output. The synchronization is established via CLKOUT feed back to the input of the PLL. Since the skew between the input and output is less than +/­350 pS, the part acts as a zero delay buffer.
The ICS9112 comes in with two different options; dash 06 and dash 07. The dash 07 is available in a 16 pin 150 mil SOIC package. It has two banks of four outputs controlled by two address lines. Depending on the selected address line, bank B or both banks can be put in a tri-state mode. In this mode, the PLL is still running and only the output buffers are put in a high impedance mode. The test mode shuts off the PLL and connects the input directly to the output buffers (see table below for functionality).
The dash 06 is an eight pin 150 mil SOIC package. It has five output clocks. In the absence of REF input, both ICS9112-06 and -07 will be in the power down mode. In this mode, the PLL is turned off and the output buf fers are pulled low. Power down mode provides the lowest power consumption for a standby condition.
8 pin SOIC
2SF1SF
AKLC
)4,1(
BKLC
)4,1(
TUOKLC
tuptuO
ecruoS
LLP
nwodtuhS 00 etatsirTetatsirTnevirDLLPN 01 nevirDetatsirTnevirDLLPN
10
tseT
edoM
tseT
edoM
tseT
edoM
FERY
11 nevirDnevirDnevirDLLPN
Functionality (-07)
ICS reserves the right to make changes in the device data identified in this publication without further notice. ICS advises its customers to obtain the latest version of all device data to verify that any information being relied upon by the customer is current and accurate.
PB
ICS9112-06/07
Pin Descriptions
Notes:
1. Guaranteed by design and characterization. Not subject to 100% test.
2. Weak pull-down
3. Weak pull-down on all outputs
4. Weak pull-ups on these inputs
REBMUNNIPEMANNIPEPYTNOITPIRCSED
1FER
2
NItupnitnarelotV5.ycneuqerfecnerefertupnI
22AKLC
3
TUOAknaB,tuptuokcolcdereffuB
31AKLC
3
TUOAknaB,tuptuokcolcdereffuB 31,4DDVRWPylppusV3.3 21,5DNGRWPdnuorG
61BKLC
3
TUOBknaB.tuptuokcolcdereffuB
72BKLC
3
TUOBknaB.tuptuokcolcdereffuB
82SF
4
NI2tib,tupnitceleS
91SF
4
NI1tib,tupnitceleS
013BKLC
3
TUOBknaB.tuptuokcolcdereffuB
114BKLC
3
TUOBknaB.tuptuokcolcdereffuB
412AKLC
3
TUOAknaB,tuptuokcolcdereffuB
513AKLC
3
TUOAknaB,tuptuokcolcdereffuB
61TUOKLC
3
TUOnipsihtnokcabdeeflanretni,tuptuokcolcdereffuB
REBMUNNIPEMANNIPEPYTNOITPIRCSED
1FER
2
NItupnitnaralotV5.ycneuqerfecnerefertupnI
22KLC
3
TUOtuptuokcolcdereffuB
33KLC
3
TUOtuptuokcolcdereffuB 4DNGRWPdnuorG 53KLC
3
TUOtuptuokcolcdereffuB 6DDVRWPylppuSv3.3 74KLC
3
TUOtuptuokcolcdereffuB 8
6KLC
)TUOKLC(
3
TUOnipsihtnokcabdeeflanretnI.tuptuokcolcdereffuB
3
ICS9112-06/07
Notes:
1. Guaranteed by design and characterization. Not subject to 100% test.
2. All Skew specifications are mesured with a 50 transmission line, load teminated with 50 to 1.4V.
3. Duty cycle measured at 1.4V.
4. Skew measured at 1.4V on rising edges. Loading must be equal on outputs.
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0 V
Logic Inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to VDD +0.5 V
Ambient Operating Temperature . . . . . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Electrical Characteristics at 3.3V
VDD = 3.0 – 3.7 V, TA = 0 – 70°C unless otherwise stated
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
scitsiretcarahCCD
RETEMARAPLOBMYSSNOITIDNOCTSETNIMPYTXAMSTINU egatloVwoLtupnI
V
LI
8.0V
egatloVhgiHtupnI
V
HI
0.2V
tnerruCwoLtupnI
I
LI
VNIV0=910.05Aµ
tnerruChgiHtupnI
I
HI
VNIV=
DD
01.00.001Aµ
egatloVwoLtuptuO
1
V
LO
I
LO
Am8=52.04.0V
egatloVhgiHtuptuO
1
V
HO
I
HO
Am8=4.29.2V
ylppuSnwoDrewoP
tnerruC
I
DD
zHM0=FER0.730.57Aµ
tnerruCylppuS
I
DD
LESzHM66.66tastutuodedaolnU
Vtastupni
DD
DNGro
0.610.04Am
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