ICSI IS62LV256-70UI, IS62LV256-45UI, IS62LV256-45N, IS62LV256-45JI, IS62LV256-70TI Datasheet

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IS62LV256
Integrated Circuit Solution Inc. 1
SR006-0B
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
FEATURES
• Access time: 45, 70, 100 ns
• Low active power: 70 mW
• Fully static operation: no clock or refresh required
• TTL compatible inputs and outputs
• Single 3.3V power supply
DESCRIPTION
The ICSI IS62LV256 is a very high-speed, low power, 32,768-word by 8-bit static RAM. It is fabricated using ICSI's high-performance CMOS double-metal technology.
When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation is reduced to 10 µW (typical) with CMOS input levels.
Easy memory expansion is provided by using an active LOW Chip Enable (CE) input and an active LOW Output Enable (OE) input. The active LOW Write Enable (WE) controls both writing and reading of the memory.
The IS62LV256 is pin compatible with other 32K x 8 SRAMs in 300mil DIP and SOJ, 330mil SOP, and 8*13.4mm TSOP-1 packages.
IS62LV256
32K x 8 LOW VOLTAGE STATIC RAM
FUNCTIONAL BLOCK DIAGRAM
A0-A14
CE OE
WE
256 X 1024
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
VCC
I/O
DATA
CIRCUIT
I/O0-I/O7
IS62LV256
2 Integrated Circuit Solution Inc.
SR006-0B
PIN CONFIGURATION
28-Pin DIP, SOJ and SOP
PIN CONFIGURATION
8x13.4mm TSOP-1
PIN DESCRIPTIONS
A0-A14 Address Inputs
CE Chip Enable Input OE Output Enable Input WE Write Enable Input
I/O0-I/O7 Input/Output
Vcc Power
GND Ground
TRUTH TABLE
Mode
WEWE
WEWE
WE
CECE
CECE
CE
OEOE
OEOE
OE I/O Operation Vcc Current
Not Selected X H X High-Z ISB1, ISB2 (Power-down)
Output Disabled H L H High-Z ICC1, ICC2 Read H L L DOUT ICC1, ICC2 Write L L X DIN ICC1, ICC2
22 23 24 25 26 27 28 1 2 3 4 5 6 7
21 20 19 18 17 16 15 14 13 12 11 10
9 8
OE
A11
A9 A8
A13
WE
VCC
A14 A12
A7 A6 A5 A4 A3
A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A0 A1 A2
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol Parameter Value Unit
VTERM Terminal Voltage with Respect to GND –0.5 to +4.6 V TBIAS Temperature Under Bias –55 to +125 °C TSTG Storage Temperature –65 to +150 °C PT Power Dissipation 0.5 W IOUT DC Output Current (LOW) 20 mA
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
A14 A12
A7 A6 A5 A4 A3 A2 A1
A0 I/O0 I/O1 I/O2
GND
VCC WE A13 A8 A9 A11 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3
IS62LV256
Integrated Circuit Solution Inc. 3
SR006-0B
OPERATING RANGE
Range Ambient Temperature VCC
Commercial 0°C to +70°C 3.3V ± 5% Industrial –40°C to +85°C 3.3V ± 5%
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
-45 ns -70 ns -100 ns
Symbol Parameter Test Conditions Min. Max. Min. Max. Min. Max. Unit
ICC1 Vcc Operating VCC = Max., CE = VIL Com. 20 20 20 mA
Supply Current IOUT = 0 mA, f = 0 Ind. 30 30 30
ICC2 Vcc Dynamic Operating VCC = Max., CE = VIL Com. 35 30 30 mA
Supply Current IOUT = 0 mA, f = fMAX Ind. 45 40 40
ISB1 TTL Standby Current VCC = Max., Com. 2 2 2 mA
(TTL Inputs) VIN = VIH or VIL Ind. 5 5 5
CE > VIH, f = 0
ISB2 CMOS Standby VCC = Max., Com. 90 90 90 µA
Current (CMOS Inputs) CE > VCC – 0.2V, Ind. 200 200 200
VIN > VCC – 0.2V, or VIN < 0.2V, f = 0
Notes:
1. At f = f
MAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter Test Conditions Min. Max. Unit
VOH Output HIGH Voltage VCC = Min., IOH = –1.0 mA 2.4 V
VOL Output LOW Voltage VCC = Min., IOL = 2.1 mA 0.4 V
VIH Input HIGH Voltage 2.2 VCC + 0.3 V
VIL Input LOW Voltage
(1)
–0.3 0.8 V
I
LI Input Leakage GND < VIN < VCC Com. –2 2 µA
Ind. –5 5
ILO Output Leakage GND < VOUT < VCC, Outputs Disabled Com. –2 2 µA
Ind. –5 5
Notes:
1. VIL = –3.0V for pulse width less than 10 ns.
2. Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.
CAPACITANCE
(1,2)
Symbol Parameter Conditions Max. Unit
CIN Input Capacitance VIN = 0V 6 pF
COUT Output Capacitance VOUT = 0V 5 pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
A = 25°C, f = 1 MHz, Vcc =3.3V.
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