Datasheet IC62VV5128L-100B, IC62VV5128L-100BI, IC62VV5128L-100H, IC62VV5128L-100HI, IC62VV5128L-100T Datasheet (ICSI)

IC62VV5128L
IC62VV5128LL

Document Title

512K x 8 bit 1.8V and Ultra Low Power CMOS Static RAM

Revision History

Revision No History Draft Date Remark

0A Initial Draft November 26,2001 Preliminary

The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and
products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.

Integrated Circuit Solution Inc. 1

LPSR020-0A 11/26/2001

IC62VV5128L
IC62VV5128LL

512K x 8 1.8V and LOW VCC
CMOS STATIC RAM

FEATURES

• Access times of 55, 70, 100 ns

• CMOS Low power operation:
I

CC1=10mA (typical)* operation

I

SB2=1µA (typical)* standby

* Typical values are measured at V

A=25°C

8V, T

CC=1.

• Low data retention voltage: 1.0V (min.)

• Output Enable (OE) and Chip Enable
(CE) inputs for ease in applications

• TTL compatible inputs and outputs

• Fully static operation:

— No clock or refresh reguired

• Single 1.65V-2.2V power supply

• Available in the 32-pin 8*20mm TSOP­1, 32-pin 8*13.4mm TSOP-1 and 48­pin 6*8mm TF-BGA

FUNCTIONAL BLOCK DIAGRAM

DESCRIPTION

The ICSI IC62VV5128L and IC62VV5128LL is a low voltage,
524,288 words by 8 bits, CMOS SRAM. It is fabricated using

ICSI's low voltage, six transistor (6T), CMOS technology. The

device is targeted to satisfy the demands of the state-of-the-art
technologies such as cell phones and pagers.

When CE is HIGH (deselected), the device assumes a standby
mode at which the power dissipation can be reduced down with
CMOS input levels. Additionally, easy memory expansion is
provided by using Chip Enable and Output Enable inputs, CE
and OE. The active LOW Write Enable ( WE) controls both
writing and reading of the memory.

The IC62VV5128L and IC62VV5128LL are available in 32-pin
8*20mm TSOP-1, 8*13.4mm TSOP-1 and 48-pin 6*8mm TF­BGA.

A0-A18

VCC

GND

I/O0-I/O7

CE
OE
WE

ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.

2 Integrated Circuit Solution Inc.

DECODER

I/O

DATA

CIRCUIT

CONTROL

CIRCUIT

512K x 8

MEMORY ARRAY

COLUMN I/O

LPSR020-0A 11/26/2001

IC62VV5128L
IC62VV5128LL

PIN CONFIGURATIONS

32-Pin 8*20mm TSOP-1, 8*13.4mm STSOP-1

32

1

A11

2

A9

3

A8

4

A13

5

WE

6

A17

7

A15

8

Vcc

9

A18

10

A16

11

A14

12

A12

13

A7

14

A6

15

A5

16

A4

PIN DESCRIPTIONS

OE

31

A10

30

CE

29

I/O7

28

I/O6

27

I/O5

26

I/O4

25

I/O3

24

GND

23

I/O2

22

I/O1

21

I/O0

20

A0

19

A1

18

A2

17

A3

48-Pin 6*8mm TF-BGA (TOP-View)

1 2 3 4 5 6

A3

A1

A2 WE

OE

A10

NC

NC

A18

CE

A11

A
B
C
D

E
F

G
H

A0

I/O

I/O

GND

Vcc

I/O

I/O

A9

4

5

6

7

A4

A5

A17

A16

A12

A6

A7 I/O

A15

A13 A14

A8

I/O

Vcc

GND

I/O

I/O

0

1

2

3

A0-A18 Address Inputs

CE Chip Enable Input
OE Output Enable Input
WE Write Enable Input

I/O0-I/O7 Data Input/Output
NC No Connection
Vcc Power
GND Ground

TRUTH TABLE

Mode

WEWE

WE

WEWE

Not Selected X H X High-Z ISB1, ISB2
Output Disabled H L H High-Z ICC

Read H L L DOUT ICC
Write L L X DIN ICC

CECE

CE

CECE

OEOE

OE I/O Operation Vcc Current

OEOE

OPERATING RANGE

Range Ambient Temperature VCC

Commercial 0°C to +70°C 1.65V - 2.2V
Industrial –40°C to +85°C 1.65V - 2.2V

Integrated Circuit Solution Inc. 3

LPSR020-0A 11/26/2001

IC62VV5128L
IC62VV5128LL

ABSOLUTE MAXIMUM RATINGS

(1)

Symbol Parameter Value Unit

VTERM Terminal Voltage with Respect to GND –0.5 to Vcc + 0.4 V
VCC Vcc related to GND –0.3 to +4.0 V
TBIAS Temperature Under Bias –40 to +85 °C
TSTG Storage Temperature –65 to +150 °C
PT Power Dissipation 1 W

Notes:

1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.

CAPACITANCE

(1)(2)

Symbol Parameter Conditions Max. Unit

CIN Input Capacitance VIN = 0V 6 pF
COUT Output Capacitance VOUT = 0V 8 pF

Notes:

1. Tested initially and after any design or process changes that may affect these parameters.

2. Test conditions: T

o

A = 25

C, f = 1 MHz, VCC = 1.8 V

DC ELECTRICAL CHARACTERISTICS (Over Operating Range)

Symbol Parameter Test Conditions Min. Max. Unit

VOH Output HIGH Voltage VCC = Min., IOH = -0.1 mA 1.4 — V
VOL Output LOW Voltage VCC = Min., IOL = 0.1 mA — 0.2 V
VIH Input HIGH Voltage
VIL Input LOW Voltage
ILI Input Leakage GND ≤ VIN ≤ VCC –1 1 µA
ILO Output Leakage GND ≤ VOUT ≤ VCC –1 1 µA

Notes:

IH(max) =VCC +2.0V for pulse width less than 10ns.

1. V

2. V

IL(min) = –2.0V for pulse width less than 10 ns.

(1)

(2)

1.4 VCC + 0.3 V

–0.2 0.4 V

4 Integrated Circuit Solution Inc.

LPSR020-0A 11/26/2001

IC62VV5128L
IC62VV5128LL

IC62VV5128L POWER SUPPLY CHARACTERISTICS

(1)

(Over Operating Range)

-55 -70 -100

Symbol Parameter Test Conditions Min. Max. Min. Max. Min. Max. Unit

ICC Vcc Dynamic Operating VCC = 1.8V, CE = VIL Com. — 20 — 15 — 10 mA

Supply Current IOUT = 0 mA, f = fMAX Ind. — 20 — 15 — 10

ICC2 Vcc Dynamic Operating VCC = 1.8V, C om. — 2 — 2 — 2 mA

Supply Current IOUT = 0 mA Ind. — 2 — 2 — 2

CE ≤ VIL ,f = 1MHZ

ISB2 CMOS Standby VCC = Max., f = 0 Com . — 35 — 35 — 35 µA

Current (CMOS Inputs) 1) CE ≥ VCC – 0.2V, (CE Control) Ind. — 50 — 50 — 50

2) UB, LB ≥ VCC – 0.2V, (UB, LB Control)
VIN ≥ VCC – 0.2V or VIN ≤ 0.2V

Note:

1. At f = f

IC62VV5128LL POWER SUPPLY CHARACTERISTICS

MAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.

(1)

(Over Operating Range)

-55 -70 -100

Symbol Parameter Test Conditions Min. Max. Min. Max. Min. Max. Unit

ICC Vcc Dynamic Operating VCC = 3V, CE = VIL Com. — 20 — 15 — 10 mA

Supply Current IOUT = 0 mA, f = fMAX Ind. — 20 — 1 5 — 10

ICC2 Vcc Dynamic Operating VCC = 1.8V, C om. — 2 — 2 — 2 mA

Supply Current IOUT = 0 mA, Ind. — 2 — 2 — 2

CE ≤ VIL ,f = 1MHZ

ISB2 CMOS Standby VCC = Max., f = 0 Com . — 15 — 15 — 15 µA

Current (CMOS Inputs) 1) CE ≥ VCC – 0.2V, (CE Control) Ind. — 20 — 20 — 20

2) UB, LB ≥ VCC – 0.2V, (UB, LB Control)
VIN ≥ VCC – 0.2V or VIN ≤ 0.2V

Note:

1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.

Integrated Circuit Solution Inc. 5

LPSR020-0A 11/26/2001

IC62VV5128L
IC62VV5128LL

READ CYCLE SWITCHING CHARACTERISTICS

(1)

(Over Operating Range)

-55 -70 -100

Symbol Parameter Min. Max. Min. Max. Min. Max. Unit

tRC Read Cycle Time 55 — 70 — 100 — ns
tAA Address Access Time — 55 — 70 — 100 ns
tOHA Output Hold Time 10 — 10 — 15 — ns
tACE CE Access Time — 55 — 70 — 100 ns
tDOE OE Access Time — 30 — 35 — 50 ns

(2)

tHZOE
tLZOE
tLZCE
tHZCE

Notes:

1. Test conditions assume signal transition times of 5 ns or less, input pulse levels of 0.4V to 1.4V and output
loading specified in Figure 1.

2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

OE to High-Z Output — 20 0 25 0 30 ns

(2)

OE to Low-Z Output 5 — 5 — 5 — ns

(2)

CE to Low-Z Output 10 — 10 — 10 — ns

(2)

CE to High-Z Output 0 20 0 25 0 30 ns

AC TEST CONDITIONS

Parameter Unit

Input Pulse Level 0.4V to 1.4V
Input Rise and Fall Times 5 ns
Input Reference Level 0.9V

Output Reference Level 0.9V
Output Load See Figures 1 and 2

AC TEST LOADS

1 TTL

OUTPUT

100 pF

Including

jig and

scope

1 TTL

OUTPUT

5 pF

Including

jig and

scope

Figure 1 Figure 2

6 Integrated Circuit Solution Inc.

LPSR020-0A 11/26/2001

IC62VV5128L
IC62VV5128LL

AC TEST LOADS
READ CYCLE NO.1

ADDRESS

(1,2)

(Address Controlled,

t

OHA

CE CE

CE =

CE CE

OE OE

OE =

OE OE

t

RC

t

AA

UB UB

UB =

UB UB

LB LB

LB = VIL)

LB LB

t

OHA

D

OUT

AC WAVEFORMS
READ CYCLE NO. 2

ADDRESS

OE

CE

t

LZCE

PREVIOUS DATA VALID

(1,3)

CE CE

CE ,

CE CE

OE OE

OE ,

OE OE

(

and Controlled)

t

RC

t

AA

t

DOE

t

LZOE

t

ACE

DATA VALID

t

HZCE

t

OHA

t

HZOE

OUT

D

Notes:

1. WE is HIGH for a Read Cycle.

2. The device is continuously selected. OE, CE = V

3. Address is valid prior to or coincident with CE LOW transitions.

HIGH-Z

DATA VALID

IL.

Integrated Circuit Solution Inc. 7

LPSR020-0A 11/26/2001

IC62VV5128L
IC62VV5128LL

WRITE CYCLE SWITCHING CHARACTERISTICS

-55 -70 -100

Symbol Parameter Min. Max. Min. Max. Min. Max Unit

(1,2)

(Over Operating Range, Standard and Low Power)

tWC Write Cycle Time 55 — 70 — 100 — ns
tSCE CE to Write End 50 — 65 — 80 — ns
tAW Address Setup Time to Write End 50 — 65 — 80 — ns
tHA Address Hold from Write End 0 — 0 — 0 — ns
tSA Address Setup Time 0 — 0 — 0 — ns
tPWE WE Pulse Width 45 — 55 — 80 — ns
tSD Data Setup to Write End 25 — 30 — 40 — ns
tHD Data Hold from Write End 0 — 0 — 0 — ns

(3)

tHZWE
tLZWE

Notes:

1. Test conditions assume signal transition times of 5 ns or less, input pulse levels of 0.4V to 1.4V and output loading specified in
Figure 1.

2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

3. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write,
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling
edge of the signal that terminates the Write.

WE LOW to High-Z Output — 30 — 30 — 40 ns

(3)

WE HIGH to Low-Z Output 5 — 5 — 5 — ns

AC WAVEFORMS
WRITE CYCLE NO. 1

ADDRESS

CE

WE

DOUT

DIN

(CE Controlled)

tSA

DATA UNDEFINED

tAW

tHZWE

tWC

tSCE

tPWE

tHA

tLZWE

HIGH-Z

tSD tHD

DATA-IN VALID

8 Integrated Circuit Solution Inc.

LPSR020-0A 11/26/2001

IC62VV5128L
IC62VV5128LL

WRITE CYCLE NO. 2 (WE Controlled: OE is HIGH During Write Cycle)

t

WC

ADDRESS

OE

t

SCE

CE

t

AW

t

WE

DOUT

DIN

t

SA

DATA UNDEFINED

t

HZWE

PWE

HIGH-Z

t

SD

)

t

HA

DATA-IN VALID

t

LZWE

t

HD

WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle)

t

WC

ADDRESS

OE

t

SCE

CE

t

AW

t

WE

DOUT

DIN

t

SA

DATA UNDEFINED

t

HZWE

PWE

HIGH-Z

t

SD

)

t

HA

DATA-IN VALID

t

LZWE

t

HD

Integrated Circuit Solution Inc. 9

LPSR020-0A 11/26/2001

IC62VV5128L
IC62VV5128LL

DATA RETENTION SWITCHING CHARACTERISTICS

Symbol Parameter Test Condition Min. Max. Unit

VDR Vcc for Data Retention See Data Retention Waveform 1.0 2.2 V

I

DR Data Retention Current Vcc = 1.0V, CE

tSDR Data Retention Setup Time See Data Retention Waveform 0 — ns
tRDR Recovery Time See Data Retention Waveform 5 —ns

DATA RETENTION WAVEFORM (CE Controlled)

≥

Vcc – 0.2V Com. (-L) — 15 µA

Com. (-LL) — 5 µA
Ind. (-L) — 20 µA
Ind. (-LL) — 9 µA

1.65V

1.4V

GND

VCC

VDR

CE

t

SDR tRDR

Data Retention Mode

CE ≥ VCC - 0.2V

10 Integrated Circuit Solution Inc.

LPSR020-0A 11/26/2001

IC62VV5128L
IC62VV5128LL

ORDERING INFORMATION
Commercial Range: 0°C to +70°C

Industrial Range: -40°C to +85°C

Speed (ns) Order Part No. Package

55 IC62VV5128L-55T 8*20mm TSOP-1

IC62VV5128L-55H 8*13.4mm TSOP-1
IC62VV5128L-55B 6*8mm TF-BGA

70 IC62VV5128L-70T 8*20mm TSOP-1

IC62VV5128L-70H 8*13.4mm TSOP-1
IC62VV5128L-70B 6*8mm TF-BGA

100 IC62VV5128L-100T 8*20mm TSOP-1

IC62VV5128L-100H 8*13.4mm TSOP-1
IC62VV5128L-100B 6*8mm TF-BGA

ORDERING INFORMATION
Commercial Range: 0°C to +70°C

Speed (ns) Order Part No. Package

55 IC62VV5128LL-55T 8*20mm TSOP-1

IC62VV5128LL-55H 8*13.4mm TSOP-1
IC62VV5128LL-55B 6*8mm TF-BGA

70 IC62VV5128LL-70T 8*20mm TSOP-1

IC62VV5128LL-70H 8*13.4mm TSOP-1
IC62VV5128LL-70B 6*8mm TF-BGA

100 IC62VV5128LL-100T 8*20mm TSOP-1

IC62VV5128LL-100H 8*13.4mm TSOP-1
IC62VV5128LL-100B 6*8mm TF-BGA

Speed (ns) Order Part No. Package

55 IC62VV5128L-55TI 8*20mm TSOP-1

IC62VV5128L-55HI 8*13.4mm TSOP-1
IC62VV5128L-55BI 6*8mm TF-BGA

70 IC62VV5128L-70TI 8*20mm TSOP-1

IC62VV5128L-70HI 8*13.4mm TSOP-1
IC62VV5128L-70BI 6*8mm TF-BGA

100 IC62VV5128L-100TI 8*20mm TSOP-1

IC62VV5128L-100HI 8*13.4mm TSOP-1
IC62VV5128L-100BI 6*8mm TF-BGA

Industrial Range: -40°C to +85°C

Speed (ns) Order Part No. Package

55 IC62VV5128LL-55TI 8*20mm TSOP-1

IC62VV5128LL-55HI 8*13.4mm TSOP-1
IC62VV5128LL-55BI 6*8mm TF-BGA

70 IC62VV5128LL-70TI 8*20mm TSOP-1

IC62VV5128LL-70HI 8*13.4mm TSOP-1
IC62VV5128LL-70BI 6*8mm TF-BGA

100 IC62VV5128LL-100TI 8*20mm TSOP-1

IC62VV5128LL-100HI 8*13.4mm TSOP-1
IC62VV5128LL-100BI 6*8mm TF-BGA

Integrated Circuit Solution Inc.

HEADQUARTER:

NO.2, TECHNOLOGY RD. V, SCIENCE-BASED INDUSTRIAL PARK,

HSIN-CHU, TAIWAN, R.O.C.

TEL: [phone]

Fax: [phone]

BRANCH OFFICE:

7F, NO. 106, SEC. 1, HSIN-TAI 5TH ROAD,

HSICHIH TAIPEI COUNTY, TAIWAN, R.O.C.

TEL: [phone]

FAX: [phone]

http://www.icsi.com.tw

Integrated Circuit Solution Inc. 11

LPSR020-0A 11/26/2001