ICSI IC61C256AH-10U, IC61C256AH-12J, IC61C256AH-12JI, IC61C256AH-12N, IC61C256AH-12NI Datasheet
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IC61C256AH
Document Title
32K x 8 High Speed SRAM
Revision History
Revision No History Draft Date Remark
0A Initial Draft March 23,2001
0B Revise typo of t
0C Add SOP package type February 18,2002
0D Revise typo of sop size at page 2,9 April 19,2002
HA on page 7 October 18,2001
The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and
products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.
Integrated Circuit Solution Inc. 1
AHSR010-0D 4/19/2002
IC61C256AH
32K x 8 HIGH-SPEED CMOS STATIC RAM
FEATURES
• High-speed access times: 10, 12, 15, 20, 25 ns
• Low active power: 400 mW (typical)
• Low standby power
-- 250 µW (typical) CMOS standby
-- 55 mW (typical) TTL standby
• Fully static operation: no clock or refresh
required
• TTL compatible interface and outputs
• Single 5V power supply
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION
The ICSI IC61C256AH is very high-speed, low power, 32,768
word by 8-bit static RAMs. They are fabricated using ICSI's
high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields
access times as fast as 8 ns maximum.
When CE is HIGH (deselected), the device assumes a standby
mode at which the power dissipation is reduced to
50 µW (typical) with CMOS input levels.
Easy memory expansion is provided by using an active LOW
Chip Enable (CE). The active LOW Write Enable (WE) controls
both writing and reading of the memory.
The IC61C256AH is pin compatible with other 32k x 8 SRAMs
and are available in 28-pin 300mil PDIP, 300mil SOJ, and
8*13.4mm TSOP-1 package, 330 mil SOP.
A0-A14
VCC
GND
I/O0-I/O7
CE
OE
WE
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
DECODER
I/O
DATA
CIRCUIT
CONTROL
CIRCUIT
32K X 8
MEMORY ARRAY
COLUMN I/O
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IC61C256AH
PIN CONFIGURATION
28-Pin DIP and SOJ and SOP
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
PIN DESCRIPTIONS
VCC
WE
A13
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
PIN CONFIGURATION
8x13.4mm TSOP-1
OE
A11
A9
A8
A13
WE
VCC
A14
A12
A7
A6
A5
A4
A3
TRUTH TABLE
22
23
24
25
26
27
28
1
2
3
4
5
6
7
21
20
19
18
17
16
15
14
13
12
11
10
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
9
A1
8
A2
A0-A14 Address Inputs
CE Chip Enable Input
OE Output Enable Input
WE Write Enable Input
I/O0-I/O7 Input/Output
Mode
WEWE
WE
WEWE
Not Selected X H X High-Z ISB1, ISB2
(Power-down)
Output Disabled H L H High-Z ICC1,ICC2
Read H L L DOUT ICC1, ICC2
Write L L X DIN ICC1, ICC2
CECE
OEOE
CE
OE I/O Operation Vcc Current
CECE
OEOE
Vcc Power
GND Ground
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol Parameter Value Unit
VTERM Terminal Voltage with Respect to GND –0.5 to +7.0 V
TBIAS Temperature Under Bias –55 to +125 °C
TSTG Storage Temperature –65 to +150 °C
PD Power Dissipation 1.5 W
IOUT DC Output Current (LOW) 20 mA
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at these or any
other conditions above those indicated in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Integrated Circuit Solution Inc. 3
AHSR010-0D 4/19/2002
IC61C256AH
OPERATING RANGE
Range Ambient Temperature Speed VCC
Commercial 0°C to +70°C -10, -12 5V, ± 5%
-15, -20 5V ± 10%
Industrial –40°C to +85°C -12 5V ± 5%
-15, -20, -25 5V± 10%
Notes:
1. 8 ns is preliminary.
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter Test Conditions Min. Max. Unit
VOH Output HIGH Voltage VCC = Min., IOH = –4.0 mA 2.4 — V
VOL Output LOW Voltage VCC = Min., IOL = 8.0 mA — 0.4 V
VIH Input HIGH Voltage
VIL Input LOW Voltage
ILI Input Leakage GND ≤ VIN ≤ VCC Com. –5 5 µA
(1)
(2)
2.2 VCC + 0.5 V
–0.5 0.8 V
Ind. –10 10
ILO Output Leakage GND ≤ VOUT ≤ VCC, Com. –5 5 µA
Outputs Disabled Ind. –10 10
Notes:
IH=VCC +3.0V for pulse width less than 10ns.
1. V
2. V
IL = –3.0V for pulse width less than 10 ns.
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
-10 -12 -15 -20 -25
Sym. Parameter Test Conditions
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit
ICC Vcc Dynamic Operating VCC = Max., CE = VIL Com. — 145 — 135 — 125 — 120 — 120 mA
Supply Current IOUT = 0 mA, f = fMAX Ind. — 180 — 170 — 160 — 150 — 140
ISB1 TTL Standby Current VCC = Max., Com. — 25 — 25 — 25 — 25 — 25 mA
(TTL Inputs) VIN = VIH or VIL Ind. — 30 — 30 — 30 — 30 — 30
CE ≥VIH, f = 0
ISB2 CMOS Standby VCC = Max., Com. — 2 — 2 — 2 — 2 — 2 mA
Current (CMOS Inputs) CE ≥ VCC – 0.2V, Ind. — 10 — 10 — 10 — 10 — 10
VIN ≥ VCC – 0.2V, or
VIN ≤ 0.2V, f = 0
Notes:
1. At f = f
MAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
CAPACITANCE
(1,2)
Symbol Parameter Conditions Max. Unit
CIN Input Capacitance VIN = 0V 8 pF
COUT Output Capacitance VOUT = 0V 10 pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
A = 25°C, f = 1 MHz, Vcc = 5V.
4 Integrated Circuit Solution Inc.
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IC61C256AH
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
-10 -12 -15 -20 -25
Symbol Parameter Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit
tRC Read Cycle Time 10 — 12 — 15 — 20 — 25 — ns
tAA Address Access Time — 10 — 12 — 15 — 20 — 25 ns
tOHA Output Hold Time 2 — 2 — 2 — 2 — 2 — ns
tACE CE Access Time — 10 — 12 — 15 — 2 0 — 25 ns
tDOE OE Access Time — 5 — 5 — 7 — 8 — 9 ns
(2)
tLZOE
OE to Low-Z Output 0 — 0 — 0 — 0 — 0 — ns
(2)
tHZOE
OE to High-Z Output — 5 — 6 — 7 — 9 — 10 ns
(2)
tLZCE
CE to Low-Z Output 2 — 3 — 3 — 3 — 3 — ns
(2)
tHZCE
CE to High-Z Output — 5 — 7 — 8 — 9 — 10 ns
(3)
tPU
CE to Power-Up 0 — 0 — 0 — 0 — 0 — ns
(3)
tPD
CE to Power-Down — 10 — 12 — 15 — 18 — 20 ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±200 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter Unit
Input Pulse Level 0V to 3.0V
Input Rise and Fall Times 3 ns
Input and Output Timing 1.5V
and Reference Levels
Output Load See Figures 1 and 2
AC TEST LOADS
480 Ω
5V
OUTPUT
30 pF
Including
jig and
scope
255 Ω
OUTPUT
5V
Including
5 pF
jig and
scope
480 Ω
255 Ω
Figure 1. Figure 2.
Integrated Circuit Solution Inc. 5
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IC61C256AH
AC WAVEFORMS
READ CYCLE NO. 1
ADDRESS
D
OUT
READ CYCLE NO. 2
ADDRESS
OE
(1,2)
PREVIOUS DATA VALID
(1,3)
t
RC
t
AA
t
OHA
DATA VALID
t
RC
t
AA
t
OHA
t
OHA
t
DOE
t
CE
t
LZCE
OUT
D
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE = V
3. Address is valid prior to or coincident with CE LOW transitions.
HIGH-Z
LZOE
t
ACE
IL.
DATA VALID
t
HZCE
t
HZOE
6 Integrated Circuit Solution Inc.
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IC61C256AH
WRITE CYCLE SWITCHING CHARACTERISTICS
(1,2)
(Over Operating Range)
-10 -12 -15 -20 -25
Symbol Parameter Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit
tWC Write Cycle Time 10 — 12 — 15 — 20 — 25 — ns
tSCE CE to Write End 9 — 10 — 10 — 13 — 15 — ns
tAW Address Setup Time 9 — 10 — 12 — 15 — 20 — ns
to Write End
tHA Address Hold 0 — 0 — 0 — 0 — 0 — ns
from Write End
tSA Address Setup Time 0 — 0 — 0 — 0 — 0 — ns
(4)
tPWE
WE Pulse Width 8 — 8 — 10 — 13 — 15 — ns
tSD Data Setup to Write End 7 — 7 — 9 — 10 — 12 — ns
tHD Data Hold from Write End 0 — 0 — 0 — 0 — 0 — ns
(2)
tHZWE
WE LOW to High-Z Output — 6 — 6 — 7 — 8 — 10 ns
tLZWE WE HIGH to Low-Z Output 0 — 0 — 0 — 0 — 0 — ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write,
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling
edge of the signal that terminates the Write.
4. Tested with OE HIGH.
AC WAVEFORMS
WRITE CYCLE NO. 1
ADDRESS
CE
WE
OUT
D
D
IN
(WE Controlled)
t
SA
DATA UNDEFINED
(1,2 )
t
WC
VALID ADDRESS
t
SCE
t
AW
t
PWE1
t
PWE2
t
HZWE
HIGH-Z
t
SD
DATAIN VALID
t
HA
t
LZWE
t
HD
Integrated Circuit Solution Inc. 7
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IC61C256AH
WRITE CYCLE NO. 2
ADDRESS
OE
CE
LOW
WE
t
OUT
D
DIN
(CE Controlled)
SA
DATA UNDEFINED
(1,2)
VALID ADDRESS
t
AW
t
HZWE
t
WC
t
PWE1
HIGH-Z
t
SD
DATAIN VALID
t
HA
t
LZWE
t
HD
Notes:
1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write,
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling
edge of the signal that terminates the Write.
2. I/O will assume the High-Z state if OE ≥ V
IH.
8 Integrated Circuit Solution Inc.
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IC61C256AH
ORDERING INFORMATION:
IC61C256AH
Commercial Range: 0°C to +70°C
Speed (ns) Order Part No. Package
10 IC61C256AH-10N 300mil DIP
10 IC61C256AH-10J 300mil SOJ
10 IC61C256AH-10T 8*13.4mm TSOP-1
10 IC61C256AH-10U 330mil SOP
12 IC61C256AH-12N 300mil DIP
12 IC61C256AH-12J 300mil SOJ
12 IC61C256AH-12T 8*13.4mm TSOP-1
12 IC61C256AH-12U 330mil SOP
15 IC61C256AH-15N 300mil DIP
15 IC61C256AH-15J 300mil SOJ
15 IC61C256AH-15T 8*13.4mm TSOP-1
15 IC61C256AH-15U 330mil SOP
20 IC61C256AH-20N 300mil DIP
20 IC61C256AH-20J 300mil SOJ
20 IC61C256AH-20T 8*13.4mm TSOP-1
20 IC61C256AH-20U 330mil SOP
ORDERING INFORMATION:
IC61C256AH
Industrial Range: –40°C to +85°C
Speed (ns) Order Part No. Package
12 IC61C256AH-12NI 300mil DIP
12 IC61C256AH-12JI 300mil SOJ
12 IC61C256AH-12TI 8*13.4mm TSOP-1
12 IC61C256AH-12UI 330mil SOP
15 IC61C256AH-15NI 300mil DIP
15 IC61C256AH-15JI 300mil SOJ
15 IC61C256AH-15TI 8*13.4mm TSOP-1
15 IC61C256AH-15UI 330mil SOP
20 IC61C256AH-20NI 300mil DIP
20 IC61C256AH-20JI 300mil SOJ
20 IC61C256AH-20TI 8*13.4mm TSOP-1
20 IC61C256AH-20UI 330mil SOP
25 IC61C256AH-25NI 300mil DIP
25 IC61C256AH-25JI 300mil SOJ
25 IC61C256AH-25TI 8*13.4mm TSOP-1
25 IC61C256AH-25UI 330mil SOP
Integrated Circuit Solution Inc.
HEADQUARTER:
NO.2, TECHNOLOGY RD. V, SCIENCE-BASED INDUSTRIAL PARK,
HSIN-CHU, TAIWAN, R.O.C.
TEL: 886-3-5780333
Fax: 886-3-5783000
BRANCH OFFICE:
7F, NO. 106, SEC. 1, HSIN-TAI 5TH ROAD,
HSICHIH TAIPEI COUNTY, TAIWAN, R.O.C.
TEL: 886-2-26962140
FAX: 886-2-26962252
http://www.icsi.com.tw
Integrated Circuit Solution Inc. 9
AHSR010-0D 4/19/2002
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