ICSI f Manual

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IC62LV12816L

IC62LV12816LL

IC62LV12816LL

128K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM

FEATURES

High-speed access times: 55, 70, 100 ns

CMOS low power operation

--60 mW (typical) operating

--3 µW (typical) CMOS standby

TTL compatible interface levels

Single 2.7V-3.6V Vcc power supply

Fully static operation: no clock or refresh required

Three state outputs

Data control for upper and lower bytes

Industrial temperature available

Available in the 44-pin TSOP-2 and 48-pin 6*8mm TF-BGA

DESCRIPTION

The 1+51 IC62LV12816L and IC62LV12816LL are high-speed, 2.097,152-bit static RAMs organized as 131,072 words by 16 bits. They are fabricated using 1+51's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices.

When CE is HIGH (deselected) or when CE is low and both LB and UB are HIGH, the device assumes a standby mode at which the power dissipation can be reduced by using CMOS input levels.

Easy memory expansion is provided by using Chip Enable Output and Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access.

The IC62LV12816L and IC62LV12816LL are packaged in the JEDEC standare 44-pin 400mil TSOP-2 and 48-pin 6*8mm TF-BGA.

FUNCTIONAL BLOCK DIAGRAM

A0-A16

 

 

 

 

 

 

 

 

 

 

 

 

 

DECODER

 

 

128K x 16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MEMORY ARRAY

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I/O0-I/O7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I/O

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Lower Byte

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

COLUMN I/O

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DATA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I/O8-I/O15

 

 

 

 

 

 

 

 

 

 

 

 

 

CIRCUIT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Upper Byte

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OE

 

CONTROL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

WE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CIRCUIT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

UB

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LB

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.

Integrated Circuit Solution Inc.

1

LPSR011-0B 06/06/2001

ICSI f Manual

IC62LV12816L

IC62LV12816LL

PIN CONFIGURATIONS

44-Pin TSOP-2 48-Pin TF-BGA

 

 

 

 

 

44

 

A5

 

A4

1

 

 

A3

 

2

43

 

A6

 

 

 

A2

 

3

42

 

A7

 

 

 

A1

 

4

41

 

 

 

 

 

 

 

OE

 

 

A0

 

5

40

 

 

 

 

 

 

 

UB

 

 

CE

 

6

39

 

 

 

 

 

 

LB

 

I/O0

 

7

38

 

I/O15

 

 

I/O1

 

8

37

 

I/O14

 

 

I/O2

 

9

36

 

I/O13

 

 

I/O3

 

10

35

 

I/O12

 

 

 

Vcc

 

11

34

 

GND

 

 

GND

 

33

 

Vcc

 

12

 

I/O4

 

13

32

 

I/O11

 

 

I/O5

 

14

31

 

I/O10

 

 

I/O6

 

15

30

 

I/O9

 

 

I/O7

 

16

29

 

I/O8

 

 

 

 

 

 

17

28

 

NC

 

WE

 

 

 

A16

 

18

27

 

A8

 

 

A15

 

19

26

 

A9

 

 

A14

 

20

25

 

A10

 

 

A13

 

21

24

 

A11

 

 

A12

 

22

23

 

NC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

2

3

4

5

6

A

LB

OE

A0

A1

A2

N/C

B

I/O8

UB

A3

A4

CE

I/O0

C

I/O9

I/O10

A5

A6

I/O1

I/O2

D

GND

I/O11

NC

A7

I/O3

Vcc

E

Vcc

I/O12

NC

A16

I/O4

GND

F

I/O14

I/O13

A14

A15

I/O5

I/O6

G

I/O15

NC

A12

A13

WE

I/O7

H

NC

A8

A9

A10

A11

NC

PIN DESCRIPTIONS

A0-A16

Address Inputs

 

 

I/O0-I/O15

Data Input/Output

 

 

CE

Chip Enable Input

 

 

OE

Output Enable Input

 

 

WE

Write Enable Input

 

 

LB

Lower-byte Control (l/O0-I/O7)

 

 

UB

Upper-byte Control (l/O8-I/O15)

 

 

NC

No Connection

 

 

Vcc

Power

 

 

GND

Ground

 

 

TRUTH TABLE

 

 

 

 

 

 

 

I/O PIN

 

Mode

WE

CE

OE

LB

UB

I/O0/-I/O7

I/O8-I/O15

Vcc Current

 

 

 

 

 

 

 

 

 

Not Selected

X

H

X

X

X

High-Z

High-Z

ISB , ISB

 

X

L

X

H

H

High-Z

High-Z

ISB , ISB

Output Disabled

H

L

H

X

X

High-Z

High-Z

ICC

 

X

L

X

H

H

High-Z

High-Z

ISB

 

 

 

 

 

 

 

 

 

Read

H

L

L

L

H

DOUT

High-Z

ICC

 

H

L

L

H

L

High-Z

DOUT

 

 

H

L

L

L

L

DOUT

DOUT

 

 

 

 

 

 

 

 

 

 

Write

L

L

X

L

H

DIN

High-Z

ICC

 

L

L

X

H

L

High-Z

DIN

 

 

L

L

X

L

L

DIN

DIN

 

 

 

 

 

 

 

 

 

 

2

Integrated Circuit Solution Inc.

LPSR011-0B 06/06/2001

IC62LV12816L

IC62LV12816LL

OPERATING RANGE

Range

Ambient Temperature

VCC

Commercial

0°C to +70°C

2.7V - 3.6V

 

 

 

Industrial

–40°C to +85°C

2.7V - 3.6V

 

 

 

ABSOLUTE MAXIMUM RATINGS(1)

Symbol

Parameter

Value

Unit

VTERM

Terminal Voltage with Respect to GND

–0.5 to Vcc + 0.5

V

 

 

 

 

TBIAS

Temperature Under Bias

–40 to +85

°C

 

 

 

 

VCC

Vcc related to GND

–0.3 to +4.0

V

 

 

 

 

TSTG

Storage Temperature

–65 to +150

°C

 

 

 

 

PT

Power Dissipation

1.0

W

Notes:

1.Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

DC ELECTRICAL CHARACTERISTICS (Over Operating Range)

Symbol

Parameter

Test Conditions

Min.

Max.

Unit

 

 

 

 

 

 

VOH

Output HIGH Voltage

VCC = Min., IOH = –1 mA

2.0

V

 

 

 

 

 

 

VOL

Output LOW Voltage

VCC = Min., IOL = 2.1 mA

0.4

V

VIH

Input HIGH Voltage

 

2.2

VCC + 0.2

V

 

 

 

 

 

 

VIL

Input LOW Voltage

 

–0.2

0.4

V

ILI

Input Leakage

GND £ VIN £ VCC

–1

1

µA

ILO

Output Leakage

GND £ VOUT £ VCC, OUTPUTS DISABLED

–1

1

µA

 

 

 

 

 

 

Notes:

1. VIL(min.) = –2.0V for pulse width less than 10 ns.

CAPACITANCE(1)

Symbol

Parameter

Conditions

Max.

Unit

 

 

 

 

 

CIN

Input Capacitance

VIN = 0V

6

pF

 

 

 

 

 

COUT

Output Capacitance

VOUT = 0V

8

pF

 

 

 

 

 

Notes:

1. Tested initially and after any design or process changes that may affect these parameters.

Integrated Circuit Solution Inc.

3

LPSR011-0B 06/06/2001

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