The information in this document is subject to change
without prior notice in order to improve reliability,
design and function and does not represent a
commitment on the part of the manufacturer.
In no event will the manufacturer be liable for direct,
indirect, special, incidental, or consequential damages
arising out of the use or inability to use the product or
documentation, even if advised of the possibility of
such damages.
This document contains proprietary information
protected by copyright. All rights are reserved. No part
of this manual may be reproduced by any mechanical,
electronic, or other means in any form without prior
written permission of the manufacturer.
Trademarks
WAFER-C800EV and E667EV Series are registered
trademark of ICP Electronics Inc., IBM PC is a
registered trademark of International Business
Machines Corporation. Intel is a registered trademark
of Intel Corporation. AMI is a registered trademark of
American Megatrends Inc. , Other product names
mentioned herein are used for identification purposes
only and may be trademarks and/or registered
trademarks of their respective companies.
Appendix B. How to use the Wake-Up Function.......... 43
Appendix C. CN3 Flat Panel Data Mapping ................. 44
4
Page 5
Chapter 1. Introduction
The WAFER-C800EV/E667EV Series ATX/AT main board is a
high-performance computer mainboard based on the VIA
TwisterT PN133T VT8606 and VT8231 chipset. It is designed
for VIA
®
C3 processor, making it ideal for cost-effective CPU
®
board markets.
The VIA
system logic north bridge with the addition of 133 MHz
capability for both the CPU and SDRAM interfaces. VIA
®
TwisterT PN133T (VT8606) is a VIA® C3 processor
®
TwisterT PN133T may be used to implement both desktop and
notebook personal computer systems from 100MHz to 133MHz
based on C3 (EBGA packing). The primary features of the
®
TwisterT PN133T-North Bridge are: VIA® C3 CPU (Front
VIA
Side Bus) Interface (100 / 133MHz), SDRAM Memory
Interface (100 / 133MHz), 32-bit PCI with Integrated 2D / 3D
graphics accelerator.
The VT8231 PSIPC (PCI Super-I/O Integrated Peripheral
Controller) is a high integration, high performance, powerefficient, and high compatibility device that supports both
Intel and non-Intel based processors to PCI bus bridge
functionality, ensuring a complete Microsoft PC99-compliant
PCI/ISA system.
5
Page 6
1.1 Specifications
VIA
•
DMA channels: 7
•
Interrupt levels: 15
•
Chipset: VIA
•
®
C3 EBGA packing
®
VT8606 (Integrated 2D / 3D graphics
accelerator.) & VT8231
RAM memory: One SO-DIMM sockets . Maximum
•
memory is 512MB.
Ultra ATA/33/66/100IDE Interface : Two PCI
•
Enhance IDE hard drives. The south bridge VT8231
supports Ultra ATA/33/66/100 IDE interface.
One high speed Series ports : NS16C550 compatible
•
UART’s
Bi-directional Parallel Port : IEEE1284 compatible
•
IrDA port : Supports fast Infrared function (FIR)
•
USB port : Equipped with four USB ports for future
•
expansion.
Fast Ethernet Multifunction PCI Controller : IEEE
•
802.3u Auto-Negotiation support for 10BASE-T/100BASETX standard. Fast back-to-back transmission support with
minimum interframe spacing. Connected to your LAN via
RJ45 connector.
Keyboard connector & PS/2 Mouse Port on-board
•
Power Consumption : +5VSB @ 180mA, +5V @ 3.8A,
•
+12V @ 170mA (C3-800MHz with 128MB SO-DIMM,
Windows2000 )
Operating Temperature : 0° ~ 55° C ( CPU needs
•
Cooler)
6
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1.2 Package Contents
In addition to this User's Manual, the WAFER-C800EV/E667EV
Series board package includes the following items:
WAFER-C800EV/E667EV Series Single Board Computer x 1
IDE HDD DMA66 Cable x 1 (Item number: 32200-000052)
IDE HDD 2.0mm to 2.54mm Cable x 1 (Item number:
32200-008800)
Print Cable x 1 (Item number: 32200-015100)
RS-422/485 Cable x 1 (Item number: 19800-000017)
Audio Cable x 1 (Item number: 32000-028800)
Y Cable x 1 (Item number: 32000-000138)
If any of these items are missing or damaged, please contact
the dealer from whom you purchased the product. Be sure to
save the shipping materials and carton in case you want to
ship or store the product in the future.
7
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Chapter 2. Installation
This chapter describes how to install the WAFERC800EV/E667EV Series computer board. First a layout
diagram of the WAFER-C800EV/E667EV Series board is shown,
followed by unpacking information that should be carefully
followed. The jumpers and switch settings for the WAFERC800EV/E667EV Series board system configuration, such as
CPU type selection, system clock setting, are also listed.
8
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2.1 Layout Diagram & Dimensions
CN7
IDE1
IDE2
CN5
P4
PRN1
CN6
FAN1
P1
P5
P2
P3
CN3
PCMCIA
U29
CN11
BAT1
JP2
JP3
CN9
JP1
C3
CPU
PSON
CN2
U35
CN1
SODIMM
9
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8.89133.99
30.47
59.04
77.15
95.19
121.91
146.94
1
5
.
3
1
0
.
5
2
9
0
1
5
1
.
0
5
84.09
10
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2.2 Clear CMOS Setup
To clear the CMOS Setup (for example if you have forgotten
the password, you should clear the CMOS and then re-set the
password), you should close the JP3 (2-3) for about 3 seconds,
then open it once more. This will set back to normal operation
mode.
JP3 : Clear CMOS Setup
•
1 2 3
JBAT1 DESCRIPTION
1-2
(default)*
Short 2-3 Clear CMOS Setup
Keep CMOS Setup
(Normal Operation)
2.3 Buzzer Function Setting
CN6(2-4) : Enabled/Disabled Onboard Buzzer
•
Function
2 4 6 8 10 12
1 3 5 7 9 11
SHORT * Enabled
2 - 4 DESCRIPTION
OPEN Disabled
2.4 RS232 or RS422/485 Selection
JP2 : RS232 or RS422/485 Selection
•
1 2 3
11
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JP2 DESCRIPTION
1-2 Short
2-3 Short
Caution: If RS422/485 is in use, the COM port on the main
This chapter describes how to connect peripherals, switches
and indicators to the WAFER-C800EV/E667EV Series board.
3.1 Audio Connectors
The onboard AC’97 CODEC supports several audio functions.
The audio connectors are described below.
CN7:
•
2 4 6 8 10 12
1 3 5 7 9 11
PIN DESCRIPTION PIN DESCRIPTION
1 EAR OUT (LEFT) 2 EAR OUT (RIGHT)
3 GROUND 4 GROUND
5 LINE OUT (LEFT) 6 LINE OUT (RIGHT)
7 LINE IN (LEFT) 8 LINE IN (RIGHT)
9 GROUND 10 GROUND
11 MIC IN 12 GROUND
CN5:
•
1 2 3 4
PIN DESCRIPTION
1. CD SIGNAL (LEFT)
2. GROUND
3. GROUND
4. CD SIGNAL (RIGHT)
13
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3.2 PCI E-IDE Disk Drive Connector
You can attach up to four IDE( Integrated Device Electronics)
devices.
IDE1 : Primary IDE Connector (40pin 2.54mm)
IDE2 : Secondary IDE Connector (44pin 2.0mm)
IDE1 & IDE2 : IDE Interface Connector
•
2 4 6 … 36 38 40.(44)
…
…
1 3 5 … 35 37 39.(43)
PIN DESCRIPTION PIN DESCRIPTION
1 RESET# 2 GROUND
3 DATA 7 4 DATA 8
5 DATA 6 6 DATA 9
7 DATA 5 8 DATA 10
9 DATA 4 10 DATA 11
11 DATA 3 12 DATA 12
13 DATA 2 14 DATA 13
15 DATA 1 16 DATA 14
17 DATA 0 18 DATA 15
19 GROUND 20 N/C
21 DRQ 22 GROUND
23 IOW# 24 GROUND
25 IOR# 26 GROUND
27 CHRDY 28 REV. PULL LOW
29 DACK 30 GROUND-DEFAULT
31 INTERRUPT 32 N/C
33 SA1 34 N/C
35 SA0 36 SA2
37 HDC CS0# 38 HDC CS1#
39 HDD ACTIVE# 40 GROUND
41 +5V(IDE2) 42 +5V(IDE2)
43 GND(IDE2) 44 N/C(IDE2)
14
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3.3 Parallel Port
Usually, a printer is connected to the parallel port. The
WAFER-C800EV/E667EV Series computer board includes an
on-board parallel port, accessed via a 26-pin flat-cable
connector PRN1.
PRN1 : Parallel Port Connector
•
2 4 6 … 22 24 26
…
…
1 3 5 … 21 23 25
PIN DESCRIPTION PIN DESCRIPTION
1 STROBE# 2 DATA 0
3 DATA 1 4 DATA 2
5 DATA 3 6 DATA 4
7 DATA 5 8 DATA 6
9 DATA 7 10 ACKNOWLEDGE
11 BUSY 12 PAPER EMPTY
13 PRINTER SELECT 14 AUTO FORM FEED #
15 ERROR# 16 INITIALIZE
17 PRINTER SELECT
The WAFER-C800EV/E667EV Series board is equipped with
two USB(Version. 1.1) ports for the future new I/O bus
expansion.
15
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P3 : 2 ports USB Connector
•
PIN DESCRIPTION PIN DESCRIPTION
1. VCC 5. VCC
2. DATA0- 6. DATA1-
3. DATA0+ 7. DATA1+
4. GROUND 8. GROUND
3.5 Power Button Switch
• CN6 : 2 Pin(Pin5 & Pin7) Power Button Switch
2 4 6 8 10 12
1 3 5 7 9 11
PIN DESCRIPTION
5 ATX SW Pin1
7 ATX SW Pin2
3.6 Serial Ports
The WAFER-C800EV/E667EV Series board offers one high
speed NS16C550 compatible UART’s with 16-byte
Read/Receive FIFO serial ports.
• P4 : Serial Port 9-pin D-Type Connector
PIN DESCRIPTION
1 DATA CARRIER DETECT (DCD)
2 RECEIVE DATA (RXD)
3 TRANSMIT DATA (TXD)
4 DATA TERMINAL READY (DTR)
5 GROUND (GND)
6 DATA SET READY (DSR)
7 REQUEST TO SEND (RTS)
16
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8 CLEAR TO SEND (CTS)
9 RING INDICATOR (RI)
3.7 Keyboard/Mouse Connector
The WAFER-C800EV/E667EV Series has a 6-pin DIN
keyboard/mouse connector and a 5-pin keyboard connector.
• P5 : 6-pin DIN Keyboard/Mouse Connector
PIN DESCRIPTION
1 KEYBOARD DATA
2 MOUSE DATA
3 GROUND
4 +5V
5 KEYBOARD CLOCK
6 MOUSE CLOCK
3.8 IrDA Infrared Interface Port
(Option)
The WAFER-C800EV/E667EV Series single board computer
comes with an integrated IrDA port which supports either a
Fast Infrared(FIR) interface.
• CN11 : IrDA connector
1 2 3 4 5
PIN DESCRIPTION
1 VCC
2 IR-RX2
3 IR-RX
4 Ground
5 IR-TX
17
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3.9 Fan Connector
The WAFER-C800EV/E667EV Series also has a CPU with
cooling fan connector and chassis fan connector, which can
supply 12V/500mA to the cooling fan. There is a “rotation” pin
in the fan connector, which transfers the fan’s rotation signal
to the system BIOS in order to recognize the fan speed.
Please note that only specific fans offer a rotation signal.
• FAN1 : CPU Fan Connector
1 2 3
PIN DESCRIPTION
1 Ground
2 +12V
3 Rotation Signal
3.10 VGA Connector
• P1 : 15-pin Female Connector
PIN DESCRIPTION PIN DESCRIPTION
1 RED 2 GREEN
3 BLUE 4 NC
5 GROUND 6 GROUND
7 GROUND 8 GROUND
The WAFER-C800EV/E667EV Series is equipped with one
standard power connector.
• CN1: 4-pin Connector
1 2 3 4
PIN DESCRIPTION
1 +12V
2 GND
3 GND
4 +5V
3.12 External Switches and Indicators
There are several external switches and indicators for
monitoring and controlling your CPU board. All functions are in
the CN4 connector.
• CN6 Pin Assignment and Functions :
2 4 6 8 10 12
1 3 5 7 9 11
FUNCTION PIN DESCRIPTION
SPEAKER
2 SPK
SIGNAL
4 Buzzer-
Jump
for
Buzzer
6 NC
8 VCC
19
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RESET
10 RESET
12 GROUND
9 IDE_LED+ HDD LED
11 IDE_LED-
1 LED+ POWER LED
3 LED-(GROUND)
5 GROUND PS On SW
7 PSON
3.13 PS-ON Connector
This connector is used to control the ATX power supply.
• CN2 : PS-ON Connector
1 2 3
PIN DESCRIPTION
1 Ground
2 PS-ON
3 +5V Standby
3.14 LAN RJ45 Connector
The WAFER-C800EV/E667EV Series board is equipped with
Ethernet Controllers 10/100Mbps, which are connected to the
LAN via an RJ45 LAN connector. The pin assignments are as
follows:
The WAFER-C800EV/E667EV Series board is equipped with
TFT LCD (50pin 2.0mm) Controllers, which are connected to
the LCD via an CN3 connector. The pin assignments are as
follows:
This chapter discusses the Setup program built into the BIOS.
which allows users to configure the system. This
configuration is then stored in battery-backed CMOS RAM so
that Setup information is retained whilst the power is off.
4.2 Starting Setup
The BIOS is immediately active when you turn on the
computer. While the BIOS is activated, the Setup program can
be entered in one of two ways:
1. By pressing <Del> immediately after switching the system
on, or
2. By pressing the <Del> key when the following message
appears briefly at the bottom of the screen during the
POST (Power On Self-Test).
Press DEL to run SETUP.
23
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4.3 Setup Summary
The following is a summary of BIOS setup menu.
Standard CMOS Setup:
Standard CMOS Setup to change time, date, hard disk type,
etc.
Advanced CMOS Setup:
Advanced CMOS Setup to configure system options.
Advanced Chipset Setup:
Advanced Chipset Setup to configure chipset features.
Power Management Setup:
Power Management Setup to configure power management
features.
PCI / Plug and Play Setup:
Configures PCI / Plug and Play features.
Peripheral Setup:
Configures peripheral features.
Hardware Monitor Setup:
Configures hardware monitor features.
Auto-Detect Hard Disks:
Selecting these options allow the user to configure the drive
named in the option. Select Auto-Detect Hard Disks to allow
AMIBIOS to automatically configure the drive. A list of drive
parameters the appears on the screen.
Change User Password:
Change the user password.
24
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Change Supervisor Password:
Change the supervisor password.
Auto Configuration with Optimal Settings:
Load configuration settings that ensure the highest
performance.
Auto Configuration with Fail Safe Settings:
Load fails-safe configuration settings.
Save Settings and Exit:
Write the current settings to CMOS and exit.
Exit Without Saving:
Exit without saving the current settings.
25
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4.4 Main Menu Selections
AMIBIOS HIFLEX SETUP UTILITY – VERSION 1.52
(C)2001 American Megatrends, Inc. All Rights Reserved
Standard CMOS Setup
Advanced CMOS Setup
Advanced Chipset Setup
Power Management Setup
PCI / Plug and Play Setup
Peripheral Setup
Hardware Monitor Setup
Auto-Detect Hard Disks
Change User Password
Change Supervisor Password
Auto Configuration with Optimal Settings
Auto Configuration with Fail Safe Settings
Save Settings and Exit
Exit Without Saving
Standard CMOS Setup for changing time, date, hard disk type, etc.
ESC:Exit ↑↓:Sel F2/F3:Color F10:Save & Exit
Figure 1: The Main Menu
4.5 Standard CMOS Setup Selections
AMIBIOS SETUP – STANDARD CMOS SETUP
Date (mm/dd/yyyy): Tue Mar 19,2002 Base Memory: 639 KB
Time (hh/mm/ss) : 17:18:10 Extd Memory: 247 MB
Floppy Drive A: Not Installed
Floppy Drive B: Not Installed
LBA Blk PIO 32Bit
Type Size Cyln Head WPcom Sec Mode Mode Mode Mode
Pri Master: Auto On
Pri Slave : Auto On
Sec Master: Auto On
Sec Slave : Auto On
Boot Sector Virus Protection Disabled
Month: Jan – Dec ESC:Exit ↑↓:Sel
Day: 01 – 31 PgUp/PgDn:Modify
Year: 1980 – 2099 F1:Help F2/F3:Color
(C)2001 American Megatrends, Inc. All Rights Reserved
Figure 2:Standard CMOS Setup
26
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Floppy A, B
Move the cursor to these fields and select the floppy type.
Primary/Secondary Master/Slave LBA Mode
LBA(Logical Block Addressing) is a new IDE HDD access
method to developed to overcome the 528-megabyte capacity
bottleneck. If your IDE hard disk capacity is greater than
528MB, AMIBIOS can enable this LBA mode feature. The
option is only for Primary Master IDE LBA mode.
Primary/Secondary Master/Slave Block Mode
If your hard disk drive supports IDE block transfer mode,
enable this option for a faster IDE hard disk drive transfer rate.
The option is only for Primary Master Block mode.
Primary/Secondary Master/Slave PIO Mode
This option enables Primary Master IDE PIO mode on the IDE,
which can set proper cycle timings. The cycle timing between
the IDE PIO mode value and IDE cycle timing is shown below :
This option enables Primary Master IDE 32-bit data transfers
on the IDE data port. If disabled,16-bit data transfer is used
by the BIOS.32-bit data transfers can only be enabled if IDE
prefetch mode is also enabled.
Boot Sector Virus Protection
When this option is enabled, AMIBIOS issues a warning when
any program or virus issues a Disk Format command or
attempts to write to the boot sector of the hard disk drive.
The Choice: Disabled, Enabled
27
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4.6 Advanced CMOS Setup Selections
AMIBIOS SETUP – ADVANCED CMOS SETUP
Quick Boot
1st Boot Device
2nt Boot Device
3rd Boot Device
Try Other Boot Devices
S.M.A.R.T. for Hard Disks
BootUP Num-Lock
Floppy Drive Swap
Floppy Drive Seek
PS/2 Mouse Support
System Keyboard
Primary Display
Boot To OS/2
Wait For ‘F1’ If Error
Hit ‘DEL’ Message Display
CPU MicroCode Updation
L1 Cache
L2 Cache
System BIOS Cacheabled
C000 32K Shadow
S.M.A.R.T. for Hard Disks
Self-Monitoring, Analysis and Reporting Technology. This
option can help the BIOS to warn the user of a possible
device failure and give the user a chance to back up the
device before the failure actually happens.
(C)2001 American Megatrends, Inc. All Rights Reserved
Enabled
Disabled
Disabled
Disabled
Yes
Disabled
On
Disabled
Disabled
Enabled
Present
VGA/EGA
No
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Cached
Set this option to Yes to instruct AMIBIOS to attempt to boot
from any other drive in the system if it cannot find a boot
drive among the drives specified in the 1st Boot Device, 2nd
Boot Device, 3rd Boot Device, 4th Boot Device options.
The Choice: Yes or No
BootUp Num-Lock
When this option is selected, Num Lock is turned off when the
system is powered on so the user can use the arrow keys on
both the numeric keypad and the keyboard.
29
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PS/2 Mouse Support
When this option is enabled, BIOS supports a PS/2- type
mouse.
System Keyboard
This option does not specify if a keyboard is attached to the
computer. Rather, it specifies if error messages are displayed
if a keyboard is not attached. This option permits you to
configure workstation with no keyboard.
The Choice: Absent, Present
Primary Display
Select this option to configure the type of monitor attached to
the computer.
The Choice: Monochrome, Color 40x25,Color 80x25,
VGA/PGA/EGA, or Not Install.
Boot To OS/2
Set this option to Enabled if running OS/2 operating system
and using more than 64MB of system memory on the
motherboard.
The Choice: Disabled or Enabled
Wait For 'F1' If Error
If this option is enabled, AMIBIOS waits for the end user to
press <F1> before continuing. If this option is disabled,
AMIBIOS continues the boot process without waiting for <F1>
to be pressed.
The Choice: Disabled or Enabled
30
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Hit 'DEL' Message Display
Disabling this option prevents "Hit <DEL> if you want to run
Setup" from appearing when the system boots.
The Choice: Disabled or Enabled
System BIOS Cacheable
When this option is set to enabled, the System ROM area from
F0000-FFFFF is copied (shadowed) to the RAM for faster
execution.
When this option is set to enabled, the Video ROM area from
C0000-C7FFF is copied (shadowed) to the RAM for faster
execution.
Disabled: The contents of the video ROM are not copied
to the RAM.
Figure 4: Advance CMOS Setup
31
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Cached: The contents of the video ROM area from
C0000h - C7FFFh are copied from the ROM to
the RAM and can be written to or read from
the cache memory.
Enabled: The contents of the video ROM area from
C0000h - C7FFFh are copied (shadowed) from
the ROM to the RAM for faster execution.
C800, CC00, D000, D400, D800, DC00,16k Shadow
These options enable shadowing of the contents of the ROM
area named in the option title. The settings are Enable Disable,
Cached. The ROM area that is not used by ISA adapter cards
will be allocated to PCI adapter cards.
32
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4.7 Advanced Chipset Setup Selections
AMIBIOS SETUP – ADVANCED CHIPSET SETUP
CPU FSB
CPU Ratio
***** DRAM Timing *****
Configure SDRAM Timing by SPD
DRAM Frequency
SDRAM CAS# Latency
Memory Hole
AGP Mode
AGP Read Synchronization
AGP Fast Write
AGP Aperture Size
AGP Master 1 W/S Write
AGP Master 1 W/S Read
USB Controller
USB Device Legacy Support
Port 64/60 Emulation
(C)2001 American Megatrends, Inc. All Rights Reserved
Auto
Auto
Disabled
133Mhz
3
Disabled
4x
Enabled
Disabled
64MB
Disabled
Disabled
All USB Port
Disabled
Disabled
ACPI Aware O/S
ACPI Standby State
Re-Call VGA BIOS at S3 Resuming
Power Management/APM
Video Power Down Mode
Hard Disk Power Down Mode
Standby Time Out (Minute)
Suspend Time Out (Minute)
Throttle Slow Clock Ratio
Display Activity
IRQ3
IRQ4
IRQ5
IRQ7
IRQ9
IRQ10
IRQ11
IRQ13
IRQ14
IRQ15
(C)2001 American Megatrends, Inc. All Rights Reserved
If enabled, BIOS will configure only PnP ISA boot devices(i.e.
all PnP ISA cards which have boot flag set). And PnP aware OS
will configure all other devices. If disabled, BIOS will configure
all devices.
DMA Channel 0, 1, 3, 5, 6, 7
The option allow the user to specify the bus type used by each
DMA channel.
The Choice: PnP or ISA/EISA
IRQ3, 4, 5, 7, 9, 10, 11, 14, 15
The option specifies the bus that the specified IRQ line is used
on. The user can reserve IRQs for legacy ISA adapter cards
whilst determining if AMIBIOS should remove an IRQ from
the pool of available IRQs passed to devices that are
configurable by the system BIOS. The available IRQ pool is
determined by reading the ESCD NVRAM. If more IRQs need
to be removed from the pool, the user can optionally reserve
the IRQ by assigning an ISA setting to it. Onboard I/O is
configured by AMIBIOS. All IRQs used by onboard I/O are
configured as PCI/PnP.
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4.10 Peripheral Setup Selections
OnBoard FDC
OnBoard Serial Port1
OnBoard FIR Port
FIR IRQ Select
FIR DMA1 Select
FIR Single DMA Channel
FIR DMA2 Select
OnBoard Parallel Port
Paralled Port Mode
EPP Version
Parallel Port DMA
Parallel Port IRQ
OmBoard IDE
OnBoard LAN
OnBoard LAN P.M.E
OnBoard AC’97 Audio
(C)2001 American Megatrends, Inc. All Rights Reserved
AMIBIOS SETUP – PERIPHERAL SETUP
Enabled
3F8/COM1
Disabled
N/A
N/A
N/A
N/A
378
Normal
N/A
N/A
7
Both
Enabled
Enabled
Enabled
This option specifies the base I/O port address of the parallel
port on the motherboard.
The Choice: Disabled, 378h, 278h, or 3BCh
Parallel Port Mode
This option specifies the parallel port mode. The settings are
Normal, Bi-Dir, ECP, EPP.
Normal : The normal parallel port mode is used.
Bi-Dir : Use this setting to support bi-directional
transfers on the parallel port.
EPP : The parallel port can be used with devices that
adhere to Enhanced Parallel Port(EPP)
specifications. EPP uses the existing parallel
port signals to provide asymmetric bidirectional data transfer driven by the host
device.
38
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ECP : The parallel port can be used with devices that
adhere to Extended Capabilities Port (ECP)
specifications. ECP uses the DMA protocol to
achieve data transfer rates of up to 2.5
Megabits per second, and provides symmetric
bi-directional communication.
Parallel Port IRQ
This option specifies the IRQ used by the parallel port.
The Choice: (IRQ)5, (IRQ)7
Parallel Port DMA Channel
This option is only available if the setting for the Parallel Port
Mode option is set to ECP. It sets the DMA channel used by
the parallel port.
The Choice: DMA Channel 0, 1, or 3
39
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4.11 Hardware Monitor Setup
Selections
AMIBIOS SETUP – HARDWARE MONITOR SETUP
─=≣System Hardware Monitor≣=─
System Temperature
CPU Fan Speed
Vcore
+ 2.500V
+ 5.000V
+12.000V
(C)2001 American Megatrends, Inc. All Rights Reserved
0F0 Clear Math Coprocessor Busy
0F1 Reset Math Coprocessor
0F2 Core logic programming configuration
0F8-0FF Math Coprocessor
1F0-1F8 Fixed Disk
200-207 Game I/O
278-27F Parallel Printer Port 2 (LPT3)
2E8-2EF Serial Port 4
2F8-2FF Serial Port 2
300-31F Prototype Card
360-36F Reserved
378-37F Parallel Printer Port 1 (LPT2)
3B0-3BF Monochrome Display and Printer Adapter
3C0-3CF Reserved
3D0-3DF Color/Graphics Monitor Adapter
3E8-3EF Serial Port 3
3F0-3F7 Diskette Controller
3F8-3FF Serial Port 1
Description
(LPT1)
41
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1st MB Memory Address Map
Memory address Description
00000-9FFFF System memory
A0000-BFFFF VGA buffer
C0000-C7FFF VGA BIOS
F0000-FFFFF System BIOS
1000000- Extend BIOS
*Default setting
IRQ Mapping Table
IRQ0 System Timer IRQ8 RTC clock
IRQ1 Keyboard IRQ9 Available
IRQ2 Cascade to IRQ Controller IRQ10 Available
IRQ3 COM2 IRQ11 Available
IRQ4 COM1 IRQ12 PS2 mouse
IRQ5 Available IRQ13 FPU
IRQ6 FDC IRQ14 Primary IDE
IRQ7 Printer IRQ15 Secondary IDE
DMA Channel Assignments
Channel Function
0 Available
1 Available
2 Floppy disk ( 8-bit transfer )
3 Available
4 Cascade for DMA controller 1
5 Available
6 Available
7 Available
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Appendix B.
How to use the Wake-Up Function
The WAFER-C800EV/E667EV Series provides two kind of Wake
Up Function. This page describes how to use the Modem
Wake-Up and LAN Wake-Up functions. Note that Wake-Up
function works whilst using ATX power supply,
Wake-Up By Modem Ring On:
In CMOS SETUP, the user must set the option Wake Up On LAN/Ring to enabled. The ATX power supply will be switched
on when there is a ring signal detected on the pin “RI” of the
serial port.
Wake-Up On LAN:
In CMOS SETUP, the user must set the option Wake Up On LAN/Ring to enabled. When the computer is in power-down
status, a LAN Link/Active LED is flashing. This status indicates
that the LAN chip has entered standby mode and is waiting for
a Wake-Up signal. You can use other computers to wake up
your computer by sending ID to it.
: ID is the address of your system LAN. Every LAN chip has
ID
a factory- set ID which you can find it from network
information in WINDOWS.
ID’s format is XXXXXXXXXX
Example ID: 009027388320
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Appendix C.
CN3 Flat Panel Data Mapping
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