ICP PCISA-C800EV User Manual

PCISA-C800EV

®

VIA

C3 Processor CPU Board with

Contents

1. Introduction...........................................................5

10/100Mb LAN & VGA

Ver1.0

Manual Revision 1.0

Mar 17, 2002

@Copyright 2001
All Rights Reserved.
Manual first edition Jan 14, 2001
The information in this document is subject to change without prior
notice in order to improve reliability, design and function and does
not represent a commitment on the part of the manufacturer.
In no event will the manufacturer be liable for direct, indirect, special,
incidental, or consequential damages arising out of the use or
inability to use the product or documentation, even if advised of the
possibility of such damages.
This document contains proprietary information protected by
copyright. All rights are reserved. No part of this manual may be
reproduced by any mechanical, electronic, or other means in any
form without prior written permission of the manufacturer.

Trademarks

PCISA-C800EV is a registered trademark of ICP Electronics Inc.,
IBM PC is a registered trademark of International Business
Machines Corporation. Intel is a registered trademark of Intel
Corporation. AMI is a registered trademark of American Megatrends
Inc. , Other product names mentioned herein are used for
identification purposes only and may be trademarks and/or registered
trademarks of their respective companies.

1.1 Specifications ..............................................................................6

1.2 PCISA-C800EV package Contents...............................................7

2. Installation ............................................................8

2.1 Layout Diagram & Dimensions.....................................................9

2.2 Clear CMOS Setup ....................................................................11

2.3 Compact Flash Master/Slave Setting..........................................11

2.4 Buzzer Function Setting .............................................................11

2.5 DiskOnChip

2.6 COM2 RS232 or RS422/485 Selection ......................................12

™ Setting...............................................................12

3. Connection .........................................................13

3.1 Floppy Disk Drive Connector......................................................13

3.2 PCI E-IDE Disk Drive Connector ................................................14

3.3 Parallel Port...............................................................................15

3.4 USB Port Connectors.................................................................16

3.5 Power Button Switch..................................................................16

3.6 Serial Ports................................................................................17

3.7 Keyboard/Mouse Connector.......................................................17

3.8 IrDA Infrared Interface Port .......................................................18

3.9 Fan Connector ..........................................................................19

3.10 VGA Connector..........................................................................19

3.11 Power Connector ......................................................................20

1

2

3.12 External Switches and Indicators ...............................................21

3.13 PS-ON Connector .....................................................................21

3.14 LAN RJ45 Connectors ...............................................................22

3.15 External LED Connector ............................................................22

3.16 Compact Flash Storage Card Socket ........................................23

Appendix A. Watch Dog Timer...............................40

Appendix B. E

2

Key™ Function..............................42

Appendix C. Address Mapping ...............................43

3.17 Audio Connectors .....................................................................24

3.18 RS422/485 Connectors .............................................................24

4. BIOS Setup.........................................................25

4.1 Introduction................................................................................25

4.2 Starting Setup............................................................................25

4.3 Setup Summary.........................................................................26

4.4 Main Menu.................................................................................27

4.5 Standard CMOS Setup ..............................................................27

4.6 Advanced CMOS Setup ............................................................29

4.7 Advanced Chipset Setup............................................................32

4.8 Power Management Setup ........................................................33

4.9 PCI / Plug and Play Setup .........................................................35

4.10 Peripheral Setup .......................................................................37

4.11 Hardware Monitor .....................................................................38

Appendix D. ATX Power Supply .............................45

Appendix E. How to use Wake Up Function ..........47

3

4

1

Introduction

The PCISA-C800EV ATX/AT main board is a high­performance computer mainboard based on the VIA
PLE133 VT8601A and VT82C686B chipset. It is designed for

®

C3 processor, making it ideal for cost-effectiv e CPU

VIA
board markets.

The VIA

system logic north bridge with the addition of 133 MHz
capability for both the CPU and SDRAM interfaces. VIA
Apollo PLE133 may be used to implement both desktop and
notebook personal computer systems from 100MHz to 133MHz
based on C3 (EBGA packing). The primary features of the

®

VIA
Side Bus) Interface (100 / 133MHz), SDRAM Memory Interface
(100 / 133MHz), 32-bit PCI with Integrated 2D / 3D graphics
accelerator.

The VT82C686B PSIPC (PCI Super-I/O Integrated

Peripheral Controller) is a high integration, high performance,
power-efficient, and high compatibility device that supports
both Intel and non-Intel based processors to PCI bus bridge
functionality, ensuring a complete Microsoft PC99-compliant
PCI/ISA system.

®

Apollo PLE133 (VT8601A) is a VIA® C3 processor

Apollo PLE133-North Bridge are: VIA® C3 CPU (Front

®

Apollo

®

1.1 Specifications :

VIA® C3 EBGA packing (FSB: Supports 100/133MHz)

•

Bus: PICMG Bus(Support PCI Master x 4)

•

DMA channels: 7

•

Interrupt levels: 15

•

Chipset: VIA® VT8601A (Integrated 2D / 3D graphics accelerator.)

•

& VT82C686B

RAM memory: Two 168-pin DIMM sockets . Maximum memory is

•

512MB.

Ultra ATA/33/66/100 IDE Interface : Two PCI Enhance IDE hard

•

drives. The south bridge VT82C686B supports Ultra
ATA/33/66/100 IDE interface.

Floppy disk drive interface : Supports 2.88 MB, 1.44MB, 1.2MB,

•

720KB, or 360KB floppy disk drive.

Two high speed Series ports : NS16C550 compatible UART’s

•

Bi-directional Parallel Port : IEEE1284 compatible

•

IrDA port : Supports Serial Infrared(SIR) and Amplitude Shift

•

Keyed IR(ASKIR) interface.

USB port : Equipped with four USB ports for future expansion.

•

Intel 82559 or REALTEK RTL8100 Fast Ethernet Multifunction PCI

•

Controller : IEEE 802.3u Auto-Negotiation support for 10BASE­T/100BASE-TX standard. Fast back-to-back transmission support with
minimum interframe spacing. Connected to your LAN via RJ45 connector.

Keyboard connector & PS/2 Mouse Port on-board

•

5

Power Consumption : +5VSB @ 180mA, +5V @ 3.8A, +12V @

•

170mA (C3-800MHz with 512MB SDRAM x 2, Windows2000 )

Operating Temperature : 0° ~ 55° C ( CPU needs Cooler)

•

6

1.2 PCISA-C800EV package contents

In addition to this
includes the following items:

PCISA-C800EV Single Board Computer x1

•

IDE HDD Cable x 1

•

FDD Cable x 1

•

RS-232/Print Cable x 1

•

Y Cable x 1

•

Audio Cable x 1

•

RS-422/485 Cable x 1

•

CD-ROM Driver x 1

•

If any of these items are missing or damaged, please contact
the dealer from whom you purchased the product. Be sure to
save the shipping materials and carton in case you want to
ship or store the product in the future.

User's Manual

, the PCISA-C800EV package

2

Installation

This chapter describes how to install the PCISA-C800EV. First
a layout diagram of the PCISA-C800EV is shown, followed by
unpacking information that should be carefully followed. The
jumpers and switch settings for the PCISA-C800EV
configuration, such as CPU type selection, system clock
setting, and watchdog timer, are also listed.

7

8

2.1 Layout Diagram & Dimensions

JFAN2

IDE2

CN10

IDE1

FDD1

JP3

U10

BIOS C3

BAT1

JBAT1

CN5

CN9

PSON

JP5

J1

U3

JP2

CPU

JFAN1

U2

CN2

CN4

DIMM1

PRN1

U21

DOC

CN13

CN3

U14

CN1

P1

P2 P3

9

COM1

CD_IN1

CN8

USB1

COM2

USB2

10

2.2 Clear CMOS Setup

To clear the CMOS Setup (for example if you have forgotten
the password, you should clear the CMOS and then re-set the
password), you should close the JBAT1 (2-3) for about 3
seconds, then open it once more. This will set back to normal
operation mode.

JBAT1 : Clear CMOS Setup

•

 {

{

1 2 3

JBAT1 DESCRIPTION

1-2

(default)*

Keep CMOS Setup
(Normal Operation)

Short 2-3 Clear CMOS Setup

2.3 Compact Flash Card Master/Slave Mode Setting

The Compact Flash socket is type II, and uses IDE 2.

JP3 : Master/Slave Mode Setting

•

2

{

1



JP3 DESCRIPTION

SHORT * MASTER

OPEN SLAVE

2.5 DiskOnChip™ Flash Disk Memory Address setting

The DiskOnChip™ Flash Disk Chip (DOC) is produced by M­Systems. Because the DOC is 100% compatible with the hard disk,
no extra software utilities are required. It is, in other words, “plug
and play” - easy and reliable. At the present time, the DOC is
available with between 2MB and 144MB.The MD-2200-Xmb

series DOC will share only 8KB memory address.

JP2: DiskOnChip Memory Address Settings

•

2 4 6 8 10 12 14

{ { { { { {
 { { { { {

{
{

1 3 5 7 9 11 13

ADDRESS 1-2 3-4 5-6 7-8 9-10 11-12 13-14

CC000 OPEN OPEN CLOSE OPEN OPEN CLOSE CLOSE

CE000 OPEN OPEN OPEN CLOSE OPEN CLOSE CLOSE

D0000 CLOSE OPEN OPEN OPEN CLOSE OPEN CLOSE

D2000 OPEN CLOSE OPEN OPEN CLOSE OPEN CLOSE

D4000 OPEN OPEN CLOSE OPEN CLOSE OPEN CLOSE

D6000 OPEN OPEN OPEN CLOSE CLOSE OPEN CLOSE

D8000 CLOSE OPEN OPEN OPEN OPEN OPEN CLOSE

DA000 OPEN CLOSE OPEN OPEN OPEN OPEN CLOSE

DC000 OPEN OPEN CLOSE OPEN OPEN OPEN CLOSE

DE000 OPEN OPEN OPEN CLOSE OPEN OPEN CLOSE

2.6 COM2 RS232 or RS422/485 Selection

2.4 Buzzer Function Setting

2 4 6 8 10 12

1 3 5 7 9 11

CN4(2-4) : Enabled/Disabled Onboard Buzzer Function

•

{ { { { {
 { { { {

{
{

2 - 4 DESCRIPTION

SHORT * Enabled

OPEN Disabled

11

JP5 : COM2 RS232 or RS422/485 Selection

•

JP5 DESCRIPTION

1-2 Short RS232
2-3 Short RS422/485

Caution: If RS422/485 is in use, the COM2 on the main

board would be disable.

12

3

Connection

This chapter describes how to connect peripherals, switches
and indicators to the PCISA-C800EV board.

3.1 Floppy Disk Drive Connector

PCISA-C800EV board is equipped with a 34-pin daisy-chain
driver connector cable.

2 4 6 … 30 32 34

1 3 5 … 29 31 33

FDD1 : FDC CONNECTOR

•

{ { { … { { {
 { { … { { {

PIN DESCRIPTION PIN DESCRIPTION

1 GROUND 2 REDUCE WRITE
3 GROUND 4 N/C
5 GROUND 6 N/C
7 GROUND 8 INDEX#

9 GROUND 10 MOTOR ENABLE A#
11 GROUND 12 DRIVE SELECT B#
13 GROUND 14 DRIVE SELECT A#
15 GROUND 16 MOTOR ENABLE B#
17 GROUND 18 DIRECTION#
19 GROUND 20 STEP#
21 GROUND 22 WRITE DATA#
23 GROUND 24 WRITE GATE#
25 GROUND 26 TRACK 0#
27 GROUND 28 WRITE PROTECT#
29 N/C 30 READ DATA#
31 GROUND 32 SIDE 1 SELECT#
33 N/C 34 DISK CHANGE#

3.2 PCI E-IDE Disk Drive Connector

You can attach up to four IDE( Integrated Device Electronics)
devices.

IDE1 : Primary IDE Connector
IDE2 : Secondary IDE Connector

IDE1 / IDE2 : IDE Interface Connector

•

2 4 6 … 36 38 40

{ { { … { {
 { { … { {

1 3 5 … 35 37 39

PIN DESCRIPTION PIN DESCRIPTION

1 RESET# 2 GROUND
3 DATA 7 4 DATA 8
5 DATA 6 6 DATA 9
7 DATA 5 8 DATA 10

9 DATA 4 10 DATA 11
11 DATA 3 12 DATA 12
13 DATA 2 14 DATA 13
15 DATA 1 16 DATA 14
17 DATA 0 18 DATA 15
19 GROUND 20 N/C
21 DRQ 22 GROUND
23 IOW# 24 GROUND
25 IOR# 26 GROUND
27 CHRDY 28 REV. PULL LOW
29 DACK 30 GROUND-DEFAULT
31 INTERRUPT 32 N/C
33 SA1 34 N/C
35 SA0 36 SA2
37 HDC CS0# 38 HDC CS1#
39 HDD ACTIVE# 40 GROUND

{
{

13

14

3.3 Parallel Port

Usually, a printer is connected to the parallel port. The PCISA-C800EV
includes an on-board parallel port, accessed via a 26-pin flat-cable
connector PRN1.

PRN1 : Parallel Port Connector

•

2 4 6 … 22 24 26

{ { { … { { {
 { { … { { {

1 3 5 … 21 23 25

PIN DESCRIPTION PIN DESCRIPTION

1 STROBE# 2 DATA 0
3 DATA 1 4 DATA 2
5 DATA 3 6 DATA 4
7 DATA 5 8 DATA 6

9 DATA 7 10 ACKNOWLEDGE
11 BUSY 12 PAPER EMPTY
13 PRINTER SELECT 14 AUTO FORM FEED #
15 ERROR# 16 INITIALIZE
17 PRINTER SELECT

LN#
19 GROUND 20 GROUND
21 GROUND 22 GROUND
23 GROUND 24 GROUND
25 GROUND 26 NC

18 GROUND

3.4 USB Port Connectors

The PCISA-C800EV is equipped with two USB(Version. 1.1)
ports for the future new I/O bus expansion.

USB1 / USB2 : 4 ports USB Connector
USB1 / USB2 Pin 8,7,6,5 for PORT 3 / 1
USB1 / USB2 Pin 1,2,3,4 for PORT 2 / 0

2 4 6 8

{ { {
 { {

1 3 5 7

PIN DESCRIPTION PIN DESCRIPTION

1. VCC 2. GROUND

3. DATA1- 4. DATA0+

5. DATA1+ 6. DATA0-

7. GROUND 8. VCC

{
{

3.5 Power Button Switch

CN5 : 2 Pin Power Button Switch

{ 

2 1

PIN DESCRIPTION

2 Power Button
1 Ground

15

16

3.6 Serial Ports

The PCISA-C800EV offers two high speed NS16C550 compatible
UARTs with 16-byte Read/Receive FIFO serial ports.

COM1 / COM2 : Serial Port 10-pin Connector

•

6 7 8 9 10

{ { { { {
 { { { {

1 2 3 4 5

PIN DESCRIPTION

1 DATA CARRIER DETECT (DCD)
2 RECEIVE DATA (RXD)
3 TRANSMIT DATA (TXD)
4 DATA TERMINAL READY (DTR)
5 GROUND (GND)
6 DATA SET READY (DSR)
7 REQUEST TO SEND (RTS)
8 CLEAR TO SEND (CTS)
9 RING INDICATOR (RI)

10 N/C

3.7 Keyboard/Mouse Connector

The PCISA-C800EV has a 6-pin DIN keyboard/mouse
connector and a 5-pin keyboard connector..

P2 : 6-pin DIN Keyboard/Mouse Connector

•

PIN DESCRIPTION

1 KEYBOARD DATA
2 MOUSE DATA
3 GROUND
4 +5V
5 KEYBOARD CLOCK
6 MOUSE CLOCK

CN3 : 5-pin External Keyboard Connector

•

5

{

4

{

3

{

2
1

{



PIN DESCRIPTION

1 KEYBOARD CLOCK
2 KEYBOARD DATA
3 NC
4 GROUND
5 +5V

3.8 IrDA Infrared Interface Port

The PCISA-C800EV comes with an integrated IrDA port which
supports either a Serial Infrared(SIR) or an Amplitude Shift
Keyed IR(ASKIR) interface. When using the IrDA port, please
ensure that COM2 is set in SIR or ASKIR mode in the BIOS’s
Peripheral Setup so that RS-232 mode on COM2 is disabled.

1 2 3 4 5

J1 : IrDA connector

•

 { { { {

PIN DESCRIPTION

1 VCC
2 N/C
3 IR-RX
4 Ground
5 IR-TX

17

18

3.9 Fan Connector

3.11 Power Connector

The PCISA-C800EV also has a CPU with cooling fan
connector and chassis fan connector, which can supply
12V/500mA to the cooling fan. There is a “rotation” pin in the
fan connector, which transfers the fan’s rotation signal to the
system BIOS in order to recognize the fan speed. Please note
that only specific fans offer a rotation signal.

1 2 3

JFAN1 / JFAN2 : CPU / SYS. Fan Connector

•

 { {

PIN DESCRIPTION

1 Ground
2 12V
3 Rotation Signal

3.10 VGA Connector

• P3 : 15-pin Female Connector
PIN DESCRIPTION PIN DESCRIPTION

1 RED 2 GREEN
3 BLUE 4 NC
5 GROUND 6 GROUND
7 GROUND 8 GROUND

9 VCC / NC 10 GROUND
11 NC 12 DDC DAT
13 HSYNC 14 VSYNC
15 DDCCLK

The PCISA-C800EV/EVF/EV is equipped with one standard power
connector

CN10: 4-pin Connector

•

 { {

1 2 3 4

PIN DESCRIPTION

1 +12V
2 NC
3 GND
4 +5V

{

19

20

3.12 External Switches and Indicators

3.14 LAN RJ45 Connector

There are several external switches and indicators for
monitoring and controlling your CPU board. All functions are in
the CN4 connector.

CN4 Pin Assignment and Functions :

11 9 7 5 3 1

{ { { { { 
{ { { { { {

12 10 8 6 4 2

FUNCTION PIN DESCRIPTION

SPEAKER

LED

2 SPK

4 Buzzer­6 NC

8 VCC
10 RESET RESET
12 GROUND

9 IDE_LED+ HDD LED
11 IDE_LED-

1 LED+ POWER

3 LED-(GROUND)

5 GROUND Reserved

7 NC

3.13 PS-ON Connector

SIGNAL

Jump

for

Buzzer

The PCISA-C800EV is equipped with dual Ethernet Controllers (Intel
82559 10/100Mbps, which are connected to the LAN via an RJ45
LAN connector. The pin assignments are as follows:

• P1 LAN1 RJ45 Connector (10/100)

PIN DESCRIPTION PIN DESCRIPTION

1 TX+ 7 N/C
2 TX- 8 N/C
3 RX+ 9 Speed +
4 N/C 10 Speed ­5 N/C 11 Active/LINK +
6 RX- 12 Active/LINK -

3.15 External LED Connector

The LED connector includes Ethernet Link/Active LED, Ethernet
speed LED.

CN1 External LED Connector

1 2

 {
{ {

3 4

LED - LED + LED Function

1 2 LAN LINK LED
3 4 LAN Speed LED

This connector is used to control the ATX power supply.

3 2 1

CN9 : PS-ON Connector (refer to Appendix D for details )

•

{ { 

PIN DESCRIPTION

1 Ground
2 PS-ON
3 +5V Standby

21

22

3.16 Compact Flash Storage Card Socket

3.17 Audio Connectors

The PCISA-C800EV includes a slot for a Compact Flash
Storage Card in IDE Mode(Using IDE 2).

CN2 : Compact Flash Storage Card Socket pin

•

assignment

PIN DESCRIPTION PIN DESCRIPTION

1 GROUND 26 CARD DETECT1
2 D3 27 D11
3 D4 28 D12
4 D5 29 D13
5 D6 30 D14
6 D7 31 D15
7 CS1# 32 CS3#
8 N/C 33 N/C

9 GROUND 34 IOR#
10 N/C 35 IOW#
11 N/C 36 OBLIGATORY

TO PULL HIGH
12 N/C 37 IRQ15
13 VCC 38 VCC
14 N/C 39 MASTER/SLAVE
15 N/C 40 N/C
16 N/C 41 RESET#
17 N/C 42 IORDY
18 A2 43 N/C
19 A1 44 OBLIGATORY

TO PULL HIGH
20 A0 45 ACTIVE#
21 D0 46 PDIAG#
22 D1 47 D8
23 D2 48 D9
24 N/C 49 D10
25 CARD

50 GROUND

DETECT2

The onboard AC’97 CODEC supports several audio functions.
The audio connectors are described below.

CN8:

2 4 6 8 10 12

{ { { { {
 { { { {

{
{

1 3 5 7 9 11

PIN DESCRIPTION PIN DESCRIPTION

1 EAR OUT (LEFT) 2 EAR OUT (RIGHT)
3 GROUND 4 GROUND
5 LINE OUT (LEFT) 6 LINE OUT (RIGHT)
7 LINE IN (LEFT) 8 LINE IN (RIGHT)
9 GROUND 10 GROUND

11 MIC IN 12 GROUND

CD_IN1:

1



2

{

3

{

4

{

PIN DESCRIPTION

1. CD SIGNAL (LEFT)

2. GROUND

3. GROUND

4. CD SIGNAL (RIGHT)

3.18 RS422/485 Connectors

CN13:

 { { {

1 2 3 4

PIN DESCRIPTION

1. TX2+

2. TX2-

23

24

3. RX2+

4. RX2-

4

BIOS Setup

4.1 Introduction

This chapter discusses the Setup program built into the BIOS. which
allows users to configure the system. This configuration is then stored
in battery-backed CMOS RAM so that Setup information is retained
whilst the power is off.

4.2 Starting Setup

The BIOS is immediately activ e when you turn on the computer. While
the BIOS is activated, the Setup program can be entered in one of two
ways:

1. By pressing <Del> immediately after switching the system on, or

2. by pressing the <Del> key when the following message appears
briefly at the bottom of the screen during the POST (Power On
Self-Test).

Press DEL to run SETUP.

25

26

4.3 Se tup Sum m ar y

Standard CMOS Setup:
Standard CMOS Setup to change time, date, hard disk type, etc.

Advanced CMOS Setup:
Advanced CMOS Setup to configure system options.

Advanced Chipset Setup:
Advanced Chipset Setup to configure chipset features.

Power Management Setup:
Power Management Setup to configure power management features.

PCI / Plug and Play Setup:
Configures PCI / Plug and Play features.

Peripheral Setup:
Configures peripheral features.

Hardware Monitor Setup:
Configures hardware monitor features.

Auto-Detect Hard Disks:
Selecting these options allow the user to configure the drive named in the option. Select
Auto-Detect Hard Disks to allow AMIBIOS to automatically configure the drive. A list of
drive parameters the appears on the screen.

Change User Password:
Change the user password.

Change Supervisor Password:
Change the supervisor password.

Auto Configuration with Optimal Settings:
Load configuration settings that ensure the highest performance.

Auto Configuration with Fail Safe Settings:
Load fails-afe configuration settings.

Save Settings and Exit:
Write the current settings to CMOS and exit.

Exit Without Saving:
Exit without saving the current settings.

4.4 Main Menu Selections

AMIBIOS HIFLEX SETUP UTILITY – VERSION 1.52

(C)2001 American Megatrends, Inc. All Rights Reserved

Standard CMOS Setup

Advanced CMOS Setup

Advanced Chipset Setup
Power Management Setup
PCI / Plug and Play Setup

Hardware Monitor Se tup

Auto-Detect Hard Disks

Change Use r Password

Change Supervisor Password

Auto Configuration with Optimal Settings

Auto Configuration with Fail Safe Settings

Save Settings and Exit

Standard CMOS Setup for changing time, date, hard disk type, etc.

ESC:Exit ↑↓:Sel F2/F3:Color F10:Save & Exit

Peripheral Setup

Exit Without Saving

Figure 1:The Main Menu

4.5 Standard CMOS Setup Selections

AMIBIOS SETUP – STANDARD CMOS SETUP

Date (mm/ dd/yyyy): T ue Mar 19,2002 Base Memory: 639 KB
Time (hh/mm/ss) : 17:18:10 Extd Memory: 247 MB

Floppy Drive A: Not Installed
Floppy Drive B: Not Installed
LBA Blk PIO 32Bit
Type Size Cyln Head WPcom Sec Mode Mode Mode Mode
Pri Master: Auto On
Pri Slave : Auto On
Sec Master: Auto On
Sec Slave : Auto On

Boot Sector Virus Protection Disabled

Month: Jan – Dec ESC:Exit ↑↓:Sel
Day: 01 – 31 PgUp/PgDn:Modify
Year: 1980 – 2099 F1:Help F2/F3:Color

(C)2001 American Megatrends, Inc. All Rights Reserved

Figure 2:Standard CMOS Setup

27

28

Floppy A, B
Move the cursor to these fields and select the floppy type.
Primary/Secondary Master/Slave LBA Mode
LBA(Logical Block Addressing) is a new IDE HDD access method to developed to overcome
the 528-megabyte capacity bottleneck. If your IDE hard disk capacity is greater than 528MB,
AMIBIOS can enable this LBA mode feature. The option is only for Primary Master IDE
LBA mode.

Primary/Secondary Master/Slave Block Mode
If your hard disk drive supports IDE block transfer mode, enable this option for a faster IDE
hard disk drive transfer rate. The option is only for Primary Master Block mode.

Primary/Secondary Master/Slave PIO Mode
This option enables Primary Master IDE PIO mode on the IDE, which can set proper cycle
timings. The cycle timing between the IDE PIO mode value and IDE cycle timing is shown
below :
Mode 0 -> Timing ( 600ns ) Mode 1 -> Timing ( 383ns )
Mode 2 -> Timing ( 240ns ) Mode 3 -> Timing ( 180ns )
Mode 4 -> Timing ( 120ns ) Mode 5 -> Timing ( 60ns )

Primary/Secondary Master/Slave 32Bit Mode
This option enables Primary Master IDE 32-bit data transfers on the IDE data port. If
disabled,16-bit data transfer is used by the BIOS.32-bit data transfers can only be enabled if
IDE prefetch mode is also enabled.

Boot Sector Virus Protection
When this option is enabled, AMIBIOS issues a warning when any program or virus issues a
Disk Format command or attempts to write to the boot sector of the hard disk drive. The
settings are Disabled, Enabled.

4.6 Advanced CMOS Setup Selections

AMIBIOS SETUP – ADVANCED CMOS SETUP

Quick Boot Enabled
1st Boot Device Disabled
2nt Boot Device Disabled
3rd Boot Device Disabled
Try Other Boot Devices Yes
S.M.A.R.T. for Hard Disks Disabled
BootUP Num-Lock On
Floppy Drive Swap Disabled
Floppy Drive Seek Disabled
PS/2 Mouse Support Enabled
System Keyboard Present
Primary Display VGA/EGA
Boot To OS/2 No
Wait For ‘F1’ If Error Enabled
Hit ‘DEL’ Message Display Enabled
CPU MicroCode Updation Enabled
L1 Cache Enabled
L2 Cache Enabled
System BIOS Cacheabled Enabled
C000 32K Shadow Cached

(C)2001 American Megatrends, Inc. All Rights Reserved

Available Options:
Disabled
> Enabled

ESC:Exit ↑↓:Sel
PgUp/PgDn:Modify
F1:Help F2/F3:Color

Figure 3:Advance CMOS Setup
S.M.A.R.T. for Hard Disks
Self-Monitoring, Analysis and Reporting Technology. This option can help the BIOS to warn
the user of a possible device failure and give the user a chance to back up the device before
the failure actually happens.
The settings are Auto, Disabled, Enabled.

Floppy Drive Seek
Set this option to Enabled to specify that floppy drive A: will perform a Seek operation at
system boot. The settings are Enabled or Disabled.

Quick Boot
When Quick Boot is selected, DRAM testing function will be disabled.

1st Boot Device
This option sets the type of device for the first boot drives that the AMIBIOS
attempts to boot from after AMIBIOS POST completes.The settings are Disabled,
IDE-0, IDE-1, IDE-2, IDE-3, Floppy, ARMD-FDD, ARMD-HDD, CDROM, SCSI.

2nd Boot Device
This option sets the type of device for the second boot drives that the AMIBIOS attempts to
boot from after AMIBIOS POST completes.
The settings are Disabled, IDE-0, IDE-1, IDE-2, IDE-3, Floppy, ARMD-FDD, ARMD-HDD,
CDROM.

3rd Boot Device
This option sets the type of device for the third boot drives that the

29

30

AMIBIOS attempts to boot from after AMIBIOS POST completes.
The settings are Disabled, IDE-0, IDE-1, IDE-2, IDE-3, Floppy, ARMD-FDD, ARMD-HDD,
CDROM.

Try Other Boot Devices
Set this option to Yes to instruct AMIBIOS to attempt to boot from any other drive in the
system if it cannot find a boot drive among the drives specified in the 1st Boot Device, 2nd
Boot Device, 3rd Boot Device, 4th Boot Device options. The settings are Yes or No.

BootUp Num-Lock
When this option is selected, Num Lock is turned off when the system is powered on so the
user can use the arrow keys on both the numeric keypad and the keyboard.

PS/2 Mouse Support
When this option is enabled, BIOS supports a PS/2- type mouse.

System Keyboard
This option does not specify if a keyboard is attached to the computer. Rather,it specifies if
error messages are displayed if a keyboard is not attached.This option permits you to
configure workstation with no keyboard. The settings are Absent, Present.

Primary Display
Select this option to configure the type of monitor attached to the computer. The settings are
Monochrome, Color 40x25,Color 80x25,VGA/PGA/EGA, or Not Install.

Boot To OS/2
Set this option to Enabled if running OS/2 operating system and using more than 64MB of
system memory on the motherboard. The settings are Disabled or Enabled.

Wait For 'F1' If Error
If this option is enabled, AMIBIOS waits for the end user to press <F1> before continuing. If
this option is disabled, AMIBIOS continues the boot process without waiting for <F1> to be
pressed. The settings are Disabled or Enabled.

Hit 'DEL' Message Display
Disabling this option prevents "Hit <DEL> if you want to run Setup" from appearing when
the system boots. The settings are Disabled or Enabled.

System BIOS Cacheable
When this option is set to enabled, the System ROM area from F0000-FFFFF is copied
(shadowed) to the RAM for faster execution.

AMIBIOS SETUP – ADVANCED CMOS SETUP

C800 16K Shadow Disabled
CC00 16K Shadow Disabled
D000 16K Shadow Disabled
D400 16K Shadow Disabled
D800 16K Shadow Disabled
DC00 16K Shadow Disabled

(C)2001 American Megatrends, Inc. All Rights Reserved

Available Options:
> Dis abl ed
Enabled
Cached

ESC:Exit ↑↓:Sel
PgUp/PgDn:Modify
F1:Help F2/ F3:Color

Figure 4: Advance CMOS Setup
C000,32k Shadow
When this option is set to enabled, the Video ROM area from C0000-C7FFF is copied
(shadowed) to the RAM for faster execution.
Disabled :The contents of the video ROM are not copied to the RAM.
Cached :The contents of the video ROM area from C0000h - C7FFFh are copied from the
ROM to the RAM and can be written to or read from the cache memory.
Enabled :The contents of the video ROM area from C0000h - C7FFFh are copied
(shadowed) from the ROM to the RAM for faster execution.

C800,16k Shadow
These options enable shadowing of the contents of the ROM area named in the option title.
The settings are Enable Disable, Cached.
The ROM area that is not used by ISA adapter cards will be allocated to PCI adapter cards.

CC00,16k Shadow
These options enable shadowing of the contents of the ROM area named in the option title.
The settings are Enable Disable, Cached.
The ROM area that is not used by ISA adapter cards will be allocated to PCI adapter cards.

D000,16k Shadow
These options enable shadowing of the contents of the ROM area named in the option title.
The settings are Enable Disable, Cached.
The ROM area that is not used by ISA adapter cards will be allocated to PCI adapter cards.

D400,16k Shadow
These options enable shadowing of the contents of the ROM area named in the option title.
The settings are Enable Disable, Cached.
The ROM area that is not used by ISA adapter cards will be allocated to PCI adapter cards.

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D800,16k Shadow
These options enable shadowing of the contents of the ROM area named in the option title.
The settings are Enable Disable, Cached.
The ROM area that is not used by ISA adapter cards will be allocated to PCI adapter cards.

DC00,16k Shadow
These options enable shadowing of the contents of the ROM area named in the option title.
The settings are Enable Disable, Cached.
The ROM area that is not used by ISA adapter cards will be allocated to PCI adapter cards.

4.7 Advanced Chipset Setup Selections

AMIBIOS SETUP – ADVANCED CHIPSET SETUP

******** DRAM Timing ********
Configure SDRAM Timing by SPD Disabled

DRAM Frequency 133Mhz
SDRAM CAS# Latency 3

Memory Hole Disabled
AGP Mode 4x
AGP Read Synchronization Enabled
AGP Fast Write Disabled
AGP Aperture Size 64MB
AGP Master 1 W/S Write Disabled
AGP Master 1 W/S Read Disabled
USB Controller All USB Port
USB Device Legacy Support Disabled
Port 64/60 Emulation Disabled

(C)2001 American Megatrends, Inc. All Rights Reserved

Available Options:
> Disabled
Enabled

ESC:Exit ↑↓:Sel
PgUp/PgDn:Modify
F1:Help F2/F3:Color

Figure 5: Advanced Chipset Setup

4.8 Power Management Setup Selections

AMIBIOS SETUP – POWER MANAGEMENT SETUP

ACPI Aware O/S No
ACPI Standby State S1/POS
Re-Call VGA BIOS at S3 Resuming Enabled
Power Management/APM Enabled
Video Power Down Mode Disabled
Hard Disk Power Down Mode Disabled
Standby Time Out (Minute) Disabled
Suspend Time Out (Minute) Disabled
Throttle Slow Clock Ratio 50%-56.25%
Display Activity Ignore
IRQ3 Monitor
IRQ4 Monitor
IRQ5 Ignore
IRQ7 Monitor
IRQ9 Ignore
IRQ10 Ignore
IRQ11 Ignore
IRQ13 Ignore
IRQ14 Monitor
IRQ15 Ignore

(C)2001 American Megatrends, Inc. All Rights Reserved

Figure 6: Power Management Setup
Power Management/APM
Set this option to Enabled to run APM (Advanced Power Management).

Video Power Down Mode
Set this option to Enabled to allow the BIOS to power down the Video adapter and Monitor.

Hard Disk Power Down Mode
Set this option to Enabled to allow the BIOS to power down the Hard Disk .

Standby/Suspend Time Out (Minutes)
This option specifies the amount of system inactivity (in minutes) before the system will enters
Standby/Suspend state.

Available Options:
> No
Yes

ESC:Exit ↑↓:Sel
PgUp/PgDn:Modify
F1:Help F2/F3:Color

33

34

AMIBIOS SETUP – POWER M ANAGEME NT SETUP

Power Button Function On/Off

Restore on AC/Power Loss Last State
Resume On Ring/LAN Disabled
Resume On LAN Disabled
Resume On RTC Alarm Disabled
RTC Alarm Date 15
RTC Alarm Hour 12
RTC Alarm Minute 30
RTC Alarm Second 30
Power Type Select AT

(C)2001 American Megatrends, Inc. All Rights Reserved

Figure 7: Power Management Setup

Available Options:
> On/Off
Suspend

ESC:Exit ↑↓:Sel
PgUp/PgDn:Modify
F1:Help F2/F3:Color

4.9 PCI / Plug and Play Setup Selections

AMIBIOS SETUP – PCI / PLUG AND PLAY SETUP

Plug and Play Aware O/S No

(C)2001 American Megatrends, Inc. All Rights Reserved

Clear NVRAM No
On Board PCI LAN Controller Enabled
OnChip VGA Frame Buffer Size 8MB
PCI Latency Timer (PCI Clocks) 32
The Vga Card After Bridge No
Primary Graphics Adapter PCI
Primary Graphics Adapter PCI
Allocate IRQ to PCI VGA Yes
PCI Slot1 IRQ Priority Auto
PCI Slot2 IRQ Priority Auto
PCI Slot3 IRQ Priority Auto
PCI Slot4 IRQ Priority Auto
DMA Channel 0 PnP
DMA Channel 1 PnP
DMA Channel 3 PnP
DMA Channel 5 PnP
DMA Channel 6 PnP
DMA Channel 7 PnP
IRQ3 PCI/PnP

Available Options:
No
> Yes

ESC:Exit ↑↓:Sel
PgUp/PgDn:Modify
F1:Help F2/F3:Color

Figure 8: PCI / Plug and Play Setup

AMIBIOS SETUP – PCI / PLUG AND PLAY SETUP

IRQ4 PCI/PnP

(C)2001 American Megatrends, Inc. All Rights Reserved

IRQ5 PCI/PnP
IRQ7 PCI/PnP
IRQ9 PCI/PnP
IRQ10 PCI/PnP
IRQ11 PCI/PnP
IRQ14 PCI/PnP
IRQ15 PCI/PnP

Available Options:
> PnP
ISA/EISA

ESC:Exit ↑↓:Sel
PgUp/PgDn:Modify
F1:Help F2/F3:Color

Figure 9: PCI / Plug and Play Setup

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Plug and Play Aware O/S
If enabled, BIOS will configure only PnP ISA boot devices(i.e. all PnP ISA cards which have
boot flag set). And PnP aware OS will configure all other devices. If disabled, BIOS will
configure all devices.

DMA Channel 0, 1, 3, 5, 6, 7
The option allow the user to specify the bus type used by each DMA channel. The settings are
PnP or ISA/EISA

IRQ3, 4, 5, 7, 9, 10, 11, 14, 15
The option specifies the bus that the specified IRQ line is used on. The user can reserve IRQs
for legacy ISA adapter cards whilst determining if AMIBIOS should remove an IRQ from the
pool of available IRQs passed to devices that are configurable by the system BIOS. The
available IRQ pool is determined by reading the ESCD NVRAM. If more IRQs need to be
removed from the pool, the user can optionally reserve the IRQ by assigning an ISA setting to
it. Onboard I/O is configured by AMIBIOS. All IRQs used by onboard I/O are configured as
PCI/PnP.

4.10 Peripheral Setup Selections

OnBoard FDC Enabled

OnBoard Serial Port1 3F8/COM1
OnBoard Serial Port2 2F8/COM2
Serial Port2 Mode Normal
Duplex Mode N/A
OnBoard Parallel Port 378
Paralled Port Mode ECP
EPP Version N/A
Parallel Port DMA Channel 3
Parallel Port IRQ 7
OmBoard IDE Both
OnBoard AC’97 Audio Enabled

(C)2001 American Megatrends, Inc. All Rights Reserved

On-Board Parallel Port
This option specifies the base I/O port address of the parallel port on the motherboard. The
settings are Disabled, 378h, 278h, or 3BCh.
Parallel Port Mode
This option specifies the parallel port mode. The settings are Normal, Bi-Dir, ECP, EPP.
Normal :
The normal parallel port mode is used.
Bi-Dir :
Use this setting to support bi-directional transfers on the parallel port.
EPP :
The parallel port can be used with devices that adhere to Enhanced Parallel Port(EPP)
specifications. EPP uses the existing parallel port signals to provide asymmetric bi-directional
data transfer driven by the host device.
ECP :
The parallel port can be used with devices that adhere to Extended Capabilities Port (ECP)
specifications. ECP uses the DMA protocol to achieve data transfer rates of up to 2.5
Megabits per second, and provides symmetric bi-directional communication.
Parallel Port IRQ
This option specifies the IRQ used by the parallel port. The settings are (IRQ)5, (IRQ)7.
Parallel Port DMA Channel
This option is only available if the setting for the Parallel Port M ode option is set to ECP. It
sets the DMA channel used by the parallel port. The available settings are DMA Channel 0, 1,
or 3.

AMIBIOS SETUP – PERIPHERAL SETUP

Figure 10: Peripheral Setup

Available Options:
Disabled
> Enabled

ESC:Exit ↑↓:Sel
PgUp/PgDn:Modify
F1:Help F2/F3:Color

37

38

4.11 Hardware Monitor Setup Selections

AMIBIOS SETUP – HARDWARE MONITOR SETUP

―＝≡System Hardware Monitor≡＝―

(C)2001 American Megatrends, Inc. All Rights Reserved

System Temperature 31ºC/87ºF
CPU Temperature 29ºC/84ºF
CPU Fan Speed 6300 RPM
Chassis Fan Speed 0 RPM
Vcore 1.412 V
+ 2.500V 2.625 V
+ 3.300V 3.490 V
+ 5.000V 5.070 V
+12.000V 12.046 V

Figure 11: Hardware Monitor Setup

ESC:Exit ↑↓:Sel
PgUp/PgDn:Modify
F1:Help F2/F3:Color

39

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Appendix A. Watch-Dog Timer

The WatchDog Timer is a device which ensure that standalone
systems can recover from abnormal conditions that cause the system
to crash. These conditions may result from an external EMI or a
software bug. When the system stops working, hardware on the board
will perform a hardware reset (cold boot) to bring the system back to a
functioning state.

Three I/O ports control the operation of WatchDog Timer.

443 (hex) Write Set WatchDog Time period
443 (hex) Read Enable the refresh the Watchdog Timer.
043/843 (hex) Read Disable the Watchdog Timer.

Prior to enabling the Watchdog Timer, the user has to set the time-out
period. The range of the timer is 1 to 255 sec, set in increments of 1
second. The user will need to send the time-out value to the I/O port –
443H, and then enable it by reading data from the same I/O port. This
will activate the timer that will eventually time out and check and
monitor the CPU board. This must be done within the time-out period
that is set by the software, For additional help, please refer to the
example program. Finally, disable the Watchdog timer by reading the
I/O port -843H or 043H - otherwise the system could reset
unconditionally.

Example assembly program:

TIMER_PORT = 443H
TIMER_START = 443H
TIMER_STOP = 843H

;;Initial Timer Counter

MOV DX, TIMER_PO RT
MOV AL, 8 ;;8 seconds
OUT DX, AL
MOV DX, TIMER_START
IN AL, DX. ;;Start counter

W_LOOP:
MOV DX, TIMER_STOP
IN AL, DX
MOV DX, TIMER_START
IN AL, DX ;;Restart counter

;;Add Your Application Here

CMP EXIT_AP, 0
JNE W_LOOP
MOV DX, TIMER_STOP
IN AL, DX

;;Exit AP

A tolerance of at least 5% must be maintained to avoid unknown
routines in the operating system (DOS), such as disk I/O that can be
very time-consuming. Therefore if the time-out period has been set to
10 seconds, the I/O port 443H must be read within 7 seconds

.

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Appendix B. E2 Key™ Function

Appendix C. Address Mapping

The PCISA-C800EV provides an outstanding E2KEY™
function for system integrators. Based on the E

Code, Passwords or Critical Data can be stored in the 1Kbit
EEPROM. Because the EEPROM is non-volatile memory, you
don’t have to worry about losing important data.

The E
configured to 64 words(from 0 to 63). The user can access
(read or write) each word at any time.

When you start to use the E
package. The software utility will include four files as follows,

README.DOC
E2KEY.OBJ
EKEYDEMO.C
EKEYDEMO.EXE.

The E2KEY.OBJ provides two library functions for the user to
integrate in to their application with E

library functions
and compiled in C language. Please check the following
statement, in order to easily implement it.

unsigned int read_e2key(unsigned int address)

/* This function will return the E
address range is from 0 to 63. Return data is one word,16 bits

*/
/* This function will write the given data to the E

certain address. The address range is from 0 to 63. The data
value is from 0 to 0xffff. */
To start using the function, please refer to the included
EKEYDEMO.C code.

2

KEY™ is based on a 1Kbit EEPROM which is

2

KEY™ the utility is already in the

2

KEY™ function. These

(read_e2key and write_e2key)

2

KEY™’s data at address. The

void write_e2key(unsigned int address,unsigned data)

2

KEY™, ID

are written

2

KEY™ at a

IO Address Map

I/O address Range Description

000-01F DMA Controller #1
020-021 Interrupt Controller #1, Master
040-05F 8254 timer
060-06F 8042 (Keyboard Controller)
070-07F Real time Clock, NMI Mask

080-09F DMA Page Register
0A0-0BF Interrupt Controller #2
0C0-0DF DMA Controller #2

0F0 Clear Math Coprocessor Busy
0F1 Reset Math Coprocessor

0F2 Core logic programming configuration
0F8-0FF Math Coprocessor
1F0-1F8 Fixed Disk

200-207 Game I/O

278-27F Parallel Printer Port 2 (LPT3)

2E8-2EF Serial Port 4

2F8-2FF Serial Port 2
300-31F Prototype Card
360-36F Reserved
378-37F Parallel Printer Port 1 (LPT2)

3B0-3BF Monochrome Display and Printer Adapter

(LPT1)
3C0-3CF Reserved
3D0-3DF Color/Graphics Monitor Adapter
3E8-3EF Serial Port 3

3F0-3F7 Diskette Controller
3F8-3FF Serial Port 1

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1st MB Memory Address Map

Memory address Description

00000-9FFFF System memory
A0000-BFFFF VGA buffer
C0000-C7FFF VGA BIOS
F0000-FFFFF System BIOS
1000000- Extend BIOS

*Default setting

IRQ Mapping Table

IRQ0 System Timer IRQ8 RTC clock
IRQ1 Keyboard IRQ9 Available
IRQ2 Cascade to IRQ Controller IRQ10 Available
IRQ3 COM2 IRQ11 Available
IRQ4 COM1 IRQ12 PS2 mouse
IRQ5 Available IRQ13 FPU
IRQ6 FDC IRQ14 Primary IDE
IRQ7 Printer IRQ15 Secondary IDE

DMA Channel Assignments

Channel Function

0 Available
1 Available
2 Floppy disk ( 8-bit transfer )
3 Available
4 Cascade for DMA controller 1
5 Available
6 Available
7 Available

Appendix D. ATX Power Supply

The following notes show how to connect the ATX Power Supply to the
backplanes and / or the ISBC card.

A. For backplanes with an ATX Connector

1. First disconnect the AC cord of the Power Supply from the AC
source to prevent sudden electrical surge to the board.

2. Next, check the type of your CPU board. All CPU boards listed on
the next page support ATX power supply but have two types of
power switch connection:

2.1. PCISA-C800EV (through Power Button & GND):

Connect the ATX power button switch to the pin 1 (power
button) and pin 2 of the CN5 on the board, and connect the
power cable f rom backplane to CN9 of the CPU card.
If you want to turn ON the system, just press the button once.
And If you want to turn off the power supply, please press the
ATX power switch button for about 4 seconds.

45

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For backplanes with an ATX power supply

connector

For some SBC with no ATX power ON/OFF function, the user can
control the ATX power supply via the backplane’s PS ON
connector. Refer to the figure below: for the backplanes with ATX
connector, the connection can be made simply as follows:

1. Connect the ON/OFF switch to Pin 2 (PS ON) and Pin 1 (GND) of
connector CN2

2. You may now turn the power On and OFF by using the power
switch

Appendix E. How to use the Wake-Up
Function

The PCISA-C800EV provides two kind of Wake Up Function.

This page describes how to use the Modem Wake-Up and LAN Wake­Up functions.
Wake-Up function works whilst using ATX power supply,

Wake-Up By Modem Ring On:
In CMOS SETUP, the user must set the option Wake Up On
LAN/Ring to enabled. The ATX power supply will be switched on
when there is a ring signal detected on the pin “RI” of the serial port.

Wake-Up On LAN (for Intel 82559 LAN-chip):
In CMOS SETUP, the user must set the option Wake Up On
LAN/Ring to enabled. When the computer is in power-down status, a
LAN Link/Active LED is flashing. This status indicates that the LAN
chip has entered standby mode and is waiting for a Wake-Up signal.
You can use other computers to wake up your computer by sending ID
to it.

: ID is the address of your system LAN. Every LAN chip has a

ID
factory-

set ID which you can find it from network information in

WINDOWS.

ID’s format is xx-xx-xx-xx-xx-xx
Example ID: 00905C21D4

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