IC-F3062T
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SERVICE
MANUAL
VHF TRANSCEIVER
S-14223HZ-C1
Mar. 2006
INTRODUCTION
This service manual describes the latest service information
for the
TRANSCEIVER
To upgrade quality, all electrical or mechanical parts and internal
circuits are subject to change without notice or obligation.
IC-F3061T/S, IC-F3062T/S and IC-F3063T/S VHF
at the time of publication.
MODEL VERSION SYMBOL CHANNEL SPACING KEY PAD
IC-F3061T
IC-F3061S 4-key
IC-F3062T
IC-F3062S 4-key
IC-F3063T
IC-F3063S 4-key
U.S.A [USA-01] 15.0 kHz/30.0 kHz
EURO [EUR-01] 12.5 kHz/25.0 kHz
GENERAL [GEN-01]
12.5 kHz/20.0 kHz
/25.0 kHz
10-key
10-key
10-key
DANGER
NEVER connect the transceiver to an AC outlet or to a DC
power supply that uses more than 7.2 V. Such a connection
could cause a fire or electric hazard.
DO NOT expose the transceiver to rain, snow or any liquids.
DO NOT reverse the polarities of the power supply when
connecting the transceiver.
DO NOT apply an RF signal of more than 20 dBm (100 mW)
to the antenna connector. This could damage the transceiver's front end.
ORDERING PARTS
Be sure to include the following four points when ordering
replacement parts:
1. 10-digit Icom parts number
2. Component name and informations
3. Equipment model name and unit name
4. Quantity required
<SAMPLE ORDER>
5030002830 LCD M4-0078TAY-2 IC-F3061T Front unit 5 pieces
8810009220 Screw
PH B0 M2×8 ZK (BT)
IC-F3061T Chassis 10 pieces
Addresses are provided on the inside back cover for your
convenience.
REPAIR NOTES
1. Make sure the problem is internal before disassembling the transceiver.
2. DO NOT open the transceiver until the transceiver is disconnected from its power source.
3. DO NOT force any of the variable components. Turn them slowly and smoothly.
4. DO NOT short any circuits or electronic parts. An insulated turning tool MUST be used for all adjustments.
5. DO NOT keep power ON for a long time when the transceiver is defective.
6. DO NOT transmit power into a signal generator or a sweep generator.
7. ALWAYS connect a 30 dB to 40 dB attenuator between the transceiver and a deviation meter or spectrum analyzer when
using such test equipment.
8. READ the instructions of test equipment thoroughly before connecting equipment to the transceiver.
Icom, Icom Inc. and logo are registered trademarks of Icom Incorporated (Japan) in the United States, the United
Kingdom, Germany, France, Spain, Russia and/or other countries.
TABLE OF CONTENTS
SECTION 1 SPECIFICATIONS
SECTION 2 INSIDE VIEWS
SECTION 3 DISASSEMBLY INSTRUCTIONS
SECTION 4 OPTIONAL UNIT INSTALLATION
SECTION 5 CIRCUIT DESCRIPITON
5-1 RECEIVER CIRCUITS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1
5-2 TRANSMITTER CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2
5-3 PLL CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3
5-4 POWER SUPPLY CIRCUITS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-4
5-5 PORT ALLOCATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-5
SECTION 6 ADJUSTMENT PROCEDURES
6-1 PREPARATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1
6-2 FREQUENCY ADJUSTMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-4
6-3 TRANSMIT ADJUSTMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5
6-4 RECEIVE ADJUSTMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-6
SECTION 7 PARTS LIST
SECTION 8 MECHANICAL PARTS AND DISASSEMBLY
SECTION 9 SEMICONDUCTOR INFORMATION
SECTION 10 BOARD LAYOUTS
10-1 FRONT UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-1
10-2 MAIN UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-1
10-3 RF UNIT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-1
10-4 JACK UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-1
10-5 VR UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-1
10-6 BC-160. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-1
SECTION 11 BLOCK DIAGRAM
SECTION 12 VOLTAGE DIAGRAM
SECTION 13 BC-160
SECTION 1 SPECIFICATIONS
[USA-01], [GEN-01] [EUR-01]
• Frequency coverage 136–174 MHz
• Type of emission Wide 16K0F3E (25.0 kHz/30.0 kHz) 16K0F3E (25.0 kHz)
Middle – 14K0F3E (20.0 kHz)
11K0F3E, 11K0F7E/D* (15.0 kHz)
Narrow
• Number of programable channels 512 channels (128 zones)
• Antenna impedance 50 Ω (nominal)
• Operating temperature range −22˚F to +140˚F –25˚C to +55˚C
• Power supply requirement Specified Icom's battery packs only (Operatable voltage; 7.2 V DC negative ground)
GENERAL
• Current drain
(approx.)
• Dimensions (projections not included)
• Weight (with BP-232, approx.) 12 oz 340 g
• Transmit output power 5 W (High), 2 W (Low2), 1 W (Low1)
• Modulation Variable reactance frequency modulation
• Max. frequency deviation Wide ±5.0 kHz
• Frequency error ±1.0 ppm ±1.5 kHz
• Spurious emission 75 dB typ. 0.25 µW (≤1 GHz), 1.00 µW (>1 GHz)
• Adjacent channel power Wide More than 70 dB (80 dB typ.)
TRANSMITTER
• Audio harmonic distortion 3% typ. (with 1 kHz AF 40% deviation)
• FM hum and noise
(without CCITT filter)
• Limiting charact of modulation 60–100% of max. deviation
• Microphone impedance 2.2 k
• Receive system Double conversion superheterodyne
• Intermediate frequencies 1st IF; 46.35 MHz, 2nd IF; 450 kHz
• Sensitivity 0.25 µV typ. at 12 dB SINAD − 4 dBµV (EMF) typ. at 20 dB SINAD
• Squelch sensitivity (at threshold) 0.25 µV typ.
• Adjacent channel
selectivity
• Spurious response More than 70 dB
• Intermodulation More than 70 dB (74 dB typ.) More than 65 dB (67 dB typ.)
• Hum and Noise
RECEIVER
(without CCITT filter)
• Residual modulation
(with CCITT filter)
• Audio output power 0.5 W typ. at 5% distortion with an 8 Ω load
• Audio output impedance 8
Measurements made in accordance with EIA-152-C/204D, TIA-603 ([USA-01], [GEN-01]) or
All stated specifications are subject to change without notice or obligation.
*; Optional UT-119S/H is required for the digital mode operation.
Stand-by 95 mA
RX
Max.audio 600 mA
TX
at 5 W 1.5 A
at 1 W 0.7 A
Middle – ±4.0 kHz
Narrow ±2.5 kHz
Middle – More than 70 dB (80 dB typ.)
Narrow More than 60 dB (70 dB typ.)
Wide More than 40 dB (46 dB typ.) –
Narrow More than 34 dB (40 dB typ.) –
Wide More than 70 dB (75 dB typ.)
Middle − More than 70 dB (75 dB typ.)
Narrow More than 65 dB (68 dB typ.)
Wide More than 40 dB (46 dB typ.) −
Narrow More than 34 dB (40 dB typ.) −
Wide − More than 45 dB (55 dB typ.)
Middle − More than 43 dB (53 dB typ.)
Narrow − More than 40 dB (50 dB typ.)
8K50F3E, 8K10F1E/D* (12.5 kHz)
4K00F1E/D* (6.25 kHz)
2 3/32 (W) × 5 11/32 (H) × 1 17/32 (D) in 53.0 (W) × 136.0 (H) × 38.5 (D) mm
Ω
Ω
EN 300 086 ([EUR-01]).
8K50F3E (12.5 kHz)
4K00F1E/D* (6.25 kHz)
1 - 1
SECTION 2 INSIDE VIEWS
• FRONT UNIT
Mic selector
Q506: UNR9113J
Q516: UNR9213J
AF power amplifier
controller
Q501: 2SB1132
Q502: XP6501
AF power amplifier
(IC508: TDA8547TS)
Speaker selector
(Q512, Q513: UNR9213J)
Expander IC
(IC506: M62320FP)
Expander IC
(IC505: M62320FP)
• RF UNIT (TOP VIEW)
APC amplifier
(IC601: TA75S01F)
TX power detector
(D604: RB706F-40)
• RF UNIT (BOTTOM VIEW)
TX power detector
(D605: RB706F-40)
TX/RX antenna
switch circuit
TX power amplifier
(Q601: RD07MVS1)
• MAIN UNIT (TOP VIEW)
RF amplifier
(Q10: 3SK293)
D/A converter
(IC20: M62334FP)
Mixer
(Q37: 3SK324)
ALC amplifier
(IC15: AN6123MS)
• MAIN UNIT (BOTTOM VIEW)
CPU 5V regulator
(IC6: NJM2870)
1st IF amplifier
(Q25: 2SC4215)
FM IF IC
(IC3: TA31136FNG)
PLL IC
(IC1: LMX2352TM)
D/A converter
(IC4: M62364FP)
CPU
(IC18: HD64F2268TF20V)
2 - 1
DTMF decoder
(IC10: BU8872FS)
SECTION 3 DISASSEMBLY INSTRUCTIONS
• REMOVING THE CHASSIS UNIT
Unscrew 1 nut A, and remove 2 knobs B and C.
1
2 Unscrew 2 screws D.
3 Take off the chassis unit in the direction of the arrow.
4 Disconnect the flat cable E form J501.
5 Remove the seal F.
6 Unscrew 2 nuts G and remove the plate H.
Chassis unit
F
D
G
H
A
B
C
J501
E
• REMOVING THE RF UNIT
Unsolder 3 points A.
1
2 Unscrew 4 screws B and remove the RF unit from the
chassis.
B
RF unit
A
A
• REMOVING THE MAIN UNIT
1 Unsolder 1 point A.
2 Unscrew 1 screw B and remove the VR unit.
3 Unsolder 5 points C and remove the shield plate D.
4 Unsolder 10 points E.
5 Unscrew 7 screws F and remove the MAIN unit from the
chassis.
B
VR unit
C 5
A
D
F
MAIN unit
E
F
10
F
• REMOVING THE FRONT UNIT
1 Disconnect the flat cable A from J503.
2 Unsolder 2 points B.
3 Unscrew 6 screws C and remove the plate D and FRONT
unit.
B
A
C
C
J503
FRONT unit
C
C
D
3 - 1
SECTION 4 OPTIONAL UNIT INSTALLATION
CAUTION! Optional unit installation should be done at authorized Icom servise center only.
The waterproof capability of the transceiver cannot be guaranteed if you install an unit yourself, or have it done at
a non-authorised dealer/service center.
Install the optional unit as follows.
Rotate [VOL] to turn the power OFF, and remove the battery pack.
q
Remove the anntena and antenna nut A.
w
Remove the rotary selector B and volume control C.
e
Unscrew two screws D, then take off the chassis from the front panel in the direction of the arrow.
r
BE CAREFUL! Flat cable is connected between the MAIN unit on the chassis and front panel.
D
A
B
C
Install the optional unit as below.
t
• UT-96R, UT-109R and UT-110R installation*
DO NOT attach the unit
to the connector “J2.“
Otherwise no TX modulation or AF output is
available.
• UT-119S/H installation
DO NOT attach the unit
to the connector “J1.“
Otherwise no TX modulation or AF output is
available.
J1
*; The following PC bord modifi cation is required when installing optional UT-109R and UT-110R.
Cut the pattern on the PC board at “MIC“ and “AFOUT“ as shown below.
AFOUT
MIC
4 - 1
NOTE: When uninstalling the unit
Be sure to re-solder the disconnected
points as below when you remove the
unit. Otherwise, no TX modulation or AF
output is available.
Re-solder
SECTION 5 CIRCUIT DESCRIPTION
5-1 RECEIVER CIRCUITS
5-1-1 ANTENNA SWITCH (MAIN and RF UNITS)
The received signals from the antenna connector are passed
through the antenna switch which toggles the receive (RX) line
and transmit (TX) line.
The received signals from the antenna connector are passed
through the low-pass fi lter (LPF; L601−L603, C601, C602, C604
−C606, C608, C609, C663), and the antenna switch (D601 and
D603 are OFF).
While transmitting, the voltage on the T5V line is applied
to D601 and D603, and these are ON. Thus the TX line is
connected to the antenna. Simultaneously, the RX line is
connected to the GND to prevent transmit signal entering.
While receiving, no voltage is applied to the D601 and D603, and
these are OFF. Thus the TX line and the antenna is disconnected
to prevent received signals entering. Simultaneously, the RX
line is disconnected from the GND and the received signals are
passed through the LPF (RF UNIT; L604, C611, C612, MAIN
UNIT; L29, C117).
The fi ltered signals from the LPF (RF UNIT; L604, C611, C612,
MAIN UNIT; L29, C117) are then applied to the RF circuit via the
two staged tunable bandpass filter (BPF; D23, D24, L31, L32,
C120−C122, C125−C127).
5-1-2 RF CIRCUIT (MAIN UNIT)
The received signals are filtered and amplified at the RF
circuit.
The fi ltered signals are applied to the RF amplifi er (Q10). The
amplified signals are applied to the 1st mixer (Q37) via another
two-staged BPF (D28, D29, L33, L34, C140−C144, C147).
The converted 1st IF signal is passed through the 1st IF fi lter
(in wide mode; FI1, in narrow mode; FI4) via the bandwidth
switch (D34), to remove adjacent signals. The filtered signal
is applied to the 1st IF amplifi er (Q25) via another bandwidth
switch (D35). The amplifi ed 1st IF signal is then applied to the
FM IF IC (IC3, pin 16).
5-1-4 2nd IF AND DEMODULATOR CIRCUITS (MAIN UNIT)
The 1st IF signal is converted into the 2nd IF signal, and demodulated.
The 1st IF signal from the 1st IF amplifi er (Q25) is applied to
the 2nd IF mixer in the FM IF IC (IC3, pin 6). And the 1st IF
signal is converted into the 450 kHz 2nd IF signal by being
mixed with the 2nd LO signal from the reference frequency
oscillator (X1) via the tripler (Q18).
The converted 2nd IF signal is output from pin 3, and passed
through the 2nd IF fi lter (FI2) to suppress sideband noise. In
narrow mode, the 2nd IF signal is also passed through another
2nd IF fi lter (FI3) via bandwidth switches (D32, D33).
The fi ltered 2nd IF signal is applied to the limiter amplifi er in
the FM IF IC (IC3, pin 5). The amplifi ed 2nd IF signal is FMdemodulated at the quadrature detector (X5, IC3, pins 10, 11)
and output from pin 9. The demodulated AF signals are then
applied to the AF circuits.
5-1-5 AF CIRCUITS (FRONT and MAIN UNITS)
The demodulated AF signals from the FM IF IC are amplifi ed
and filtered at AF circuits. This transceiver employs the
base band IC for audio signal processing for both transmit
and receive. The base band IC is an audio processor and
composed of pre-amplifi er, compressor, expander, scrambler,
etc. in its package.
5-1-3 1st IF CIRCUITS
The received signals are converted into the 1st IF signal, and
amplified at the 1st IF circuits.
The filtered signals from the RF circuit are converted into the
46.35 MHz 1st IF signal by being mixed with the 1st Local
Oscillator (LO) signals from the VCO (155 MHz and below; Q1, D1
−D4, 155 MHz and higher; Q2, D5−D8) at the 1st mixer (Q37).
• 2nd IF AND DEMODULATOR CIRCUITS
D/A converter
(IC4)
Demodulated signals
to the AF circuits
8
2
1
Quadrature
detector
9
Filter
amp.
1110
X5
735
Limiter
amp.
D33
N/W
SW
RSSI
+5V
The demodulated AF signals from the FM IF IC (IC3, pin 9) are
applied to the base band IC (IC5, 23) via the Digital/Analog
switch (IC14, pins 2, 15).
The applied AF signals are amplifi ed at the amplifi er (RXA1)
and level adjusted at the volume controller (VR3), then
suppressed unwanted 3 kHz and higher audio signals at LPF.
The filtered AF signals are applied or bypassed the TX/RX
HPF, scrambler, de-emphasis sections in sequence.
D32
N/W
SW
FI3
FI2
Noise
detector
Mixer
45.9 MHz
2
BPF
Q18
3
X1
15.3 MHz
FM IF IC (IC3)
12
13
16
1st IF signal from the IF amplifier (Q25)
“NOIS” signal to the CPU (IC18: pin 37)
“RSSI” signal to the CPU (IC18: pin 50)
5 - 1
The TX/RX HPF filters out 250 Hz and lower audio signals,
and the de-emphasis circuit obtains –6 dB/oct of audio
characteristics. The expander expands the compressed audio
signals and also noise reduction function is provided.
The AF signals are then level adjusted at the volume controller
(VR4) and amplifi ed at the amplifi er (RXA2). The amplifi ed AF
signals are output from pin 20 and passed through another deemphasis circuit (IC13, pins 2, 15), and then applied to the D/
A converter (IC4, pin 16) for level adjustment via the AF mute
switch (IC14, pins 3, 4).
The level-adjusted AF signals are applied to the AF amplifi er
(FRONT UNIT; IC509, pin 2). The amplified AF signals are
output from pin 1, and applied to the AF power amplifier
(IC508, pin 17) to obtain 0.5 W of AF output power. The poweramplifi ed AF signals are output from pin 18, and then applied
to the internal speaker.
If an external speaker-microphone or headset is attached to
the multi-connector (JACK UNIT; MP801), the AF signals from
the AF amplifier (IC509, pin 1) are applied to the AF power
amplifi er (IC508, pin 14). The power-amplifi ed AF signals are
then output from pin 13, and applied to the multi-connector
(JACK UNIT; MP801).
• CTCSS/DTCS
A portion of the demodulated AF signals are passed through
the active LPF (Q28) to filters CTCSS/DTCS signal. The filtered
signal is applied to the CPU (IC18, pin 46). The CPU compares
the applied signal and the set CTCSS/DTCS, then output the
serial data to the expand IC (FRON UNIT; IC505, pin 3), and
the expand IC outputs “AFON” signal from pin 4 to the AF
power amplifi er controller (Q501, Q502, D508).
• 2/5 TONE
2/5 tone signals in the demodulated AF signals are passed
through the LPF in the base band IC (IC5) and output from
pin 21, then applied to the CPU (IC18, pin 45) and decoded.
• DTMF
DTMF signals in the demodulated AF signals are passed through
the LPF in the base band IC (IC5) and output from pin 21, then
applied to the DTMF decoder (IC10, pin 1) and decoded.
5-2 TRANSMITTER CIRCUITS
5-2-1 MICROPHONE AMPLIFIER CIRCUITS (MAIN UNIT)
The AF signals from the microphone (MIC signals) are fi ltered
and level-adjusted at microphone amplifi er circuits.
5-1-5 SQUELCH CIRCUIT
• NOISE SQUELCH
The squelch mutes the AF output signals when no RF signals
are received. By detecting noise components (30 kHz and
higher signals) in the demodulated AF signals, the squelch
circuit toggles the AF power amplifi er ON and OFF.
A portion of the demodulated AF signals from the FM IF IC
(IC3, pin 9) are applied to the D/A converter (IC4, pin 1) for
level adjustment (squelch threshold adjustment). The leveladjusted AF signals are output from pin 2 and passed through
the noise filter (IC3, pins 7, 8, R121−R124, C216−C218). The
fi ltered noise signals are amplifi ed the noise components only.
The amplified noise components are converted into the pulsetype signal at the noise detector section, and output from pin 13
as the “NOIS” signal. The signal is applied to the CPU (IC18, pin
37). Then the CPU outputs serial data to the expand IC (FRON
UNIT; IC505, pin 3), and the expand IC outputs “AFON” signal
from pin 4 according to the “NOIS” signal level, to the AF power
amplifi er controller (FRONT UNIT; Q501, Q502, D508). The AF
power amplifier controller toggles AF power amplifier (FRONT
UNIT; IC508) ON and OFF according to the "AFON" signal.
• TONE SQUELCH
The tone squelch circuit detects tone signals and opens the
squelch only when receiving a signal containing a matched
sub audible tone. When the tone squelch is in use, and a
signal with a mismatched or no sub audible tone is received,
the tone squelch circuit mutes the AF signals even when the
noise squelch is open.
MIC signals from the microphone are passed through the
microphone switch (FRON UNIT; Q515). The microphone
switch selects the AF signals from the internal microphone
(FRON UNIT; MC1) or from an external microphone.
MIC signals from the microphone switch (FRON UNIT; Q515)
are applied to the microphone amplifi er (FRON UNIT; IC509,
pin 6), and amplified AF signals are output from pin 7, and
passed through the pre-emphasis circuit (IC13, pins 4, 5)
to obtain +6 dB/oct of frequency characteristic. The preemphasized MIC signals are then applied to the microphone
amplifi er (IC9, pin 9). And the amplifi ed MIC signals are output
from pin 8, and applied to the D/A converter (IC4, pin 9) for
level adjustment (=microphone sensitivity adjustment). The
level-adjusted MIC signals are output from pin 10, and applied
to the ALC (Automatic Level Control) circuit (IC15, pin 3)
which limits the amplitude of the MIC signals to prevent over
deviation. The amplitude-limited MIC signals are output from
pin 5, then applied to the base band IC (IC5, pin 3).
The applied MIC signals are amplifi ed at the amplifi er (TXA1),
and level adjusted at the volume controller (VR1). The level
adjusted MIC signals are applied or bypassed the compressor
section, pre-emphasis section, TX/RX HPF, de-scrambler, limiter,
splatter, in sequence, then applied to another volume controller.
The compressor compresses the MIC signals to provide high S/N
ratio for receive side, and the pre-emphasis obtains +6 dB/oct
audio characteristics. The TX/RX HPF filters out 250 Hz and
lower audio signals, the limiter limits its level and the splatter
fi lters out 3 kHz and higher audio signals.
The fi ltered MIC signals are level adjusted at another volume
controller (VR2), and then output from pin 7 via smoothing
fi lter (SMF).
• BASE BAND IC BLOCK DIAGRAM
Com-
pressor
RX
LPF
TXA1
RXA1
VR1
(HPF)
VR3
(HPF)
3TXIN
23RXIN
21SDEC
Pre-
emphasis
TX/RX
HPF
Scrambler/
De-scrambler
5 - 2
BASE BAND IC (IC5)
Limiter Splatter VR2
De-
emphasis
Expander
VR4
SMF
RXA2
7 MOD
18
19
20 SIGNAL
The output AF signals are then passed through the Digital/
Analog switch (IC14, pins 12, 14) and applied to the AF mixer
(IC9, pin 6) where the MIC signals and Tone signals are mixed
with (while CTCSS/DTCS are in use) via the PM/FM switch
(IC13, pins 12, 14).
The CTCSS and DTCS signals are generated by the CPU
(IC18) and output from pins 89−91. The output signals are
passed through the 3 registers (R263–R265) to change its wave
form. The wave form changed CTCSS/DTCS signals are passed
through the LPF (IC17, pins 1, 3) and the D/A converter (IC4,
pins 21, 22) for level adjustment. The level adjusted CTCSS/
DTCS signals are then applied to the AF mixer (IC9, pin 6)
2/5 tone and DTMF signals are
generated by the CPU (IC18)
.
and output from pin 43. The output signals are passed through
two LPF's (IC17, pins 8, 10 and pins 5, 7), then applied to the AF
mixer (IC9, pin 6)
.
The mixed AF signals are output from pin 7 of the AF mixer
(IC9) and passed through the D/A converter (IC4, pins 3, 4)
for level adjustment (=deviation adjustment), then applied to
the modulation circuit (D9) as the modulation signals. The
modulation signals are also applied to the reference frequency
oscillator (X1) via D/A converter (IC4, pins 11, 12) and AF
amplifi er (IC21, pins 1, 4).
5-2-2 MODULATION CIRCUIT (MAIN UNIT)
The modulation signals from the microphone amplifi er circuits
are applied to the D9, and modulate the VCO oscillating
signal by changing the reactance of D9. The modulated VCO
output signal is buffer-amplifi ed by Q4 and Q6, then applied to
transmit amplifi ers as a transmit signal via the TX/RX switch
(D14 is ON, D15 is OFF).
5-2-3 TRANSMIT AMPLIFIERS (RF UNIT)
The transmit signal from the TX/RX switch (MAIN UNIT; D14
is ON, D15 is OFF) is amplifi ed to the transmit output level by
pre-driver (Q603), driver (Q602) and power (Q601) amplifi ers.
The power-amplified transmit signal is passed through the
two LPF’s (L607, L608, C620, C622−C624, C664 and L606,
C615−617) to filter off the harmonic components in the
transmit signal. The fi ltered transmit signal is passed through
the antenna switching circuit (D601 and D603 are ON), then
applied to the antenna connector (CHASSIS; J1) via another
LPF (L601−L603, C601, C602, C604−C606, C608, C609, C663).
5-2-4 APC CIRCUIT (RF UNIT)
The APC (Automatic Power Control) circuit stabilizes transmit
output power to prevent the transition of the transmit output
power level which is caused by load mismatching or heat
effect, etc. The APC circuit also selects transmit output power
from high, middle and low power.
A portion of the transmit signal is detected by the transmit power
detector (D604, D605) to produce a DC voltage corresponding to
the transmit output power level. The detected voltage is applied
to the APC amplifier (IC601, pin 3). The transmit power setting
voltage “T2” from the D/A converter (MAIN UNIT; IC20, pin 2) is
applied to another input terminal (pin 1) as the reference voltage.
The APC amplifi er compares the detected voltage and reference
voltage, and the difference of the voltage is output from pin 4.
The output voltage controls the bias of the drive (Q602) and
power (Q601) amplifiers to reduce/increase the gain of these
amplifi ers for stable transmit output power.
The change of transmit output power is carried out by the
change of reference voltage "T2," and the transmit power
muting is carried out by the TX mute switch (Q606), using the
“TMUT” signal from the CPU (IC18, pin 13).
5-2-4 OVER CURRENT DETECTION CIRCUIT (RF UNIT)
The driving current of the drive (Q602) and power (Q601)
amplifiers is detected at the current detector (Q604, Q605)
by detecting the difference of voltage between both terminals
of R623. The detected voltage "ISENS" is applied to the CPU
(IC18, pin 47).
In case of the over current, the CPU outputs "TMUT" signal
from pin 13 to TX mute switch (Q606) to stop the transmitting
for protection of transmit amplifi ers (Q601, Q602).
5-3 PLL CIRCUITS
5-3-1 VCO (Voltage Controlled Oscillator) CIRCUITS
(MAIN UNIT)
A VCO is a oscillator which its oscillating frequency is
controlled by adding voltage (lock voltage).
This transceiver has 3 VCO’s; RX VCO1 (Q1, D1−D4), RX
VCO2 (Q2, D5−D8) and TX VCO (Q3, D10−D12). The RX
VCO1 oscillates the 1st LO signals for 155 MHz and higher,
and the RX VCO2 oscillates the 1st LO signals for 155 MHz
and lower frequencies. And the TX VCO oscillates the transmit
output signal.
• RX VCO1 and RX VCO2
The RX VCO1/RX VCO2 (Q1, D1−D4/Q2, D5−D8) oscillates
the 1st LO signals. The output signals are amplified by the
buffer amplifi ers (Q4, Q6), and applied to the 1st mixer (Q37)
via TX/RX switch (D14 is OFF, D15 is ON) and LPF (L38,
L39, C161−C164, C383, C384), to be mixed with the received
signals to produce the 46.35 MHz 1st IF signal.
• TX VCO
The TX VCO (Q3, D10−D12) oscillates the transmit signal.
The output signal is applied to the transmit amplifi ers via the
buffer amplifi ers (Q4, Q6) and TX/RX switch (D14 is ON, D15
is OFF).
• APC CIRCUIT
Q604, Q605
HV
“ISENS”
from TX/RX switch
(MAIN UNIT; D14, D15)
“T2”
Q606
“TMUT”
Current
detector
T5V
Drive
amp.
Q602
Powe r
amp.
Q603
Predrive
amp.
+
IC601
ALC
amp.
–
to the receive circuits
Q601
LPF
ANT
SW
D604
Power detecter
D605
LPF
to the anntena
5 - 3
A portion of the each VCO output is applied to the PLL IC (IC1,
pin 6) via the buffer amplifi ers (Q4, Q5) and the tunable BPF
(D30, D31, L40, C170−C174).
5-3-2 PLL CIRCUIT (MAIN UNIT)
The PLL circuit provides stable oscillation of the transmit frequency
and receive 1st LO frequency. The PLL output frequency is
controlled by the divided ratio (N-data) from the CPU.
The buffer-amplifi ed VCO output signals from the tunable BPF
(D30, D31, L40, C170−C174) are applied to the PLL IC (IC1,
pin 6). The applied signals are divided at the prescaler and
programmable counter according to the “SSO” signal from the
CPU (IC18, pin 10). The divided signal is phase-compared with
• PLL CIRCUIT
the reference frequency signal from the reference frequency
oscillator (X1), at the phase detector.
The phase difference is output from pin 4 as a pulse type signal
after being passed through the internal charge pump. The output
signal is converted into the DC voltage (lock voltage) by passing
through the loop fi lter (R7, R9, R12, C17, C18, C20). The lock
voltage is applied to the variable capacitors (D1 and D2 of RX
VCO1, D7 and D8 of RX VCO2, D11 and D12 of TX VCO) and
locked to keep the VCO frequency constant.
If the oscillated signal drifts, its phase changes from that of
the reference frequency, causing a lock voltage change to
compensate for the drift in the VCO oscillating frequency.
RX VCO1 (155–174 MHz)
Q1, D1–D4
RX VCO2 (136–155 MHz)
Q2, D5–D8
Loop
filter
PLL unlock signal
to the CPU (IC18, pin 73)
11
4
Charge
pump
Phase
detector
TX VCO
Q3, D10–D12
Programmable
divider
Divide
ratio
adjustment
Reference
divider
Buffer
Q4
PLL IC (IC1)
Prescaler
Shift register
Buffer
Q6
Buffer
Q5
6
14
15
16
10
BPF
SCK
SSO
PLL control signals from the CPU (IC18)
PLST
15.3 MHz
reference frequency signal
D14
to transmitter circuit
D15
to 1st mixer circuit
5-4 POWER SUPPLY CIRCUITS (MAIN UNIT)
Voltage from the attached battery pack is routed to whole of the circuit in the transceiver via switches and regulators.
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