ICmic ICM7377B, ICM7357B, ICM7337B User Manual

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IC MICROSYSTEMS

FEATURES

• 12/10/8-Bit Monotonic Quad DAC in 20 Lead QSOP Package

• Adjustable Output Gain

• Wide Output Voltage Swing

• 150 µA per DAC at 5V Supply

• 100 µA per DAC at 3V Supply

• On Board Reference

• Serial Interface with three-wire SPI/QSPI and

Microwire Interface Compatible

• Serial Data Out for Daisy-Chaining

• 8 µS Full scale Settling Time

APPLICATION

• Battery-Powered Applications

• Industrial Process Control

• Digital Gain and Offset Adjustment

BLOCK DIAGRAM

ICM7377B/7357B/7337B

Quad 12/10/8-Bit Voltage Output DACs

with Serial Interface and Adjustable Output Gain

OVERVIEW

The ICM7377B, ICM7357B and ICM7337B are Quad 12Bit, 10-Bit and 8-Bit wide output voltage swing DACs respectively, with guaranteed monotonic behavior. These DACs are available in 20 Lead QSOP package. They include adjustable output gain for ease of use and flexibility. The reference output is available on a separate pin and can be used to drive external loads. The operating supply range is 2.7V to 5.5V.

The input interface is an easy to use three-wire SPI/QSPI and Microwire compatible interface. The DAC has a double buffered digital input. And there is a serial data output port to allow daisy-chaining applications.

REFOUT

ICM7377B/7357B/7337B

INPUT AND DAC LATCH

REFERENCE

REFCD

INPUT CONTROL LOGIC, REGISTERS AND LATCHES

REFAB

DAC A

DAC B

DAC C

DAC D

+

VOA

FBA

VOB

FBB

VOC

FBC

VOD

FBD

SDO

SDI

SCK

CS

CLR

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TOP VIEW

IC MICROSYSTEMS

PACKAGE

VDD 1 20 AGND

FBA 2 19 FBD

VOA 3 18 VOD

VOB 4 17 VOC

FBB 5 16 FBC

REFAB 6 15 REFCD

CLR

CS

SDI 9 12 SDO

SCK 10 11 DGND

ICM7377B/7357B/7337B

Quad 12/10/8-Bit Voltage Output DACs

with Serial Interface and Adjustable Output Gain

20 Lead QSOP

7 14 N/C

8 13 REFOUT

PIN DESCRIPTION (20 Lead QSOP)

Pin Name I/O Description

1 VDD I Supply Voltage

2 FBA I Inverting Input of The Output Amplifier DAC A. Output Amplifier Feedback Input.

3 VOA O DAC A Output Voltage

4 VOB O DAC B Output Voltage

5 FBB I Inverting Input of The Output Amplifier DAC B. Output Amplifier Feedback Input.

6 REFAB I Reference Voltage Input for DAC A and DAC B

7

CLR

8

9 SDI I Serial Data Input (CMOS)

10 SCK I Serial Clock Input (CMOS)

11 DGND I Digital Ground

12 SDO O Serial Data Output

13 REFOUT O Reference Output

14 N/C - No Connection

15 REFCD I Reference Voltage Input for DAC C and DAC D

16 FBC I Inverting Input of The Output Amplifier DAC C. Output Amplifier Feedback Input. 17 VOC O DAC C Output Voltage 18 VOD O DAC D Output Voltage

19 FBD I Inverting Input of The Output Amplifier DAC D. Output Amplifier Feedback Input.

20 AGND I Analog Ground

CS

I Active Low Clear Input (CMOS). Resets All Registers to Zero. DAC outputs go to 0 V

I Active Low Chip Select (CMOS)

Rev. A8 ICmic reserves the right to change the specifications without prior notice. 2

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mic

IC MICROSYSTEMS

with Serial Interface and Adjustable Output Gain

ICM7377B/7357B/7337B

Quad 12/10/8-Bit Voltage Output DACs

ABSOLUTE MAXIMUM RATING

Symbol Parameter Value Unit

VDD

IIN

VIN_

T

STG

T

SOL

Note: Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

ORDERING INFORMATION

Part Operating Temperature Range Package

ICM7377B -40 oC to 85 oC 20-Pin QSOP

ICM7357B -40 oC to 85 oC 20-Pin QSOP

ICM7337B -40 oC to 85 oC 20-Pin QSOP

DC ELECTRICAL CHARACTERISTICS

(VDD = 2.7V to 5.5V; V

Symbol Parameter Test Conditions Min Typ Max Unit

DC PERFORMANCE

ICM7377B

N Resolution 12 Bits

DNL Differential Nonlinearity (Notes 1 & 3) 0.4 +1.0 LSB

INL Integral Nonlinearity (Notes 1 & 3) 4.0 +12.0 LSB

ICM7357B

N Resolution 10 Bits

DNL Differential Nonlinearity (Notes 1 & 3) 0.1 +1.0 LSB

INL Integral Nonlinearity (Notes 1 & 3) 1.0 +3.0 LSB

ICM7337B

N Resolution 8 Bits

DNL Differential Nonlinearity (Notes 1 & 3) 0.05 +1.0 LSB

INL Integral Nonlinearity (Notes 1 & 3) 0.25 +0.75 LSB

GE Gain Error +0.5 % of FS

OE Offset Error +25 mV

POWER REQUIREMENTS

VDD

IDD

Supply Voltage -0.3 to 7.0 V

Input Current +/- 25.0 mA

Digital Input Voltage (SCK, SDI, CS , CLR )

Reference Input Voltage -0.3 to 7.0 V

REF

Storage Temperature -65 to +150 oC

Soldering Temperature 300

unloaded; all specifications T

OUT

Supply Voltage 2.7 5.5 V

Supply Current 0.6 1.5 mA

MIN

to

T

unless otherwise noted)

MAX

-0.3 to 7.0 V

o

C

Rev. A8 ICmic reserves the right to change the specifications without prior notice. 3

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mic

IC MICROSYSTEMS

with Serial Interface and Adjustable Output Gain

ICM7377B/7357B/7337B

Quad 12/10/8-Bit Voltage Output DACs

Symbol Parameter Test Conditions Min Typ Max Unit

OUTPUT CHARACTERISTICS

Output Voltage Range (Note 3) 0 VDD V

VO

SC

R

OUT

Output Line Regulation

LOGIC INPUTS

VIH

VIL

Digital Input Leakage 5

REFERENCE

V

REFOUT

AC ELECTRICAL CHARACTERISTICS

Short Circuit Current 60 150 mA

Amp Output Impedance

Digital Input High (Note 2) 2.4 V

Digital Input Low (Note 2) 0.8 V

Reference Output 1.2 1.25 1.3 V

Reference Output Line Regulation

At Mid-scale (Note 2) At 0-scale (Note 2)

VDD=2.7 to 5.5 V

0.4 3.0 mV/V

0.8 4.0 mV/V

1.0 100

5.0 200

Ω Ω

µΑ

(VDD = 2.7V to 5.5V; V

Symbol Parameter Test Conditions Min Typ Max Unit

SR Slew Rate 2 V/µs

Settling Time 8 µs

Note 1: Linearity is defined from code 64 to 4095 (ICM7377B) Linearity is defined from code 16 to 1023 (ICM7357B) Linearity is defined from code 4 to 255 (ICM7337B) Note 2: Guaranteed by design; not tested in production Note 3: See Applications Information Note 4: All digital inputs are either at GND or VDD

Mid-scale Transition Glitch Energy

unloaded; all specifications T

OUT

T

unless otherwise noted)

to

MAX

40

MIN

TIMING CHARACTERISTICS

(VDD = 2.7V to 5.5V; all specifications T

Symbol Parameter

t1

t2

t3

t4

t5

t6

SCK Cycle Time (Note 2) 30 ns

Data Setup Time (Note 2) 10 ns

Data Hold Time (Note 2) 10 ns

SCK Falling edge to CS Rising Edge

Falling Edge to SCK Rising Edge

CS

Pulse Width

CS

MIN

T

unless otherwise noted)

to

MAX

Test

Conditions

(Note 2) 0 ns

(Note 2) 15 ns

(Note 2) 20 ns

Min Typ Max Unit

nV-S

Rev. A8 ICmic reserves the right to change the specifications without prior notice. 4

ICmic ICM7377B, ICM7357B, ICM7337B User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual