IBM System z10 EC Reference Manual

IBM System z10 Enterprise Class (z10 EC)
Reference Guide

February 2008

Table of Contents

z/Architecture page 6

IBM System z10 page 8

z10 EC Models page 12

z10 EC Performance page 14

z10 EC I/O SubSystem page 15

z10 EC Channels and I/O Connectivity page 15

ESCON page 15

Fibre Channel Connectivity page 15

OSA-Express page 19

HiperSockets page 25

Security page 26

Cryptography page 27

On Demand Capabilities page 31

Reliability, Availability, and Security page 34

Availability Functions page 34

Environmental Enhancements page 37

Parallel Sysplex Cluster Technology page 38

Fiber Quick Connect for FICON LX Environment page 43

System z10 EC Conguration Details page 44

System z10 EC Physical Characteristics page 46

Coupling Facility – CF Level of Support page 47

Publications page 48

2

IBM System z10 Enterprise Class (z10 EC) Overview

In today’s world, IT is woven in to almost everything that a

business does and is consequently pivotal to a business.

Some of the key requirements today are the need to

maximize return on investments by deploying resources

designed to drive efciencies and economies of scale,

managing growth through resources that can scale to

meet changing business demands, reducing risk by

reducing the threat of lost productivity through downtime

or security breaches, reduce complexity by reversing the

trend of server proliferation and enabling business innova-

tion by deploying resources that can help protect existing

investments while also enabling those new technologies

that enable business transformation.

The IBM System z10™ Enterprise Class (z10™ EC) delivers

a world-class enterprise server designed to meet these

business needs. The z10 EC provides new levels of per-

formance and capacity for growth and large scale con-

solidation, improved security, resiliency and availability to

reduce risk, and introduces just in time resource deploy-

ment to help respond to changing business requirements.

As environmental concerns raise the focus on energy

consumption, the z10 EC is designed to reduce energy

usage and save oor space when used to consolidate x86

servers. Specialty engines continue to help users expand

the use of the mainframe for a broad set of applications,

while helping to lower the cost of ownership. The z10 EC is

at the core of the enhanced System z™ platform that deliv-

ers technologies that businesses need today along with a

foundation to drive future business growth.

Just in time deployment of IT resources

Infrastructures must be more exible to changing capacity

requirements and provide users with just-in-time deploy-

ment of resources. Having the 16 GB dedicated HSA on

the z10 EC means that some preplanning conguration

changes and associated outages may be avoided. IBM

Capacity Upgrade on Demand (CUoD) provides a perma-

nent increase in processing capacity that can be initiated

by the customer.

IBM On/Off Capacity on Demand (On/Off CoD) provides

temporary capacity needed for short-term spikes in

capacity or for testing new applications. Capacity Backup

Upgrade (CBU) can help provide reserved emergency

backup capacity for all processor congurations.

A new temporary capacity offering on the z10 EC is

Capacity for Planned Events (CPE), a variation on CBU.

If unallocated capacity is available in a server, it will allow

the maximum capacity available to be used for planned

events such as planned maintenance in a data center.

The z10 EC introduces a new architectural approach for

temporary offerings that can change the thinking about

on demand capacity. One or more exible conguration

denitions can be used to solve multiple temporary situa-

tions and multiple capacity congurations can be active at

once. This means that On/Off CoD can be active and up to

three other offerings can be active simultaneously.

By having exible and dynamic conguration denitions,

when capacity is needed, activation of any portion of an

offering can be done (for example activation of just two

CBUs out of a denition that has four CBUs is accept-

able). And if the denition doesn’t have enough resources

dened, an order can easily be processed to increase the

capacity (so if four CBUs aren’t enough it can be redened

to be six CBUs) as long as enough server infrastructure is

available to meet maximum needs.

3

All activations can be done without having to interact with

IBM—when it is determined that capacity is required, no

passwords or phone connections are necessary. As long

as the total z10 EC can support the maximums that are

dened, then they can be made available.

A new z10 EC feature now makes it possible to add per-

manent capacity while a temporary capacity is currently

activated, without having to return rst to the original con-

guration.

The activation of On/Off CoD on z10 EC can be simplied

or automated by using z/OS Capacity Provisioning (avail-

able with z/OS® 1.9). This capability enables the monitoring

of multiple systems based on Capacity Provisioning and

Workload Manager (WLM) denitions. When the dened

conditions are met, z/OS can suggest capacity changes

for manual activation from a z/OS console, or the system

can add or remove temporary capacity automatically and

without operator intervention.

Specialty engines offer an attractive alternative

The z10 EC continues to support the use of specialty

engines that can help users expand the use of the main-

frame for new workloads, while helping to lower the cost of

ownership.

The IBM System z10 Integrated Information Processor

(zIIP) works closely with z/OS, which manages and directs

work between CPs and the zIIP. It is designed to free up

general computing capacity and lower overall total cost

of computing for select data and transaction process-

ing workloads for Business Intelligence (BI), Enterprise

Resource Planning (ERP), and Customer Relationship

Management (CRM). The z10 EC also allows IPSec pro-

cessing to take advantage of the zIIP, making the zIIP a

high-speed IPSec protocol processing engine providing

better price performance for IPSec processing. IPSec is

an open networking standard used to create highly secure

connections between two points in an enterprise.

For IBM WebSphere® Application Server and other Java™

technology based solutions the IBM System z10 Applica-

tion Assist Processor (zAAP) offers a specialized engine

that provides a strategic z/OS Java execution environment.

When congured with CPs within logical partitions running

z/OS, zAAPs may help increase general purpose proces-

sor productivity and may contribute to lowering the overall

cost of computing for z/OS Java technology-based appli-

cations. Beginning with z/OS 1.8, z/OS XML System Ser-

vices can also take advantage of zAAPs for cost savings.

z/VM® 5.3 is designed to provide new guest support for

zAAPs and zIIPs and includes:

• Simulation support — z/VM guest virtual machines can

create virtual specialty processors on processor models

that support the same types of specialty processors but

don’t necessarily have them installed. Virtual specialty

processors are dispatched on real CPs. Simulating

specialty processors provides a test platform for z/VM

guests to exploit mixed-processor congurations. This

allows users to assess the operational and CPU utiliza-

tion implications of conguring a z/OS system with zIIP

or zAAP processors without requiring the real specialty

processor hardware. This simulation also supports

z/VM’s continuing role as a disaster-recovery platform,

since a virtual conguration can be dened to match the

real hardware conguration even when real zIIP or zAAP

processors are not available on the recovery system

zIIPs can be simulated only on System z10 EC, IBM

System z9® Enterprise Class (z9™ EC) and IBM System

z9 Business Class (z9 BC) servers. zAAPs can be

simulated only on z10 EC, z9 EC, z9 BC, IBM eServer™

zSeries® 990 (z990), and IBM eServer zSeries 890

(z890) servers.

• Virtualization support — z/VM can create virtual spe-

cialty processors for virtual machines by dispatching the

virtual processors on corresponding specialty proces-

sors of the same type in the real conguration. Guest

support for zAAPs and zIIPs may help improve your total

cost of ownership by allowing available zAAP and zIIP

4

capacity not being used by z/OS LPARs to be allocated

to a z/VM LPAR hosting z/OS guests running Java and

DB2® workloads. zAAPs and zIIPs cost less than stan-

dard CPs, so this support might enable you to avoid

purchasing additional CPs, thereby helping to reduce

your costs both for additional hardware and for software

licensing fees.

The System z10 EC offers the Integrated Facility for Linux®

(IFL) to support Linux and open standards. Linux brings

a wealth of available applications that can be run in a real

or virtual environment under the z10 EC. The System z

platform, with z/VM, provides users with the ability to scale

out, deploying hundreds to thousands of virtual Linux serv-

ers in one CEC footprint. The z/VSE™ strategy supports

integration between z/VSE and Linux on System z to help

customers integrate timely production z/VSE data into new

Linux applications, such as data warehouse environments

built upon a DB2 data server. The mainframe offers a com-

prehensive suite of characteristics and features such as

availability, scalability, clustering, systems management,

HiperSockets and security to enable and support new and

existing environments.

Numerical computing on the chip

Integrated on the z10 EC processor unit is a Hardware

Decimal Floating Point unit to accelerate decimal oating

point transactions. This function is designed to markedly

improve performance for decimal oating point operations

which offer increased precision compared to binary oating

point operations. This is expected to be particularly useful

for the calculations involved in many nancial transactions.

Liberating your assets with System z

Enterprises have millions of dollars worth of mainframe

assets and core business applications that support the

heart of the business. The convergence of service oriented

architecture (SOA) and mainframe technologies can help

liberate these core business assets by making it easier to

enrich, modernize, extend and reuse them well beyond

their original scope of design. The z10 EC, along with the

inherent strengths and capabilities of a z/OS environment,

provides an excellent platform for being an enterprise hub.

Innovative System z software solutions from WebSphere,

CICS®,

Rational® and Lotus® strengthen the exibility of

doing SOA.

Evolving for your business

The z10 EC is the next step in the evolution of the System z

mainframe, fullling our promise to deliver technology

improvements in areas that the mainframe excels in—

energy efciency, scalability, virtualization, security and

availability. The redesigned processor chip helps the z10

EC make high performance compute-intensive processing

a reality. Flexibility and control over capacity gives IT the

upper edge over planned or unforeseen demands. And

new technologies can benet from the inherit strengths of

the mainframe. This evolving technology delivers a com-

pelling case for the future to run on System z.

Decimal calculations are often used in nancial applica-

tions and those done using other oating point facilities

have typically been performed by software through the

use of libraries. With a hardware decimal oating point

unit, some of these calculations may be done directly and

accelerated.

5

z/Architecture

The z10 EC continues the line of upward compatible

mainframe processors and retains application compatibility

since 1964. The z10 EC supports all z/Architecture®-com-

pliant Operating Systems. The heart of the processor unit is

the new Enterprise Quad Core z10 PU chip which is specif-

ically designed and optimized for mainframe systems. New

features enhance enterprise data serving performance as

well as CPU-intensive workloads.

The z10 EC, like its predecessors, supports 24-, 31-, and

64-bit addressing, as well as multiple arithmetic formats.

High-performance logical partitioning via Processor

Resource/Systems Manager™ (PR/SM™) is achieved by

industry-leading virtualization support provided by z/VM.

z10 EC Architecture

• Rich CICS Instruction Set Architecture (ISA)

• 894 instructions (668 implemented entirely in hardware)

• Multiple address spaces robust inter-process security

• Multiple arithmetic formats

• Architectural extensions for z10 EC

• 50+ instructions added to z10 EC to improve compiled

code efciency

• Enablement for software/hardware cache optimization

• Support for 1 MB page frames

• Full hardware support for Hardware Decimal Floating-

point Unit (HDFU)

z/Architecture operating system support

The z10 EC is capable of supporting multiple operating

systems. Each operating system environment exploits

z/Architecture in a unique way and offers business value.

Each new release further exploits the hardware architec-

ture.

z/OS

With z/OS 1.9, IBM delivers functionality that continues to

solidify System z leadership as the premier data server.

z/OS 1.9 offers enhancements in the areas of security, net-

working, scalability, availability, application development,

integration, and improved economics with more

for specialty engines. A foundational element of the platform

— the z/OS tight interaction with the System z

its high level of system integrity.

With z/OS 1.9, IBM introduces:

• A revised and expanded Statement of z/OS System

Integrity

• Large Page Support (1 MB)

• Capacity Provisioning

• Support for up to 54 engines in a single image

• Simplied and centralized policy-based networking

• Advancements in ease of use for both new and existing

IT professionals coming to z/OS

• Support for zIIP-assisted IPSec, and support for eli-

gible portions of DB2 9 XML parsing workloads to be

ofoaded to zAAP processors

• Expanded options for AT-TLS and System SSL network

security

• Improved creation and management of digital certi-

cates with RACF®, SAF, and z/OS PKI Services

• Additional centralized ICSF encryption key management

functions for applications

• Improved availability with Parallel Sysplex® and Coupling

Facility improvements

• Enhanced application development and integration with

new System REXX™ facility, Metal C facility, and z/OS

UNIX® System Services commands

• Enhanced Workload Manager in managing discretionary

work and zIIP and zAAP workloads

exploitation

hardware and

6

Commitment to system integrity

First issued in 1973, IBM’s MVS™ System Integrity State-

ment and subsequent statements for OS/390® and z/OS

stand as a symbol of IBM’s condence and commitment to

the z/OS operating system. Today, IBM reafrms its com-

mitment to z/OS system integrity.

IBM’s commitment includes designs and development

practices intended to prevent unauthorized application

programs, subsystems, and users from bypassing z/OS

security—that is, to prevent them from gaining access, cir-

cumventing, disabling, altering, or obtaining control of key

z/OS system processes and resources unless allowed by the

installation. Specically, z/OS “System Integrity” is dened

as the inability of any program not authorized by a mecha-

nism under the installation’s control to circumvent or disable

store or fetch protection, access a resource protected by

the z/OS Security Server (RACF), or obtain control in an

authorized state; that is, in supervisor state, with a protection

key less than eight (8), or Authorized Program Facility (APF)

authorized. In the event that an IBM System Integrity prob-

lem is reported, IBM will always take action to resolve it.

IBM’s long-term commitment to System Integrity is unique

in the industry, and forms the basis of the z/OS industry

leadership in system security. z/OS is designed to help you

protect your system, data, transactions, and applications

from accidental or malicious modication. This is one of

the many reasons System z remains the industry’s premier

data server for mission-critical workloads.

z/VM

The z/VM hypervisor is designed to help clients extend the

business value of mainframe technology across the enter-

prise by integrating applications and data while providing

exceptional levels of availability, security, and operational

ease. z/VM virtualization technology is designed to allow

the capability for clients to run hundreds to thousands of

Linux servers on a single mainframe running with other

System z operating systems, such as z/OS, or as a large-

scale Linux-only enterprise server solution. z/VM 5.3 can

also help to improve productivity by hosting non-Linux

workloads such as z/OS, z/VSE, and z/TPF.

z/VM 5.3 is designed to offer:

• Large real memory exploitation support (up to 256 GB)

• Single-image CPU support for 32 processors

• Guest support enhancements, including a z/OS testing

environment for the simulation and virtualization of zAAP

and zIIP specialty processors

• Support for selected features of the IBM System z10 EC

• Comprehensive security with a new LDAP server and

RACF feature, including support for password phrases

• Enhancements to help improve the ease-of-use of virtual

networks

• Management enhancements for Linux and other virtual

images

• Integrated systems management from the HMC

z/VSE

z/VSE 4.1, the latest advance in the ongoing evolution of

VSE, is designed to help address needs of VSE clients

with growing core VSE workloads and/or those who wish

to exploit Linux on System z for new, Web-based business

solutions and infrastructure simplication.

z/VSE 4.1 is designed to support:

• z/Architecture mode only

• 64-bit real addressing and up to 8 GB of processor

storage

• System z encryption technology including CPACF, con-

gurable Crypto Express2, and TS1120 encrypting tape

• Midrange Workload License Charge (MWLC) pricing,

including full-capacity and sub-capacity options.

7

IBM System z10 EC

IBM has previewed z/VSE 4.2. When available, z/VSE 4.2 is

designed to support up to 32 GB of processor storage and

more than 255 VSE tasks.

z/TPF

z/TPF is a 64-bit operating system that allows you to move

legacy applications into an open development environ-

ment, leveraging large scale memory spaces for increased

speed, diagnostics and functionality. The open develop-

ment environment allows access to commodity skills and

enhanced access to open code libraries, both of which

can be used to lower development costs. Large memory

spaces can be used to increase both system and appli-

cation efciency as I/Os or memory management can be

eliminated.

z/TPF is designed to support:

• Linux development environment (GCC and HLASM for

Linux)

• 32 processors/cluster

• Up to 84* engines/processor

• 40,000 modules

Everyday the IT system needs to be available to users

– customers that need access to the company Web site,

line of business personnel that need access to the system,

application development that is constantly keeping the

environment current, and the IT staff that is operating and

maintaining the environment. If applications are not consis-

tently available, the business can suffer.

The z10 EC continues our commitment to deliver improve-

ments in hardware Reliability, Availability and Serviceability

(RAS) with every new System z server. They include micro-

code driver enhancements, dynamic segment sparing for

memory as well as the xed HSA. The z10 EC is a server

that can help keep applications up and running in the

event of planned or unplanned disruptions to the system.

IBM System z servers stand alone against competition and

have stood the test of time with our business resiliency solu-

tions. Our coupling solutions with Parallel Sysplex technol-

ogy allows for greater scalability and availability. The new

InniBand® Coupling Links (planned to be available 2nd

quarter 2008*) on the z10 EC are rated a 6 Gbps and pro-

vides a high speed solution to the 10 meter limitation of ICB-4

since they will be available in lengths up to 150 meters.

What the z10 EC provides over its predecessors are

improvements in the processor granularity offerings,

more options for specialty engines, newer security

enhancements, additional high availability characteristics,

Concurrent Driver Upgrade (CDU) improvements,

enhanced networking and on demand offerings. The

z10 EC provides our IBM customers an option for contin-

ued growth, continuity, and upgradeability.

The IBM System z10 EC builds upon the structure intro-

duced on the IBM System z9 EC (formerly z9-109) – scal-

ability and z/Architecture. The System z10 EC expands

upon a key attribute of the platform – availability – to help

ensure a resilient infrastructure designed to satisfy the

demands of your business. With the potential for increased

performance and capacity, you have an opportunity to

continue to consolidate diverse applications on a single

8

platform. The z10 EC is designed to provide up 1.7** times

the total system capacity than the z9 EC, and has up to

triple the available memory. The maximum number of Pro-

cessor Units (PUs) has grown from 54 to 64, and memory

has increased from 128 GB per book and 512 GB per

system to 384 GB per book and 1.5 TB per system.

The z10 EC will continue to use the Cargo cage for its I/O,

supporting up to 960 Channels on the Model E12 (64 I/O

features) and up to 1,024 (84 I/O features) on the Models

E26, E40, E56 and E64.

HiperDispatch helps provide increased scalability and

performance of higher n-way and multi-book z10 EC sys-

tems by improving the way workload is dispatched across

the server. HiperDispatch accomplishes this by recogniz-

ing the physical processor where the work was started and

then dispatching subsequent work to the same physical

processor. This intelligent dispatching helps reduce the

movement of cache and data and is designed to improve

CPU time and performance. HiperDispatch is available

only with new z10 EC PR/SM and z/OS functions.

PUs dened as Internal Coupling Facilities (ICFs), Inte-

grated Facility for Linux (IFLs), System z10 Application

Assist Processor (zAAPs) and System z10 Integrated Infor-

mation Processor (zIIPs) are no longer grouped together in

one pool as on the z990, but are grouped together in their

own pool, where they can be managed separately. The

separation signicantly simplies capacity planning and

management for LPAR and can have an effect on weight

management since CP weights and zAAP and zIIP weights

can now be managed separately. Capacity BackUp (CBU)

features are available for IFLs, ICFs, zAAPs and zIIPs.

For LAN connectivity, z10 EC will provide a new OSA-

Express3 2-port 10 Gigabit Ethernet (GbE) Long Reach

feature (planned to be available 2nd quarter 2008*) and

continues to support OSA-Express2 1000BASE-T and

GbE Ethernet features, and supports IP version 6 (IPv6) on

HiperSockets. OSA-Express2 OSN (OSA for NCP) is also

available on System z10 EC to support the Channel Data

Link Control (CDLC) protocol, providing direct access from

the host operating system images to the Communication

Controller for Linux on the z10 EC, z9 EC and z9 BC (CCL)

using OSA-Express2 to help eliminate the requirement for

external hardware for communications.

Additional channel and networking improvements include

support for Layer 2 and Layer 3 trafc, FCP management

facility for z/VM and Linux for System z, FCP security

improvements, and Linux support for HiperSockets IPv6.

InniBand coupling links with 6 GBps bandwidth are

exclusive to System z10 and distance has been extended

to 150 meters. STP enhancements include the additional

support for NTP clients and STP over InniBand links.

Like the System z9 EC, the z10 EC offers a congurable

Crypto Express2 feature, with PCI-X adapters that can

be individually congured as a secure coprocessor or

an accelerator for SSL, the TKE workstation with optional

Smart Card Reader, and provides the following CP Assist

for Cryptographic Function (CPACF):

• Data Encryption Standard (DES)

• Triple DES (TDES)

• Advanced Encryption Standard (AES) 128-, 192-, and

256-bit

• Secure Hash Algorithm (SHA-1) 160-bit

• SHA-2 256-, 384-, and 512-bit

• Pseudo Random Number Generation (PRNG)

z10 EC is designed to deliver the industry leading Reli-

ability, Availability and Serviceability (RAS) customers

expect from System z servers. RAS is designed to reduce

all sources of outages by reducing unscheduled, sched-

uled and planned outages. Planned outages are further

designed to be reduced by reducing preplanning require-

ments.

9

z10 EC preplanning improvements are designed to avoid

planned outages and include:

• Flexible Customer Initiated Upgrades

• Enhanced Driver Maintenance

– Multiple “from” sync point support

• Reduce Pre-planning to avoid Power-On-Reset

– 16 GB for HSA

– Dynamic I/O enabled by default

– Add Logical Channel Subsystems (LCSS)

– Change LCSS Subchannel Sets

– Add/delete Logical partitions

• Designed to eliminate a logical partition deactivate/

activate/IPL

– Dynamic Change to Logical Processor Denition

– z/VM 5.3

– Dynamic Change to Logical Cryptographic Coproces-

sor Denition – z/OS ICSF

Additionally, several service enhancements have also

been designed to avoid scheduled outages and include

concurrent rmware xes, concurrent driver upgrades,

concurrent parts replacement, and concurrent hardware

upgrades. Exclusive to the z10 EC is the ability to hot

swap ICB-4 and InniBand hub cards.

Enterprises with IBM System z9 EC and IBM z990 may

upgrade to any z10 Enterprise Class model. Model

upgrades within the z10 EC are concurrent with the

exception of the E64, which is disruptive. If you desire

a consolidation platform for your mainframe and Linux

capable applications, you can add capacity and even

expand your current application workloads in a cost-effec-

tive manner. If your traditional and new applications are

growing, you may nd the z10 EC a good t with its base

qualities of service and its specialty processors designed

for assisting with new workloads. Value is leveraged with

improved hardware price/performance and System z10 EC

software pricing strategies.

The z10 EC processor introduces IBM System z10

Enterprise Class with Quad Core technology, advanced

pipeline design and enhanced performance on CPU inten-

sive workloads. The z10 EC is specically designed and

optimized for full z/Architecture compatibility. New features

enhance enterprise data serving performance, industry

leading virtualization capabilities, energy efciency at

system and data center levels. The z10 EC is designed to

further extend and integrate key platform characteristics

such as dynamic exible partitioning and resource man-

agement in mixed and unpredictable workload environ-

ments, providing scalability, high availability and Qualities

of Service (QoS) to emerging applications such as

WebSphere, Java and Linux.

With the logical partition (LPAR) group capacity limit on

z10 EC, z9 EC and z9 BC, you can now specify LPAR

group capacity limits allowing you to dene each LPAR

with its own capacity and one or more groups of LPARs

on a server. This is designed to allow z/OS to manage the

groups in such a way that the sum of the LPARs’ CPU uti-

lization within a group will not exceed the group’s dened

capacity. Each LPAR in a group can still optionally con-

tinue to dene an individual LPAR capacity limit.

The z10 EC has ve models with a total of 100 capacity

settings available as new build systems and as upgrades

from the z9 EC and z990.

The ve z10 EC models are designed with a multi-book

system structure that provides up to 64 Processor Units

(PUs) that can be characterized as either Central Proces-

sors (CPs), IFLs, ICFs, zAAPs or zIIPs.

Some of the signicant enhancements in the z10 EC that

help bring improved performance, availability and function

to the platform have been identied. The following sections

highlight the functions and features of the z10 EC.

10

z10 EC Design and Technology

The System z10 EC is designed to provide balanced

system performance. From processor storage to the

system’s I/O and network channels, end-to-end bandwidth

is provided and designed to deliver data where and when

it is needed.

The processor subsystem is comprised of one to four

books connected via a point-to-point SMP network. The

change to a point-to-point connectivity eliminates the need

for the jumper book, as had been used on the System z9

and z990 systems. The z10 EC design provides growth

paths up to a 64 engine system where each of the 64

PUs has full access to all system resources, specically

memory and I/O.

Each book is comprised of a Multi-Chip Module (MCM),

memory cards and I/O fanout cards. The MCMs, which

measure approximately 96 x 96 millimeters, contain the

Processor Unit (PU) chips, the “SCD” and “SCC” chips of

z990 and z9 have been replaced by a single “SC” chip

which includes both the L2 cache and the SMP fabric

(“storage controller”) functions. There are two SC chips on

each MCM, each of which is connected to all ve CP chips

on that MCM. The MCM contain 103 glass ceramic layers

to provide interconnection between the chips and the

off-module environment. Four models (E12, E26, E40 and

E56) have 17 PUs per book, and the high capacity z10 EC

Model E64 has one 17 PU book and three 20 PU books.

Each PU measures 21.973 mm x 21.1658 mm and has an

L1 cache divided into a 64 KB cache for instructions and a

128 KB cache for data. Each PU also has an L1.5 cache.

This cache is 3 MB in size. Each L1 cache has a Transla-

tion Look-aside Buffer (TLB) of 512 entries associated with

it. The PU, which uses a new high-frequency z/Architecture

microprocessor core, is built on CMOS 11S chip technology

and has a cycle time of approximately 0.23 nanoseconds.

The design of the MCM technology on the z10 EC provides

the exibility to congure the PUs for different uses; there

are two spares and up to 11 System Assist Processors

(SAPs) standard per system. The remaining inactive PUs

on each installed MCM are available to be character-

ized as either CPs, ICF processors for Coupling Facility

applications, or IFLs for Linux applications and z/VM

hosting Linux as a guest, System z10 Application Assist

Processors (zAAPs), System z10 Integrated Information

Processors (zIIPs) or as optional SAPs and provide you

with tremendous exibility in establishing the best system

for running applications. Each model of the z10 EC must

always be ordered with at least one CP, IFL or ICF.

Each book can support from the 16 GB minimum memory,

up to 384 GB and up to 1.5 TB per system. 16 GB of the

total memory is delivered and reserved for the xed Hard-

ware Systems Area (HSA). There are up to 48 IFB links per

system at 6 GBps each.

The z10 EC supports a combination of Memory Bus

Adapter (MBA) and Host Channel Adapter (HCA) fanout

cards. New MBA fanout cards are used exclusively for

ICB-4. New ICB-4 cables are needed for z10 EC and are

only available on models E12, E26, E40 and E56. The

E64 model may not have ICBs. The InniBand Multiplexer

(IFB-MP) card replaces the Self-Timed Interconnect Mul-

tiplexer (STI-MP) card. There are two types of HCA fanout

cards: HCA2-C is copper and is always used to connect

to I/O (IFB-MP card) and the HCA2-O which is optical

and used for customer InniBand coupling which in being

announced and made generally available in 2Q08.

Data transfers are direct between books via the level 2

cache chip in each MCM. Level 2 Cache is shared by all

PU chips on the MCM. PR/SM provides the ability to con-

gure and operate as many as 60 Logical Partitions which

may be assigned processors, memory and I/O resources

from any of the available books.

11

z10 EC Models

E64

E56

E40

E26

E12

Concurrent Upgrade

z990

z10 EC

z9 EC

The z10 EC has been designed to offer high performance

and efcient I/O structure. All z10 EC models ship with

two frames: an A-Frame and a Z-Frame, which together

support the installation of up to three I/O cages. The z10

EC will continue to use the Cargo cage for its I/O, support-

ing up to 960 ESCON® and 256 FICON® channels on the

Model E12 (64 I/O features) and up to 1,024 ESCON and

336 FICON channels (84 I/O features) on the Models E26,

E40, E56 and E64.

To increase the I/O device addressing capability, the I/O

subsystem provides support for multiple subchannels

sets (MSS), which are designed to allow improved device

connectivity for Parallel Access Volumes (PAVs). To sup-

port the highly scalable multi-book system design, the z10

EC I/O subsystem uses the Logical Channel Subsystem

(LCSS) which provides the capability to install up to 1024

CHPIDs across three I/O cages (256 per operating system

image). The Parallel Sysplex Coupling Link architecture

and technology continues to support high speed links pro-

viding efcient transmission between the Coupling Facility

and z/OS systems. HiperSockets provides high-speed

capability to communicate among virtual servers and logi-

cal partitions. HiperSockets is now improved with the IP

version 6 (IPv6) support; this is based on high-speed TCP/

IP memory speed transfers and provides value in allowing

applications running in one partition to communicate with

applications running in another without dependency on

an external network. Industry standard and openness are

design objectives for I/O in System z10 EC.

The z10 EC has ve models offering between 1 to 64 pro-

cessor units (PUs), which can be congured to provide

a highly scalable solution designed to meet the needs

of both high transaction processing applications and On

Demand Business. Four models (E12, E26, E40 and E56)

have 17 PUs per book, and the high capacity z10 EC

Model E64 has one 17 PU book and three 20 PU books.

The PUs can be characterized as either CPs, IFLs, ICFs,

zAAPs or zIIPs. An easy-to-enable ability to “turn off” CPs

or IFLs is available on z10 EC, allowing you to purchase

capacity for future use with minimal or no impact on

software billing. An MES feature will enable the “turned

off” CPs or IFLs for use where you require the increased

capacity. There are a wide range of upgrade options avail-

able in getting to and within the z10 EC.

12

The z10 EC hardware model numbers (E12, E26, E40, E56

E12 E26 E40 E54 E64

7xx

6xx

5xx

4xx

CP Capacity Relative to Full Speed

7xx = 100%
6xx ~ 69.35%
5xx ~ 51.20%
4xx ~ 23.69%

xx = 01 through 12

Sub Capacity Models

and E64) on their own do not indicate the number of PUs

which are being used as CPs. For software billing pur-

poses only, there will be a Capacity Indicator associated

with the number of PUs that are characterized as CPs. This

number will be reported by the Store System Information

(STSI) instruction for software billing purposes only. There

is no afnity between the hardware model and the number

of CPs. For example, it is possible to have a Model E26

which has 13 PUs characterized as CPs, so for software

billing purposes, the STSI instruction would report 713.

z10 EC model upgrades

There are full upgrades within the z10 EC models and

upgrades from any z9 EC or z990 to any z10 EC. Upgrade

of z10 EC Models E12, E26, E40 and E56 to the E64 is

disruptive. When upgrading to z10 EC Model E64, unlike

the z9 EC, the rst book is retained. There are no direct

upgrades from the z9 BC or IBM eServer zSeries 900

(z900), or previous generation IBM eServer zSeries.

IBM is increasing the number of sub-capacity engines on

the z10 EC. A total of 36 sub-capacity settings are avail-

able on any hardware model for 1-12 CPs. Models with 13

CPs or greater must be full capacity.

For the z10 EC models with 1-12 CPs, there are four

capacity settings per engine for central processors (CPs).

The entry point (Model 401) is approximately 23.69% of

a full speed CP (Model 701). All specialty engines con-

tinue to run at full speed. Sub-capacity processors have

availability of z10 EC features/functions and any-to-any

upgradeability is available within the sub-capacity matrix.

All CPs must be the same capacity setting size within one

z10 EC.

z10 EC Model Capacity IDs:

• 700, 401 to 412, 501 to 512, 601 to 612 and 701 to 764

• Capacity setting 700 does not have any CP engines

• Nxx, where n = the capacity setting of the engine, and

xx = the number of PU characterized as CPs in the CEC

•

Once xx exceeds 12, then all CP engines are full capacity

z10 EC Base and Subcapacity Offerings

• The z10 EC has 36 additional capacity settings at the
low end

• Available on ANY H/W Model for 1 to 12 CPs. Models

with 13 CPs or greater have to be full capacity

• All CPs must be the same capacity within the z10 EC

• All specialty engines run at full capacity. The one for one
entitlement to purchase one zAAP or one zIIP for each
CP purchased is the same for CPs of any capacity.

• Only 12 CPs can have granular capacity, other PUs
must be CBU or characterized as specialty engines

13

z10 EC Performance

The performance design of the z/Architecture can enable

the server to support a new standard of performance for

applications through expanding upon a balanced system

approach. As CMOS technology has been enhanced to

support not only additional processing power, but also

more PUs, the entire server is modied to support the

increase in processing power. The I/O subsystem supports

a greater amount of bandwidth than previous generations

through internal changes, providing for larger and faster

volume of data movement into and out of the server. Sup-

port of larger amounts of data within the server required

improved management of storage congurations, made

available through integration of the operating system and

hardware support of 64-bit addressing. The combined bal-

anced system design allows for increases in performance

across a broad spectrum of work.

Large System Performance Reference

IBM’s Large Systems Performance Reference (LSPR)

method is designed to provide comprehensive

z/Architecture processor capacity ratios for different con-

gurations of Central Processors (CPs) across a wide

variety of system control programs and workload environ-

ments. For z10 EC, z/Architecture processor capacity

indicator is dened with a (7XX) notation, where XX is the

number of installed CPs.

LSPR workloads have been updated to reect more

closely your current and growth workloads. The classica-

tion Java Batch (CB-J) has been replaced with a new clas-

sication for Java Batch called ODE-B. The remainder of

the LSPR workloads are the same as those used for the z9

EC LSPR. The typical LPAR conguration table is used to

establish single-number-metrics such as MIPS and MSUs.

The z10 EC LSPR will rate all z/Architecture processors

running in LPAR mode, 64-bit mode, and assumes that

HiperDispatch is enabled.

For more detailed performance information, consult the

Large Systems Performance Reference (LSPR) available

at: http://www.ibm.com/servers/eserver/zseries/lspr/.

Based on using an LSPR mixed workload, the perfor-

mance of the z10 EC (2097) 701 is expected to be up to

1.62 times that of the z9 EC (2094) 701.

The LSPR contains the Internal Throughput Rate Ratios

(ITRRs) for the new z10 EC and the previous-generation

zSeries processor families based upon measurements

and projections using standard IBM benchmarks in a con-

trolled environment. The actual throughput that any user

may experience will vary depending upon considerations

such as the amount of multiprogramming in the user’s job

stream, the I/O conguration, and the workload processed.

14

z10 EC I/O Subsystem

z10 EC Channels and I/O Connectivity

The z10 EC contains an I/O subsystem infrastructure

which uses an I/O cage that provides 28 I/O slots and the

ability to have one to three I/O cages delivering a total of

84 I/O slots. ESCON, FICON Express4, FICON Express2,

FICON Express, OSA-Express3 LR, OSA-Express2, and

Crypto Express2 features plug into the z10 EC I/O cage

along with any ISC-3s and InniBand Multiplexer (IFB-

MP) cards. All I/O features and their support cards can

be hot-plugged in the I/O cage. Installation of an I/O

cage remains a disruptive MES, so the Plan Ahead fea-

ture remains an important consideration when ordering a

z10 EC system. Each model ships with one I/O cage as

standard in the A-Frame (the A-Frame also contains the

Central Electronic Complex [CEC] cage where the books

reside) and any additional I/O cages are installed in the

Z-Frame. Each IFB-MP has a bandwidth up to 6 GigaBytes

per second (GB/sec) for I/O domains and MBA fanout

cards provide 2.0 GB/sec for ICB-4s.

The z10 EC continues to support all of the features

announced with the System z9 EC such as:

• Logical Channel Subsystems (LCSSs) and support for

up to 60 logical partitions

• Increased number of Subchannels (63.75k)

• Multiple Subchannel Sets (MSS)

• Redundant I/O Interconnect

• Physical Channel IDs (PCHIDs)

• System Initiated CHPID Reconguration

• Logical Channel SubSystem (LCSS) Spanning

ESCON Channels

The z10 EC supports up to 1,024 ESCON channels. The

high density ESCON feature has 16 ports, 15 of which

can be activated for customer use. One port is always

reserved as a spare which is activated in the event of a

failure of one of the other ports. For high availability the

initial order of ESCON features will deliver two 16-port

ESCON features and the active ports will be distributed

across those features.

Fibre Channel Connectivity

The on demand operating environment requires fast data

access, continuous data availability, and improved exibil-

ity, all with a lower cost of ownership. The four port FICON

Express4 and FICON Express2 features available on the

z9 EC continue to be supported on the System z10 EC.

FICON Express4 Channels

The z10 EC supports up to 336 FICON Express4 chan-

nels, each one operating at 1, 2 or 4 Gb/sec auto-negoti-

ated. The FICON Express4 features are available in long

wavelength (LX) and short wavelength (SX). For customers

exploiting LX, there are two options available for unre-

peated distances of up to 4 kilometers (2.5 miles) or up to

10 kilometers (6.2 miles). Both LX features use 9 micron

single mode ber optic cables. The SX feature uses 50

or 62.5 micron multimode ber optic cables. Each FICON

Express4 feature has 4 independent channels (ports) and

can be congured to carry native FICON trafc or Fibre

Channel (SCSI) trafc. LX and SX cannot be intermixed on

a single feature. The receiving devices must correspond to

the appropriate LX or SX feature. The maximum number of

FICON Express4 features is 84 using three I/O cages.

15