IBM POWER7 User Manual

POWER7

Technology Insight

Wayne Huang

Fang Shu Xin

IBM CONFIDENTIAL – FOR IBM AND BP USE ONLY – NOT FOR DISCLOSURE TO CUSTOMERS

IBM Power Systems

Agenda….

POWER7 Product Family POWER7 Processor Active Memory Expansion POWER7 TPMD OS Support on POWER7 POWER7 Servers

Power 750 Power 755 Power 770 Power 780

RAS Update I/O Update Summary

Power your planet

IBM Power Systems

0

100

200

300

400

500

600

700

JS23 JS43 520 550 750 560 570/16 570/32 770 780 595

POWER7 System Highlights

Balance System Design

 Cache, Memory, and IO

POWER7 Processor Technology

 6thImplementation of multi-core design  On chip L2 & L3 caches

POWER7 System Architecture

 Blades to High End offerings  Enhances memory implementation  PCIe, SAS / SATA

Built in Virtualizatio n

 Memory Expansion  VM Control

Green Technologies

 Processor Nap & Sleep Mode  Memory Power Down support  Aggressive Power Save / Capping Modes

Availability

 Processor Instruction Retry  Alternate Process Recovery  Concurrent Add & Services

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IBM Power Systems

Power 2010 全新产品线

 全新发布的Power7产品线

 Pow er 750 (8, 16,32 C ore)  Pow er 755 ( 32 C or e) for HPC  Pow er 770 (12, 24,36,48 C ore)  Pow er 780 (16, 32,48,64 C ore)

 POWER6产品线2010年继续支持

 Pow er 520, Bl ades  Pow er 550  Pow er 560  Pow er 570  Pow er 575  Pow er 595

Power 750

Power 770

Power 755

Power 780

Power 7 Systems

Power 6 Systems

Power 520

Power Blades

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Power 595

Power 570

Power 575

Power 560

Power 550

IBM Power Systems

POWER7 Processor

POWER7

Pushing the

Limits

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IBM Power Systems

Challenge: Beating Physics to Realize Multi-core Potential

Need to Amplify Effective

Socket Throughput

to Close Gap and

Achieve Potential

Compute Throughput Potential

Socket Throughput Limitation

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(Physical signal economics)

IBM Power Systems

Single Image Virtualized/Cloud

Trends in Server Evolution

Emerging Entry Server

Virtualiz ed/Cloud Platform

- A simple matter of riding the multi-core trend?

- Ad d more core s to the die,

Enabled by:

8-core

- Technology

- Innovation

Driven by:

8-core

- IT Evolution

- Economics

Time

Traditi onal Entry Server

Single Image Platform

16 to 32-way SMP Server

2 to 4 socket

Traditional High-End Server

Virtualiz ed Consolidation Platform

beef up some interfaces, and scale to a large SMP?

2-core 2-core

2 to 4 socket

4 to 8-way SMP Server

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8 to 32 socket

16 to 64-way SMP Server

* Statements regarding SMP servers

do not imply that IBM will introduce a system with this capability.

IBM Power Systems

Single Image Virtualized/Cloud

Trends in Server Evolution

Emerging Entry Server

Virtualiz ed/Cloud Platform

- A simple matter of riding the multi-core trend?

- Ad d more core s to the die,

Enabled by:

- Technology

- Innovation

8-core

beef up some interfaces, and scale to a large SMP?

Not so simple:

Driven by:

8-core

- IT Evolution

- Economics

Time

Traditi onal Entry Server

Single Image Platform

16 to 32-way SMP Server

2 to 4 socket

8-core

- Emerging entry servers have characteristics similar to traditional high-end large SMP servers

Traditional High-End Server

Virtualiz ed Consolidation Platform

Achieving solid virtual machine performance

2-core 2-core

requires a Balanced

2-core 2-core

2 to 4 socket

4 to 8-way SMP Server

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8 to 32 socket

16 to 64-way SMP Server

System Structure.

* Statements regarding SMP servers

do not imply that IBM will introduce a system with this capability.

IBM Power Systems

Single Image Virtualized/Cloud UltraScale Cloud

Trends in Server Evolution

Enabled by:

Emerging Entry Server

Virtualiz ed/Cloud Platform

8-core

Emerging High-End Server

UltraScale Cloud Platform

- Technology

- Innovation

Driven by:

8-core

- IT Evolution

- Economics

Time

Traditi onal Entry Server

Single Image Platform

16 to 32-way SMP Server

2 to 4 socket

Traditional High-End Server

Virtualiz ed Consolidation Platform

8 to 32 socket

64 to 256-way SMP Server

Same enablers and driving factors apply at larger scale

2-core 2-core

2 to 4 socket

4 to 8-way SMP Server

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8 to 32 socket

16 to 64-way SMP Server

* Statements regarding SMP servers

do not imply that IBM will introduce a system with this capability.

IBM Power Systems

Challenge: How does POWER7 mai ntain the Bal ance?

Need to Amplify Effective

Socket Throughput

to Close Gap and

Achieve Potential

Compute Throughput Potential

Cache Hierarchy Technology

and Innovation

Socket Throughput Limitation

Power your planet

(Physical signal economics)

IBM Power Systems

Challenge: How does POWER7 mai ntain the Bal ance?

Need to Amplify Effective

Socket Throughput

to Close Gap and

Achieve Potential

Compute Throughput Potential

Advances in Memory Subsystem

Cache Hierarchy Technology

and Innovation

Socket Throughput Limitation

Power your planet

(Physical signal economics)

IBM Power Systems

Challenge: How does POWER7 mai ntain the Bal ance?

Need to Amplify Effective

Socket Throughput

to Close Gap and

Achieve Potential

Compute Throughput Potential

Advances in Off-Chip Signaling

Technology

Advances in Memory Subsystem

Cache Hierarchy Technology

and Innovation

Socket Throughput Limitation

Power your planet

(Physical signal economics)

IBM Power Systems

Challenge: How does POWER7 mai ntain the Bal ance?

Need to Amplify Effective

Socket Throughput

to Close Gap and

Achieve Potential

Compute Throughput Potential

Exploit Long Ter m Investmen t

in Coherence Innovation

Advances in Off-Chip Signaling

Technology

Advances in Memory Subsystem

Cache Hierarchy Technology

and Innovation

Socket Throughput Limitation

Power your planet

(Physical signal economics)

IBM Power Systems

POWER7 Processor

POWER7

Processor

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IBM Power Systems

20+ Years of POWER Processors

45nm

1.0um

POWER1

-AMERICA’s

Muskie A35

-Cobra A10

-64 bit

.72um

RSC

RS64IV Sstar

RS64III Pulsar

RS64II North Star

RS64I Apache BiCMOS

.5um

.35um

POWER2 P2SC

.6um

-601

.5um

.35um

TM

-603

.5um

.35um

.25um

604e

.25um

.22um

POWER3

-630

.18um

TM

180nm

POWER4

-Dual Core

TM

65nm

130nm

TM

POWER5

-SMT

POWER6

-Ultra High Frequency

TM

Major POWER® Innovation

-1990 RISC Architecture

-1994 SMP

-1995 Out of Order Execution

-1996 64 Bit Enterprise Architecture

-1997 Hardware Multi-Threading

-2001 Dual Core Processors

-2001 Large System Scaling

-2001 Shared Caches

-2003 On Chip Memory Control

-2003 SMT

-2006 Ultra High Frequency

-2006 Dual Scope Coherence Mgmt

-2006 Decimal Float/VSX

-2006 Processor Recovery/Sparing

-2009 Balanced Multi-core Pr ocesso r

-2009 On Chip EDRAM

Next Gen.

POWER7

-Multi-core

1990 1995 2000 2005 2010

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* Dates represent approximate proc essor power-on dates, not sys tem availability

IBM Power Systems

IBM risc processors have many innovations..

pSeries p640,

64bit P2,P3,P4

64bit

32bit

RS64

Apache

125

Power3

200+

RS64-II

Northstar

262.5

604e

332 / 375

1998

RS64-II

Northstar

340

1999 2000

p610

Power3-II

333 / 375 / 450

RS64-III

Pulsar

450

pSeries p620, p660, & p680

POWER4

1.1+GHz

RS64-IV

Sstar

600+ / 750

2001

POWER4

1.5GHz

Regatta

7450

800MHz/1.0GHz

2002

POWER4

1.8GHz

2003

Copper =

Power your planet

& SOI =

& low-k =

Σ

IBM Power Systems

Processor Technology Roadmap

POWER6

65 nm

POWER5

130 nm

POWER4

180 nm

POWER8

POWER7

45 nm

 Dual Core  Chip Multi Processing  Distributed Switch  Shared L2  Dynamic LPARs (32)

2001

Power your planet

 Dual Core  Enhanced Scaling  SMT  Distributed Switch +  Core Parallelism +  FP Performance +  Memory bandwidth +  Virtualization

2004

 Dual Core  High Frequencies  Virtualization +  Memory Subsystem +  Altivec  Instruction Retry  Dyn Energy Mgmt  SMT +  Protection Keys

2007

 Multi Core  On-Chip eDRAM  Power Optimized Cores  Mem Subsystem ++  SMT++  Reliability +  VSM & VSX (AltiVec)  Protection Keys+

2010

 Concept Phase

IBM Power Systems

Processor Designs contrast: 0.278nm H2O

POWER5 POWER5+ POWER6 POWER7

Technology 130 nm 90 nm 60 nm 45 nm

Size 389 mm

2

245 mm

2

341 mm

2

567 mm

Transistors 276 M 276 M 790 M 1.2 B

Cores 2 2 2 4 / 6 / 8

Frequencies 1.65 GHz 1.9 GHz 3-5 GHz 3-4 GHz

L2 Cache 1.9 MB Shared 1.9 MB Shared 4 MB / Core 256 KB / Core L3 Cache 36 MB 36 MB 32 MB 4 MB / Core

Memory Cntrl 1 1 2 / 1 2

LPAR 10 / Core 10 / Core 10 / Core 10 / Core

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2

IBM Power Systems

POWER6 / POWER7

POWER6

M

E M O

R

Y

L3

Mem

Ctrl

Alti

Vec

L3

Dir

SMT Core

4MB

SMT Core

4MB

L2

Bus Fabric Controller

GX Bus Cntrl

GX+ Bridge

Chip

to Chip

L2

to Chip

Alti

Vec

Chip

L3

Dir

Mem

Ctrl

L3

M

E M O

R

Y

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IBM Power Systems

POWER6 / POWER7

POWER7

POWER6

M

L3

E M O

R

Y

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Mem

Ctrl

Alti

Vec

SMT Core

Alti

Vec

L3 Cache

L3

Dir

4MB

L2

Bus Fabric Controller

GX Bus Cntrl

GX+ Bridge

Chip

to Chip

eDRAM (Embedded D y namic RAM )

 L3 — 6:1 latency improvement (vs. external L3) and 2x BW improvements  Capacitor vs transister  1/3 space (vs 6Trn SRAM cell), 1/5 standby power of standard SRAM  Soft error rated 250x lower than SRAM  Savings of ~ 1.5B transistors over other RAM

4MB

L2

Chip

to Chip

L3

Dir

Mem

Ctrl

L3

M

E M O

R

Y

IBM POWER7 User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

Agenda….

POWER7 System Highlights

POWER7 Processor

POWER7 Processor

20+ Years of POWER Processors

Processor Technology Roadmap

Processor Designs contrast: 0.278nm H2O

POWER6 / POWER7

POWER6 / POWER7