Technical Information Manual
PC 730 (Type 6877) and PC 750 (Type 6887)
Page 2
Page 3
IBM
Technical Information Manual
PC 730 (Type 6877) and PC 750 (Type 6887)
Page 4
Note
Before using this information and the product it supports, be sure to read the general
information under Appendix B, “Notices and Trademarks” on page 65.
First Edition (June 1996)
The following paragraph does not apply to the United Kingdom or any country where such
provisions are inconsistent with local law: INTERNATIONAL BUSINESS MACHINES
CORPORATION PROVIDES THIS PUBLICATION “AS IS” WITHOUT WARRANTY OF ANY KIND,
EITHER EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Some states do not allow
disclaimer of express or implied warranties in certain transactions, therefore, this statement may not
apply to you.
This publication could include technical inaccuracies or typographical errors. Changes are periodically
made to the information herein; these changes will be incorporated in new editions of the publication.
IBM may make improvements and/or changes in the product(s) and/or the program(s) described in this
publication at any time.
It is possible that this publication may contain reference to, or information about, IBM products
(machines and programs), programming, or services that are not announced in your country. Such
references or information must not be construed to mean that IBM intends to announce such IBM
products, programming, or services in your country.
Requests for technical information about IBM products should be made to your IBM reseller or IBM
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IBM may have patents or pending patent applications covering subject matter in this document. The
furnishing of this document does not give you any license to these patents. You can send license
inquiries, in writing, to:
IBM Director of Licensing
IBM Corporation
500 Columbus Avenue
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U.S.A.
Copyright International Business Machines Corporation June 1996. All rights reserved.
Note to U.S. Government Users — Documentation related to restricted rights — Use, duplication or
disclosure is subject to restrictions set forth in GSA ADP Schedule Contract with IBM Corp.
This
the IBM PC 750 (Type 6887). It is intended for developers who want to provide hardware
and software products to operate with these IBM computers and provides a more in-depth
view of how these IBM computers work. Users of this publication should have an
understanding of computer architecture and programming concepts.
Technical Information Manual
provides information for the IBM PC 730 (Type 6877) and
Copyright IBM Corp. June 1996vii
Page 10
Related Publications
The
Technical Information Manual
publications contain additional information about many of the subjects that are discussed in
this manual and also provide additional information.
IBM publications:
Understanding Your Personal Computer PC 730 (Type 6877) and PC 750 (Type 6887)
Using Your Personal Computer PC 730 (Type 6877) and PC 750 (Type 6887)
Installing Options in Your Personal Computer PC 730 (Type 6877) and PC 750 (Type
6887)
IBM Personal System/2 and Personal Computer BIOS Interface Technical Reference
IBM Personal System/2 Hardware Interface Technical Reference–Common Interfaces
IBM Personal System/2 ATA/IDE Fixed Disk Drives Technical Reference
IBM Personal System/2 Hardware Interface Technical Reference–Architectures
Other publications:
can be used with the following publications. These
S3 Trio64V+
Intel Microprocessor and Peripheral Component Literature
Corporation, Santa Clara, CA
82420/82430 PCISet ISA and EISA Bridges
CA
82430 PCISet Cache/Memory Subsystem
CA
PCI Local Bus Specification
Extended Capabilities Port: Specification Kit,
Redmond, WA
ANSI ATA-2 (AT Attachment)
, published by S3 Incorporated, Santa Clara, CA
, published by Intel Corporation, Santa Clara,
, published by Intel Corporation, Santa Clara,
, published by the PCI Special Interest Group, Hillsboro, OR
published by Microsoft Corporation,
, published by Intel
viii
Page 11
Manual Style
Warning: The term
changed. Use of reserved areas can cause compatibility problems, loss of data, or
permanent damage to the hardware. When the contents of a register are changed, the state
of the reserved bits must be preserved. When possible, read the register first and change
only the bits that must be changed.
Signals
In this manual, signals are represented in a small, all-capital-letter format (-ACK). A minus
sign in front of the signal indicates that the signal is active low. No sign in front of the signal
indicates that the signal is active high.
Numerics
In this manual, use of the letter “h” indicates a hexadecimal number. Also, when numerical
modifiers such as “K”, “M” and “G“ are used, they typically indicate powers of 2, not powers
of 10 (unless expressing hard disk storage capacity). For example, 1 KB equals 1024 bytes
(210), 1 MB equals 1 048576 bytes (220), and 1 GB equals 1073741824 bytes (230).
When expressing storage capacity, MB equals 1000 KB (1024000). The value is
determined by counting the number of sectors and assuming that every two sectors equals 1
KB.
reserved
describes certain signals, bits, and registers that should not be
Note: The actual storage capacity available to the user can vary, depending on the
operating system and other system requirements.
ix
Page 12
x
Page 13
Chapter 1.System Description
Personal Computer Description .................................. 2
Advanced Power Management (APM) .............................. 21
Copyright IBM Corp. June 19961
Page 14
Personal Computer Description
The IBM PC 730 (Type 6877) and PC 750 (Type 6887) is a versatile product designed to
provide state-of-the-art computing power with room for growth in the future. Several model
variations are available. The key features are:
Intel Pentium microprocessor
Up to 128 MB of system memory
S3 Trio64V+ video subsystem
2 MB of video memory
Industry-standard compatibility
ISA/PCI I/O-bus compatibility
ISA/PCI expansion slots
Enhanced EIDE drives
Bus-master EIDE controller
Two 16550-UART serial ports (serial A and serial B)
One infrared I/O port
256 KB of external L2 cache (expandable to 512 KB)
Support for advanced power management
EnergyStar compliant
Support for Plug and Play adapters and monitors
Security features
Ready-to-configure (RTC) CD-ROM containing device drivers for all supported operating
systems
System unit packaging
– The PC 730 has three expansion slots and three drive bays
– The PC 750 has five expansion slots and five drive bays
2 Chapter 1. System Description
Page 15
System Overview
Microprocessor
- Coprocessor
- L1 Cache
Processor (Local) Bus - 64-Bit
Data Buffers
Control
(ISA, DMA,
IRQ)
CMOS, Flash
Keyboard,
Mouse Ports
I/O Control
..
Memory
(DRAM)
PCI I/O Bus - 32-Bit
IDE Control
Hard
Disk Drive,
CD-ROM
ISA I/O Bus - 16-Bit
Serial Ports
Controls
(Memory,
L2 Cache,
PCI)
Video Control,
DRAM
Video
Port
Infrared Port
Parallel Port
L2 Cache
(SRAM)
Riser Card
(ISA/PCI Slots)
Diskette Drive
Chapter 1. System Description3
Page 16
System Features
The following figure lists the devices and features for the PC 730 and PC 750 system board
in the IBM 700 series personal computer family.
Figure 1 (Page 1 of 3). PC System Board Devices, Features, and Options
Figure 1 (Page 2 of 3). PC System Board Devices, Features, and Options
DeviceFeatures
Interrupt Controller15 levels of system interrupts
System TimersChannel 0–System timer
Audio SubsystemMwave DSP data collaboration ISA adapter (optional)
Diskette Drive ControllerController supports two internal diskette drives
Keyboard/Auxiliary-Device
Controller
Parallel Port ControllerOne ECP parallel port
Serial Port ControllerTwo 16550-UART serial ports (Serial A and B)
High Speed Infrared (HSIR)
Controller
Hard Disk Drive ControllerController supports four EIDE devices
Power145/200 watt power supplies
AT-bus interrupts are edge triggered
PCI bus interrupts are level sensitive
Channel 1–Refresh generation
Channel 2–Tone generation for speaker
Programmable DSP
28.8 Kbps data/fax modem
Sound Blaster Pro compatibility
Front panel audio control
A 3.5-in. diskette drive (1.44 MB and 2.88 MB) is standard
A 5.25-in. diskette drive (360 KB and 1.2 MB) is optional
A second 3.25-in. diskette drive (1.44 MB and 2.88 MB) is
optional and requires a 3.5-in. conversion kit for a 5.25-in.
bay
FIFO operations
101-key or 102-key keyboard
Keyboard connector
Auxiliary-device connector
Password security
Supports standard I/O mode, extended capabilities port (ECP)
mode, and enhanced parallel port (EPP) mode
Note: Serial B is disabled if infrared port is used
One HSIR port
Infrared Data Association (IrDa) interface
Infrared transceiver (optional)
PCI bus-master EIDE interface
Two PCI bus-master channels
One channel for each EIDE connector (primary and
secondary)
SCSI hard disk drives require a PCI SCSI adapter
PC 730: 145 W, 115/230 V ac, 50/60 Hz
PC 750: 200 W, 115/230 V ac, 50/60 Hz
Built-in overload and surge protection
Advanced Power Management
Chapter 1. System Description5
Page 18
Figure 1 (Page 3 of 3). PC System Board Devices, Features, and Options
DeviceFeatures
SecurityPower-on password
Administrator password
Startup sequence control
Unattended Start mode
Diskette I/O control
Hard disk I/O control
Lockable cover
Software-readable hardware IDs
Tamper switch
6 Chapter 1. System Description
Page 19
System Board
The system board might look slightly different from the one shown.
Note: A diagram of the system board, including switch and jumper settings, is attached to
the underside of the computer top cover.
1Power connector (5 V)
2J9 modem ring
3J14 LAN Wake-Up
4J13 modem ring
5J15 password jumper (CMOS clear)
6J16 auxiliary power
7J18 on/off switch
8J19 tamper connector
9Secondary IDE connector
1Primary IDE connector
11 Diskette connector
12 Tamper (reserved)
13 Battery
14Voltage regulator connector
15Power connector (3.3 V)
16Switch set (SW1)
17Processor upgrade socket
18Cache memory module connector
19Power LED connector
2Hard disk access LED connector
21 Speaker connector
22DSP audio connector
23 DIMM/SIMM connectors
24VESA passthrough connector
25 Riser connector
26 Video port
27 ECP/EPP port
28Serial (B) port
29Serial (A) port
3 Mouse port
31 Keyboard port
32 Infrared port
1
20 1
32
31
Figure 2. System Board Diagram
1
Extended capabilities port (ECP) and enhanced parallel port (EPP)
Chapter 1. System Description7
Page 20
System Address Maps
Memory Map
The first 640 KB of system board RAM is mapped starting at address 0000000h. A 256-byte
area and a 1 KB area of this RAM are reserved for BIOS data areas. Memory can be
mapped differently if POST detects an error. See the section about BIOS data areas in the
IBM Personal System/2 and Personal Computer BIOS Interface Technical Reference
details.
Note: After POST is completed, portions of the 64 KB segment starting at memory address
E0000h, are available for upper memory blocks and adapters.
Figure 3. System Memory Map
Address Range (hex)SizeDescription
00000000–0007FFFF512 KBConventional
00080000–0009FBFF127 KBExtended conventional
0009FC00–0009FFFF1 KBExtended BIOS data
000A0000–000BFFFF128 KBS3 Trio64V+
000C0000–000C7FFF32 KBS3 Trio64V+ ROM BIOS (shadowed)
000D8000–000DFFFF96 KBISA/PCI space; available to ISA adapter ROMs
000E0000–000FFFFF128 KBSystem ROM BIOS (ISA bus, shadowed)
00100000–00FFFFFF15 MBISA/PCI space
01000000–07FFFFFF111 MBPCI space
08000000–72FFFFFF1712 MBPCI space
07300000–737FFFFF8 MBS3 Trio64V+ linear frame buffer
73800000–FFFDFFFF2247.9 MBPCI space
FFFE0000–FFFFFFFF128 KBSystem ROM BIOS (ISA bus)
for
E000:0-E800:0 used for Advanced Power Management
(APM)
8 Chapter 1. System Description
Page 21
Input/Output Address Map
The following figures list the system board I/O address maps. Any addresses that are not
shown are reserved.
Figure 4 (Page 1 of 3). I/O Address Map
Address (Hex)Device
0000–000FDMA 1
0020–003FInterrupt controller 1
0040–0043Timer 1
0044–0047Available I/O for ISA/PCI bus
0048–0049Rapid Resume Advanced Power Management registers
004A–004B, bits 7,6CPU speed registers
004C–005FAvailable I/O for ISA/PCI bus
0060Keyboard controller data byte
0061System Port B
0062–0063Available I/O for ISA/PCI bus
0064Keyboard controller, command and status byte
0065–006FAvailable I/O for ISA/PCI bus
0070, bit 7Enable/disable NMI
0070, bits 6:0Real time clock address
0071Real time clock data
0072–007FAvailable I/O for ISA/PCI bus
0077DCC setup/presence detect
0078GPIO CPU speed detect
0079National 87306 GPIO, A17 for flash
007ANational 87306 GPIO
007C–007FL2 Cache ID, tamper EEPROM, SMI/PCI IRQ enable
0080POST Checkpoint register
0080-008FDMA page register
0090–0091Available I/O for ISA/PCI bus
0092System Port A (not supported)
0093Available I/O for ISA/PCI bus
0094Reserved
0095–009FAvailable I/O for ISA/PCI bus
00A0–00BFInterrupt controller 2
00C0–00DEDMA 2
00DF–00EDAvailable I/O for ISA/PCI bus
00EEReserved
00EFReserved
00F0Coprocessor busy–Clear
00F1Coprocessor reset
00F2–00F3Available I/O for ISA/PCI bus
00F4Slow CPU
00F5Fast CPU
00F6–00FFAvailable I/O for ISA/PCI bus
0100–0105Reserved riser
0106–016FAvailable I/O for ISA/PCI bus
0130–013FDefault for data collaboration card (DCC)
0170–0177IDE channel 1
01B0–01BFAlternate for data collaboration card (DCC)
01F0–01F7IDE channel 0
01F8–021FAvailable I/O for ISA/PCI bus
0220–0227National 87306, serial port 3 or 4
0228–0277Available I/O for ISA/PCI bus
0230–023FAlternate for data collaboration card (DCC)
0278–027FNational 87306, parallel port 3
Chapter 1. System Description9
Page 22
Figure 4 (Page 2 of 3). I/O Address Map
Address (Hex)Device
0280–02E7Available I/O for ISA/PCI bus
02B0–02BFAlternate for data collaboration card (DCC)
02E8–02EFNational 87306, serial port 3 or 4
02F0–02F7Available I/O for ISA/PCI bus
02F8–02FFNational 87306, serial port 2 (system board)
0300–0337Available I/O for ISA/PCI bus
0338–033FNational 87306, serial port 3 or 4
0340–0375Available I/O for ISA/PCI bus
0376–0377IDE channel 1
0377, bit 7IDE, diskette change
0378–037FNational 87306, parallel port 2
0380–0387Available I/O for ISA/PCI bus
0388Available I/O for ISA/PCI bus
0389Available I/O for ISA/PCI bus
038AAvailable I/O for ISA/PCI bus
038BAvailable I/O for ISA/PCI bus
038C–03BBAvailable I/O for ISA/PCI bus
03B4–03BBS3 Trio64V+
03BC–03BENational 87306, parallel port 1 (system board)
03BF–03DFS3 Trio64V+
03E0–03E7Available I/O for ISA/PCI bus
03E8–03EFNational 87306, serial port 3 or 4
03F0–03F5National 87306, diskette channel 0
03F6IDE channel 0
03F7, bit 7IDE, diskette change
03F7, bits 6:0IDE channel 0
03F8–03FFNational 87306, serial port 1 (system board)
0400–052FAvailable I/O for ISA/PCI bus
0530–0537Available I/O for ISA/PCI bus
0530–0537Available I/O for ISA/PCI bus
0CF8–0CFBPCI configuration address register
0CFC–0CFFPCI configuration data registers
0D00–0E7FAvailable I/O for ISA/PCI bus
0E80–0E87Available I/O for ISA/PCI bus
0E88–0F3FAvailable I/O for ISA/PCI bus
0F40–0F47Available I/O for ISA/PCI bus
0F47–042E7Available I/O for ISA/PCI bus
42E8S3 Trio64V+
42E9–4AE7Available I/O for ISA/PCI bus
4AE8S3 Trio64V+
4AE9–82E7Available I/O for ISA/PCI bus
82E8S3 Trio64V+
82E9–86E7Available I/O for ISA/PCI bus
86E8S3 Trio64V+
86E9–8AE7Available I/O for ISA/PCI bus
8AE8S3 Trio64V+
8AE9–8EE7Available I/O for ISA/PCI bus
8EE8S3 Trio64V+
8EE9–92E7Available I/O for ISA/PCI bus
92E8S3 Trio64V+
92E9–96E7Available I/O for ISA/PCI bus
96E8S3 Trio64V+
96E9–9AE7Available I/O for ISA/PCI bus
9AE8S3 Trio64V+
9AE9–9EE7Available I/O for ISA/PCI bus
10 Chapter 1. System Description
Page 23
Figure 4 (Page 3 of 3). I/O Address Map
Address (Hex)Device
9EE8S3 Trio64V+
9EE9–A2E7Available I/O for ISA/PCI bus
A2E8S3 Trio64V+
A2E9–A6E7Available I/O for ISA/PCI bus
A6E8S3 Trio64V+
A6E9–AAE7Available I/O for ISA/PCI bus
AAE8S3 Trio64V+
AAE9–B2E7Available I/O for ISA/PCI bus
B2E8S3 Trio64V+
B2E9–B6E7Available I/O for ISA/PCI bus
B6E8S3 Trio64V+
B6E9–BAE7Available I/O for ISA/PCI bus
BAE8S3 Trio64V+
BAE9–BEE7Available I/O for ISA/PCI bus
BEE8S3 Trio64V+
BEE9–E2E7Available I/O for ISA/PCI bus
E2E8S3 Trio64V+
E2E9Available I/O for ISA/PCI bus
E2EAS3 Trio64V+
E2EB–FFFFAvailable I/O for ISA/PCI bus
Chapter 1. System Description11
Page 24
DMA I/O Address Map
Figure 5. DMA I/O Addresses for Memory Addresses, Word Counts, and Command/Status
The following figures list the interrupt request (IRQ) and direct memory access (DMA)
channel assignments.
Interrupt Request Assignments (IRQ)
Figure 6. Interrupt Request Assignments
Interrupt
Request
(IRQ)
NMICritical system error
SMISystem/power management interrupt
0Reserved (internal timer)
1Reserved (keyboard buffer full)
2Reserved (cascade interrupt from slave)
3Serial port 2†
4Serial port 1‡
5Parallel port 2†
6Diskette controller‡
7Parallel port 1 or business audio if installed‡
8Reserved (real-time clock)
9Video adapter (if installed) or business audio†
10ISA/PCI bus or business audio.
11ISA/PCI bus or business audio.
12Mouse port†
13Reserved (math coprocessor)
14IDE Channel 1†
15IDE Channel 2‡
† If not assigned, this resource is available for ISA/PCI bus.
‡ If not assigned, this resource is available for ISA bus.
System Resource
Chapter 1. System Description13
Page 26
DMA Channel Assignments
Figure 7. DMA Channel Assignments
DMA
Channel Data Width System Resource
08 bitsBusiness audio†
18 bitsBusiness audio or LAN†
28 bitsReserved (diskette drive)
38 bitsBusiness audio or ECP parallel port†
4 Reserved (cascade channel)
516 bitsISA bus
616 bitsISA bus
716 bitsISA bus
† If not assigned, this resource is available for ISA bus.
14 Chapter 1. System Description
Page 27
Power Supply
The power supply converts the ac input voltage into four dc output voltages and provides
power for the following:
System board
Adapters
Internal DASD drives
Keyboard and auxiliary devices
The power supply requirements are supplied by a 145-watt (PC 730) or 200-watt (PC 750)
power supply. The following figure shows the input power specifications. The power
available for each component with the system is shown in Figure 11 on page 17.
Figure 8. AC Input Power Requirements
SpecificationMeasurements
Input voltage (range is switch selected; sine wave input is required)
Low range110 (min)–127 (max) V ac
High range200 (min)–240 (max) V ac
Input frequency 50 Hz ± 3 Hz or 60 Hz ± 3 Hz
Power Output Parameters
The power supply dc outputs shown in the following figures include the current supply
capability of all the connectors including system board, DASD, PCI, and auxiliary outputs.
PC 730
Figure 9. Power Output Parameters (145 Watt)
Output VoltageRegulationMinimum Current
+5 volts+5% to -4%1.5 A18.0 A
+12 volts+5% to -4%0.2 A 4.2 A
-12 volts+10% to -9%0.0 A 0.4 A
-5 volts+5% to -4%0.0 A 0.3 A
+3.52 volts+2.5% to -2.5%0.0 A10.0 A
+5 volt (auxiliary)+5% to -10%0.0 A .02 A
Note: Simultaneous loading of +5 V and +3.52 V must not exceed 90 watts.
(amps)
Maximum Current
(amps)
Chapter 1. System Description15
Page 28
PC 750
Figure 10. DC Output Parameters (200 Watt)
Output VoltageRegulationMinimum Current
(amps)
+5 volts+5% to -4%1.5 A20.0 A
+12 volts+5% to -4%0.2 A 8.0 A
-12 volts+10% to -9%0.0 A 0.5 A
-5 volts+5% to -4%0.0 A 0.5 A
+3.52 volts+2.5% to -2.5%0.0 A20.0 A
+5 volt (auxiliary)+5% to -10%0.0 A .02 A
Maximum Current
(amps)
Note: Simultaneous loading of +5 V and +3.52 V must not exceed 90 watts maximum.
The power supply provides 180 watts of continuous power and 200 watts at peak power to
the system board and peripheral devices. It provides a fan that cools both the power supply
and the microprocessor by drawing external air through the power supply and blowing it onto
the microprocessor. A single connector provides the voltages required by the system board,
including +3.52 V dc. Five connectors are provided for attachment of peripheral devices.
16 Chapter 1. System Description
Page 29
Component Outputs
The power supply provides separate voltage sources for the system board and internal
storage devices. The following figure shows the approximate power that is provided for
system components. Many components draw less current than the maximum shown.
Figure 11. Component Maximum Current
Supply Voltage (V dc)Maximum Current (mA)Regulation Limits
System Board:
Keyboard Port:
Auxiliary Device Port:
AT-Bus Adapters (Per Slot):
PCI-bus Adapters (Per Slot)†:
Internal DASD:
† For each PCI connector, the maximum power consumption is rated at 25 watts for +5 V and +3.52 V
combined.
+3.52 V dc 3000 mA+2.5% to −2.5%
+5.0 V dc 4000 mA+5.0% to −5.0%
+12.0 V dc 25.0 mA+5.0% to −5.0%
−12.0 V dc 25.0 mA+10.0% to −9.0%
+5.0 V dc275 mA +5.0% to −5.0%
+5.0 V dc 300 mA+5.0% to −5.0%
+5.0 V dc 4500 mA+5.0% to −5.0%
−5.0 V dc 200 mA+5.0% to −5.0%
+12.0 V dc 1500 mA+5.0% to −5.0%
−12.0 V dc 300 mA+5.0% to −5.0%
+5.0 V dc 5000 mA+5.0% to −4.0%
+3.52 V dc 5000 mA±300 mV
+5.0 V dc 1400 mA+5.0% to −5.0%
+12.0 V dc 1500 mA+5.0% to −5.0%
Note: Some adapters and hard disk drives draw more current than the recommended limits.
These adapters and drives can be installed in the system; however, the power supply
will shut down if the total power used exceeds the maximum power that is available.
Chapter 1. System Description17
Page 30
Output Protection
The power supply protects against output overcurrent, overvoltage, and short circuits.
Please see the power supply specifications for details.
A short circuit that is placed on any dc output (between outputs or between an output and dc
return) latches all dc outputs into a shutdown state, with no damage to the power supply.
If this shutdown state occurs, the power supply returns to normal operation only after the
fault has been removed and the power switch has been turned off for at least one second.
If an overvoltage fault occurs (in the power supply), the power supply latches all dc outputs
into a shutdown state before any output exceeds 130% of the nominal value of the power
supply.
Connector Description
The power supply has up to five 4-pin connectors for internal devices. The total power used
by the connectors must not exceed the amount shown in Figure 11 on page 17. Signal and
pin assignments are shown on page 33.
18 Chapter 1. System Description
Page 31
Physical Specifications
The following figure describe the physical specifications. Each mechanical package is
described separately.
PC 730
Figure 12. Physical Specifications (PC 730)
Size
Width360 mm (14.2 in.)
Depth450 mm (17.7 in.)
Height130 mm (5.1 in.)
Weight
Minimum configuration8.6 kg (19.0 lb)
Maximum configuration (fully populated with typical options)10.4 kg (23.0 lb)
Cables
Power cable1.8 m (6 ft)
Keyboard cable3.05 m (10 ft)
Air Temperature
System on10.0 to 32.0°C (50 to 90°F)
System off10.0 to 43.0°C (50 to 110°F)
Humidity
System on8% to 80%
System off8% to 80%
Maximum Altitude†2133.6 m (7000 ft)
Heat Output
Minimum configuration35 W (120 Btu per hour)
Maximum configuration‡200 W (685 Btu per hour)
Electrical
Input voltage (range is switch selected; sine wave input is required)
Low range110 (min) to 127 (max) V ac
High range200 (min) to 240 (max) V ac
Frequency50 ± 3 Hz or 60 ± 3 Hz
Input, in kilovolt-ampere (kVA)
Minimum configuration0.08 kVA
Maximum configuration0.30 kVA
Electromagnetic CompatibilityFCC Class B
† This is the maximum altitude at which the specified air temperatures apply. At higher altitudes,
the maximum air temperatures are lower than those specified.
‡ Based on the 145-watt maximum capacity of the system power supply.
Chapter 1. System Description19
Page 32
PC 750
Figure 13. Physical Specifications (PC 750)
Size
Width420 mm (16.5 in.)
Depth448 mm (17.6 in.)
Height160 mm (6.3 in.)
Weight
Minimum configuration12.7 Kg (28.0 lb)
Maximum configuration (fully populated with typical options)14.1 Kg (31.1 lb)
Cables
Power cable1.8 m (6 ft)
Keyboard cable3.05 m (10 ft)
Air Temperature
System on10.0 to 32.0°C (50 to 90°F)
System off10.0 to 43.0°C (50 to 110°F)
Humidity
System on8% to 80%
System off8% to 80%
Maximum Altitude†2133.6 m (7000 ft)
Heat Output
Minimum configuration35 W (120 Btu per hour)
Maximum configuration‡310 W (1060 Btu per hour)
Electrical
Input voltage (range is switch selected; sine wave input is required)
Low range110 (min) to 127 (max) V ac
High range200 (min) to 240 (max) V ac
Frequency50 ± 3 Hz or 60 ± 3 Hz
Input, in kilovolt-ampere (kVA)
Minimum configuration0.08 kVA
Maximum configuration0.52 kVA
Electromagnetic CompatibilityFCC Class B
† This is the maximum altitude at which the specified air temperatures apply. At higher altitudes,
the maximum air temperatures are lower than those specified.
‡ Based on the 200-watt maximum capacity of the system power supply.
20 Chapter 1. System Description
Page 33
Advanced Power Management (APM)
The computers come with built-in energy-saving capabilities. Advanced Power Management
(APM) is a feature that reduces the power consumption of systems when they are not being
used. APM, when enabled, initiates reduced-power modes for the monitor, microprocessor,
and hard disk drive after a specified period of inactivity.
The following figure summarizes APM modes.
Figure 14. Advanced Power Management Modes
ModePowerResponse
On (Ready)System is at full powerStandard operation
On (Standby)System is at reduced powerAny use of keyboard, mouse, or
OffSystem is powered offPower switch restores full power
The BIOS supports APM V1.O AND V1.1. This enables the system to enter a power
managed state, which reduces the power drawn from the ac wall outlet. Advanced Power
Management is enabled through the Configuration/Setup Utility program and is controlled by
the individual operating system.
Wake Up On Ring......................................... 25
Wake Up on Alarm ......................................... 25
PCMCIA and SCSI Devices .................................... 25
Copyright IBM Corp. June 199623
Page 36
Audio Subsystem
Some models have a front audio interface panel and an ISA data collaboration card (DCC)
featuring an Mwave digital-signal processor (DSP) subsystem.
The DCC provides the following support:
Programmable DSP
28.8 Kbps data/fax modem
Simultaneous record and playback of CD quality audio
Compatible with Sound Blaster Pro
Front panel headphone and microphone jacks with volume control
DCC Connectors
The DCC consists of a base card and a daughter card attached to the base card. The base
card contains the DSP and audio circuits. The daughter card contains the communication
interface required to access the telephone network. Four cables connect the DCC to the
system board.
The optional
technology, which provides very fast graphics and video acceleration. It is VGA- and
VESA-compatible (SVGA, DPMS, DDC).
LAN Wake-Up
Some models are configured for LAN connection with an Ethernet adapter or a token ring
adapter. These models are enabled for LAN Wake-Up using LAN adapters that support the
LAN Wake-Up feature.
The LAN Wake-Up feature allows the personal computer to be powered up in an unattended
mode, with keyboard and mouse input locked, when a specific LAN frame is passed to the
PC through the LAN. This feature works in coordination with Advanced Power Management
(APM).
24Chapter 2. Optional System Features
Matrox Millennium Graphics Adapter
takes advantage of 64-bit graphics engine
Page 37
Wake Up On Ring
When this option is enabled, the computer is turned on automatically when a ring is detected
on a modem. Two options control this feature:
Serial Ring Detect: Set this option to Enabled if the computer has an external modem
connected to the serial port.
Modem Ring Detect: Set this option to Enabled if the computer has an internal
modem.
Wake Up on Alarm
With this option, you can specify a date and time at which the computer will be turned on
automatically. This can be either a single event or a daily event.
PCMCIA and SCSI Devices
Personal Computer Memory Card International Association (PCMCIA)
System Interface (SCSI) devices support can be added with optional adapters.
and Small Computer
Chapter 2. Optional System Features25
Page 38
26Chapter 2. Optional System Features
Page 39
Chapter 3.Connectors and Jumpers
System Board Connectors.................................... 28
The following figures show the connectors that are available on the system board and riser
card.
Diskette Drive Connector
The computer has a 34-pin connector that supports the attachment of up to two diskette
drives. The following figure shows the signal and pin assignments for the system board
diskette drive connector.
Figure 16. Diskette Drive Connector Signal and Pin Assignments
The computer has a dedicated I/O channel for connecting a hard disk drive. The signals that
are provided by this connector include the 16-bit data bus, address lines A0 to A2, IRQ, and
-IO CS16. These signals operate in the same way as the normal I/O-channel signals. The
interface to the hard disk drive complies with
The address decode logic for the hard disk drive is on the system board. On a valid decode
of A0 through A15 equal to 01F0h through 01F7h, -HFCS0 (0170h through 0177h, -HFCS2 for a
secondary hard disk drive) goes active. On a valid decode of A0 through A15 equal to 03F6h
through 03F7h, -HFCS1 (0376h through 0377h, -HFCS3 for a secondary hard disk drive) goes
active.
The following figure shows the signal and pin assignments for the hard disk drive connector.
Figure 17. Hard Disk Drive Connector Signal and Pin Assignments
PinSignalPinSignal
1-RESET 2 Ground
3 Data bus bit 7 4 Data bus bit 8
5 Data bus bit 6 6 Data bus bit 9
7 Data bus bit 5 8 Data bus bit 10
9 Data bus bit 410 Data bus bit 11
11 Data bus bit 312 Data bus bit 12
13 Data bus bit 214 Data bus bit 13
15 Data bus bit 116 Data bus bit 14
17 Data bus bit 018 Data bus bit 15
19 Ground20 Key (Reserved)
21DRQ0/DRQ122 Ground
23-IO Write24 Ground
25-IO Read26 Ground
27 IO Channel Ready28VCC pullup
29DACK0/DACK130 Ground
31 IRQ14/IRQ1532VCC pullup
33 Device address A134Ground
35 Device address A036 Device address A2
37-HFCS038-HFCS1
39Activity #40 Ground
ANSI ATA-2 (AT Attachment)
.
Chapter 3. Connectors and Jumpers29
Page 42
ISA Connector
The I/O channel (ISA bus) is buffered to provide sufficient drive for the 98-pin connectors,
assuming two low-power Schottky (LS) loads per slot.
The following figure shows the signal and pin assignments for the I/O channel connectors.
The peripheral component interconnect (PCI) connector is a 124-pin connector. Personal
computers with PCI riser cards support the 32-bit 5-V dc local-bus signalling environment
that is defined in the
pin assignments for the PCI connector.
Note: 3.52 V dc is supplied through an optional 5 V dc to 3.52 V dc regulator.
Figure 19 (Page 1 of 2). PCI Connector Signal and Pin Assignments
Pin SignalPinSignal
1 A TRST#32 A Address 16
2A+12 V dc33 A+3.52 V dc
3 A TMS34 A FRAME#
4 A TDI35 A Ground
5A+5 V dc36 A TRDY#
6 A INTA#37 A Ground
7 A INTC#38 A STOP#
8A+5 V dc39 A+3.52 V dc
9 A Reserved40 A SDONE
10 A+5 V dc (I/O)41 A SBO#
11 A Reserved42 A Ground
12 A Ground43 A PAR
13 A Ground44 A Address/Data 15
14 A Reserved45 A+3.52 V dc
15 A RST#46 A Address/Data 13
16 A+5 V dc (I/O)47 A Address/Data 11
17 A GNT#48 A Ground
18 A Ground49 A Address/Data 9
19 A Reserved50 A Connector key
20 A Address/Data 30 51 A Connector key
21 A+3.52 V dc52 A C/BE0“#
22 A Address/Data 28 53 A+3.52 V dc
23 A Address/Data 26 54 A Address/Data 6
24 A Ground55 A Address/Data 4
25 A Address/Data 24 56 A Ground
26 A IDSEL57 A Address/Data 2
27 A+3.52 V dc58 A Address/Data 0
28 A Address/Data 2259 A+5 V dc (I/O)
29 A Address/Data 2060 A REQ64#
30 A Ground61 A+5 V dc
31 A Address/Data 1862 A+5 V dc
1B−12 V dc32 B Address/Data 17
2 B TCK33 B C/BE2“#
3 B Ground34 B Ground
4 B TDO35 B IRDY#
5B+5 V dc36 B+3.52 V dc
6B+5 V dc37 B DEVSEL#
7 B INTB#38 B Ground
8 B INTD#39 B LOCK#
9 B PRSNT1#40 B PERR#
10 B Reserved41 B+3.52 V dc
11 B PRSNT242 B SERR#
12 B Ground43 B+3.52 V dc
13 B Ground44 B C/BE1“#
PCI Local Bus Specification
. The following figure shows the signal and
Chapter 3. Connectors and Jumpers31
Page 44
Figure 19 (Page 2 of 2). PCI Connector Signal and Pin Assignments
Pin SignalPinSignal
14 B Reserved45 B Address/Data 14
15 B Ground46 B Ground
16 B CLK47 B Address/Data 12
17 B Ground48 B Address/Data 10
18 B REQ#49 B Ground
19 B+5 V dc (I/O)50 B Connector key
20 B Address/Data 31 51 B Connector key
21 B Address/Data 29 52 B Address/Data 8
22 B Ground53 B Address/Data 7
23 B Address/Data 27 54 B+3.52 V dc
24 B Address/Data 25 55 B Address/Data 5
25 B+3.52 V dc56 B Address/Data 3
26 B C/BE3“#57 B Ground
27 B Address/Data 23 58 B Address/Data 1
28 B Ground59 B+5 V dc (I/O)
29 B Address/Data 21 60 B ACK64#
30 B Address/Data 19 61 B+5 V dc
31 B+3.52 V dc62 B+5 V dc
32Chapter 3. Connectors and Jumpers
Page 45
Power Supply Connectors
The power supply utilizes 4-pin connectors for internal devices. The total power used by the
connectors must not exceed the amount shown in Figure 11 on page 17.
Figure 20. Power Supply Connector (Internal Devices) Signal and Pin Assignments
PinSignalPinSignal
1+12 V dc 3Ground
2Ground 4+5 V dc
The computer has a 12-pin power supply connector. The following figure shows the signal
and pin assignments for the system board power supply connector.
Figure 21. Power Supply Connector (System Board) Signal and Pin Assignments
PinSignalPinSignal
1Power good (+5 V dc) 2+5 V dc
3+12 V dc 4−12 V dc
5Ground 6Ground
7Ground 8Ground
9−5 V dc10 +5 V dc
11 +5 V dc12 +5 V dc
4321
The computer has an additional 6-pin power supply connector that plugs into the riser card.
The following figure shows the signal and pin assignments for the system board power
supply connector.
Figure 22. Power Supply Connector (3.52 V dc) Signal and Pin Assignments
PinSignalPinSignal
1Ground 2Ground
3Ground 4+3.52 V dc
5+3.52 V dc 6+3.52 V dc
Chapter 3. Connectors and Jumpers33
Page 46
System Board Memory Connectors
The following figure shows the signal and pin assignments for the 72-pin system board
memory connectors. Data bits 0 through 15 are the low word, and data bits 16 through 31
are the high word.
Figure 23. System Board Memory Connector Signal and Pin Assignments
PinSignalPinSignal
1 Ground37 Parity 1
2 Data 038 Parity 3
3 Data 1639 Ground
4 Data 140 Column address strobe 0
5 Data 1741 Column address strobe 2
6 Data 242 Column address strobe 3
7 Data 1843 Column address strobe 1
8 Data 344 Row address strobe 0
9 Data 1945 Row address strobe 1
10+5 V dc46 Reserved
11 Reserved47 Write enable
12 Address 048 Reserved
13 Address 149 Data 8
14 Address 250 Data 24
15 Address 351 Data 9
16 Address 452 Data 25
17 Address 553 Data 10
18 Address 654 Data 26
19 Address 1055 Data 11
20 Data 456 Data 27
21 Data 2057 Data 12
22 Data 558 Data 28
23 Data 2159 +5 V dc
24 Data 660 Data 29
25 Data 2261 Data 13
26 Data 762 Data 30
27 Data 2363 Data 14
28 Address 764 Data 31
29 Reserved65Data 15
30+5 V dc66 Reserved
31 Address 867 Reserved
32 Address 968 Reserved
33 Row address strobe 369 Reserved
34 Row address strobe 270 Reserved
35 Parity 271 Reserved
36 Parity 072 Ground
34Chapter 3. Connectors and Jumpers
Page 47
Video Feature Connector
The computer has a 26-pin connector that supports the attachment of additional video
features. The following figure shows the signal and pin assignments for the video feature
connector.
A keyboard connector
A mouse connector
Two serial connectors (one port is disabled if infrared is used)
An infrared (IR) transceiver module connector
A parallel connector
A monitor connector
The computer might also include:
An internal modem
A data collaboration adapter (modem, fax, voice mail, and audio)
A LAN adapter
A Matrox Millennium graphics adapter
Each I/O connector on the back panel of the computer is identified by a symbol.
Infrared
Keyboard
Serial A
Mouse
I/O Device Connectors
Serial B
Parallel
Display
36Chapter 3. Connectors and Jumpers
Page 49
Infrared Connector
The computer comes with an infrared (IR) port for connecting an optional infrared transceiver
module. The infrared transceiver allows wireless communication between the personal
computer and other infrared-capable computers and printers.
The IR connector on the back of the computer is a 9-pin, female, D-shell connector. The
transceiver plugs into this connector and provides a link of up to one meter at a rate of 115
kilobits-per-second (Kbps). The IR connector uses any of the same four port assignments as
the serial port.
The following list shows the pin numbers and signal names assigned to this connector.
Figure 25. IR Connector Pin Assignments
PinSignal
1IR transmitted data (output)
2Signal ground
3Reserved
4IR module select 0
5IR module select 1
6IR received data (input)
7Voltage (5 V)
8IR module select 2
9Reserved
1
69
5
Note: When the IR port is used, Serial B is disabled.
Chapter 3. Connectors and Jumpers37
Page 50
Keyboard and Auxiliary-Device Connectors
The keyboard and auxiliary-device connectors use 6-pin miniature DIN connectors.
4
Figure 26. Auxiliary-Device Signal and Pin Assignments
PinI/OSignal Name
1I/OData
2NAReserved
3NAGround
4NA+5 V dc
5I/OClock
6NAReserved
Figure 27. Keyboard Signal and Pin Assignments
PinI/OSignal Name
1I/OData
2NAAux data on keyboard connector
3NAGround
4NA+5 V dc
5I/OClock
6NAAux clock on keyboard connector
6
5
3
1
2
38Chapter 3. Connectors and Jumpers
Page 51
Serial Port Connectors
The two serial connectors on the back of the computer use a 9-pin, male D-shell connector
and pin assignments defined for RS-232D. The voltage levels are EIA only. Current loop
interface is not supported.
The following figure shows the signal and pin assignments for the serial port connector in a
communication environment.
Figure 28. Serial Port Connector Signal and Pin Assignments
PinI/OSignal NamePinI/OSignal Name
1I Data carrier detect6IData set ready
2I Receive data7ORequest to send
3O Transmit data8IClear to send
4O Data terminal read9IRing indicator
7NA Signal ground
Use Serial A or Serial B for high-speed modem and printer connections, or for devices such
as a mouse or other pointing device.
1
69
5
Note: When the IR port is used, Serial B is disabled.
The serial ports transfer data one bit at a time (serially), at speeds ranging from 300 to
345600 bits per second (bps). The transfer rate is also referred to as
ports on the computer are 16550-UART (universal asynchronous receiver/transmitter)
compatible so they can support high-speed modems.
Serial-Port Setup
Each serial connector or adapter in the computer can use any of four available port settings,
provided that a different setting is used for each. The settings include the port address (in
hexadecimal) and the IRQ (interrupt request line), which determines how the microprocessor
responds to an interrupt from the serial port. The four available port settings, in sequential
order, are:
3F8h-IRQ 3 or 4
2F8h-IRQ 3 or 4
3E8h-IRQ 3 or 4
2E8h-IRQ 3 or 4
There is no direct relationship among the port connectors, the four available port settings,
and the four COM numbers. When the computer is started, the power-on self-test (POST)
assigns COM numbers to the port addresses that are actually in use at the time. POST
goes down the list of addresses sequentially to assign COM numbers to each address in use
baud rate
. The serial
Chapter 3. Connectors and Jumpers39
Page 52
by a serial device. If an address is not in use, a COM number is not assigned. POST
assigns the next available COM number to the next address in use.
The port addresses and IRQ for Serial A and Serial B are preset at the factory to:
Serial A: 3F8h-IRQ 4
Serial B: 2F8h-IRQ 3
POST assigns COM numbers to Serial A and Serial B during startup:
Serial A: 3F8h-IRQ 4 (COM1)
Serial B: 2F8h-IRQ 3 (COM2)
However, if the computer comes with an internal modem, the factory settings and COM
assignments are:
Serial A: 3F8h-IRQ 4 (COM1)
Serial B: 2F8h-IRQ 3 (COM2)
Modem: 3E8h-IRQ 5 (COM3)
The port address and IRQ settings for Serial A and Serial B can be viewed using the
Configuration/Setup Utility program. The COM numbers are not shown on the setup
screens; however, one of the diagnostic programs available with your computer can be used
to view them.
Data Collaboration
Some models include a data collaboration card (DCC), which combines an internal modem
and audio adapter. The modem is a 28800-bps data modem with 14400-bps
send-and-receive fax capabilities.
The modem adapter has two telephone jacks on the back of the adapter.
The modem is set at the factory to communicate with the computer through the COM3 port
using the standard address and IRQ 5. If necessary, the serial-port setting can be changed
using the Configuration/Setup Utility program.
The audio functions provided by the DCC include the ability to record and play back standard
wave (.WAV) files. The adapter also can be set up to emulate a Sound Blaster adapter.
This feature is set at the factory at address 220h, IRQ 9, and DMA 0. These can be
changed using the Configuration/Setup Utility program.
The adapter also combines audio features with the modem functions to provide a speaker
phone and telephone answering machine. these features.)
40Chapter 3. Connectors and Jumpers
Page 53
Parallel Port Connector
The parallel port connector is a standard 25-pin D-shell connector. The following figure
shows the signal and pin assignments for the parallel port connector.
Figure 29. Parallel Port Connector Signal and Pin Assignments
PinI/OSignal NamePinI/OSignal Name
1O-STROBE14O-AUTO FD XT
2I/O Data bit 015I-ERROR
3I/O Data bit 116O-INIT
4I/O Data bit 217O-SLCT IN
5I/O Data bit 318NA Ground
6I/O Data bit 419NA Ground
7I/O Data bit 520NA Ground
8I/O Data bit 621NA Ground
9I/O Data bit 722NA Ground
10I-ACK23NA Ground
11I BUSY24NA Ground
12I PE25NA Ground
13I SLCT
13
2514
1
The parallel port supports extended, high-speed modes, which means that it can transfer
data up to 10 times as fast as a standard parallel port.
Parallel-Port Setup
Each parallel connector or adapter on your computer can use any of three available port
settings, provided that a different setting is used for each. The settings include the port
address (in hexadecimal) and the interrupt request line (IRQ), which determines how the
microprocessor responds to an interrupt from the parallel port. The three available port
settings, in sequential order, are the following:
3BCh-IRQ 5 or 7
378h-IRQ 5 or 7
278h-IRQ 5 or 7
There is no direct relationship among the three available port settings and the three LPT
numbers. When you start the computer, the POST program assigns LPT numbers to the
port addresses that are actually in use at the time. POST goes down the list of addresses
sequentially to assign LPT numbers to each address in use by a parallel device. If an
address is not in use, an LPT number is not assigned to it. POST assigns the next available
LPT number to the next address in use.
The port address and IRQ setting for the built-in parallel port is preset at the factory to:
Built-in port:3BCh-IRQ 7
Chapter 3. Connectors and Jumpers41
Page 54
POST assigns an LPT number to the built-in parallel port during startup:
Built-in port:3BCh-IRQ 7 (LPT1)
If you add another parallel adapter that uses the next sequential address, POST assigns LPT
numbers as follows:
The port address and IRQ setting for the built-in parallel port can be viewed using the
Configuration/Setup Utility program. The LPT number are not shown on the configuration
screen; however, one of the diagnostic programs available with your computer can be used
to view them.
The parallel-port setting must be changed if you use ECP, EPP, or ECP/EPP modes
because 3BCh-IRQ 7 cannot be used for these modes. The setting can be changed using
the Configuration Setup Utility program.
Parallel-Port Modes
The parallel port can operate in five different modes. One is a
the other four are
extended,
bidirectional modes that provide additional function and higher
standard,
unidirectional mode;
performance. Refer to the documentation that comes with printers and other parallel devices
to determine the appropriate parallel mode to use and required device drivers.
StandardThis
AT-compatible mode
is the default mode. In this mode, the
parallel port is limited to writing information to the device attached to it.
This mode can be used with most IBM-compatible parallel printers.
BidirectionalThis
PS/2-compatible mode
is a bidirectional mode used for data
transfer to other PC systems and supported devices.
ECPThe
extended capabilities port (ECP)
mode is a high-performance,
bidirectional mode that uses direct memory access (DMA) for data
transfer to a high-speed printer or other devices.
EPPThe
enhanced parallel port (EPP)
mode is a high-performance,
bidirectional mode that has capabilities similar to ECP mode; the main
difference is that EPP data transfers are processor-initiated instead of
DMA. EPP supports the connection of up to eight external devices
such as hard disk drives, CD-ROM drives, tape drives, diskette drives,
and a printer to the parallel port. These devices can be connected to
each other in a
daisy-chain
arrangement, or they can be connected
through an external multiplexor. The attachment of multiple devices
requires device drivers supplied by the device manufacturers.
ECP/EPPThis mode combines the capabilities of the ECP and EPP modes.
Select this mode to connect both ECP and EPP devices to the parallel
port.
42Chapter 3. Connectors and Jumpers
Page 55
Select the mode of operation for the parallel port using the Configuration Setup Utility
program.
Display Connector
The computer has a 15-pin display connector. The following figure shows the signal and pin
assignments for the system board display connector.
Figure 30. Display Connector Signal and Pin Assignments
PinSignalPinSignal
1Red (out) 2Green (out)
3Blue (out) 4Not used
5Ground 6Red ground
7Green ground 8Blue ground
9+5 V (DDC2B)10 Ground
11 Not used 12 DDC2B serial data (I/O)
13 Horizontal sync (out) 14 Vertical sync (out)
15 DDC2B clock (I/O)
The computer has four SIMM connectors and one DIMM connector. After memory modules
are installed, the Plug and Play feature of the Configuration/Setup Utility program
automatically detects the additional memory modules.
Notes:
1. Memory modules can have a maximum height of 1.2 inches.
2. Install only parity SIMMs and DIMMs to enable parity.
3. A mix of parity and non-parity SIMMs and DIMMs will be configured as non-parity.
4. A mix of extended-data output (EDO) and fast page (FP) SIMMs and DIMMs can be
installed if matched pairs are installed in each bank.
5. The computer uses industry-standard 60-ns 72-pin tin-lead SIMMs and 168-pin gold-lead
DIMMs.
Memory-Module Configurations
The following shows the typical memory-module configurations.
Cache memory is a RAM storage location between the microprocessor and system memory.
The microprocessor has a 16 KB L1 (internal) cache. The computer also supports up to 512
KB of L2 (external) cache. The following shows the cache supported.
Figure 33. L1 and L2 Cache
L1 Cache StandardL2 Cache StandardL2 Cache Maximum
This section briefly discusses hardware, software, and BIOS compatibility issues that must be
considered when designing application programs.
Many of the interfaces are the same as those used by the IBM Personal Computer AT. In
most cases, the command and status organization of these interfaces is maintained.
The functional interfaces are compatible with the following interfaces:
The Intel 8259 interrupt controllers (edge-triggered mode).
The National Semiconductor NS16450 and NS16550A serial communication controllers.
The Motorola MC146818 Time of Day Clock command and status (CMOS reorganized).
The Intel 8254 timer, driven from a 1.193 MHz clock (channels 0, 1, and 2).
The Intel 8237 DMA controller, except for the Command and Request registers and the
Rotate and Mask functions. The Mode register is partially supported.
The Intel 8272 or 82077 diskette drive controllers.
The Intel 8042 keyboard controller at addresses 0060h and 0064h.
All video standards using VGA, EGA, CGA, MDA, and Hercules modes.
The parallel printer ports (Parallel 1, Parallel 2, and Parallel 3) in compatibility mode.
Use the following information to develop application programs for personal computer
products. Whenever possible, use BIOS as an interface to hardware to provide maximum
compatibility and portability of applications among systems.
Hardware Interrupts
Hardware interrupts are level-sensitive in systems using PCI bus architecture and are
edge-triggered in systems using the personal computer type I/O architecture. The interrupt
controller clears its in-service register bit when the interrupt routine sends an End-of-Interrupt
(EOI) command to the controller. The EOI command is sent regardless of whether the
incoming interrupt request to the controller is active or inactive.
In systems using level-sensitive interrupts, the interrupt-in-progress latch is readable at an
I/O-address bit position. This latch is read during the interrupt service routine and might be
reset by the read operation or it might require an explicit reset.
Note: For performance and latency considerations, designers might want to limit the
number of devices sharing an interrupt level.
50 Chapter 5. System Compatibility
Page 63
The interrupt controller in systems using level-sensitive interrupts requires that the interrupt
request be inactive at the time the EOI command is sent; otherwise, a new interrupt request
will be detected. To avoid this, a level-sensitive interrupt handler must clear the interrupt
condition (usually by a read or write operation to an I/O port on the device causing the
interrupt). After processing the interrupt, the interrupt handler:
1. Clears the interrupt
2. Waits one I/O delay
3. Sends the EOI
4. Waits one I/O delay
5. Enables the interrupt through the Set Interrupt Enable Flag command
In systems using level-sensitive interrupts, hardware prevents the interrupt controllers from
being set to the edge-triggered mode. In systems using edge-triggered interrupts, hardware
prevents the interrupt controllers from being set to the level-sensitive mode.
Hardware interrupt IRQ9 is defined as the replacement interrupt level for the cascade level
IRQ2. Program interrupt sharing is implemented on IRQ2, interrupt 0Ah. The following
processing occurs to maintain compatibility with the IRQ2 used by IBM Personal Computer
products:
1. A device drives the interrupt request active on IRQ2 of the channel.
2. This interrupt request is mapped in hardware to IRQ9 input on the second interrupt
controller.
3. When the interrupt occurs, the system microprocessor passes control to the IRQ9
(interrupt 71h) interrupt handler.
4. This interrupt handler performs an EOI command to the second interrupt controller and
passes control to the IRQ2 (interrupt 0Ah) interrupt handler.
5. This IRQ2 interrupt handler, when handling the interrupt, causes the device to reset the
interrupt request before performing an EOI command to the master interrupt controller
that finishes servicing the IRQ2 request.
Chapter 5. System Compatibility51
Page 64
Diskette Drives and Controller
The following figures show the reading, writing, and formatting capabilities of each type of
diskette drive.
Figure 34. 5.25-Inch Diskette Drive Reading, Writing, and Formatting Capabilities
1. Do not use 5.25-inch diskettes that are designed for the 1.2MB mode in either a 160/180
KB or 320/360 KB diskette drive.
2. Low-density 5.25-inch diskettes that are written to or formatted by a high-capacity 1.2 MB
diskette drive can be reliably read only by another 1.2 MB diskette drive.
3. Do not use 3.5-inch diskettes that are designed for the 2.88 MB mode in a 1.44MB
diskette drive.
Copy Protection
The following methods of copy protection might not work in systems using the 3.5-inch 1.44
MB diskette drive.
Bypassing BIOS routines:
– Data transfer rate: BIOS selects the proper data transfer rate for the media being
used.
– Diskette parameter table: Copy protection, which creates its own diskette parameter
table, might not work in these drives.
Diskette drive controls:
– Rotational speed: The time between two events in a diskette drive is a function of
the controller.
52 Chapter 5. System Compatibility
Page 65
– Access time: Diskette BIOS routines must set the track-to-track access time for the
different types of media that are used in the drives.
– ‘Diskette change’ signal: Copy protection might not be able to reset this signal.
Write-current control: Copy protection that uses write-current control does not work,
because the controller selects the proper write current for the media that is being used.
Detailed information about specific diskette drives is available in the
Reading from and writing to the hard disk is initiated in the same way as in IBM Personal
Computer products; however, new functions are supported. Detailed information about
specific hard disk drives and hard disk drive adapters is available in the
System/2 ATA/IDE Fixed Disk Drives Technical Reference
Software Compatibility
To maintain software compatibility, the interrupt polling mechanism that is used by IBM
Personal Computer products is retained. Software that interfaces with the reset port for the
IBM Personal Computer positive-edge interrupt sharing (hex address 02Fx or 06Fx, where
is the interrupt level) does not create interference.
Software Interrupts
With the advent of software interrupt sharing, software interrupt routines must daisy chain
interrupts. Each routine must check the function value, and if it is not in the range of function
calls for that routine, it must transfer control to the next routine in the chain. Because
software interrupts are initially pointed to address 0:0 before daisy chaining, check for this
case. If the next routine is pointed to address 0:0 and the function call is out of range, the
appropriate action is to set the carry flag and do a RET 2 to indicate an error condition.
IBM Personal System/2
and in separate option
IBM Personal
.
x
Chapter 5. System Compatibility53
Page 66
Machine-Sensitive Programs
Programs can select machine-specific features, but they must first identify the machine and
model type. IBM has defined methods for uniquely determining the specific machine type.
The machine model byte can be found through Interrupt 15H, Return System Configuration
Parameters function ((AH)=C0H). See the
BIOS Interface Technical Reference
Computer products.
BIOS Compatibility
The personal computer systems support BIOS interfaces as described in the
System/2 and Personal Computer BIOS Interface Technical Reference
IBM Personal System/2 and Personal Computer
for a listing of model bytes for other IBM Personal
IBM Personal
.
54 Chapter 5. System Compatibility
Page 67
Chapter 6.Bus Architecture
Bus Architecture Descriptions ................................... 56
Bus Voltage Levels....................................... 59
Copyright IBM Corp. June 199655
Page 68
Bus Architecture Descriptions
This section gives an overview of input/output (I/O) buses and explains how advanced I/O
buses can improve performance.
ISA Bus
A computer
the computer.
microprocessor has an external bus, called the
information between the microprocessor and main memory. The local bus has the same bus
width (64 bits) as the microprocessor and operates at the same external speed.
Another computer bus, the
microprocessor or memory and the I/O (peripheral) devices. While microprocessor-bus
performance has improved rapidly, improvements in I/O-bus performance have not equalled
those of microprocessors and some peripheral devices, such as video and disk controllers.
Regardless of how fast the microprocessor and other components are, data transfers
between them must pass through the I/O bus.
The computer has two I/O buses: the
used in IBM and IBM-compatible computers for many years. PCI is one of the advanced I/O
bus standards developed by the computer industry to keep up with performance
improvements of microprocessor buses and advanced peripheral devices. Although
advanced designs can match the performance of the microprocessor bus only up to a point,
they do achieve higher throughput by speeding up the I/O bus and widening its data path.
PCI is intended to add to, but not replace, the capability provided by the ISA bus. In fact,
most personal computers today need only three PCI connections: one for video, one for the
disk controller, and one for a network adapter or other optional device.
One of the most widely used and successful bus architectures is the AT bus, also called the
industry standard architecture (ISA) bus
operates at a speed of 8 MHz. It can transfer up to 8 MB of data per second between the
microprocessor and an I/O device. Practical performance ranges between 4 MB to 8 MB per
second.
bus
is a pathway of wires and signals that carry (or transfer) information inside
Information
includes data, addresses, instructions, and controls. The
I/O bus
microprocessor bus
or
expansion bus
ISA bus
, or the I/O channel. The ISA bus is a 16-bit bus that
, carries information between the
and the
PCI bus
or
local bus
. ISA is the standard I/O bus
, that carries
The ISA bus continues to be popular because so many adapters, devices, and applications
have been designed and marketed for it. ISA is adequate for users of DOS applications in a
stand-alone environment, or for DOS network requestors with moderate performance
requirements.
Although the ISA bus is widely used and is suitable for many applications, it cannot transfer
data fast enough for today's high-speed microprocessors and I/O devices. For example, the
ISA bus might not provide for the performance needs of video devices and applications with
high resolution and high-color content. Also, ISA might not be capable of handling the
throughput required by some fast hard disks, network controllers, or full-motion video
adapters.
56 Chapter 6. Bus Architecture
Page 69
The ISA bus is buffered to provide sufficient power for the 98-pin connectors, assuming two
low-power Schottky (LS) loads per slot. The signal assignments and pin assignments for the
I/O channel connectors are shown in Figure 18 on page 30.
PCI Bus
The PCI bus connects to the microprocessor local bus through a buffered bridge controller.
A
bridge
receive all their data and control information through the PCI controller. The PCI controller
looks at all signals from the microprocessor local bus and then passes them to the ISA
controller, or to peripheral devices connected to the PCI bus. However, the PCI bus is not
governed by the speed of the microprocessor bus. PCI can operate at speeds as fast as 33
MHz, slow down, or even stop if there is no activity on the bus, all independent of the
microprocessor’s operations. This independence is a distinguishing feature of PCI that
allows the microprocessor to do other work while the I/O bus is busy. Microprocessor
independence also makes PCI adaptable to various microprocessor speeds and families and
allows consistency in the design and use of PCI peripheral devices across multiple computer
families.
PCI Performance
One of the most significant features of PCI is its 32-bit data path, which is twice the width of
the ISA data path. With a 32-bit data path, the PCI bus can transfer more information per
second than the ISA bus with its 16-bit data path. Also, PCI operates at higher speeds of up
to 33 MHz. Depending on the mode of operation and computer components used, the PCI
bus can transfer data at speeds up to 132 MB per second. While many factors can reduce
practical performance, achieving just half or a third of the PCI maximum theoretical
throughput far exceeds the practical performance of the ISA bus at 4 MB to 8 MB per
second.
translates signals from one bus architecture to another. PCI and ISA devices
PCI Peripheral Devices
The wider data path and higher throughput make PCI a more suitable bus for today's
high-speed microprocessors and I/O devices. Higher throughput translates into higher
performance of peripheral devices, such as higher video resolutions, more colors, and
quicker screen refreshes. The use of PCI architecture enhances the performance of the
monitor and the storage devices. Both the video controller and the IDE drive controller are
connected to the PCI bus on the system board. Thus, the peripheral devices that have the
greatest demand for higher performance are supported by the benefits of PCI architecture.
Expansion-Bus Features
The bit-width of the I/O bus determines the type of adapters the computer supports. The
shared slots handle 16-bit ISA adapters and 32-bit PCI adapters. The dedicated ISA slots
handle 16-bit ISA adapters only. The width of the I/O bus does not affect software
compatibility.
Chapter 6. Bus Architecture57
Page 70
The PC 730 riser card has three shared PCI and ISA slots; the PC 750 riser card has three
shared PCI and ISA slots and two dedicated ISA slots.
You can have up to three adapters in the PC 730 and up to five adapters in the PC 750.
Each PCI connector and the ISA connector directly below it share an expansion-slot opening
at the back of the computer that can be used by only one adapter at a time. This means
that you can install either a PCI adapter or an ISA adapter in a shared slot, but not both.
Shared
Slot 3
Shared
Slot 2
Shared
Slot 1
Shared
Slot 3
Shared
Slot 2
Shared
Slot 1
PCI
ISA
PCI
ISA
PCI
ISA
ISA 5
ISA 4
PCI
ISA
PCI
ISA
PCI
ISA
ISA/PCI Riser Card for PC 730
(On other side)
PCI connectors support both 3.52-volt and 5-volt adapters. A separate power cable connects
to the back of the riser card to supply 3.52-volt power.
PCI devices receive data through the PCI controller. The PCI controller looks at all signals
from the microprocessor local bus, then passes them to the ISA controller or to peripherals
connected to the PCI bus.
58 Chapter 6. Bus Architecture
ISA/PCI Riser Card for PC 750
Page 71
The signal assignments and pin assignments for the PCI connectors are shown in Figure 19
on page 31. For additional information, see the
the PCI Special Interest Group.
Bus Voltage Levels
Four voltage levels are provided for I/O adapters. The maximum available values (for each
slot) are as follows:
+5 V dc (+5%, −4.5%) at 2.0 A
−5 V dc (+10%, −9.5%) at 0.100 A
+12 V dc (+5%, −4.5%) at 0.175 A
−12 V dc (+10%, −9.5%) at 0.100 A
The
I/O CH RDY signal is available on the I/O channel to allow operation with slow I/O or
memory devices. I/O CH RDY is held inactive by an addressed device to lengthen the
operation. For each clock cycle that the line is held inactive, one wait state is added to the
I/O or DMA operation.
Two voltage levels are provided for PCI bus adapters. The maximum available values (for
each slot) are as follows:
+5 V dc (+5%, −4.5%) at 7.576 A
+3.52 V dc (+2.5%, −2.5%) at 4.00 A
PCI Local Bus Specification
, published by
Chapter 6. Bus Architecture59
Page 72
60 Chapter 6. Bus Architecture
Page 73
Appendix A.Error Codes
The following figures list the POST error codes and beep error codes for the computer.
POST Error Codes
POST error messages appear when POST finds problems with the hardware during
power-on or when a change in the hardware configuration is found. POST error messages
are 3-, 4-, 5-, 8-, or 12-character alphanumeric messages. An x in an error message can
represent any number.
Figure 36 (Page 1 of 2). POST Error Messages
CodeDescription
101Interrupt failure
102Timer failure
103Timer-interrupt failure
104protected mode failure
105last 8042 command not accepted –keyboard failure
106System board failure
108Timer bus failure
109low MB chip select test
110System board parity error 1 (system board parity latch set)
111I/O parity error 2 (I/O channel check latch set)
112I/O channel check error
113I/O channel check error
114external ROM checksum error
115DMA error
116System board port read/write error
120Microprocessor test error
121Hardware error
151Real time clock failure
161Bad CMOS Battery
162CMOS RAM checksum/configuration error
163Clock not updating
164CMOS RAM memory size does not match
167Clock not updating
175Riser card or system board error
176System cover has been removed
177Corrupted administrator password
178Riser card or system board error
183Administrator password has been set and must be entered
184Password removed due to checksum error
185Corrupted boot sequence
186System board or hardware security error
189More than three password attempts were made to access system
201Memory date error
202Memory address line error 00-15
203Memory address line error 16-23
221ROM to RAM remapping error
225Unsupported memory type installed or memory pair mismatch
301Keyboard error
302Keyboard error
Copyright IBM Corp. June 199661
Page 74
Figure 36 (Page 2 of 2). POST Error Messages
CodeDescription
303Keyboard to system board interface error
304Keyboard clock high
305No keyboard +5 V
601Diskette drive or controller error
602Diskette IPL boot record not valid
604Unsupported diskette drive installed
605POST cannot unlock diskette drive
662Diskette drive configuration error
762Math coprocessor configuration error
11xxSerial port error (xx = serial port number)
1762Hard disk configuration error
1780Hard disk 0 failed
1781Hard disk 1 failed
1782Hard disk 2 failed
1783Hard disk 3 failed
1800PCI adapter has requested an unavailable hardware interrupt
1801PCI adapter has requested an unavailable memory resource
1802PCI adapter has requested an unavailable I/O address space, or a defective
1803PCI adapter has requested an unavailable memory address space, or a
1804PCI adapter has requested unavailable memory addresses
1805PCI adapter ROM error
1962Boot sequence error
2401System board video error
8601System board - keyboard/pointing device error
8602Pointing device error
8603Pointing device or system board error
12092Level 1 cache error (Processor chip)
12094Level 2 cache error
16101Riser card battery is dead
I9990301Hard disk failure
I9990305No operating system found
adapter
defective adapter
62 Appendix A. Error Codes
Page 75
Beep Codes
For the following beep codes, the numbers indicate the sequence and number of beeps. For
example, a “2-3-2” error symptom (a burst of two beeps, three beeps, then a burst of two
beeps) indicates a memory module problem. An x in an error message can represent any
number.
Figure 37. Beep Codes
Beep CodeProbable Cause
1-1-3CMOS write/read failure
1-1-4BIOS ROM checksum failure
1-2-1Programmable interval timer test failure
1-2-2DMA initialization failure
1-2-3DAM page register write/read test failure
1-2-4RAM refresh verification failure
1-3-11st 64 K RAM test failure
1-3-21st 64 K RAM parity test failure
2-1-1Slave DMA register test in progress or failure
2-1-2Master DMA register test in progress or failure
2-1-3Master interrupt mask register test failure
2-1-4Slave interrupt mask register test failure
2-2-2Keyboard controller test failure
2-3-2Screen memory test in progress or failure
2-3-3Screen retrace tests in progress or failure
3-1-1Timer tick interrupt test failure
3-1-2Interval timer channel 2 test failure
3-1-4Time-of-Day clock test failure
3-2-4Comparing CMOS memory size against actual
3-3-1Memory size mismatch occurred
Appendix A. Error Codes63
Page 76
64 Appendix A. Error Codes
Page 77
Appendix B.Notices and Trademarks
References in this publication to IBM products, programs, or services do not imply that IBM
intends to make these available in all countries in which IBM operates. Any reference to an
IBM product, program, or service is not intended to state or imply that only that IBM product,
program, or service may be used. Subject to IBM’s valid intellectual property or other legally
protectable rights, any functionally equivalent product, program, or service may be used
instead of the IBM product, program, or service. The evaluation and verification of operation
in conjunction with other products, except those expressly designated by IBM, are the
responsibility of the user.
IBM may have patents or pending patent applications covering subject matter in this
document. The furnishing of this document does not give you any license to these patents.
You can send license inquiries, in writing, to:
IBM Director of Licensing
IBM Corporation
500 Columbus Avenue
Thornwood, NY 10594
U.S.A.
Trademarks
The following terms are trademarks of the IBM Corporation in the United States or other
countries or both:
ATPersonal Computer AT
IBMMwave
Personal System/2PS/2
Copyright IBM Corp. June 199665
Page 78
The following terms are trademarks of other companies:
HerculesHercules Computer Technology
IntelIntel Corporation
MatroxMatrox Electronic Systems, Ltd.
MotorolaMotorola, Incorporated
National SemiconductorNational Semiconductor Corporation
PCMCIAPersonal Computer Memory Card International Association
PentiumIntel Corporation
S3S3 Incorporated
Sound BlasterCreative Technology Ltd.
VESAVideo Electronics Standards Association
Microsoft, Windows, and Windows NT, are trademarks or registered trademarks of Microsoft
Corporation.
66Appendix D. Notices and Trademarks
Page 79
Index
Numerics
16550-UART 39
A
adapters, adding 58
address map
DMA 12
system memory 8
advanced power management 21
altitude 19, 20
answering machine 40
APM 21
AT bus 56
AT-compatible mode (parallel port) 42
audio subsystem 5
B
baud rate 39
beep codes 63
bidirectional mode (parallel port) 42
BIOS data areas 8
bus
hardware 50
component maximum current 17
connector
diskette drive 28
display 43
hard disk drive 29
infrared 37
ISA bus 30
connector
controller
copy protection 52
current, electrical 19, 20
(continued)
memory 34
mouse 38
parallel port 41
PCI (peripheral component interconnect) 31
PCMCIA 25
power supply 33
serial port controller 39
diskette drive 5, 52
keyboard/auxiliary-device 5
parallel 5
serial 5
D
data collaboration 40
depth, system unit 19, 20
description
AT bus 56
diskette drive connector 28
display connector 43
hard disk drive connector 29
I/O channel 56
ISA bus 56
keyboard and auxiliary-device controller
connector 38
parallel port connector 41
PCI (peripheral component interconnect)
connector 31
PCI connector 31
power supply 15
power supply connectors 33
system board memory connector 34
voltage 15
interrupt request assignments 13
ISA bus connector signal and pin assignments 30
J
jumper
locations (system board) 7
K
keyboard and auxiliary-device controller
connector 38
keyboard and auxiliary-device signal and pin
assignments 38
keyboard cable 19, 20
keyboard signal and pin assignments 38
L
L1 cache 47
L2 cache 47
level-sensitive interrupts 50
load currents 17
local bus 56
M
machine-sensitive programs 54
Matrox Millennium adapter 24
measurements, system unit 19, 20
memory
cache 47
connector 34
error in 8
L1 cache 47
L2 cache 47
map, system 8
68 Index
Page 81
memory
messages, POST error 61
microprocessor
microprocessor upgrade socket 4
modem 40
modes, power management 21
(continued)
RAM 8, 46
system memory map 8
features 4
O
outputs, power supply 17
overview 2
overvoltage fault 18
P
parallel port 5
parallel port connector 41
parallel port connector signal and pin
assignments 41
password
PC Cards 25
PCI connector signal and pin assignments 31
Pentium microprocessor 4
physical specifications
PC 350 20
polling mechanism 53
port
parallel 5
serial 5
POST 8
POST error codes 61
power
cable 19, 20
consumption 21
description 15
for components 17
load currents 17
management modes 21
output protection 18
outputs 17
specifications 19, 20
power supply connectors 33
protection, power supply 18
PS/2-compatible mode (parallel port) 42
publications, related viii
R
RAM (random access memory) 4, 8, 46
random access memory (RAM) 4, 8, 46
related publications viii
reserved
areas ix
riser card 58
RT/CMOS RAM
error in 8
S
SCSI (small computer system interface) 25
serial port 5
serial ports 39
short circuit 18
signals
diskette drive 28
hard disk drive 29
SIMMs (single inline memory modules) 46
single inline memory modules (SIMMs) 46
size, system unit 19, 20
small computer system interface (SCSI) 25
socket, microprocessor upgrade 4
software
compatibility 53
interrupts 53
speaker phone 40
specifications
physical 19, 20
standard mode (parallel port) 42
system