MI912
Intel ® CoreTM 2 Duo/
Celeron GME965
Mini-ITX Motherboard
USER’S MANUAL
Version 1.0A
ii
MI912 User’s Manual
Acknowledgments
Award is a registered trademark of Award Software International,
Inc.
PS/2 is a trademark of International Business Machines
Corporation.
Intel and Intel Core 2 Duo and Intel Celeron processors are
registered trademarks of Intel Corporation.
Microsoft Windows is a registered trademark of Microsoft
Corporation.
W inbond is a registered trademark of Winbond Electronics
Corporation.
All other product names or trademarks are properties of their
respective owners.
MI912 User’s Manual iii
Table of Contents
Introduction ...................................................... 1
Prod uct Description ............................................................ 1
Checklist ............................................................................. 2
MI912 Specifications ......................................................... 3
Board Dimensions .............................................................. 4
Installations ...................................................... 5
Installing the CPU .............................................................. 6
Installing the Memory......................................................... 7
Setting the Jum pers............................................................. 8
Connectors on MI912 ....................................................... 12
BIOS Setup.......................................................27
Drivers Installation ......................................49
Intel Chipset Software Installation Utility ......................... 50
VGA Drivers Installation .................................................. 52
AC97 Codec Audio Driver Installation ............................ 54
LAN Drivers Installation .................................................. 55
Appendix ...........................................................59
A. I/O Port Address Map .................................................. 59
B. Interrupt Request Lines (IRQ) ...................................... 60
C. Watchdog Timer Confi gur at ion ................................... 61
IMPORTAN T NO TE: When th e system boots without the CRT being
connected, there will be no image on screen when you insert the
CRT/VGA cable. To show the image on screen, the hotkey must be
pressed (CTRL-ALT-F1).
iv
MI912 User’s Manual
This page is in tention ally le f t blan k.
INTRODUCTION
MI912 User’s Manual 1
Introduction
Product Description
The MI912 Mini ITX board incorp orates the Mobile Intel® GME965 Express
Chipset for Embedded Computing, consisting of the Intel® GME965 Graphic
Memory Controller Hub (G MCH) a nd Intel® I/O Cont roller Hub ( ICH8-M), an
optimized integra ted graphics s olution with a 533MHz and 800M Hz front-side
bus. Dimensions of the board are 170mm x 170mm.
The integrated powerful 3D graphics engine, based on Intel® Graphics Media
Accelerator X3000 (Intel® GMA X3000) architecture, operates at core speeds of
up to 400 MHz. It f eatures a low-power design, is validated with the Intel® Core 2
Duo and Intel® Celeron processors on 65nm process. With dual channel DDR2
667MHz two DIMM sockets, the bo ard supports up to 4GB of DDR2 system
memory.
Intel® Graphics supports a unique intelligent memory management scheme called
Dynamic Video Memory Technology (DVMT). DVMT handles diverse
applications by providing the maximum (384MB) availability of system memory
for general computer usage, while supplying additional graphics memory when a
3D-intensive application requests it. The Intel® GMA X3000 graphics
architecture also takes advantage of the high-performance Intel processor. Intel®
GMA X3000 graphics supports Dual Independent Display technology.
The main features of the board are:
Supports Intel® CoreTM 2 Duo (Merom 800MHz), Intel® Celeron
Supports up to 2. 4GHz, 533MHz/800MHz FSB
Two DDR2 SDRAM DIMM, Max. 4GB memory
Onboard 10/100/100 and optional Intel 82574L Gigabit LAN
Intel® GME965 Express VGA for CRT / LVDS
2x SATA, 6x USB 2.0, 2x COM, Watchdog timer, 1394
1x MiniPCI, 1x PCI, 1xPCI-E(x1) slots, optional DVI
Optional daughter cards:
ID390: Chrontel 7308, supports 24 bit single or dual LVDS channel
ID390C: Chrontel 7021, supports CR T
ID391: Chrontel 7307C, single DVI (connector on cable)
ID391D: Chrontel 7307C, dual DVI (connector on cable)
ID392D: Chrontel 7307C, dual DVI (one connector on card and one on cable)
MI912E/MI912EL only
INTRODUCTION
2
MI912 User’s Manual
Checklist
Your MI912 package should include the items listed below.
• The MI912 Mini-ITX motherboard
• This User’s Manual
• 1 CD containin g c hipse t drivers a nd flas h memory utilit y
• Cable kit (IDE, Seria l port, Serial AT A )
INTRODUCTION
MI912 User’s Manual 3
MI912 Specifications
CPU Supported
Intel® CoreTM 2 Duo, Intel
®
Celeron mobile processors
CPU Voltage
0.700V ~ 1.5V (IMVP-6)
System Speed
Up to 2.4GHz or above
CPU FSB
533MHz/800MHz FSB
Cache
1MB/2MB/4MB
Green /APM
APM1.2
CPU Socket
mPGA 478MN Socket
Chipset
Intel® GME965 Chipset
GMCH: GME965 1299-pin Micro-FCBGA
ICH8M: 82801HBM 678-pin mBGA
BIOS
Award BI OS, sup ports ACPI Function
Memory
DDR2 667/533 SDRAM DIMM x2 (w/o ECC function), Max. 4GB
VGA
GMA965 built-in, supports CRT,RCA,S-VIDEO,HDTV
SDVO (Dual CH)
Through ID390 card (Chrontel 7308, 24 bit single/dual channel
LVDS, Chrontel 7021, CRT, RCA, S-VIDEO or HDTV)
Through ID391 card (Chrontel 7307C,DVI single or Dual)
LVDS LCD Panel
GME965 built-in, supports 24-bit (Type 1 only ), single or dual channel
LVDS
LAN
1. ICH8M 10/100/gigabit MAC + PHY
• Intel 82566DM Nineveh 10/100/1000 (MI912E)
2. Intel® 82574L Gigabit LAN controller x1 (MI912EF)
USB
ICH8M built-in USB 2.0 host controller, support 6 ports
Serial ATA Ports
ICH8M built-in SATA controller, suppo rt s 2 ports
1394
TI TSB43LV22 (dual port)
Parallel IDE
ICH8M built-in one channel Ultra DMA 33/66/100,CF Type II
Audio
ICH8M built-in Audio controller + High Definition Audio Codec ALC885 w/
7.1 channels, SPDIF-OUT
LPC I/O
W83627EHF: COM1, COM2 (RS232/RS422/RS485), Slim FDC 1.44MB,
IrDA x1 & hardware monitor (3 thermal, 4 voltage monitor inputs, 2 fan
headers)
Digital IO
4 in & 4 out
Keyboard/Mouse
Supports PS/2 Key boa rd/Mouse Connector
Expansion Slots
PCI slot x1, PIC-E (x1) slot x1 and Mini PCI socket x1
Edge Connectors
PS/2 Connector x1 for keyboard/mouse
Gigabit LAN1 RJ-45 + dual USB stack connector
Gigabit LAN2 RJ45 (option) + dual USB stack connector
DB9 x1 for COM 1; DB15 x1 for VGA
SPDIF-out connector x1; 1394 conne ctor x1
RCA Jack 3x2 for Audio (Front-Out, Line-In, Mic, Center/LFE, Surround &
Surround Back)
Onboard Header/
Connectors
40-pin box-header x1 for IDE1; 26-pin header x1 for Slim Floppy
CF Connector x1 @ solder side
10-pin headerx1 for Digital I/O; 10-pin header x1 for COM2
10-pin header x 1 for USB 5,6; 5-pin header x 1 for IrDA
DF13 connector x2 for LVDS;
10-pin header x1 for audio Line-Out & Mic
7-pin header x1 for 1394
SATA connector x2 for SATA ports
Watchdog Timer
Yes (256 segments, 0, 1, 2…255 sec/min)
System Voltage
+5V, +3.3V, +12V, -12V, 5VSB (2A)
Others
Modem Wakeup, LAN Wakeup
Board Size
170mm x 170mm (Mini ITX)
INTRODUCTION
4
MI912 User’s Manual
[
Board Dimensions
INSTALLATIONS
MI912 User’s Manual 5
Installations
This section provides information on how to use the jumpers and
connectors on the MI912 in order to set up a workable system . The topics
covered are:
Installing the CPU ...................................................................... 6
Installing the Memor y ................................................................. 7
Sett ing the Jumpers .................................................................... 8
Co nne ctor s on MI912 ............................................................... 12
INSTALLATIONS
6
MI912 User’s Manual
Installing th e CPU
The MBI910 board supports a Socket 478MN (Merom) processor socket
for Intel® CoreTM 2 Duo, Intel® Celeron mobile processors.
The processor socket comes with a screw to secure the processor. As
shown in the picture below, loosen the screw first before inserting the
processor. Place the processor into the socket by making sure the not ch
on the corner of the CPU corresponds with the notch on the inside of the
socket. Once the processor has slide into the socket , fasten the screw.
NOTE:
Ensure that the CPU heat sink and the CPU top surface are in
total contact to avoid CPU overheating problem that would
cause your system to hang or be unstable.
INSTALLATIONS
MI912 User’s Manual 7
Installing the Memory
The MI912 board supports two DDR2 memory sockets fo r a ma ximu m
t otal memory of 4GB in DDR2 memory typ e.
Installing and Removing Memory Modules
To install the DDR2 modules, locate the memory slot on the boar d and
per f orm the following step s:
1. Hold the DDR2 module so that the key of the DDR2 module aligned
with that on the memory slot.
2. Gently pu sh th e D DR 2 module in an up right position until the clip s of
the slot close to ho ld the DDR2 module in place when the DDR2
module touches the bottom of the slot.
3. To remove the DDR2 module, press the clips with both hands .
DDR2 Module
Lock
Lock
Lock Lock
INSTALLATIONS
8
MI912 User’s Manual
Setting the Jumpers
Jumpers are used on MI912 to select various settings and features
according to your needs and applications. Contact your supplier if you
have d oubts a bout the bes t configuration fo r you r needs. The following
lists the connecto r s on MI912 and their respective functions.
Jumper Locations on MI912 ......................................................... 9
JBAT1: Clear CMOS Set ting ...................................................... 10
JP4: CPU FSB Selection (reserved) ............................................ 10
JP5: LCD Panel Power Selection ................................................ 10
JP8: CompactFlash Slave/Master Selection ................................. 10
JP9: PCI/PCIE Riser Card Selection ........................................... 10
JP15: Keyboard/Mouse P ower Selection ..................................... 11
JP17: 82574L Gigabit LAN Enable/Disable Selection.................. 11
IMPORTANT NOTE: When the system boots without the CRT being
connected, there will be no image on screen when you insert the
CRT/VGA cable. To show the image on screen, the hotkey must be
pressed.
INSTALLATIONS
MI912 User’s Manual 9
Jumper Locations on MI912
Jumpers on MI912 ..........................................................................Page
JP4: CPU FSB Selection ............................................................. 10
JP5: LCD Panel Power Selection ................................................ 10
JP9: PCI/ P CIE Riser Card Selection ........................................... 10
JBAT1: Clear CMOS Setting ...................................................... 10
JP8: CompactFlash Slave/Master Selection ................................. 10
INSTALLATIONS
10
MI912 User’s Manual
JBAT1: Clear CMOS Setting
JBAT1
Setting
Normal
Clear CMOS
JP4: CPU FSB Selection (reserved)
JP4
CPU FSB
533MHz
800MHz
JP5: LCD Panel Power Selection
JP5
LCD Panel Power
3.3V
5V
JP8: CompactFlash Slave/Master Selection
JP8
CF Setting
Master
Slave
JP9: PCI/PCIE Riser Card Selection
JP9
Riser Card
IP390 Riser Card
Install
IP151, IP240 Riser Card
Install
[
INSTALLATIONS
MI912 User’s Manual 11
JP15: Keyboard/Mouse Power Selection
JP15
KB / MS Pow er
+5V
5VSB
JP17: 82574L Gigabit LAN Enable/Disable Selection
JP17
82574L GbE
Disable
Enable
INSTALLATIONS
12
MI912 User’s Manual
Connectors on MI912
CN1: PS/2 Keyboard and PS/2 Mou se Co nnectors...................... 15
CN2, CN3: COM1 and VGA Connector ..................................... 15
USB_LAN1: GbE RJ45((MI912E/MI912EF)) and USB1/2 Ports ............ 16
CN4: 1394 Connector ................................................................. 16
J6: SPDIF Out C onnector ........................................................... 16
CN5, CN6: G bE RJ-45 (MI912EF) and USB3/4 Ports ................ 16
CN7: Audio Connector ............................................................... 16
FAN1: System Fan Power Connecto r .......................................... 16
FAN2: CPU Fan Power Connector ............................................. 16
IDE1: IDE Co nnector ................................................................. 17
FDD1 : Flop py Drive Connector .................................................. 17
ATX1: ATX Power Supply Connector ........................................ 18
J1 ( F _PANEL): System Func tion C onnector ............................... 18
F_USB1: USB0 / US B1 Connector .............................................. 20
JP1, JP2, JP3: RS232/422/485 (COM2) Selection ....................... 20
J2: CO M2 Ser ial P ort ................................................................. 21
J3, J4: L VDS C onnector s (1st channel, 2 nd channe l) ................... 21
J5: LCD Backlight Connector ..................................................... 21
J7: M ini PCI Connector .............................................................. 21
CN8, CN9: S AT A Co nnect ors .................................................... 21
J8: Digital I/O ............................................................................. 22
J9: CD-In Pin Header .................................................................. 22
J10: SPI Flash Connector (factory use only) ................................ 22
J11: 1394 Connector ................................................................... 22
J12: Front Audio Connector........................................................ 22
J13: PCI-E(x1) Slot .................................................................... 22
J14: IrDA Connec tor .................................................................. 23
J15: Compact Flash Connecto r .................................................... 23
PCI1: PCI Slot (supports 2 Master) ............................................ 23
CON1: SDVO Port Connector .................................................... 23
Headers and Connectors on Optional Daughter Car ds ................. 24
ID390 – JP4 LCD Panel Power Selection ........................................................... 24
ID390 – J1 LCD Backlight Setting .................................................................... 24
ID390 – J3 and J2 1st/2
nd
LVDS Channel Connectors .......................................... 24
ID390C – J4 VGA Connector ........................................................................... 25
ID391 – J2 DVI Connector ............................................................................... 26
ID391D – J1, J2 1st/2
nd
DVI Connectors ............................................................ 26
INSTALLATIONS
MI912 User’s Manual 13
Connector Locations on MI912
INSTALLATIONS
14
MI912 User’s Manual
MI912 Solder Side
INSTALLATIONS
MI912 User’s Manual 15
CN1: PS/2 Keyboard and PS/2 Mouse Connectors
PS/2 Mouse
PS/2 Keyboard
Signal Name
Keyboard
Mouse
Signal Name
Keyboard dat a
1
1
Mouse d ata
N.C.
2 2 N.C.
GND
3 3 GND
5V
4 4 5V
Keyboard clock
5
5
Mouse clock
N.C.
6 6 N.C.
CN2, CN3: COM1 and VGA Connector
[
Signal Name
Pin #
Pin #
Signal Name
DCD
1 6 DSR
RXD
2 7 RTS
TXD
3 8 CTS
DTR
4 9 RI
GND
5
10
Not Used
[[[[
Signal Name
Pin #
Pin #
Signal Name
Red
1 2 Green
Blue
3 4 N.C.
GND
5 6 GND
GND
7 8 GND
N.C.
9
10
GND
N.C.
11
12
N.C.
HSYNC
13
14
VSYNC
NC
15
INSTALLATIONS
16
MI912 User’s Manual
USB_LAN1: GbE RJ45 (MI912E/MI912EF) and USB1/2 Ports
CN4: 1394 Connector
J6: SPDIF Out Connector
CN5, CN6: GbE RJ-45 (MI912EF) and USB3/4 Ports
CN7: Audio Connector
FAN1: System Fan Power Connector
FAN1 is a 3-pin header for system fans. The fan must be a 12V (500mA).
Pin #
Signal Name
1
Ground
2
+12V
3
Rotation detection
FAN2: CPU Fan Power Connector
FAN2 is a 3-pin header for the CPU fan. The fan must be a 12V fan.
Pin #
Signal Name
1
Ground
2
+12V
3
Rotation detection
INSTALLATIONS
MI912 User’s Manual 17
IDE1: IDE Connector
Signal Name
Pin #
Pin #
Signal Name
Reset IDE
1 2 Ground
Host data 7
3 4 Host data 8
Host data 6
5 6 Host data 9
Host data 5
7
8
Host data 10
Host data 4
9
10
Host data 11
Host data 3
11
12
Host data 12
Host data 2
13
14
Host data 13
Host data 1
15
16
Host data 14
Host data 0
17
18
Host data 15
Ground
19
20
Protect pin
DRQ0
21
22
Ground
Host IOW
23
24
Ground
Host IOR
25
26
Ground
IOCHRDY
27
28
Host ALE
DACK0
29
30
Ground
IRQ14
31
32
No connect
Address 1
33
34
No connect
Address 0
35
36
Address 2
Chip select 0
37
38
Chip s elect 1
Activity
39
40
Ground
FDD1: Floppy Drive Connector
FD D1is a slim 26 -pin connector and will support up t o 2.88MB FDD.
Signal Name
Pin #
Pin #
Signal Name
VCC
1 2 INDEX
VCC
3 4 DRV_SEL
VCC
5 6 DSK_CH
NC
7 8 NC
NC
9
10
MOTOR
DINST
11
12
DIR
NC
13
14
STEP
GND
15
16
WDATA
GND
17
18
WGATE
GND
19
20
TRACK
NC
21
22
WPROT
GND
23
24
RDATA
GND
25
26
SIDE
INSTALLATIONS
18
MI912 User’s Manual
ATX1: ATX Power Supply Connector
11 1
20 10
Signal Name
Pin #
Pin #
Signal Name
3.3V
11 1 3.3V
-12V
12 2 3.3V
Ground
13 3 Ground
PS-ON
14 4 +5V
Ground
15 5 Ground
Ground
16 6 +5V
Ground
17 7 Ground
-5V
18 8 Power good
+5V
19 9 5VSB
+5V
20
10
+12V
J1 (F_PANEL): System Function Connector
J1 provides connectors for s ystem indica tors that provide light indication
of the computer activities and switches to change the computer status. J1
is a 20-pin header that pro vides interfaces for the following functions.
Hard Disk Drive LED
Reset Switch
Not Defined
ATX Power On Switch
Not Defined
Power LED
Speaker
Speaker: Pins 1 - 4
This connector provides an interface to a speak er for au dio
tone g eneration. An 8-ohm speaker is recommended.
Pin #
Signal Name
1
Speaker ou t
2
No connect
3
Ground
4
+5V
INSTALLATIONS
MI912 User’s Manual 19
Power LED: Pins 11 - 15
Pin #
Signal Name
11
Pow e r LED
12
No connect
13
Ground
14
No connect
15
Ground
ATX Power ON Switch: Pins 7 and 17
This 2-pin connec tor is an “ATX P owe r Supply On/Off
Switch” on the system that co nnects t o the po wer switch on
the case. When pressed, the power switch will force the
system to power o n. When pressed again, it will force the
system to power off.
Reset Switch: Pins 9 and 19
The reset switch allows the user t o reset the system without
turning the main power switch off and then o n again.
Orientation is not required when making a connection to this
header.
Hard Disk Drive LED Connector: Pins 10 and 20
This connector connects to the hard drive activity LED on
control panel. This LE D w ill f lash when the HD D is bein g
accessed.
Pin #
Signal Name
10
HDD Active
20
5V
INSTALLATIONS
20
MI912 User’s Manual
F_USB1: USB0/USB1 Connector
Signal Name
Pin
Pin
Signal Name
Vcc
1 2 Vcc
D0-
3 4 D1-
D0+
5 6 D1+
Ground
7 8 Ground
NC
9
10
Ground
JP1, JP2, JP3: RS232/422/485 (COM2) Selection
COM1 is f ix ed for RS -232 use only.
COM2 is selectable for RS232, RS-422 and RS-485.
The following table describes the jumper settings for COM2 selection.
COM2
Function
RS-232 RS-422 RS-485
Jumper
Setting
(pin closed)
JP3:
1-2
JP2:
3-5 & 4-6
JP1:
3-5 & 4-6
JP3:
3-4
JP2:
1-3 & 2-4
JP1:
1-3 & 2-4
JP3:
5-6
JP2:
1-3 & 2-4
JP1:
1-3 & 2-4
COM2 is jumper selectable for RS-232, RS-422 and RS-485.
Pin #
Signal Name
RS-232
R2-422
RS-485
1
DCD
TX-
DATA-
2
RX
TX+
DATA+
3
TX
RX+
NC
4
DTR
RX-
NC
5
Ground
Ground
Ground
6
DSR
RTS-
NC
7
RTS
RTS+
NC
8
CTS
CTS+
NC
9
RI
CTS-
NC
10
NC
NC
NC
INSTALLATIONS
MI912 User’s Manual 21
J2: COM2 Serial Port
COM2
Signal Name
Pin #
Pin #
Signal Name
DCD, Data car r ier det ect
1 6 DSR, Data set ready
RXD, Receive data
2
7
RTS, Request to send
TXD , Transmit da ta
3 8 CTS, Clear to send
DTR, Dat a terminal ready
4 9 RI, Rin g indic ator
GND, ground
5
10
Not Used
J3, J4: LVDS Connectors (1st channel, 2nd channel)
The LVDS connector s on board consist of the firs t cha nnel (J3) a nd
second channel (J4).
Signal Name
Pin #
Pin #
Signal Name
TX0-
2 1 TX0+
Ground
4 3 Ground
TX1-
6 5 TX1+
5V/3.3V
8 7 Ground
TX3-
10 9 TX3+
TX2-
12
11
TX2+
Ground
14
13
Ground
TXC-
16
15
TXC+
5V/3.3V
18
17
ENABKL
+12V
20
19
+12V
J5: LCD Backlight Connector
Pin #
Signal Name
1
+12V
2
Backlig ht E nab le
3
Ground
J7: Mini PCI Connector
CN8, CN9: SATA Connectors
INSTALLATIONS
22
MI912 User’s Manual
J8: Digital I/O
Signal Name
Pin
Pin
Signal Name
GND
1 2 VCC
OUT3
3 4 OUT1
OUT2
5 6 OUT0
IN3
7 8 IN1
IN2
9
10
IN0
J9: CD-In Pin Header
Pin #
Signal Name
1
CD Audio R
2
Ground
3
Ground
4
CD Audio L
J10: SPI Flash Connector (factory use only)
J11: 1394 Connector
Signal Name
Pin
Pin
Signal Name
TPA+
1 2 TPB+
TPA-
3 4 TPB-
+12V
5 6 NC
GND
7 8 NC
J12: Front Audio Connector
Signal Name
Pin #
Pin #
Signal Name
MIC2_L
1 2 Ground
MIC2_R
3 4 Presence#
Line2_L
5 6 MIC2_ID
Sense
7 8 NC
Line2_R
9
10
Line2_ID
J13: PCI-E(x1) Slot
INSTALLATIONS
MI912 User’s Manual 23
J14: IrDA Connector
Pin #
Signal Name
1
+5V
2
No connect
3
Ir RX
4
Ground
5
Ir TX
J15: Compact Flash Connector
PCI1: PCI Slot (supports 2 Master)
CON1: SDVO Port Connector
Signal Name
Pin #
Pin #
Signal Name
+12V
A1
B1
+12V
+12V
A2
B2
+12V
+5V
A3
B3
+5V
3.3V
A4
B4
3.3V
RESET
A5
B5
GND
GND
A6
B6
GND
SDVOC_CLK+
A7
B7
SDVOC_CLK-
SDVOC_Blue+
A8
B8
SDVOC_Blue-
GND
A9
B9
GND
SDVOC_Green+
A10
B10
SDVOC_Green-
SDVOC_Red+
A11
B11
SDVOC_Red-
GND
A12
B12
GND
SDVO TVClkIn+
A13
B13
SDVO TVClkIn-
SDVOB Int+
A14
B14
SDVOB Int-
GND
A15
B15
GND
SDVO CtrlData
A16
B16
SDVO CtrlClk
SDVOB Clk+
A17
B17
SDVOB Clk-
GND
A18
B18
GND
SDVOB Blue+
A19
B19
SDVOB Blue-
SDVOB Green+
A20
B20
SDVOB Green-
GND
A21
B21
GND
SDVOB Red+
A22
B22
SDVOB Red-
SDVO Stall+
A23
B23
SDVO Stall-
GND
A24
B24
GND
INSTALLATIONS
24
MI912 User’s Manual
Headers and Connectors on Optional Daughter Cards
ID390 – JP4 LCD Panel Pow e r Select ion
JP4
Voltage
3.3V
5V
ID390 – J1 LCD Backlight S e t t ing
Pin #
Signal Name
1
+12V
2
Backlig ht E nab le
3
Ground
ID390 – J3 and J2 1st/2nd LVDS Channel Conne c t ors
Signal Name
Pin #
Pin #
Signal Name
TX0-
2 1 TX0+
Ground
4 3 Ground
TX1-
6 5 TX1+
5V/3.3V
8 7 Ground
TX3-
10 9 TX3+
TX2-
12
11
TX2+
Ground
14
13
Ground
TXC-
16
15
TXC+
5V/3.3V
18
17
ENABKL
+12V
20
19
+12V
INSTALLATIONS
MI912 User’s Manual 25
ID390C – J 4 V G A Connect or
[[[[
Signal Name
Pin #
Pin #
Signal Name
+5V
2 1 RED
Ground
4 3 GREEN
N.C.
6 5 BLUE
SDA
8 7 N.C.
HSYNC
10 9 Ground
VSYNC
12
11
Ground
SCL
14
13
Ground
N.C.
16
15
Ground
INSTALLATIONS
26
MI912 User’s Manual
ID391 – J2 DVI Connect or
Signal Name
Pin #
Pin #
Signal Name
TDC1-
2 1 TDC1+
Ground
4 3 Ground
TLC-
6 5 TLC+
+5V
8 7 Ground
NC
10 9 HPDET
TDC2-
12
11
TDC2+
Ground
14
13
Ground
TDC0-
16
15
TDC0+
NC
18
17
NC
DDC_SC
20
19
DDC_SD
ID391D – J1, J2 1st/2nd DVI Connectors
Signal Name
Pin #
Pin #
Signal Name
TDC1-
2 1 TDC1+
Ground
4 3 Ground
TLC-
6 5 TLC+
+5V
8 7 Ground
NC
10 9 HPDET
TDC2-
12
11
TDC2+
Ground
14
13
Ground
TDC0-
16
15
TDC0+
NC
18
17
NC
DDC_SC
20
19
DDC_SD
Remarks: When using dual DVI, the first DVI video output is through J1. After
setting the drivers in Windows, then the second DVI output (via J2) will function.
ID391D and ID391 are different since the latter (ID391) has video output via J2.
The pin assignments of J1 and J2 are the same.
BIOS SETUP
MI912 User’s Manual 27
BIOS Setup
This chapter describes the different settings available in the Award BIOS
that comes with the board. The topics covered in this chapter are as
follows:
BIOS Introduction ...................................................................... 28
BIOS Setup ................................................................................ 28
Standard CMOS Setup ................................................................ 30
Advanced BIOS Features ............................................................ 33
Advanced Chipset Features ......................................................... 36
Integrated Peripherals ................................................................. 38
Power Management Setup .......................................................... 41
PNP/PCI Configurations ............................................................. 44
PC Health Status ......................................................................... 45
Frequency/Voltage Control ......................................................... 46
Load Fail-Safe Defaults ............................................................... 47
Load Optimized Defaults ............................................................ 47
Set Super visor/User Password .................................................... 47
Save & Exit Set u p....................................................................... 47
Exit Without Saving .................................................................... 47
BIOS SETUP
28
MI912 User’s Manual
BIOS Introduction
The Award BIOS (Basic Input/Output System) installed in your
comput er system’s ROM suppo rt s Intel pro cesso rs. T he BIOS pro vides
critic al low -level support for a standard device such as disk drives, serial
ports and parall el ports. It also adds vi rus and password protection as well
as special support for detailed fine-tu ning of the chipset cont rolling the
entire system.
BIOS Setup
The Award BIOS provides a Setup utility program for specifying the
system configurations and settings. The BIOS ROM of the system st ores
the Setup utility. When you turn on the computer, the Award BIOS is
immediately activated. Pressing the <Del> key im medi ately al lows you to
enter the Set up ut ility. If you are a little bit late pressing the <Del> key,
POST (Power On Self Test) will continue with its test routines, thus
preventing you from invoking the Setup. If you still wish to enter Setup,
restart the system by pressing the ”Reset” button or simultaneously
pressing the <Ctrl>, <Alt> and <Delete> keys. You can also rest art by
turning the system Off and back On again. The following message will
appear on t he screen:
Press <DEL> to Enter Setup
In general, y ou press the arrow keys to highli ght item s, <Enter> to select,
the <PgUp> and <PgDn> keys to change entries, <F1> for help and
<Esc> to q uit.
When you enter the Setup utility, the Main Menu screen will appear on
the screen. The Main Menu allows you to select from various setup
functions and exit choices.
BIOS SETUP
MI912 User’s Manual 29
Phoenix - AwardBIOS CM OS Setup Utility
Standard CMOS Features Frequency/Voltage Control
Advanced BIOS Features
Load Fail-Safe Defaults
Advanced Chipset Features
Load Optimized Defaults
Integrated Peripherals
Set Supervisor Password
Power Management Setup
Set User Password
PnP/PCI Configurations Save & Exit Setup
PC Health Status
Exit Without Saving
ESC : Quit : Select Item
F10 : Save & Exit Setup Time, Date, Hard Disk Type…
The section below the setup items of the Main Menu displays the contr ol
keys f or this menu. At the bottom o f the Ma in Me nu just below the
control keys section, there is another section, which displays information
o n the currently high lighted item in the list.
Note:
If the system cannot boot after making and saving system
changes
with Setup, the Award BIOS supports an override to
the CMOS settings that resets your system to its default.
Warning:
It is strongly recommended that you avoid making any
changes to the chipset defaults. These defaults have been
carefully chosen by both Award and your system
manufacturer to provide the absolute maximum performance
and reliability. Changing the defaults could cause the system
to become unstable and crash in some cases.
BIOS SETUP
30
MI912 User’s Manual
Standard CM O S Setup
“Standard CMOS Set up” cho ice allows you to recor d some basic
hardware configurations in your computer system and set the system
clock and error handling. If the motherboard is already installed in a
work ing s yste m, you will not nee d to s ele ct this op tion. You will nee d to
run the St a ndar d CMOS op tion, however, if you change your system
hardware configurations, the onboard battery fails, or the configuration
stor ed in the CMOS memory was lost or damaged.
Phoenix - A wardBIOS CMO S S etup Utility
Standard CMOS Features
Date (mm:dd:yy)
Wed, Apr 28, 2007
Item Help
Time (hh:mm:ss)
00 : 00 : 00
Menu Level >
IDE Channel 0 M aster
None
Change t he day, m onth,
Year and century
IDE Channel 0 Slave
None
IDE Channel 1 Master
None
IDE Channel 1 Slave
None
Drive A
1.44M, 3.5 in.
Drive B
None
Video
EGA/VGA
Halt On No Errors
Base Memo ry
640K
Extended Memory
129024K
Total Memory
130048K
At the bot tom of the menu are the control keys for use on this menu. If
you need any help in each item field, you can press the <F1> key. I t will
display the relevant information to help you. The memory display at the
lower right-hand side of the men u is read-only. It will adjust automatically
according to the memory changed. The following describes each item of
t his menu.
Date
The date format is:
Day : Sun to Sat
Month : 1 to 12
Date : 1 to 31
Year : 1999 to 2099
BIOS SETUP
MI912 User’s Manual 31
To set the date, hi ghli ght the “Date” fi eld an d use the PageUp/ PageDown
or +/- keys to set t he curr ent time.
Time
The time format is: Hour : 00 to 23
Minute : 00 to 59
Second : 00 to 59
To set the time, highlight the “Time” field and use the <PgUp>/ <Pg Dn>
or +/- keys to set t he curr ent time.
IDE Channel Master/Slave
The onboard PCI IDE connector provides Primary and Secondary
channels for c onnec ting u p to two IDE hard disks or other IDE devices.
Press <Enter> t o configure t he hard disk. The selections include Auto ,
Manual, and None. Select ‘Manual’ to define the drive information
man ua lly. You will be a sk ed to enter the following items .
CYLS : Number of cylinders
HEAD : Number of read/write heads
PRECOMP : Write precompensation
LANDING ZONE : Landing zone
SECTOR : Number of sectors
The Access Mode selections are as follows:
CHS (HD < 528MB)
LBA (HD > 528MB and supports
Logical Block Addressing)
Large (for MS-DOS only)
Auto
Remarks: The main board supports two ser ial ATA ports and are
represented in this setting as IDE Channel 0.
Drive A / Drive B
These fields identify the types of floppy disk drive A or drive B tha t has
been installed in the computer. The available specifications are:
360KB
5.25 in.
1.2MB
5.25 in.
720KB
3.5 in.
1.44MB
3.5 in.
2.88MB
3.5 in.
BIOS SETUP
32
MI912 User’s Manual
Video
This field selects the type of video display card installed in your system.
You can choose the f ollowing video dis play car ds :
EGA/VGA For EGA, VGA, SEGA, SVGA
or PGA monitor adapters. (Default)
CGA 4 0 Power up in 40 column mode.
CGA 8 0 Power up in 80 column mode.
MONO Fo r Her cules or MDA adapt er s.
Halt On
Th is field det ermines whether or no t the system w ill halt if an er ror is
detected during power up.
No errors
The system b oot wil l not be hal ted for any error
that may be detected.
All errors
Whenever the BIOS det ects a non-fatal error,
t he system w ill stop and you will be p rompted.
All, But Keyboa rd
The system boot will not be halted for a
keyboard error; it will stop for all other errors
All, But D isk ette
The syst em boot will not be halt ed for a disk
error; it will stop for all other errors.
All, But D isk /Key
The system bo ot will not be halted for a keyboa rd or dis k e rror; it will stop for all others .
BIOS SETUP
MI912 User’s Manual 33
Advanced BIOS Features
This section allows you to configure and improve your system and allows
you to set up some system features according to your pr eference.
Phoenix - AwardBIOS CMO S S etup Utility
Advanced BIOS Features
CPU Feature
Press Enter
ITEM HELP
Hard Disk Boot Priority
Press Enter
Virus Warning
Disabled
Menu Level >
USB Hard Disk Boot First
Disabled
CPU L3 Cache
Enabled
Quick Power On Self Test
Enabled
First Boot Device
Hard Disk
Second Boot Device
CDROM
Third Boot Device
LS120
Boot Other Device
Enabled
Swap Floppy Drive
Disabled
Boot Up Floppy Seek
Disabled
Boot Up NumLock Status
On
Gate A20 Option
Fast
Typematic Rate Setting
Disabled
Typematic Rate (Chars/Sec)
6
Typematic Delay (Msec)
250
Security Option
Setup
APIC Mo de
Enabled
MPS Version Contro l for OS
1.4
OS Select Fo r DRA M>64MB
Non-OS2
Report No FDD For WIN 95
No
Small Logo (EPA) Show
Disabled
CPU Feature
Press Enter to configure the settings relevant to CPU Feature.
Hard Disk Boot Priority
With the field, there is the option to choose, aside fr om the har d dis ks connected,
“Bootable add-in Cards” which refers to other external devices.
Virus Warning
If this option is enabled, an alarm messa ge will be displayed when trying to write
on the boot sector or on the par tition table on t he disk, which is typical of the
virus.
CPU L1 and L2 Cache
Cache memory is additional memory that is faster than conventional DRAM
(system memory). CPUs from 486-type on up contain internal cache memory , and
most, but not all, modern PCs have additional (external) cache memory. When the
CPU reque sts d ata , th e syste m tra n sfe rs the requ e ste d data fro m the ma i n DR A M
into cache memory, for even faster access by the CPU. These allow you to enable
(speed up memory access) or disable the cache function.
BIOS SETUP
34
MI912 User’s Manual
Quick Power On Self Test
When enabled, this field speeds up the Power On Self Test ( PO ST) after
the s ys te m is tu rne d on. I f it is s e t to Enabled, BIOS will skip some items.
First/Second/Third Boot Device
These fields determine the drive that the system searches first for an
operating system. The options available include Floppy, LS120, Hard
Disk, CDROM, ZIP100, USB-Floppy, USB-ZIP, USB-CDROM, LAN
and Disable.
Boot Other Device
These fields allow the system to search for an OS from other devices
other than the ones selected in the First/Second/Third Boot Device.
Swap Floppy Drive
This item al lows you to determin e whether or not to enable Swap Floppy
Drive. When enabled, the BIOS swaps floppy drive assignments so that
Drive A becomes Driv e B, and Dri ve B b ecomes Dri v e A. By def aul t, thi s
field is se t to Disabled.
Boot Up Floppy Seek
This feature contro ls whether the BIOS checks for a floppy dr ive while
boot ing up. If it cannot detect o ne (either due to improper co nfiguration
or its absence), it will flash an error message.
Boot Up NumLock Status
This al l ows y ou to activate the NumLock function af ter you power up the
system.
Gate A20 Option
This field allows you to select how Gate A20 is worked. Gate A20 is a
device used to address memory above 1 MB.
Typematic Rate Setting
When disabled, continua lly holding dow n a ke y on your keyb oard will
generate only one instance. When en abled, y ou can set the two typemati c
con trols liste d next. By defa ult, this field is set t o Disabled.
Typematic Rate (Chars/Sec)
When the typematic rate is enabled, the system registers repeated
keystrokes speeds. Settings are from 6 to 30 charact er s per second.
BIOS SETUP
MI912 User’s Manual 35
Typematic Delay (Msec)
When the typematic rate is enabled, this item allows you t o set t he time
interval for displ ay in g the fi rst and second characters. By def ault, this item
is set to 250msec.
Security Option
This field allows you to limit access to the System an d Setup. The default
value is Setup. When you select System, the system prompts for the User
Password every time you boot up. When you select Setup, the system
always boots up and prompts for the Supervisor Password only when the
Setu p utility is called up.
APIC Mode
APIC stands for Advanced Programmable Interrupt Controller. The
defa ult s etting is Enabled.
MPS Version Control for OS
This option is specifies th e MPS (Multip rocessor Spec if ica tion) v ersion
for your operating system. MPS version 1.4 added extended
con figur ation tables to improve su ppor t for multip le PCI bus
configurations and improve future expandability. The default setting is
1.4.
OS Select for DRAM > 64MB
This option allows the system to access greater t han 64MB of DRAM
memory when used with OS/2 that depends on certain BIOS calls to
access memory. The default setting is Non-OS/2.
Report No FDD For WIN 95
If you are using Windows 95/98 without a floppy disk drive, select
Enabled to r elease IRQ6. T his is required to p ass Windows 95/98's SCT
te s t. You should a lso disable the Onboard FDC Cont ro ller in the
Integrated Peripherals screen when there's no floppy drive in the system.
If you s et this fe atu re to D isabled, the BIO S will not re port the missing
floppy drive to Win95/98.
Small Logo (EPA) Show
The EPA logo appears at t he right side of the monitor scr een when the
sys tem is b oot up. The de f au lt se tting is Disabled.
BIOS SETUP
36
MI912 User’s Manual
Advanced Ch ipset Featur es
This Setup menu controls the configuration of the chipset.
Phoenix - AwardBIOS CMOS Se t up Ut ility
Adva nc ed Chipset Feat ur es
System BIO S Ca che able
Enabled
ITEM HELP
Memory Hole at 15M-16M
Disabled
PCI Express Ro ot Port Func
Press Enter
** VGA Setting **
PEG/O n Chip VGA Control
Auto
PEG Force X1
Disabled
On-Chip Frame Buffer Size
8MB
DVMT Mode
DVMT
DVMT/FIXED memory Size
128MB
SDVO Device Setting
None
SDVO LVDS Protocol
1CH 18bit
SDVO P anel Numbe r
852x480
Boot Display
CRT
Panel S c aling
Auto
Panel Num ber
1024x768 18 bit SC
LAN PXE Optio n ROM
All Disa ble
System BIOS Cacheable
The setting of Enabled allows caching of the system BIOS ROM at
F000h-FFFFFh, resulting in better system performance. However, if any
progr am writes to this memory area, a system error may result.
Video BIOS Cacheable
The Setting Enabled allows caching of the video BIOS ROM at
C0000h-F7FF F h , resul ti ng in better vi deo performance. However, if any
progr am writes to this memory area, a system error may result.
Memory Hole At 15M-16M
In order to improve performance, certain space in memory can be
reserved for ISA cards. This memory must be mapped into the memory
space below 16 MB. The choices are Enabled and Disabled.
BIOS SETUP
MI912 User’s Manual 37
On-Chip VGA Setting
The fields under the On-Chip VGA Sett ing and their default sett ings are:
PEG/On Chip VGA Control: Auto
On-Chip Frame Buffer Size: 8MB
DVMT Mode: DVTM
DVMT/Fixed Memory Size: 128MB
SDVO Device Setting: (LVDS, DVI, Dual DVI, CRT)
Remarks: Set to LVDS for ID390, Set to CRT to ID390C, Set to DVI for
ID391/ID392/ID391D/ID392D
SDVO LVDS Protocol: 1Ch SPWG, 18bit
SDVO Panel Number: 1024x768
Boot Display: CRT+LVDS
Panel Scaling: Auto
Panel Number: 1024x768 18 bit SC
Panel Scaling
The default setting is Auto. The options available include On and Off.
Panel Number
These fields allow you to select the LCD Panel type. The default values
for these ports are:
640x480
18bit SC
800x480
18bit SC
800x600
18bit SC
1024x768
18bit SC
1280x1024
18bit DC
1280x768
18bit SC
1400x1050
18bit DC
1600x1200
18bit DC
LAN PXE Option ROM
The default setting is All Disable.
BIOS SETUP
38
MI912 User’s Manual
Integrated Peripherals
This section sets co nfigurations for your hard disk and o ther integrat ed
peripherals. The first screen shows three main items for user t o select.
Once an item selected, a submenu appears. Details follow.
Phoenix - A wardBIOS CMO S S etup Utility
Integrated Peripherals
OnChip IDE Device
Press Enter
ITEM HELP
SuperIO Device
Press Enter
Menu Level >
USB Device Setting
Press Enter
Phoenix - A wardBIOS CMO S S etup Utility
OnChip IDE Device
IDE HDD Block Mode
Enabled
ITEM HELP
IDE DMA tra nsfer access
Enabled
Menu Level >
***On-Chip Serial ATA S etting***
SATA Mode
IDE
On-Chip Serial AT
Combined M ode
***On-Chip PATA Setting***
On-chip Primary PCI IDE
Enabled
IDE Primary Master PIO
Auto
IDE Primary Slave PIO
Auto
IDE Primary Master UDMA
Auto
IDE Primary Slave UDMA
Auto
On-Chip Secondary PCI IDE
Enabled
IDE Secondary Master PIO
Auto
IDE Secondary Sla ve PIO
Auto
IDE Secondary Master UDMA
Auto
IDE Secondary Sla ve UDMA
Auto
Phoenix - A wardBIOS CMO S S etup Utility
SuperIO Device
POWER ON Function
BUTTON ONLY
ITEM HELP
KB Power ON Pa ssword
Enter
Hot Key power ON
Ctrl-F1
Onboard Serial Port 1
3F8/IRQ4
Menu Level >
Onboard Serial Port 2
2F8/IRQ3
UART Mode Select
Normal
RxD, TxD Activ e
Hi, Lo
IR Tra ns m is s ion Delay
Disabled
UR2 Duplex M ode
Half
Use IR Pins
IR-Rx2Tx2
PWRON After PWR-Fail
Off
BIOS SETUP
MI912 User’s Manual 39
Phoenix - A wardBIOS CMO S S etup Utility
USB Device Set t ing
USB 1.0 Controller
Enabled
ITEM HELP
USB 2.0 Controller
Enabled
USB Keyboard Function
Enabled
USB Mouse Function
Enabled
Menu Level >
USB Storage Function
Enabled
*** USB Mass S torage Device Boot Sett ing ***
IDE HDD Block Mode
Th is fie ld allow s you r ha rd d is k c ontrolle r to use the fast block mode to
transfer data t o and from your hard disk drive.
IDE DMA transfer access
This field , b y d efault, is enabled
On-chip Primary PCI IDE Enabled
This field , b y d efault, is enabled
On-chip Primary/Secondary PCI IDE
The integrated peripheral controller contains an IDE interface with
support for two IDE channels. Select Enabled t o activate each channel
separately.
IDE Primary/Secondary Master/Slave PIO
These f i el ds al l ow y our system h ard disk controller to work faster. Rather
than have the BIOS issue a series of commands that t ransfer to or from
the disk drive, PIO (Programmed Input/Output) allows the BIOS to
communicate with the contro ller and CPU directly.
The system supports five modes, numbered from 0 (default) to 4, which
primarily differ in timing. When Auto is selected, the BIOS will select the
best available mode.
IDE Pr imar y/Secon dary M aster/Sl ave UDM A
These fields allow your system to improve disk I/O throughput to
33Mb/sec with the Ultra DMA/33 feature. The options are Auto and
Disabled.
On-Chip Serial ATA Setting
The fields under the SATA set t ing include Serial ATA Mode (IDE) and
ON-Ch ip Serial AT ( Combin ed Mod e).
BIOS SETUP
40
MI912 User’s Manual
Power ON Function
Th is fie ld is related to how t he system is powered on – suc h as w ith t he
use of convent ional po wer but to n, k eyboar d o r ho t ke ys. The default is
BUTTON ONLY.
KB Power ON Password
This field all ows users to set the password when key board power on is the
mode of the Power ON function.
Hot Key Power ON
This field sets certain keys, al s o kno wn as hot keys, on the keyboard that
can be used as a ‘switch’ to p ower on t he system.
Onboard Serial Port
These fields allow you to select the onboard serial ports and their
addresses. The default values for these ports are:
Serial Port 1 3F8/IRQ4
Serial Port 2 2F8/IRQ3
UART Mode Select
This field determines the UART 2 mode in your co mputer. T he default
va lue is Normal. O ther options includ e IrDA and ASKIR.
PWRON After PWR -Fail
This field sets the system power status whether on or off when p ower
returns to the system from a powe r failu re situatio n.
USB 1.0 Controller
The options for this field are Enabled and Disabled. By defa ult, this field
is set to Enabled.
USB 2.0 Controller
The options for this field are Enabled and Disabled. By default, th is fie ld
is set to Enabled. In order to use USB 2.0, necessary OS dri vers must be
installed first. Please update your system to Windows 2000 SP4 or
Windows XP SP2.
USB Keyboard/Mouse/Storage Function
The options for this field are Enabled and Disabled. By defa ult, this field
is set to Enabled.
BIOS SETUP
MI912 User’s Manual 41
Power Manag ement Setup
Phoenix - A wardBIOS CMO S S etup Utility
Power Management Setup
ACPI Function
Enabled
ITEM HELP
ACPI Suspend
S3(POS)
RUN VGABIOS if S3 Res um e
Auto
Menu Level >
Power Management
User Define
Video Off Method
DPMS
Video Off In Suspe nd
Yes
Suspend Type
Stop Grant
Modem Use IRQ
3
Suspend Mode
Disabled
HDD Power Dow n
Disabled
Soft-Off by PWR-BTTN
Instant-Off
CPU THRM-Throttling
50.0%
Wake-Up by PCI Card
Disabled
Power On by Ring
Disabled
USB KB Wake-Up From S3
Disabled
Resume by Alarm
Disabled
Date (of Month) Alarm
0
Time (hh:mm:ss) Alarm
0 : 0 : 0
** Reload Globa l Timer Events **
Primary IDE 0
Disabled
Primary IDE 1
Disabled
Secondary I DE 0
Disabled
Secondary I DE 1
Disabled
FDD, COM, LPT Port
Disabled
PCI PIRQ[A-D] #
Disabled
ACPI Function
Enable this function to support ACPI (Advance Configuration and Power
Interface).
ACPI Suspend
The default setting of the ACPI Suspend mode is S3(POS).
RUN VGABIOS if S3 Resume
The de fault setting of this field is Auto.
Power Management
This field allows you to select the type of power saving management
modes. There are four selections for Power Management.
Min. Power S aving
Minimum power man agement
Max. Po w er S aving
Maximum power management.
User Define
Each of the ranges is from 1 min. to 1hr.
Except for HDD Power Down which
range s from 1 min. to 15 min.
BIOS SETUP
42
MI912 User’s Manual
Video Off Method
This field defines the Video Off features. T here ar e three opt ions.
V/H SYNC + Blank Def aul t setting, blan k the screen and turn off
vertical and horizontal scanning.
DPMS Allow s BIOS to control the vide o dis pla y.
Blank Screen Writes blanks to t he video buffer.
Video Off In Suspend
When enabled , the video is o ff in suspe nd mode. The default setting is
Yes.
Suspend Type
The default setting for the Suspend Type field is Stop Grant.
Modem Use IRQ
This field sets the IRQ used by the Modem. By default, the setting is 3.
Suspend Mode
When enabled, and after the set time of system inactivity, all devices
except the CPU will be shut off.
HDD Power Down
When enabled, and after the set t ime of system inactivity, t he hard disk
drive will be powered down while all other devices remain active.
CPU THRM-Throttling
When the system enters Doze mode, the CPU clock runs only part o f the
time. You may select the percent of time that the clock runs.
Soft-Off by PWRBTN
This field defines the power-off mode when using an ATX power supply.
The Instant Off mode allows powering off immediately upon pressing the
po wer button. In t he D ela y 4 Sec mode, the system powers off when the
power button is pressed for more than four seconds or enters the suspend
mode when pressed for less than 4 seconds.
Wake up by PCI Card
By default, this field is d isabled.
BIOS SETUP
MI912 User’s Manual 43
Power On by Ring
This field enables or disables the power on of the system through the
modem connected to t he serial port o r LAN.
USB KB Wake-Up From S3
This field , b y de fault, is d isabled.
Resume by Alarm
This field enables or disables the resumption of the system operat ion.
When enabled, the user is allowed to set t he Date and Time.
Reload Global Timer Events
The HDD, FDD, COM, LPT Ports, and PCI PIRQ are I/O events that can
prevent the system f rom enterin g a power savin g m ode or can awaken the
system f rom such a m ode. When an I/O devi ce wants to gain the attention
of the operating system, it si gnals this by causing an IRQ to occur. When
the operating system i s ready to respond to the request, it interrupts itself
and performs the service.
BIOS SETUP
44
MI912 User’s Manual
PNP/PCI Configurations
This option co nfigures t he PCI bus system. All PCI bus systems o n the
system use INT#, thus all installed PCI cards must be set to t his value.
Phoenix - A wardBIOS CMO S S etup Utility
PnP/PCI Configurations
Init Dis play First
PCI Slot
ITEM HELP
Reset Configuration Da ta
Disabled
Menu Level
Select Yes if you are
using a Plug a nd P lay
capable operating
system Select No if
you need the BIOS to
configure non-boot
devices
Resour c es Contr olled By
Auto (ESCD)
IRQ Resources
Press Enter
PCI/VGA Palette Snoop
Disabled
INT Pin 1 Assignment
Auto
INT Pin 2 Assignment
Auto
INT Pin 3 Assignment
Auto
INT Pin 4 Assignment
Auto
INT Pin 5 Assignment
Auto
INT Pin 6 Assignment
Auto
INT Pin 7 Assignment
Auto
INT Pin 8 Assignment
Auto
**PCI Express rela t ive items**
Maximum Payloa d Size
128
Init Display First
The default setting is PCI Card.
Reset Configuration Data
This f i el d al lows you to determin e whether to reset the confi guration data
or not. The default value is Disabled.
Resources Controlled by
This PnP BIOS can conf igure all of the boot and compatib le devices with
the use of a PnP operating system such as Windows 95.
PCI/VGA Palette Snoop
Some non-standard VGA display cards may not show colors properly.
This f i el d al l ows y ou to set whether or not MPEG ISA/VESA VGA cards
can work with PCI/VGA. When this field is enabled, a PCI/VGA can
work with an MPEG ISA/VESA VGA card. When this f i el d is disab l ed, a
PCI/VGA cannot work with an MPEG ISA/VESA card.
Maximum Pay load Size
The default setting of the PCI Express Maximum Payload Size is 4096.
BIOS SETUP
MI912 User’s Manual 45
PC Health Status
This section shows the parameters in determining the PC Health Stat us.
These parameters include temperatures, fan speeds and voltages.
Phoenix - Awa r dB IOS CMOS Set up Utility
PC Health Stat us
Shutdown Temperature
Disabled
ITEM HELP
CPU Warning Temperature
Disabled
Current System Temp
45°C/113°F
Menu Level >
Current CP U Temp
45°C/113°F
FAN1 Speed
5400 RPM
FAN2 Speed
5400 RPM
Vcore 1.02 V
+12 V
1.32 V
V1.9
1.8V
+5V
5.25 V
-12V
-12.59
3.3V 3.37V
VBAT (V)
3.21 V
5VSB(V)
5.67 V
1st Smart Fan Temperature
Disabled
2st
Smart Fan Temperature
Disabled
CPU Warning Te mperat ure
This field allows the user to set the temperature so that when the
temperature is reached, the system sounds a warning. This function can
help prevent damage to the system that is caused by overheating.
Temperatures/Voltages
These fields are the parameters of the hardware monitoring function
feature of the motherboard. The values are read-only values as monitored
by the system and s how the PC hea lth status.
Shutdown Temper ature
This field allows the user to set the temperature by which the system
automatical ly shuts down once the threshold temperature is reached. This
function can help prevent damage to the system that is caused by
overheating.
1st 2st Smart Fan Temperature
This field enables or disables the smart fan feature. At a certain
temperature, the fan starts turning. Once the temperature drops to a
certain level, it stops tur ning again.
BIOS SETUP
46
MI912 User’s Manual
Frequency/Voltage Control
This section shows the user how to co nfigure the processor frequency.
Phoenix - A wardBIOS CMO S S etup Utility
Frequency/Voltage Control
Auto Dete c t PCI Clk
Disabled
ITEM HELP
Spread Spectrum Modulated
Disabled
Menu Level >
Auto Detect PCI Clk
This field enables or disables the auto detection of the PCI clock.
Spread Spectrum Modulated
This field sets the value of the spread spectrum. The default setting is
Disabled. This fie ld is for CE tes ting use only.
BIOS SETUP
MI912 User’s Manual 47
Load Fail-Safe D efaults
This option allows you to load the troubleshooting default values
permanently stored in the BIOS ROM. These default settings are
non-optimal an d disable all h igh-performance features.
Load Optimized Defaults
This option allows you to load the default values to your system
configuration. These default settings are optimal and enable all high
performance features.
Set Supervisor Passw ord
These tw o o pt ions set t he system passwor d. Su per visor Passw o rd se t s a
password t hat will be used to pro tect the system and Setup utility. User
Password sets a password that wil l be used exclusi vely on the system . To
specify a password, highlight the type you want and press <Ent er>. The
Enter Passwor d : message prompts on the screen. Type the password, up
to eight characters in length, and press <Enter>. The system confirms
your password by asking you to type it again. After setting a password,
the screen auto matically returns to the main screen.
To disab le a password, just press the <Enter> key wh en y ou are prompted
to enter the password. A message will confirm the password to be
disabled. Once the password is disab l ed, the sy stem wi l l b oot and you can
enter Set up freely.
Save & Exit Setup
This option allows you to determine whether or not to accept the
mo difications. If you type “ Y”, you w ill quit the setup utility and save all
changes into the CMOS memory. If you type “N”, you will return to
Setu p utility.
Exit W ithout Saving
Select this option to exit the Setup utility without saving the changes you
ha ve ma de in this s e s s ion . Typ in g “ Y ” w ill q uit the Se tu p utility without
saving the mod ifica tio n s. T yping “N” will return you to S etup utility.
BIOS SETUP
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MI912 User’s Manual
This page is in tention ally le f t blan k.
DRIVERS INSTALLATION
MI912 User’s Manual 49
Drivers Installation
This secti on describ es the i nstal l ation procedures for software and drivers
under the Windows 2000 and Windows XP. The software and drivers are
inc lud ed with the motherboard. I f you find the ite ms missing, plea se
contact the vendor where you made the purchase. The contents of this
section includ e the following:
Intel Chipset S of twa re I nstallation Utility .................................. 50
VGA Dr iv ers Insta llation .......................................................... 52
AC97 Code c Aud io Drive r Installation ..................................... 54
LAN D riv ers Installation ........................................................... 55
IMPORTANT NO TE:
After installing your Windows operating system (Windows 2000/ XP),
you must install first the Intel Chipset Software Installation Utility before
proceeding with the d riv ers in stallation.
DRIVERS INSTALLATION
50
MI912 User’s Manual
Intel Chipset Softwa r e I n sta lla tio n Utility
The Int el Chipset D rivers s hould be installed first before the software
drivers to enable Plug & Play INF support for Intel chipset components.
Follow the instructions bel ow to com p l ete the install ation under Wi ndows
2000/XP.
1. Insert the CD that comes wi th the board. Click Intel Chipsets and then
Intel(R)GM 965Chipset Dri v ers.
2. C lick Intel(R) Chipset Software Installation Utility.
3. When the Welcome screen appears, click Next t o continue.
DRIVERS INSTALLATION
MI912 User’s Manual 51
4. C lick Yes t o accept the softwar e license agreement and proceed with
the installation process.
5. On Readme Inf ormation screen, cli ck Next to continue the installation.
6. The Setu p process is now complete. Click Finish to restart the
computer and for changes to take effect.
DRIVERS INSTALLATION
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MI912 User’s Manual
VGA Drive rs In s ta llat ion
To in st all t he VGA drivers, follow the steps below to proceed with the
installation.
1. Insert the CD that co mes with the motherboard. C lick Intel Chipsets
and then Intel(R) GME965Chip se t D ri ve rs.
2. C lick Intel(R) GME965Chipset Family Graphics Driver.
3. When the Welcome screen appears, click Next to continue.
DRIVERS INSTALLATION
MI912 User’s Manual 53
4. Click Yes to to agree with the license agreement and continue the
installation.
5. Proceed as instructed and restart the co mputer as pr ompted and for
changes to take effect.
IMPORTANT NOTE:
When you have restarted th e computer, you r computer screen will be
blank. At this point, press CTRL-ALT-F1 sim ult aneously, if you are
using CRT monitor. If you are using LVDS LCD panel, press
CTRL-ALT-F3. If you are using DVI moni t o r, p re ss CTRL-ALT-F4.
DRIVERS INSTALLATION
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MI912 User’s Manual
AC97 Codec Audio Driver Installation
Follow the steps below to install the Realtek AC97 Codec Audio Drivers.
1. Insert the CD that co mes with the motherboard. Click Intel Chipsets
and then Intel(R) GME965Chipse t D ri ve rs.
2. C lick Realtek AC'97 Codec Audio Driver.
3. Click Finish to restart the computer and for changes to take effect.
DRIVERS INSTALLATION
MI912 User’s Manual 55
LAN Drivers In st alla tio n
Follow th e st e ps be lo w to complete the installation of th e I nt e l PRO
LAN drivers.
1. Insert the CD that co mes with the motherboard. C lick Intel Chipsets
and then Intel(R) GME965Chipse t D ri ve rs, then Intel(R) PRO LAN
Network Drivers.
2. Clic k Install Base Software to continue.
3. When prompted, restar t the co mputer for new settings to take effect.
DRIVERS INSTALLATION
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MI912 User’s Manual
Follow the steps below to install the Intel 82574L Gigabit LAN
drivers.
1. Insert the CD that comes with the motherboard. Click LAN Card and
then Intel( R) PRO 82574L LAN D ri ve rs.
2. Click Install Drivers and Software. When the Welcome screen
appears, click Next to continu e .
3. Click Next to to agr ee with t he license agreement.
DRIVERS INSTALLATION
MI912 User’s Manual 57
4. Click the Drivers checkbox as shown bel ow and cl i ck Next to continue
installation. T hen, click Install to begin the installation.
4. When InstallShield Wiz ard has comple ted ins talla tion, clic k Finish.
DRIVERS INSTALLATION
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MI912 User’s Manual
This page is in tention ally le f t blan k.
APPENDIX
MI912 User’s Manual 59
Appendix
A. I/O Port Address Map
Each peripheral device in the system is assigned a set of I/O port
addresses which also becomes the identity of the device. The following
table lists the I/O port addresses used.
Address
Device Description
000h - 01Fh
DMA C ontroller # 1
020h - 03Fh
Interrupt Controller #1
040h - 05Fh
Timer
060h - 06Fh
Keyboard Cont r oller
070h - 07Fh
Real Time Clock, NMI
080h - 09Fh
DMA Page Register
0A0h - 0BFh
Interrupt Controller #2
0C0h - 0DFh
DMA C ontroller # 2
0F0h
Clear Math Coprocesso r Busy Signal
0F1h
Reset Math Copr ocessor
1F0h - 1F7h
IDE Interface
278 - 27F
Parallel P ort #2 (L PT2 )
2F8h - 2FFh
Serial Port #2(COM2)
2B0 - 2DF
Graphics adapter Controller
378h - 3FFh
Parallel P ort #1 (L PT1 )
360 - 36F
Networ k Ports
3B0 - 3BF
Monochrome & Printer adapter
3C0 - 3CF
EGA adapter
3D0 - 3DF
CGA a dapter
3F0h - 3F7h
Flop py Disk Contr oller
3F8h - 3FFh
Serial Port #1(COM1)
APPENDIX
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MI912 User’s Manual
B. Interrupt Request Lines (IRQ)
Peripheral dev ices us e in terrupt request li nes to notify C PU for the service
required. The following table shows the IRQ used by the devices on
board.
Level
Function
IRQ0
System Timer Output
IRQ1
Keyboard
IRQ2
Interrupt Cascade
IRQ3
Serial Port #2
IRQ4
Serial Port #1
IRQ5
Reserved
IRQ6
Flop py Disk Contr oller
IRQ7
Parallel P ort #1
IRQ8
Real Time Clock
IRQ9
Reserved
IRQ10
Reserved
IRQ11
Reserved
IRQ12
PS/2 Mouse
IRQ13
80287
IRQ14
Primary IDE
IRQ15
Secondary IDE
APPENDIX
MI912 User’s Manual 61
C. Watchdog Timer Configuration
The WDT is used to generate a variety of output signals after a user
progr ammable count. The WDT is suitable for use in the prevention of
sys tem loc k-up, such as when software becomes trapped in a deadlock.
Under these sorts of circumstances, the t imer will count to zero and the
selected output s will be driven. Under normal circumstance, the user will
restart the WDT at r egular intervals before the timer counts to zero.
SAMPLE CODE:
//===========================================================================
//
// THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY
// KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A PARTICULAR
// PURPOSE.
//
//===========================================================================
#include <stdio.h>
#include <stdlib.h>
#include "W627EHF.H"
//===========================================================================
int main (int argc, char *argv[]);
void copyright(void);
void EnableWDT(int);
void DisableWDT(void);
//===========================================================================
int main (int argc, char *argv[])
{
unsigned char bBuf;
unsigned char bTime;
char **endptr;
copyright();
if (argc != 2)
{
printf(" Parameter incorrect!!\n");
return 1;
}
if (Init_W627EHF() == 0)
{
printf(" Winbond 83627HF is not detected, program abort.\n");
return 1;
}
bTime = strtol (argv[1], endptr, 10);
printf("System will reset after %d seconds\n", bTime);
EnableWDT(bTime);
return 0;
}
//===========================================================================
APPENDIX
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MI912 User’s Manual
void copyright(void)
{
printf("\n======== Winbond 83627EHF Watch Timer Tester (AUTO DETECT) ========\n"\
" U sage : W627E_WD r eset_time\n"\
" Ex : W627E_WD 3 => reset system after 3 second\n"\
" W627E_WD 0 => disable watch dog timer\n");
}
//===========================================================================
void EnableWDT(int interval)
{
unsigned char bBuf;
bBuf = Get_W627EHF_Reg( 0x2D);
bBuf &= (!0x01);
Set_W627EHF_Reg( 0x2D, bBuf); //Enable WDTO
Set_W627EHF_LD( 0x08); //switch to logic device 8
Set_W627EHF_Reg( 0x30, 0x01); //enable timer
bBuf = G et_W627EHF_Reg( 0xF5);
bBuf &= (!0x08);
Set_W627EHF_Reg( 0xF5, bBuf); //count mode is second
Set_W627EHF_Reg( 0xF6, interval); //set timer
}
//===========================================================================
void DisableWDT(void)
{
Set_W627EHF_LD(0x08); //switch to logic device 8
Set_W627EHF_Reg(0xF6, 0x00); //clear watchdog timer
Set_W627EHF_Reg(0x30, 0x00); //watchdog disabled
}
//===========================================================================
APPENDIX
MI912 User’s Manual 63
//===========================================================================
//
// THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY
// KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A PARTICULAR
// PURPOSE.
//
//===========================================================================
#include "W627EHF.H"
#include <dos.h>
//===========================================================================
unsigned int W627EHF_BASE;
void Unlock_W627EHF (void);
void Lock_W627EHF (void);
//===========================================================================
unsigned int Init_W627EHF(void)
{
unsigned int result;
unsigned char ucDid;
W627EHF_BASE = 0x2E;
result = W627EHF_BASE;
ucDid = Get_W627EHF_Reg(0x20);
if (ucDid == 0x88)
{ goto Init_Finish; }
W627EHF_BASE = 0x4E;
result = W627EHF_BASE;
ucDid = Get_W627EHF_Reg(0x20);
if (ucDid == 0x88)
{ goto Init_Finish; }
W627EHF_BASE = 0x00;
result = W627EHF_BASE;
Init_Finish:
return (result);
}
//===========================================================================
void Unlock_W627EHF (void)
{
outportb(W627EHF_INDEX_PORT, W627EHF_U N LOCK);
outportb(W627EHF_INDEX_PORT, W627EHF_UNLOCK);
}
//===========================================================================
void Lock_W627EHF (void)
{
outportb(W627EHF_INDEX_PORT, W627EHF_LOCK );
}
//===========================================================================
void Set_W627EHF_LD( unsigned char LD)
{
Unlock_W627EHF();
outportb(W627EHF_INDEX_PORT, W627EHF_REG_LD);
outportb(W627EHF_DATA_PORT, LD);
Lock_W627EHF();
}
APPENDIX
64
MI912 User’s Manual
//===========================================================================
void Set_W627EHF_Reg( unsigned char REG, unsigned char DATA)
{
Unlock_W627EHF();
outportb(W627EHF_INDEX_PORT, REG);
outportb(W627EHF_DATA_PORT, D ATA);
Lock_W627EHF();
}
//===========================================================================
unsigned char Get_W627EHF_Reg(unsigned char REG)
{
unsigned char Result;
Unlock_W627EHF();
outportb(W627EHF_INDEX_PORT, REG);
Result = inportb(W627EHF_DATA_PORT);
Lock_W627EHF();
return Result;
}
//===========================================================================
//===========================================================================
//
// THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY
// KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A PARTICULAR
// PURPOSE.
//
//===========================================================================
#ifndef __W627EHF_H
#define __W627EHF_H 1
//===========================================================================
#define W627EHF_INDEX_PORT (W627EHF_BASE)
#define W627EHF_DATA_PORT (W627EHF_BASE+1)
//===========================================================================
#define W627EHF_REG_LD 0x07
//===========================================================================
#define W627EHF_UNLOCK 0x87
#define W627EHF_LOCK 0xAA
//===========================================================================
unsigned int Init_W627EHF(void);
void Set_W627EHF_LD( unsigned char);
void Set_W627EHF_Reg( unsigned char, unsigned char);
unsigned char Get_W627EHF_Reg( unsigned char);
//===========================================================================
#endif //__W627EHF_H
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