This manual describes information related with prod uct repair. To repair the product properly, please
read this manual careful ly.
This manual is applica ble to the following model:
PD70X (X may indicate 2, 5, 6 or 8)
PD70XG (X may indicate 2, 5, 6 or 8)
PD78X (X may indicate 2, 5, 6 or 8)
PD78XG (X may indicate 2, 5, 6 or 8)
HD705
HD705G
HD785
HD785G
In this manual, the description related to the LCD is applicable to PD78X/ PD78XG/ HD785/ HD785G
only, while the description related to GPS is applicable t o PD70XG/ PD78XG/ HD705G / HD785G only.
Service Manual
Contents
1. Revision History ................................................................................................................................... 1
dd descriptions on VHF, UHF2 and UHF3; update the battery
R3.5 05-2011
A
life.
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Service Manual
2. Copyright Information
Hytera is the trademark or registered trademark of Hytera Communications Co., Lt d. (t he Company) in
PRC and/or other countries or areas. The Company re tains the ownership of its trademarks and pro duct
names. A ll ot her trademarks and/or product na mes that may be used in this manual are properties of
their respective owners.
The product described in this ma nual may include the Company’s computer programs stored in memory
or other media. Laws in P RC an d/or ot her c ountr ies or areas protect the exclu siv e right s o f the Com pany
with respect to its comput er programs. The purchase of t hi s product shall not be deemed to grant , eit her
directly or by implication, any rights to the purchaser regarding the Company ’s computer programs. Any
of the Company’s computer programs may not be copi ed, modified, distributed, deco mpiled, or
reverse-engineered in any manner without the prior written consent of the Company.
TM
The AMBE+2
voice coding technology embod ied in this product is protect ed by intellectual propert y
rights including patent rights, copyrights and trade secrets of Digital Voice Systems, Inc. This voice
coding technology is licensed solely for use within this product. The user of this technology is explicitly
prohibited from attempting t o decompile, reverse engineer, or disassemble the Object Code or in any
other way convert the Object Code into a human readable form.
U.S. Patent Nos. #6,912, 495 B2, #6,199,037 B1, #5,870,405, #5,826,222, #5, 754,974, #5,701,390,
#5,715,365, #5,649,050, #5,630,011, #5,581,656, #5,517,511, #5,491,772, #5,247,579, #5,226,084 an d
#5,195,166.
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Service Manual
3. Disclaimer
The Company endeav ors to achieve the accuracy and comp let eness of this manual, but no warranty of
accuracy or reliability is gi ven. All the specificat ions and designs are subject to change without notice
due to continuous techno l ogy development. No p art of t his manual may be copied, mo dified, translated,
or distributed in any manner w ithout t he express written permissi on of us.
If you have any suggestions or would like to learn more details, please visit our website at:
http://www.hytera.com
.
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Service Manual
4. Introduction
Intended User
This manual is intended f or use by qualified technicians only.
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Service Manual
5. Product Controls
PD70X/ PD70XG/ HD705/ HD705G
No. Part Name No. Part Name
SK1 (Side Key 1)
1
○
PTT Key
2
○
SK2 (Side Key 2)
3
○
TK (Top Key)
4
○
Channel Selector kno b
5
○
Speaker
6
○
LED Indicator
7
○
○
○
10
○
11
○
12
○
13
○
14
○
Radio On-Off/V olume Control Knob
8
Microphone
9
Accessory Jack
Battery Latch
Antenna
Belt Clip
Battery
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Service Manual
PD78X/ PD78XG/ HD785/ HD785G
No. Part Name No. Part Name
1
○
2
○
3
○
4
○
5
○
6
○
7
○
8
○
SK1 (Side Key 1)
PTT Key
SK2 (Side Key 2)
TK (Top Key)
Channel Selector kno b
Microphone
LCD Display
OK/Menu Key
LED Indicator
11
○
Antenna
12
○
Radio On-Off/V olume Control Knob
13
○
Accessory Jack
14
○
Exit Key
15
○
Up Key
16
○
Down Key
17
○
Battery Latch
18
○
Speaker
9
○
Numeric Keypad
10
○
19
○
20
○
6
Belt Clip
Battery
Service Manual
6. Baseband Section
6.1 Power Section
6.1.1 Diagram of Power Control
6.1.2 Radio On/Off
Figure 6-1 Diagram of Pow er Cont rol
Figure 6-2 Diagram of Radio O n/ Off Control
The radio-on signal (POWER-SW+) satisfies the equation: POWER-SW+= PWR-SW- | POWER-CTL.
When the V ol u me Swit ch is on, P WR-S W- an d POWER-SW+ are at high lev el, and the radi o powers u p.
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Service Manual
After power-on, POWER-CTL goes to high level, and POWER-KEY-DET goes to low level. During
power-off, POWER-SW+ is a t low level, while POWER-KEY-DET is at high level. The system detects
power-off procedure via POWER-KEY-DET and implements the power-off procedure. Then
POWER-KEY-DET and PO WER-SW+ go to low level, and the p o w er is cut off.
6.1.3 Power Protection
Power protection includes over-current, reverse-voltage and E SD protection.
6.1.4 Power Consumption Control
OMAP can control and configure the power supply and working mode of the peripheral modules (RF
section and baseband section) via I/O interface and serial bus, so as to reduce power consumption.
6.2 Control Section
6.2.1 OMAP5912 Dual-core Processor
The radio uses the dual-core processor OMAP5912, which is mainly composed of ARM926EJ-S and
TMS320C55xx. ARM926EJ-S is the main controller, while TMS320C55xx is used for
modulation/demodulation and voice encoding/ decoding.
Figure 6-3 Diagram of OM AP 5912
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Service Manual
Figure 6-4 Diagram of Overall Scheme
6.2.2 External Memory
OMAP5912 provides two types of external memory interfaces: external memory interface slow (EMIFS)
and external memory interfac e fa st (EMI FF).
MT48H8 M 16LFB 4-75
A[0:12]
D[0:15]
BA0
BA1
CAS#
RAS#
CKE
CLK
CS#
WE#
LDQM
ULQM
EMIFFEMIFS
SDRAM .A[0:12]
SDRAM .D[0:15]FLASH .A[15:0]
SDRAM.BA 0
SDRAM.BA 1
SDRAM.CAS#
SDRAM.RA S #
SDRAM.CKE#
SDRAM.CLK#
SDRAM.CS#
SDRAM .W E#
SDRAM.DQML
SDRAM.DQMU
Figure 6-5 Diagram of External Memory
OMA P5912
FLASH.A[24:1]
FLASH.OE#
FLASH.WE#
FLASH.CS3#
RST_OUT#
FLASH.WP#
FLASH.RDY
TV00570002C DG B
A[23:0]
DQ[15:0]
OE#
WE#
Cef#
RESET#
WP#/ACC
RY/Byf#
1) EMIFS
EMIFS is a 16-bit interface, and provides four 64MB chip selects (CS0~CS3). The interface supports
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Service Manual
memories such as NAND Flash, NOR Flash and SRAM.
2) EMIFF
EMIFF is a 16-bit interfa ce, and supports SDR AM (up to 128MB), mobile SDRAM and mobile DDR.
6.2.3 Clock
Option board
CLK-32K-OUT
32kHz
CLK-OPT
19.2MHz
12
32.768KHz
20pF20pF
X20 3
1
VCC
VCONT
23
OUT
GND
TCXO 19 . 2MHz
X201
VCC
4
CLK_32K_OUT
OSC32K_OUT
OSC32K_IN
ULPD
VSS(Y13)
OSC1_OUT
OSC1_IN
MCLK
19.2MHz
MCLK
U821
TLV320AIC29
BCLK
ULPD_PLL_CLK
19.2MHz
CK_REF
OMAP5912
APLL
OMAP3.2
DPLL1
U201
96MHz
CLK32K_IN
ARM_CK
DSP_CK
TC_CK
Figure 6-6 Diagram of Baseband Clock
Input Clock:
(A) 32K Clock: It is also c alled “sleep clock” and is ma inly used for timing and sleeping of the system.
(B) 19.2MHz Clock: I t is mainly used to provide inp ut clock for APLL and DPLL.
Output Clock:
Three output clocks are provided: MCLK, BCLK and CLK32K_OUT. MCLK provides 19.2MHz clock to
the audio codec; BCL K provides 19.2MHz clock to the option boar d; and CLK32K_OUT provides 32KHz
clock to the option board.
6.2.4 Reset Signal
Figure 6-7 Diagram of Reset Signal
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Service Manual
6.2.5 SPI
OMAP5912 has a SPI, which has four chip-selects for connecting four external SPI components. The
SPI signals available are SPI.DOUT, SPI.DIN, SPI.CLK and SPI.CS. The system uses SPIF.CS2 to
select the IF processor AD9864, to configure register of AD9864. The connection of SPI is show n below.
PE
AD9864 PC
D9864PC
PD
DOUTB
PEA
PD
DOUTB
SPIF.CS2(T19)
SPIF.SCK(U19)
SPIF.DOUT(W21)
SPIF.DIN(U18)
U201
OMAP5912
Figure 6-8 Diagram of SPI Connection
6.2.6 MCBSP
OMAP5912 provides 3 MCBSP interfaces: MCBSP1, MCBSP2 and MCBSP3. MCBSP1 is connected
with the I2S interface of the audio codec, to realize two-way transmission of digital voice and data.
MCBSP2 uses independent clock and frame synchronization for transmission and reception. AD9864
SSI is connected to the RX end of OMAP5912 MCBSP2. AD9864 works in master mode, while DSP
works in slave mode. DAC is connected with the TX end of MCBSP2, and DSP works in master mode.
MCBSP3 is connected to t he opt i on board. The connect ion of MCBSP is shown below.
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Service Manual
Figure 6-9 Diagram of MCBSP Connect ion
6.2.7 USB
OMAP5912 provides 3 USB interfaces. One interface integrates a USB transceiver, which is connected
to the accessory jack and is used for program downloading and data application.
Figure 6-10 Diagram of USB Int erface
6.2.8 UART
OMAP5912 has three UART interfaces (UART1, UART2 and UART3), and supports hardware flow
control. The maximum communication rate is 1.5Mb ps. The conn ection of UAR T is shown below. UART1
is connected with the accessory jack, and is used for updating and programming. UART2 is for GPS,
and UART3 is for the opti on board.
Figure 6-11 Diagram of UART Interface Connect ion
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Service Manual
6.2.9 I2C
OMAP5912 provides one I2C interface, and supports communication rate up to 400Kbps. The I2C
interface is connected with the acceleration sensor, and works in slave mode. The connection of I2C is
shown below.
Figure 6-12 Diagram of I2C Connection
6.2.10 MICROWIRE
OMAP5912 provides a MICROWIRE. The four chip select signals can drive four external components.
MICROWIRE is used to configure the audio codec and read the value of its register. It uses the chip
select signal 3. The connection is shown below.
Figure 6-13 Diagram of MICROWIRE Connection
6.2.11 MCSI1
OMAP5912 has two MCSI interfaces. MCSI1 is used for PLL configuration and data transmission. The
connection of MCSI1 is shown below.
Figure 6-14 Diagram of SPI Con nection
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Service Manual
6.3 Audio Section
6.3.1 Audio Diagram
The audio module is mainly for audio input and output. TLV320AIC29 is used as the audio codec to
convert and process audio signal and digital signal. The audio amplifier TDA8547TS is used to amplify
the analog audio signal. DSP processes digital signal (audio signal e n cod in g /dec odi ng, d igital I/Q signal
decoding, digital audio signal processing). AD9864 converts and processes the RF IF signal, and sends
the undemodulated serial digital I/Q signal to the DSP for proce ssing. Then DAC5614 conv erts the d igital
signal output by DSP to analog signal.
Figure 6-15 Diagram of Audio Section
6.3.2 Diagram of Signal Flow
The microphone converts the audio signal into electrical signal, which is then amplified by PGA of the
codec and sent to ADC of the codec for sampling. After digital audio processing, the signal is output to
DSP for processing. Then the signal is sent to DAC (TLV5614), which converts the signal to modulation
signal. After modulated and amplified in the RF mod ule, t he signal is sent out from the ant enna.
The RF signal received by the RF module is converted to digital signal by ADC (AD9864), and is then
14
Service Manual
Ω
sent to DSP for demodulation and processing. Then the digital signal is sent to the digital audio
processor of the codec for digital audio processing, and is then converted into analog audio signal by
DAC of the codec. Finally the signal is amplified by the external audio amplifier (TDA8547TS) to drive
the speaker.
UWIRE.SCLK
UWIRE.CS3
UWIRE.SDO
UWIRE.SDI
Internal/
external MIC input
MIC
gain:
22dB
TX
TX
RXRX
APA
TDA8547TS
Gain: 31dB
Internal/external speak er
output
Figure 6-16 Diagram of Audio Signal Flow
RX
6.3.3 Audio Amplifier
Main parameters of TDA8547TS are listed in the table below:
Rated Power (Po) 0.5W
Maximum Power (P
) 1.2W
max
OMAP5912
MCLK
MCBSP1.DR
MCBSP1.FSX
MCBSP1.DX
MCBSP1.CLKX
Audio is processed via DSP.
=16Ω
R
L
=16
R
L
TX
MCBSP2.DXDIN
MCBSP2.DR
TLV5604
DAC
DOUTA
AD9864
RF TX
RF RX
The operation status of the audio amplifier is controlled via GPIO of OMAP. See the table below.
Mode-Amp SEL-SPK MODE SELECT OUT
1 1 0 0 OUT2
1 0 0 1 OUT1
0 1 1 1 Standby
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Service Manual
6.4 Troubleshooting Flow Chart
The GPS module
outputs normally?[1]
Yes
The channel from GPS to
OAMP is normal?
Yes
L506 outputs 2.8V
voltage?
Yes
U501 is normal?[3]
No
No
No
Yes
No
The power supply for GPS is
normal?[2]
No
Replace abnormal RC and
check OMAP.
GPS PIN17 outputs 2.8V voltage?
Replace U501.
Yes
Check the power
supply.
No
Replace the GPS
module.
Replace the
GPS module.
Yes
No
Z501 is normal?[4]
Replace Z501.
Description of Nor ma l S it uations:
[1] The radio shows normal power-on screen, and the backlight is norma l.
[2] The RF power supply out puts normally, and the RX channel is on.
[3] Vpp: 700mV~800mV, F: 19.2MHz.
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Service Manual
6.5 PCB Difference
For UHF1 PCB, Version H and Version K are made on the basis of Version F.
1. The following changes are made for Version H:
1) Remove the board border and the small board.
2) C802 is compatible with 1206 and 0805.
2. The following changes are made for Version K:
1) Add test points (P609 and P610) for the GPS power supply.
2) Add capacitors C301, C302, C303, C304 and C305.
3) Add R208.
4) Remove the board border.
5) C802 is compatible with 1206 and 0805.
For VHF PCB, Version B is made on the basis of Version A. However, some changes are made for
Version B:
1) Add test points (P609 and P610) for the GPS power supply.
2) Add R208.
3) C802 is compatible with 1206 and 0805.
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Service Manual
7. GPS Circuit
7.1 Circuit Description
Figure 7-1 Diagram of GPS Circuit
The GPS function is realized via REB-1315LPx. The GPS circuit integrates a baseband processor, a
LNA and a SAW. The 1575.42MHz GPS signal is received by the antenna, and then goes to HPF to
remove the in-band signals used for transmission and reception. After that, the signal goes to BPF to
further remove in-band signals, as well as harmonic and spurious signals. Then the weak GPS signal
goes to a low-noise amplifier (LNA) for amplification. After amplified, the signal goes to the GPS module
for further amplification and filtering, and is then sent to the baseband section for calculation. Then the
calculated GPS positioning information is sent to OMAP via the UART interface. Meanwhile, OMPA can
send appropriate comman d infor mation to t he GPS module v ia the UAR T inter face. Fin ally, OMAP sends
the processed data inf ormat ion to LCD.
Description of Nor ma l S it uations:
[1] Detect with a multimeter. The volt age of TP502 changes w it hin the range 1.2V~2.8 V.
[2] V oltage at L502 and L505: about 3. 3V.
[3] Gain for U501 (@1.57542G Hz): >15dB.
[4] Insertion loss for Z501 (@1.57542GHz): <4dB.
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Service Manual
8. Tuning Description
For details about radio tuning, please refer to the help file of DMR Tuner Software supplied by the
Company.
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Service Manual
9. Interface Definition
J1601: 50-Pin Interface
Pin No. Name Function Valid Level
2、5、49
1
3
4
6
8
10
12
14
16
7 3V6D Power supply: 3.6V
9
11
13 EMERGENCY Emergency key L
32
43
18 GPIO GPIO
20 LED-K-KEY LED indication for key operation L
15
17
19
21
22
24
26
28
30
23 EXT - PTT External PTT detection L
25
27
29
34
36
38
40
42
44
31
33
35
GND Power supply: groun d (analog)
AF-CODEC-TO-50PIN
AF-50PIN-TO-CODEC
EXT-MIC+
EXT-MIC-
Analog audio signal o utput/input
External MIC interface
IO5-OPT
IO4-OPT
IO3-OPT
GPIO pin of the option board L/H
IO2-OPT
IO1-OPT
USB-D+
USB-D-
USB data cable
DGND Power supply: ground (dig ital)
KB-R1
KB-R2
KB-R3
Keyboard row L
KB-R4
KB-C4
KB-C3
KB-C2
Keyboard column
KB-C1
KB-C0
SEL1-Accessory
SEL2-Accessory
Accessory identifier L
SEL3-Accessory
UART1-RX-OPT/PS
UART1-TX-OPT/PS
UART1
UART3-TX-OPT
UART3-RX-OPT
UART3-CTS/IO30-OPT
UART3
UART3-RTS/IO29-OPT
MCBSP3-FSX-OPT
MCBSP3-DX-OPT
MCBSP3
MCBSP3-WCLK-OPT
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Service Manual
37 MCBSP3-DR-OPT
IIC-SDA-Acce (for Version K of
UHF1/UHF2/UHF3 and Vers ion B
39
41
IIC-SCL-Acce/CLK-32K-OUT
IIC-SDA-Acce/CLK-OPT
46 EXT-BAT+
48
50
45
47
IN-SPKIN-SPK+
EXT-SPKEXT-SPK+
of VHF)
CLK-32K-OUT (f or Version F /H of
UHF1)
IIC-SCL-Acce (for Version K of
UHF1/UHF2/UHF3 and Vers ion B
of VHF)
CLK-32K-OUT (f or Version F /H of
UHF1)
Power supply for accessory or
option board
Internal speaker
External speaker
J311: 30-Pin LCD Interface
Pin No. Name Function Valid Level
1
26
Ground (digital)
2-17 M-D0----M-D15 LCD data
18 /CS-LCD LCD chip select L
19 /RST-OUT Reset signal
20 M-A1 Data and command
21 /WE Write signal L
22 /OE Read signal L
23 IMO 16/8-bit LCD data selection
24 3V3D Power supply: 3.3V
25 VFLASH Power supply for IO
27 3V6D Power supply for backlight
28
29
IIC-SDA-Acce (for Version K of
UHF1/UHF2/UHF3 and Vers ion B
of VHF)
CLK-32K-OUT (f or Version F /H of
UHF1)
IIC-SCL-Acce (for Version K of
UHF1/UHF2/UHF3 and Vers ion B
of VHF)
CLK-32K-OUT (f or Version F /H of
UHF1)
MCBSP3
14 Ground (analog)
16 AF-50PI N-TO-CODEC Analog audio signal
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Service Manual
18 AF-CO DE C-TO-50PIN Analo g audio signal
19 Ground (digital)
20 3V6D Power supply for digital circuit
16-Pin Accessory Interface
Pin No. Name Function Valid Level
1 GND Ground (analog & digital)
2 SPK- External speaker-
3 SEL1-Accessory Accessory identifier 1 L
4 SEL2-Accessory Accessory identifier 2 L
5 Emergency Emergency L
6 SPK+ External speaker+
7 USB+ / RTS USB+ / RTS
8 USB- / CTS USB- / CTS
9 S WB+ Power supply for the interface
10 MIC- External MIC-
11 GPIO GPIO
12 MIC+ External MIC+
13 SEL3-Accessory
14 TX
15 RX
Accessory identifier 3 or 1-wire
communication interface
TX end of serial port
communication
RX end of serial port
communication
L
16 PTT TX control L
Definition of Accessory Identifiers
No. OPT_SEL1 OPT_SEL2 OPT_SEL3 Definition
1 0 0 0 Reserved
2 0 0 1 Reserved
3 0 1 0 USB master mode for t he radio
4 0 1 1 For connecting earpieces
5 1 0 0 For connecting MODEM
6 1 0 1 For connecting remote speaker microphones
7 1 1 0
Programming cable (serial port ) /
USB slave mode for the radio
8 1 1 1 No accessory
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Service Manual
10. UHF1 (400-470MHz) Information
10.1 Transmitter Circuit
Figure 10-1 Diagram of Transmitter Circuit
The transmitter circuit is ma inly composed of:
① RF power amplifier circuit
② Low-pass filter circuit (for suppressing harmonics)
③ Auto power control c ircu it (APC) (including temperature det ect ion circuit)
The carrier signal generated by TX VCO is modulated and amplified, and then feeds to the transmitter
circuit. In this circuit, the signal passes through a π-type attenuator first, allowing certain isolation
between the RF power am plifier c ircuit and TX VCO. Then it g oes to a pr e-driv er a mplifier (2S C3356) for
pre-amplification, also providing certain isolation. After that, the signal goes to another pre-driver
amplifier (2SC4988) and a driver amplifier (RD01) for further power amplification, to provide appropriate
signal to the final-stage amplifier (RD07) for final power amplification. After processed by multiple
amplifiers, the signal is processed by a microstrip matcher to complete output impedance matching, so
as to reduce output power loss due to impedance mismatch. Then the signal passes through the TX/RX
switch and goes to the low - pass filter.
The low-pass filter is a high-order Chebyshev filter composed of lumped-parameter inductors and
capacitors. V ia th is filt er, the spurious signal within the stop band ca n be att enuat ed as much as pos sib le
while the in-band ripple is w ithin the required range.
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Service Manual
In the auto power control and temperature detection circuit, the drain current from the driver amplifier
and final-stage ampl if ier is converted to volt age via the sampling resistor and subtraction circuit
(composed of the first operationa l amplifier). This voltage is compared with the APC control voltage
(output by DAC) at the second operational amplifier. Then the error voltage, which is out put by the
second operational a mp li fier, controls TX power by controlling the b ias v oltage at the gates of the
amplifiers (including t he driver amplifier and the fina l-stage amplifier). The temperature sensor detects
the surface temperature of the final-st age a mplifier, and converts it to DC vo ltag e. Then t he DC v oltag e is
compared with the voltage corresponding to the protection temperature (generally 80% of the extreme
temperature) of the amplifier. If the surface temperature is too high, the bias voltage of the amplifier will
be reduced, so as to reduce output pow er. The bias voltage will not be increased until the surface
temperature restores to normal level. This process will be repeated while the radio operates.
10.2 Receiver Circuit
1 2
Pi Attenuator
Figure 10-2 Diagram of Receiv er Circuit
The receiver circuit mainly comprises the RF band-pass filter, low-noise amplifier, mixer, IF filter, IF
amplifier and IF processor.
10.2.1 Receiver Front-end
The HF signal from the low-pass filter passes through the electrically tunable band-pass filter controlled
via APC/TV1 level, to remove out-of-band interference signal and to send wanted band-pass signal to
the low-noise amplifier (Q9001). The amplified signal goes to a band-pass filter controlled via APC/TV1
level, to remove out-of-band interference signal generated during amplification, and to send wanted HF
28
Service Manual
signal to the mixer.
The wanted signal passes through t he RF band- pas s filter and l ow-noi se amp lif ier and goes t o the mixer
(D9017). Meanwhile, the first local osc illator (LO ) sig nal generat e d by VCO p a sses throu gh the low - pas s
filter and also goes to the mixer (D9017). In the mixer, the wanted signal and the first LO signal are
mixed to generate the first IF signal (73.35MHz). Then the signal passes through a π-type attenuator
(2dB) and the LC, to suppress carrier other than t he first IF signal, and to increase the isolation between
the mixer and the IF filter. After that, the first IF signal is processed by the crystal filter (Z9001), and is
sent to the two-stage IF amplifier circuit (composed of 2SC3356) for amplification. Then the amplified
signal goes to the IF processor AD9864(U401) for processing.
10.2.2 Receiver Back-end
Figure 10-3 Diagram of IF Processor
The first IF signal (73.35MHz) output by the IF amplifier goes into AD9864 (U401) via Pin 47, where the
signal is converted to the second IF signal (2.25MHz). Then the signal is converted to digital signal via
ADC sampling, an d outp ut v ia the S SI int er face. Fina lly, the digital signa l is sent t o DS P (OMA P59 12) for
demodulation.
AD9864 employs reference frequency of 19.2MHz and shares the crystal with OMAP. The second LO
VCO comprises an oscillator, a varactor and some other components, to provide the 71.1/75.6MHz LO
signal. The 18MHz clock frequency is generated by the LC resonance loop.
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Service Manual
10.3 Frequency Generation Unit (FGU)
Figure 10-4 Diagram of FGU
The FGU is composed of VCO and PLL. It is the core module of the whole TX-RX system. This circuit
provides accurate carrier frequency during transmission, and stable LO signal during reception. It has a
direct influence on the perfor ma nce of the system.
10.3.1 Working Principle of PLL
The 19.2MHz frequency g enerated by the referenc e cryst al oscillator g oes to P LL for div ision, gen erating
the reference frequency (i.e. step frequ ency f1). Mea nwhi le, the freq uency generated by VCO ge nerate s
another frequency (f2) through th e freque ncy divid er in PLL. Then freque ncies f1 and f2 are compared in
the phase detector (PD), to generate continuous pulse current. The current goes t o t he loop filter for RC
integration, and is then converted to CV voltage. Then the CV voltage is sent to the varactor of VCO. It
adjusts the outpu t fre quen cy of VCO dir ect ly until th e C V voltage becomes constant. Then PLL is locked ,
and the stable frequency output by VCO goes to the TX-RX channel after passing through two buffer
amplifiers.
10.3.2 Working Principle of VCO
VCO employs Colpit ts osc illator circu it (the RX oscil lator circuit is co mposed of D102, D103, D106, D107
and L1 1 2; the TX oscillato r circuit is composed o f D1 08, D109, D110, D101 and L117). It obtains different
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output frequencies by changing the varactor's control voltage (i.e. CV voltage).
There are two types of VCO: TX VCO and RX VCO. Both types control EMD22 to switch operating
status via OMAP. RX VCO is co mpos ed of the os ci lla tor loop and Q1 04, t o provide LO signa l. TX VCO is
composed of the oscillator loop and Q108, to provide carrier for TX signal.
10.3.3 Two-point Modulation
In TX mode, the two-point modu lation techn ology is empl oyed, to obt ain highe r modulation ac curacy and
lower 4FSK bit error rate. MOD-VCO and MOD-XO send th e mo dulation signal to the modulation end of
VCO and the reference crystal oscillator of PLL respectively to modulate TX VCO and the reference
crystal oscillator.
Power management IC
Power management IC
Power management IC
Power management IC
Power management IC
Power management IC
Power management IC
Power management IC
Audio amplifier
Board-to-board connector
Shielding can for IF processor
Shielding can for baseband processor
Shielding frame for lowpass filter
Shielding frame for GPS
Shielding can for TX VCO
Shielding can for crystal oscillator
Shielding can for antenna spring plate
9D23307990000260 LED
10D33307990000260 LED
11D43307990000260 LED
12D53307990000260 LED
13D63307990000260 LED
14D73307990000260 LED
15D83310040000010 ESD protection diode
16D93310040000010 ESD protection diode
17J45201016000010 Board-to-board connec tor
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10.8 Troubleshooting Flow Chart
Receiver Circuit
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Description of Nor ma l S it uations:
[1] Output voltage by Q9019 PIN3: about 4.95 V.
[2] Output voltage by U605 PIN4 or input voltage into Q9019 PI N4: about 5V.
[3] Vbe: about 0.74V; Vce: about 2.5V (in the case of no signal receptio n).
[4] For Q9018, Vbe: about 0.76V; Vce: about 0.95V;
for Q9017, Vbe: about 0.7V ; Vce: 0. 85V (in the case of no signal rece pt ion).
[5] Cut off the front- end circuit, and input a 73.35MHz IF signal at TP402 to test IF sensitivity. Normally,
the IF sensitivity is -109dB m.
[6] Frequency of Q403: 71.1M Hz.
[7] Frequency of L411: 18MHz.
[8] Input -30dBm RF signal at the ant enna connector and test at TP9004. Normally, gain>10dB, output
signal>-20dBm.
[9] Input -30dBm RF signal at the ant enna connector and test at R9005 (do not cut off the back-end
circuit). Normally, gain>1dB, output signal>-29 dBm.
[10] Signal frequency: RF-IF, signal amplitude>2d Bm.
[11] For input of -80dBm signal at L9022, gai n> 25dB, output signal>-55dBm;
for input of -30dBm signal, output signal<-20dBm.
[12] The input signal at the antenna connector, with standard tuning information (AF=1KHz, FM=3KHz),
is -47dBm.
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Transmitter Circuit
No power output
Power supply
works normally?[1]
Yes
APC-OUT is
normal?[2]
Yes
TX 5V voltage
is normal?[5]
Yes
D9002,spring plate for
antenna and the low-pass
filter are normal?[7]
Yes
Match circuit is
normal?[8]
Yes
No
No
No
PS-APC 3.3V
Replace Q9020 and
No
No
No
No
Check the power
supply circuit.
APC-IN is
normal?[3]
Yes
is normal?[4]
Yes
U9002.
Power is
normal?[6]
No
Check the DAC
output circuit.
Yes
PS-TX and RT5V
are normal?[5]
No
Yes
Completed
Repair damaged
components.
Power is normal?
Repair damaged
components.
Power is normal?Completed
YesNo
Replace Q9008
and Q9006.
No
Check the power
supply circuit.
Yes
Completed
No
No
No
No
No
Replace Q9003
and bias resistor.
Power is normal?Completed
Replace Q9005
and bias resistor.
Power is normal?Completed
Replace Q9004
and bias resistor.
Power is normal?Completed
Replace Q9002
and bias resistor.
Power is normal?Completed
Yes
YesNoYes
YesNo
YesNo
Q9003 works
normally?[9]
Yes
Q9005 works
normally?[10]
Q9004 works
normally?[11]
Yes
Q9002/D9007
works normally?[12]
Yes
Check the output circuit of
FGU.
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Description of Nor ma l S it uations:
[1] Voltage of the power supply: about 7.4V.
[2] For low power, APC-OUT: 1.8-2.1V; for hi gh pow er, APC-OUT: 2.4-2.8V.
[3] For low power, APC-IN: 1-1.3V; for high power, APC-IN: 1.8-2.1V.
[4] PS-APC: about 3.3V.
[5] TX5V: about 5V; RT5V: about 5V; PS-TX: about 3.3V.
[6] High power: about 4.2W; low power: about 1.2W.
[7] Start-up voltage of D9002: about 0.7V. The low-pass filter must be soldered appropriately and
remain in good condition. The spring plate for the antenna must be well fitted into the antenna
connector.
[8] The match components must not be soldered inappropriately or damaged.
[9] Vdd: about 7.3V; for low power, Vgg: 1-1.2V; for high power, Vgg: 1.35-1.55V.
[10] Vdd: about 7.3V; for low power, Vgg: 1.8-2.1V; for high power, Vgg: 2.4-2.8V.
[11] Vc: about 4.8V; Vb: about 1.4V; Ve: about 1.1V.
[12] Vc: about 4.7V; Vb: about 0.7V; Ve: 0V. Start-up volt age of D9007: about 0.7V.
Note: The above check operations should be mad e under 7. 4V voltage.
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Service Manual
FGU check
5VFGU, 3V3ARF,
3V3DRF are normal?
Yes
VCO oscillates?
Yes
Q106 、Q110
CV voltage is normal?[3]
输出是否正常?
Yes
No
No
No
Check the power
supply circuit.
Q106 and Q107
are normal?[1]
No
Replace Q106
and Q107.
L110 and L116 are
normal?[4]
Yes
Yes
Check Q104, Q108 and
peripheral components.
No
Q104 and Q108
are normal?[2]
Yes
Replace L110 and
L116.
No
Replace Q104
and Q108.
Replace Q101
and Q102.
No
Q101 and Q102
Check Q101, Q102 and
peripheral components.
反馈是
否正常?
are normal?[5]
Yes
Feedback is output?
Yes
19.2MHz crystal
oscillates?
Yes
Sky72310 clock is
normal?[6]
No
Check the data
circuit of the
control circuit.
No
No
Yes
Check the
feedback circuit.
Check the
19.2MHz circuit.
Completed
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Service Manual
Description of Nor ma l S it uations:
[1] During transmissio n, out put voltage by Q107 PIN3: about 4V.
During reception, output voltage by Q106 PIN3: about 4V.
[2] During transmissio n, voltage at Q108 E: about 1.8V.
During reception, voltage at Q104 E: about 1. 8V.
[3] The CV value varies with frequencies. Generally, it is within the range 0.5V-4.5V.
[4] L110/L116 is on.
[5] Voltage at Q101/Q102 B: about 0.7V.
[6] MCSI-CLK-PLL outputs 960KHz clock.
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11. UHF2 (450-520MHz) Information
11.1 Transmitter Circuit
Figure 1 1-1 Diagra m of Transmitter Circuit
The transmitter circuit is ma inly composed of:
① RF power amplifier circuit
② Low-pass filter circuit (for suppressing harmonics)
③ Auto power control c ircu it (APC) (including temperature det ect ion circuit)
The carrier signal generated by TX VCO is modulated and amplified, and then feeds to the transmitter
circuit. In this circuit, the signal passes through a π-type attenuator first, allowing certain isolation
between the RF power am plifier c ircuit and TX VCO. Then it g oes to a pr e-driv er a mplifier (2S C3356) for
pre-amplification, also providing certain isolation. After that, the signal goes to another pre-driver
amplifier (2SC4988) and a driver amplifier (RD01) for further power amplification, to provide appropriate
signal to the final-stage amplifier (RD07) for final power amplification. After processed by multiple
amplifiers, the signal is processed by a microstrip matcher to complete output impedance matching, so
as to reduce output power loss due to impedance mismatch. Then the signal passes through the TX/RX
switch and goes to the low - pass filter.
The low-pass filter is a high-order Chebyshev filter composed of lumped-parameter inductors and
capacitors. V ia th is filt er, the spurious signal within the stop band ca n be att enuat ed as much as pos sib le
while the in-band ripple is w ithin the required range.
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Service Manual
In the auto power control and temperature detection circuit, the drain current from the driver amplifier
and final-stage ampl if ier is converted to volt age via the sampling resistor and subtraction circuit
(composed of the first operationa l amplifier). This voltage is compared with the APC control voltage
(output by DAC) at the second operational amplifier. Then the error voltage, which is out put by the
second operational a mp li fier, controls TX power by controlling the b ias v oltage at the gates of the
amplifiers (including t he driver amplifier and the fina l-stage amplifier). The temperature sensor detects
the surface temperature of the final-st age a mplifier, and converts it to DC vo ltag e. Then t he DC v oltag e is
compared with the voltage corresponding to the protection temperature (generally 80% of the extreme
temperature) of the amplifier. If the surface temperature is too high, the bias voltage of the amplifier will
be reduced, so as to reduce output pow er. The bias voltage will not be increased until the surface
temperature restores to normal level. This process will be repeated while the radio operates.
11.2 Receiver Circuit
1 2
Pi Attenuator
Figure 1 1-2 Diagram of Receiver Circuit
The receiver circuit mainly comprises the RF band-pass filter, low-noise amplifier, mixer, IF filter, IF
amplifier and IF processor.
11.2.1 Receiver Front-end
The HF signal from the low-pass filter passes through the electrically tunable band-pass filter controlled
via APC/TV1 level, to remove out-of-band interference signal and to send wanted band-pass signal to
the low-noise amplifier (Q9001). The amplified signal goes to a band-pass filter controlled via APC/TV1
level, to remove out-of-band interference signal generated during amplification, and to send wanted HF
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Service Manual
signal to the mixer.
The wanted signal passes through t he RF band- pas s filter and l ow-noi se amp lif ier and goes t o the mixer
(D9017). Meanwhile, the first local osc illator (LO ) sig nal generat e d by VCO p a sses throu gh the low - pas s
filter and also goes to the mixer (D9017). In the mixer, the wanted signal and the first LO signal are
mixed to generate the first IF signal (73.35MHz). Then the signal passes through a π-type attenuator
(2dB) and the LC, to suppress carrier other than t he first IF signal, and to increase the isolation between
the mixer and the IF filter. After that, the first IF signal is processed by the crystal filter (Z9001), and is
sent to the two-stage IF amplifier circuit (composed of 2SC3356) for amplification. Then the amplified
signal goes to the IF processor AD9864(U401) for processing.
11.2.2 Receiver Back-end
Figure 1 1-3 Diagram of IF Processor
The first IF signal (73.35MHz) output by the IF amplifier goes into AD9864 (U401) via Pin 47, where the
signal is converted to the second IF signal (2.25MHz). Then the signal is converted to digital signal via
ADC sampling, an d outp ut v ia the S SI int er face. Fina lly, the digital signa l is sent t o DS P (OMA P59 12) for
demodulation.
AD9864 employs reference frequency of 19.2MHz and shares the crystal with OMAP. The second LO
VCO comprises an oscillator, a varactor and some other components, to provide the 71.1/75.6MHz LO
signal. The 18MHz clock frequency is generated by the LC resonance loop.
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11.3 Frequency Generation Unit (FGU)
Figure 11-4 Diagram of FGU
The FGU is composed of VCO and PLL. It is the core module of the whole TX-RX system. This circuit
provides accurate carrier frequency during transmission, and stable LO signal during reception. It has a
direct influence on the perfor ma nce of the system.
11.3.1 Working Principle of PLL
The 19.2MHz frequency g enerated by the referenc e cryst al oscillator g oes to P LL for div ision, gen erating
the reference frequency (i.e. step frequ ency f1). Mea nwhi le, the freq uency generated by VCO ge nerate s
another frequency (f2) through th e freque ncy divid er in PLL. Then freque ncies f1 and f2 are compared in
the phase detector (PD), to generate continuous pulse current. The current goes t o t he loop filter for RC
integration, and is then converted to CV voltage. Then the CV voltage is sent to the varactor of VCO. It
adjusts the outpu t fre quen cy of VCO dir ect ly until th e C V voltage becomes constant. Then PLL is locked ,
and the stable frequency output by VCO goes to the TX-RX channel after passing through two buffer
amplifiers.
10.3.2 Working Principle of VCO
VCO employs Colpit ts osc illator circu it (the RX oscil lator circuit is co mposed of D102, D103, D106, D107
and L1 1 2; the TX oscillato r circuit is composed o f D1 08, D109, D110, D101 and L117). It obtains different
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Service Manual
output frequencies by changing the varactor's control voltage (i.e. CV voltage).
There are two types of VCO: TX VCO and RX VCO. Both types control EMD22 to switch operating
status via OMAP. RX VCO is co mpos ed of the os ci lla tor loop and Q1 04, t o provide LO signa l. TX VCO is
composed of the oscillator loop and Q108, to provide carrier for TX signal.
11.3.3 Two-point Modulation
In TX mode, the two-point modu lation techn ology is empl oyed, to obt ain highe r modulation ac curacy and
lower 4FSK bit error rate. MOD-VCO and MOD-XO send th e mo dulation signal to the modulation end of
VCO and the reference crystal oscillator of PLL respectively to modulate TX VCO and the reference
crystal oscillator.