HYNIX HMS77C1000A, HMS77C1001A User Guide

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8-BIT SINGLE-CHIP MICROCONTROLLERS
HMS77C1000A HMS77C1001A
User’s Manual
(Ver. 2.0)
Version 1.1 Published by
MCU Application Team
2001 Hynix Semiconductor All right reserved.

Additional information of this manual may be served by Hynix Semiconductor offices in Korea or Distributors and Representatives listed at address directory.
Hynix Semiconductor reserves the right to make changes to any information here in at any time without notice. The information, diagrams and other data in this manual are correct and reliable; however, Hynix Semiconductor is in no way responsible
for any violations of patents or other rights of the third party generated by the use of this manual.
HMS77C1000A/HMS77C1001A
Contents of Table
OVERVIEW . . . . . . . . . . . . . . . . . . . . . . . . . 1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . 2
PIN ASSIGNMENT . . . . . . . . . . . . . . . . . . . 3
PACKAGE DIAGRAM . . . . . . . . . . . . . . . . . 4
PIN FUNCTION . . . . . . . . . . . . . . . . . . . . . . 6
PORT STRUCTURES . . . . . . . . . . . . . . . . . 7
ELECTRICAL CHARACTERISTICS . . . . . . 9
Absolute Maximum Ratings . . . . . . . . . . . . . . . 9
Recommended Operating Conditions . . . . . . . 9
DC Characteristics (1). . . . . . . . . . . . . . . . . . . 10
DC Electrical Characteristics (2) . . . . . . . . . . 11
AC Electrical Characteristics (1) . . . . . . . . . . 12
AC Electrical Characteristics (2) . . . . . . . . . . 13
Typical Characteristics . . . . . . . . . . . . . . . . . . 14
ARCHITECTURE . . . . . . . . . . . . . . . . . . . 17
CPU Architecture . . . . . . . . . . . . . . . . . . . . . . 17
MEMORY . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Program Memory . . . . . . . . . . . . . . . . . . . . . . 18
Data Memory . . . . . . . . . . . . . . . . . . . . . . . . . 18
Special Function Registers. . . . . . . . . . . . . . 19
I/O PORTS . . . . . . . . . . . . . . . . . . . . . . . . . 24
Port RA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Port RB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
I/O Interfacing . . . . . . . . . . . . . . . . . . . . . . . . .24
I/O Successive Operations . . . . . . . . . . . . . . .24
TIMER0 MODULE AND TMR0 REGISTER 26
Timer Mode . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Counter Mode . . . . . . . . . . . . . . . . . . . . . . . .27
Using Timer0 with an External Clock . . . . . . . 28
Prescaler . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
CONFIGURATION AREA . . . . . . . . . . . . . 30
OSCILLATOR CIRCUITS . . . . . . . . . . . . . 31
XT, HF or LF Mode . . . . . . . . . . . . . . . . . . . .31
RC Oscillation Mode . . . . . . . . . . . . . . . . . . .31
RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Power-On Reset (POR) . . . . . . . . . . . . . . . . . 34
Internal Reset Timer (IRT) . . . . . . . . . . . . . . . 36
WATCHDOG TIMER (WDT) . . . . . . . . . . . 37
WDT Period . . . . . . . . . . . . . . . . . . . . . . . . . .37
WDT Programming Considerations . . . . . . . . 37
Power-Down Mode (SLEEP) . . . . . . . . . . 38
SLEEP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Wake-up From SLEEP . . . . . . . . . . . . . . . . . . 39
Minimizing Current Consumption . . . . . . . . . . 39
TIME-OUT SEQUENCE AND POWER DOWN
STATUS BITS (TO/PD) . . . . . . . . . . . . . 41
POWER FAIL DETECTION PROCESSOR 42
Oct. 2001 Ver. 2.0
HMS77C1000A/HMS77C1001A
HMS77C1000A / HMS77C1001A
CMOS SINGLE-CHIP 8-BIT MICROCONTROLLER
1. OVERVIEW
1.1 Description
The HMS77C1000A and HMS77C1001 A are an advanced CMOS 8-bit mic rocontroller with 0.5K/1K words(12-bit) of EPROM. The Hynix Semiconductor HMS77C1000A and HMS77C1001A are a powerful microcontroller which provides a high flexibility and cost effective solution to many small applications. The HMS77C1000 A and HMS77C10 01A provide t he following standard features: 0.5K/1K words of EPROM, 25 bytes of RAM, 8-bit timer/counter, power-on reset, on-chip os­cillator and clock circuitry. In addition, the HMS77C1000A and HMS77C1001A supports power saving modes to reduce power consumption.
Device name ROM Size RAM Size Package
HMS77C1000A 0.5K words(12-bit) 25 bytes 18 PDIP, SOP or 20 SSOP HMS77C1001A 1K words(12-bit) 25 bytes 18 PDIP, SOP or 20 SSOP
1.2 Features
• High-Performance RISC CPU:
- 12-bit wide instructions and 8-bit wide data path
- 33 single word instructions
- 0.5K/1K words on-chip program memory
- 25 bytes on-chip data memory
- Minimum instruction execution time 200ns @20MHz
- Operating speed: DC - 20 MHz clock input
- Seven special function hardware registers
- Two-level hardware stack
• Peripheral Features:
- Twelve programmable I/O lines
- One 8-bit timer/counter with 8-bit programmable prescaler
- Power-On Reset (POR)
- Power Fail Detector : noise immunity circuit 2 level detect ( 2.7V, 1.8V )
- Internal Reset Timer (IRT)
- Watchdog Timer (WDT) with on-chip RC oscilla­tor
- Programmable code-protection
- Power saving SLEEP mode
- Selectable oscillator options: Configuration word
RC: Low-cost RC oscillator (200KHz~4MHz) XT: Standard crystal/resonator (455KHz~4MHz) HF: High-speed crystal/resonator (4~20MHz) LF: Power saving, low-frequency crystal/resonator
(32~200KHz)
• CMOS Technology:
- Low-power, high-speed CMOS EPROM technol­ogy
- Fully static design
- Wide-operating range:
2.5V to 5.5V @ RC, XT, LF
4.5V to 5.5V @ HF
Oct. 2001 Ver. 2.0 1
HMS77C1000A/HMS77C1001A
2. BLOCK DIAGRAM
RESET
Xin
Xout
V
DD
V
SS
Power Supply
OPTION
Power Fail Detector
System controller
Clock Generator
Timing Control
Configuration Word
STATUS
RA RB
RA0 RA1 RA2 RA3
ALU
W
Watch-dog
Timer
TRISA
8-bit
Timer/
Counter
WDT/ TMR0
Prescaler
EC0
Data
Memory
WDT time out
STACK 1 STACK 2
RB0 RB1 RB2 RB3 RB4 RB5 RB6 RB7
TRISB
PC
Program
Memory
Instruction
Decoder
2 Oct. 2001 Ver. 2.0
3. PIN ASSIGNMENT
HMS77C1000A/HMS77C1001A
18 PDIP or SOP
RESET
RESET
RA2
RA3
EC0
/V
V
RB0
RB1
RB2
RB3
RA2
RA3
EC0
/V
V
V
RB0
RB1
RB2
RB3
1
2
3
PP
SS
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
RA1
RA0
Xin
Xout
V
DD
RB7
RB6
RB5
RB4
20 SSOP
1
2
3
PP
SS
SS
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
RA1
RA0
Xin
Xout
V
DD
V
DD
RB7
RB6
RB5
RB4
Oct. 2001 Ver. 2.0 3
HMS77C1000A/HMS77C1001A
4. PACKAGE DIAGRAM
18 PDIP
unit: inch
MAX
MIN
TYP 0.300
0.925
0.895
MIN 0.020
MAX 0.180
0.120
0.140
0.022
0.015
0.065
0.045
TYP 0.10
0 ~ 15°
0.270
0.245
5
1
0
.
0
8
0
0
.
0
18 SOP
0.292
0.299
0.461
0.451
0.0115
0.104
0.097
0.029
0.014
TYP 0.050
0.410
0.400
0.005
0 ~ 8°
0.0125
0.0091
0.040
0.024
4 Oct. 2001 Ver. 2.0
20 SSOP
HMS77C1000A/HMS77C1001A
unit: inch
MAX
MIN
0.205
0.212
0.289
0.278
0.008
0.078
0.068
0.015
0.010
TYP 0.0256
0.311
0.301
0.002
0.037
0.008
0.004
0.025
0 ~ 8°
Oct. 2001 Ver. 2.0 5
HMS77C1000A/HMS77C1001A
5. PIN FUNCTION
V
: Supply voltage.
DD
V
: Circuit ground.
SS
RESET X
: Reset the MCU.
: Input to the inverting oscillator amp lifier and input to
IN
the internal main clock operating circuit.
X
: Output from the inverting oscillator amplifier.
OUT
RA0~RA3
: RA is an 4-bit, CMOS, bidirectional I/O port.
RA pins can be used a s ou tpu ts or i npu ts acc ordi ng t o “0 ” or “1” written the their Port Direction Register(TRISA).
RB0~RB7
: RB is a 8-bit, CMOS, bidirectional I/O port. RB pins can be used as outputs or inputs according to “0” or “1” written the their Port Direction Register(TRISB).
EC0
: EC0 is an external clock input to Timer0. It should
be tied to V
or VDD, if not in use, to reduce current con-
SS
sumption.
PIN NAME
V
DD
V
SS
RESET
X
IN
X
OUT
RA0 17 19 RA1 18 20 RA2 1 1 RA3 2 2 RB0 6 7 RB1 7 8 RB2 8 9 RB3 9 10 RB4 10 11 RB5 11 12 RB6 12 13 RB7 13 14
EC0 3 3
DIP, SOP
Pin No.
14 15,16
55,6
44
16 18
15 17
SSOP
Pin No.
In/Out
Input
Levels
P­P-
IST
IST
O-
I/O TTL I/O TTL I/O TTL I/O TTL I/O TTL I/O TTL I/O TTL I/O TTL I/O TTL I/O TTL I/O TTL I/O TTL
IST
Function
Supply voltage Circuit ground Reset signal input/programming voltage input. This pin is an active low
reset to the device. Voltage on the RESET avoid unintended entering of programming mode.
Oscillator crystal input/external clock source input Oscillator crystal output. Connects to crystal or resonator in crystal oscilla-
tor mode. In RC mode, X quency of X
4-bit bi-directional I/O ports
8-bit bi-directional I/O ports
Clock input to Timer0. Must be tied to VDD or VSS, if not in use, to reduce current consumption.
, and denotes the instruction cycle rate.
IN
pin outputs CLKOUT which has 1/4 the fre-
OUT
pin must not exceed VDD to
TABLE 5-1 PINOUT DESCRIPTION
Legend : I =input, O = output, I/O = input/output, P = power, - = Not used, TTL = TTL input, ST = Schmitt Trigger input
6 Oct. 2001 Ver. 2.0
6. PORT STRUCTURES
• RESET
Internal RESET
• Xin, Xout
( XT, HF, LF Mode )
EN ( XT, HF, LF )
HMS77C1000A/HMS77C1001A
V
SS
V
DD
( RC Mode )
To Internal Clock
To Internal Clock
Amplifier varies with the oscillation mode
EN ( RC )
÷
÷
4
÷ ÷
Internal Capacitance ( appx. 6pF )
Xout
V
R
SS
F
Xin
V
DD
Xout
V
SS
Xin
Oct. 2001 Ver. 2.0 7
HMS77C1000A/HMS77C1001A
• RA0~3/RB0~7
V
Data Reg.
Data Bus
Direction Reg.
Data Bus
Data Bus
Read
•EC0
DD
V
SS
Timer Counter Clock Input
V
DD
EC0
V
SS
8 Oct. 2001 Ver. 2.0
7. ELECTRICAL CHARACTERISTICS
7.1 Absolute Maximum Ratings
HMS77C1000A/HMS77C1001A
Supply voltage..............................................-0 to +7.5 V
Storage Temperature ................................-65 to +125 °C
Voltage on RESET Voltage on any pin with respect to V Maximum current out of V Maximum current into V Maximum output current sunk by (I Maximum output current sourc ed by (I
with respect to VSS.......0.3 to 13.5V
.-0.3 to VDD+0.3
SS
pin........................150 mA
SS
pin ..........................100 mA
DD
per I/O Pin)25 mA
OL
per I/O Pin)
OH
...............................................................................20 mA
7.2 Recommended Operating Conditions
Parameter Symbol Condition
f
Supply Voltage
Operating Frequency
Operating Temperature
T
V
f
XIN
OPR
DD
XIN
f
XIN
RC Mode 0.2 4
HF Mode 4 20 LF Mode 32 200 KHz
=20MHz
=4MHz
Maximum current (ΣI Maximum current (ΣI
Note: Stresses above those listed under “Absolute Maxi-
mum Ratings” may cause permanent damage to the device. This is a stress rati ng only and functi onal op­eration of the device at any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Min. Max.
4.5 5.5
2.5 5.5
-40 85
)....................................120 mA
OL
)......................................80 mA
OH
Specifications
Unit
V
MHzXT Mode 0.455 4
C
°
Oct. 2001 Ver. 2.0 9
HMS77C1000A/HMS77C1001A
7.3 DC Characteristics (1)
(TA=-40
C~+85
°°°°
C)
°°°°
Specification
Parameter Symbol Test Condition
Min
Typ
1
Max
Supply Voltage
V
DD
HF 4.5 5.5
V
start voltage to ensure
DD
Power-On Reset VDD rise rate RAM Data Retention
Voltage
V
S
POR
VDD
V
DR
-
2
0.05 - - V/mS
-1.5-V
V
SS
-V
Power Fail Detection
V
PFD
Low Level - 1.8 -
Supply Current
HF
4
I
DD
XT, RC
LF
Power Down Current
1. Data in “Typ” column is at 25°C unless otherwise stated. These parameters are for de sign guidance only and are not tested.
2. This parameter is characterized but not tested.
3. The test conditions for all IDD measurements in NOP execution are: = external square wave; all I/O pins tristated, pulled to VSS, EC0 = VDD, RESET = VDD; WDT disabled/enabled as specified.
X
IN
4. Does not include current through R
5. Power down current is measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD and VSS as
like measurement conditions of supply current.
I
PD
XIN = 4MHz, VDD = 5V
3
XIN = 20MHz, VDD = 5V XIN = 32KHz, VDD = 3V, WDT Disabled VDD = 3V, WDT Enabled
5
VDD = 3V, WDT Disabled
The current through the resistor can be estima te d by the form ula; IR = VDD/2R
ext.
-1.83.3mA
-9.020mA
-1740uA
-414
-0.45
ext
(mA)
Unit
VXT, RC, LF 2.5 5.5
VNormal Level - 2.7 -
uA
10 Oct. 2001 Ver. 2.0
7.4 DC Electrical Characteristics (2)
HMS77C1000A/HMS77C1001A
(TA=-40
C~+85
°°°°
C)
°°°°
Specification
Parameter Symbol Test Condition
Min
Typ
1
Max
Input High Voltage
I/O Ports (TTL)
RESET, EC0, (ST)
XIN (ST) XIN (ST)
0.25V
V
IH
RC only XT, HF, LF
DD
0.85V
0.85V
0.7V
DD DD
DD
+0.8
V
DD
Input Low Voltage
I/O Ports (TTL)
RESET, EC0, (ST)
XIN (ST) XIN (ST)
Hysteresis of Schmitt Trigger Inputs
Input Leakage Current
V
V
HYS
I
V
IL
SS
RC only XT, HF, LF
DD
2
0.15V
VIN = VDD or V XT, HF, LF -3.0 0.5 3.0
L
SS
0.15V
0.15V
0.15V
0.3V
DD DD DD
DD
Other Pins -1.0 0.2 1.0
Output High Voltage
I/O Ports
X
OUT
V
IOH = -5.0mA, VDD = 4.5V VDD - 0.9 V
OH
IOH = -0.5mA, VDD = 4.5V, RC osc.
DD
Output Low Voltage
I/O Ports
X
OUT
1. Data in “Typ” column is at 25°C unless otherwise stated. These parameters are for de sign guidance only and are not tested.
2. This parameter are characterized but no t teste d.
V
IOL = 8.0mA, VDD = 4.5V V
OL
IOL = 0.6mA, VDD = 4.5V, RC osc.
SS
0.8
Unit
V
V
V
uAXIN (ST)
V
V
Oct. 2001 Ver. 2.0 11
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