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The HMS77C1000A and HMS77C1001 A are an advanced CMOS 8-bit mic rocontroller with 0.5K/1K words(12-bit) of
EPROM. The Hynix Semiconductor HMS77C1000A and HMS77C1001A are a powerful microcontroller which provides a
high flexibility and cost effective solution to many small applications. The HMS77C1000 A and HMS77C10 01A provide t he
following standard features: 0.5K/1K words of EPROM, 25 bytes of RAM, 8-bit timer/counter, power-on reset, on-chip oscillator and clock circuitry. In addition, the HMS77C1000A and HMS77C1001A supports power saving modes to reduce
power consumption.
Device nameROM SizeRAM SizePackage
HMS77C1000A0.5K words(12-bit)25 bytes18 PDIP, SOP or 20 SSOP
HMS77C1001A1K words(12-bit)25 bytes18 PDIP, SOP or 20 SSOP
1.2 Features
• High-Performance RISC CPU:
- 12-bit wide instructions and 8-bit wide data path
- 33 single word instructions
- 0.5K/1K words on-chip program memory
- 25 bytes on-chip data memory
- Minimum instruction execution time
200ns @20MHz
- Operating speed: DC - 20 MHz clock input
- Seven special function hardware registers
- Two-level hardware stack
• Peripheral Features:
- Twelve programmable I/O lines
- One 8-bit timer/counter with 8-bit programmable
prescaler
- Watchdog Timer (WDT) with on-chip RC oscillator
- Programmable code-protection
- Power saving SLEEP mode
- Selectable oscillator options: Configuration word
RC: Low-cost RC oscillator (200KHz~4MHz)
XT: Standard crystal/resonator (455KHz~4MHz)
HF: High-speed crystal/resonator (4~20MHz)
LF: Power saving, low-frequency crystal/resonator
(32~200KHz)
• CMOS Technology:
- Low-power, high-speed CMOS EPROM technology
- Fully static design
- Wide-operating range:
2.5V to 5.5V @ RC, XT, LF
4.5V to 5.5V @ HF
Oct. 2001 Ver. 2.01
HMS77C1000A/HMS77C1001A
2. BLOCK DIAGRAM
RESET
Xin
Xout
V
DD
V
SS
Power
Supply
OPTION
Power Fail Detector
System controller
Clock Generator
Timing Control
Configuration Word
STATUS
RARB
RA0
RA1
RA2
RA3
ALU
W
Watch-dog
Timer
TRISA
8-bit
Timer/
Counter
WDT/
TMR0
Prescaler
EC0
Data
Memory
WDT time out
STACK 1
STACK 2
RB0
RB1
RB2
RB3
RB4
RB5
RB6
RB7
TRISB
PC
Program
Memory
Instruction
Decoder
2Oct. 2001 Ver. 2.0
3. PIN ASSIGNMENT
HMS77C1000A/HMS77C1001A
18 PDIP or SOP
RESET
RESET
RA2
RA3
EC0
/V
V
RB0
RB1
RB2
RB3
RA2
RA3
EC0
/V
V
V
RB0
RB1
RB2
RB3
1
2
3
PP
SS
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
RA1
RA0
Xin
Xout
V
DD
RB7
RB6
RB5
RB4
20 SSOP
1
2
3
PP
SS
SS
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
RA1
RA0
Xin
Xout
V
DD
V
DD
RB7
RB6
RB5
RB4
Oct. 2001 Ver. 2.03
HMS77C1000A/HMS77C1001A
4. PACKAGE DIAGRAM
18 PDIP
unit: inch
MAX
MIN
TYP 0.300
0.925
0.895
MIN 0.020
MAX 0.180
0.120
0.140
0.022
0.015
0.065
0.045
TYP 0.10
0 ~ 15°
0.270
0.245
5
1
0
.
0
8
0
0
.
0
18 SOP
0.292
0.299
0.461
0.451
0.0115
0.104
0.097
0.029
0.014
TYP 0.050
0.410
0.400
0.005
0 ~ 8°
0.0125
0.0091
0.040
0.024
4Oct. 2001 Ver. 2.0
20 SSOP
HMS77C1000A/HMS77C1001A
unit: inch
MAX
MIN
0.205
0.212
0.289
0.278
0.008
0.078
0.068
0.015
0.010
TYP 0.0256
0.311
0.301
0.002
0.037
0.008
0.004
0.025
0 ~ 8°
Oct. 2001 Ver. 2.05
HMS77C1000A/HMS77C1001A
5. PIN FUNCTION
V
: Supply voltage.
DD
V
: Circuit ground.
SS
RESET
X
: Reset the MCU.
: Input to the inverting oscillator amp lifier and input to
IN
the internal main clock operating circuit.
X
: Output from the inverting oscillator amplifier.
OUT
RA0~RA3
: RA is an 4-bit, CMOS, bidirectional I/O port.
RA pins can be used a s ou tpu ts or i npu ts acc ordi ng t o “0 ”
or “1” written the their Port Direction Register(TRISA).
RB0~RB7
: RB is a 8-bit, CMOS, bidirectional I/O port.
RB pins can be used as outputs or inputs according to “0”
or “1” written the their Port Direction Register(TRISB).
EC0
: EC0 is an external clock input to Timer0. It should
Supply voltage
Circuit ground
Reset signal input/programming voltage input. This pin is an active low
reset to the device. Voltage on the RESET
avoid unintended entering of programming mode.
Oscillator crystal input/external clock source input
Oscillator crystal output. Connects to crystal or resonator in crystal oscilla-
tor mode. In RC mode, X
quency of X
4-bit bi-directional I/O ports
8-bit bi-directional I/O ports
Clock input to Timer0. Must be tied to VDD or VSS, if not in use, to reduce
current consumption.
, and denotes the instruction cycle rate.
IN
pin outputs CLKOUT which has 1/4 the fre-
OUT
pin must not exceed VDD to
TABLE 5-1 PINOUT DESCRIPTION
Legend : I =input, O = output, I/O = input/output, P = power, - = Not used, TTL = TTL input, ST = Schmitt Trigger input
6Oct. 2001 Ver. 2.0
6. PORT STRUCTURES
• RESET
Internal RESET
• Xin, Xout
( XT, HF, LF Mode )
EN ( XT, HF, LF )
HMS77C1000A/HMS77C1001A
V
SS
V
DD
( RC Mode )
To Internal Clock
To Internal Clock
Amplifier varies with
the oscillation mode
EN ( RC )
÷
÷
4
÷ ÷
Internal
Capacitance ( appx. 6pF )
Xout
V
R
SS
F
Xin
V
DD
Xout
V
SS
Xin
Oct. 2001 Ver. 2.07
HMS77C1000A/HMS77C1001A
• RA0~3/RB0~7
V
Data Reg.
Data Bus
Direction Reg.
Data Bus
Data Bus
Read
•EC0
DD
V
SS
Timer Counter Clock Input
V
DD
EC0
V
SS
8Oct. 2001 Ver. 2.0
7. ELECTRICAL CHARACTERISTICS
7.1 Absolute Maximum Ratings
HMS77C1000A/HMS77C1001A
Supply voltage..............................................-0 to +7.5 V
Storage Temperature ................................-65 to +125 °C
Voltage on RESET
Voltage on any pin with respect to V
Maximum current out of V
Maximum current into V
Maximum output current sunk by (I
Maximum output current sourc ed by (I
with respect to VSS.......0.3 to 13.5V
.-0.3 to VDD+0.3
SS
pin........................150 mA
SS
pin ..........................100 mA
DD
per I/O Pin)25 mA
OL
per I/O Pin)
OH
...............................................................................20 mA
7.2 Recommended Operating Conditions
ParameterSymbolCondition
f
Supply Voltage
Operating Frequency
Operating Temperature
T
V
f
XIN
OPR
DD
XIN
f
XIN
RC Mode0.24
HF Mode420
LF Mode32200KHz
=20MHz
=4MHz
Maximum current (ΣI
Maximum current (ΣI
Note: Stresses above those listed under “Absolute Maxi-
mum Ratings” may cause permanent damage to the
device. This is a stress rati ng only and functi onal operation of the device at any other conditions above
those indicated in the operational sections of this
specification is not implied. Exposure to absolute
maximum rating conditions for extended periods
may affect device reliability.
Min.Max.
4.55.5
2.55.5
-4085
)....................................120 mA
OL
)......................................80 mA
OH
Specifications
Unit
V
MHzXT Mode0.4554
C
°
Oct. 2001 Ver. 2.09
HMS77C1000A/HMS77C1001A
7.3 DC Characteristics (1)
(TA=-40
•
C~+85
°°°°
C)
°°°°
Specification
ParameterSymbolTest Condition
Min
Typ
1
Max
Supply Voltage
V
DD
HF4.55.5
V
start voltage to ensure
DD
Power-On Reset
VDD rise rate
RAM Data Retention
Voltage
V
S
POR
VDD
V
DR
-
2
0.05--V/mS
-1.5-V
V
SS
-V
Power Fail Detection
V
PFD
Low Level-1.8-
Supply Current
HF
4
I
DD
XT, RC
LF
Power Down Current
1.Data in “Typ” column is at 25°C unless otherwise stated. These parameters are for de sign guidance only and are not tested.
2.This parameter is characterized but not tested.
3.The test conditions for all IDD measurements in NOP execution are:
= external square wave; all I/O pins tristated, pulled to VSS, EC0 = VDD, RESET = VDD; WDT disabled/enabled as specified.
X
IN
4.Does not include current through R
5.Power down current is measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD and VSS as