HP TPN-Q167 Specification

5

4

3

2

1

Belu ( Y0JU 14")

Model: TPN-Q167

01

Intel Bay Trail-M Platform Block Diagram

D D

DDR3L 1333
Memory down

DDR3L

DDI 1

2 Channel 1Rx16

MMC

32.768KHz
PAGE 6

Intel Bay Trail-M

Power : TDP 7.5 Watt

Package : FCBGA 1170

DDI 0

I2C Interface

25 Mhz
PAGE 6

PAGE 12,13

eMMC

H26M52103FMR

PAGE 21

C C

Size : 25 x 27 (mm)

X2 LANES

eDP

PAGE 17

HDMI Conn PAGE 19

Port0

Track Pad

PAGE 26

BQ24715

Batery Charger

NB670/NB669

PP3300_DSW/PP5000

ISL95833HRTZ-T

+VCC_CORE/+VCC_GFX

Discharger

USB 3.0 Interface

Port0

1.8V BIOS+TXE
SPI ROM(64Mb)

W25Q64FWSSIG

PAGE 6

SPI Interface

Int

PAGE 2~10

USB 2.0 Interface

Port0

USB Charger

TPS2546

PAGE 25

I2S+I2C(PORT1)

Port3

B B

PCIE Gen 2 x 1 LaneLPC Interface

TPM

SLB9655TT1.2
FW4.32GOOG

TI KBC

TM4E1G31H6ZRBI

Audio Codec

MAX98090

NGFF M.2 2230-E

WLAN / BT Combo

Package : TQFN-40

Size : 5 x 5 (mm)

PAGE 24

PCIE CLK PORT 0

PAGE 20

PAGE 22

Package : BGA-157

Size : 9.1 x 9.1 (mm)

PAGE 27

USB3.0 Port x 1

PAGE 25

CCD

Port2

PAGE 17

GL852G-OHG12

USB2.0 Port x 1

PAGE 25

Port1

USB Hub

PAGE 25

USB2.0 Port x 1

USB Hub -1USB Hub -2

PAGE 25

USB Hub -3

Card Reader

GL823-OGG06

PAGE 23

Daughter Board
Thermal IC

TMP432A

A A

PAGE 23

5

Keyboard

PAGE 26

Speaker

Headset SW

TS3A225E

PAGE 24

DMIC

CCD Integrated

4

PAGE 24

Combo Jack
Headphone + MIC

PAGE 24

PAGE 24

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5
HW

HW

HW

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

RT8231BGQW

PP1350

APW8824

PP1050_PCH

RT8068A

PP1000_PCH_S5

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Intel Block Diagram

Intel Block Diagram

Intel Block Diagram

1

1 40Monday, August 17, 2015

1 40Monday, August 17, 2015

1 40Monday, August 17, 2015

1A

1A

1A

5

M_A_A[15:0][12]

D D

M_A_DM0[12]
M_A_DM1[12]
M_A_DM2[12]
M_A_DM3[12]
M_A_DM4[12]
M_A_DM5[12]
M_A_DM6[12]
M_A_DM7[12]

M_A_RAS#[12]
M_A_CAS#[12]
M_A_WE#[12]

M_A_BS0[12]
M_A_BS1[12]
M_A_BS2[12]

M_A_CS#0[12]

C C

1023 unstuff R28 by
Intel request

1121 remove R28,R25,C35

M_A_DRAMRST#[12]

PP1350

B B

A A

R446

4.7K/F_4

CPU_VREF

R448

4.7K/F_4

GND GND

SLP_S4#[6,14]

C263

0.1U/16V_4

SLP_S4#

PP3300_PCH_S5

R100

4.7K/_2

DRM_PWOK_C1

34

5

Q16A
PJT138K

GND

5

R90
10K_2

2

PP1350

GND

GND

DRAM_PWROK

61

Q16B

PJT138K

M_A_CKE0[12]

M_A_ODT0[12]

M_A_CLKP0[12]
M_A_CLKN0[12]

R458 100K/F_4
R459 100K/F_4

R457 23.2/F_4
R450 29.4/F_4
R455 162/F_4

R94 *0_4/S

GND

4

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_RAS#
M_A_CAS#
M_A_WE#

M_A_BS0
M_A_BS1
M_A_BS2

M_A_CS#0

M_A_CKE0

M_A_ODT0

M_A_CLKP0
M_A_CLKN0

M_A_DRAMRST#

CPU_VREF

ICLK_DRAM_TERMN_0
ICLK_DRAM_TERMN_1

SOC_DRAM_PWROK
SOC_VCCA_PWROK

DRAM_RCOMP0
DRAM_RCOMP1
DRAM_RCOMP2

SOC_DRAM_PWROK

C65

0.1U/16V_4

4

K45
H47
L41
H44
H50
G53
H49
D50
G52
E52
K48
E51
F47
J51
B49
B50

G36
B36
F38
B42
P51
V42
Y50
Y52

M45
M44

H51
K47

K44
D52

P44
P45

C47
D48

F44
E46

T41
P42

M50
M48

P50
P48

P41

AF44

AH42

AF42

AD42
AB42

AD44

AF45

AD45

AF40

AF41
AD40
AD41

R89 *0_4/S

U19A

DRAM0_MA_00
DRAM0_MA_11
DRAM0_MA_22
DRAM0_MA_33
DRAM0_MA_44
DRAM0_MA_55
DRAM0_MA_66
DRAM0_MA_77
DRAM0_MA_88
DRAM0_MA_99
DRAM0_MA_1010
DRAM0_MA_1111
DRAM0_MA_1212
DRAM0_MA_1313
DRAM0_MA_1414
DRAM0_MA_1515

DRAM0_DM_00
DRAM0_DM_11
DRAM0_DM_22
DRAM0_DM_33
DRAM0_DM_44
DRAM0_DM_55
DRAM0_DM_66
DRAM0_DM_77

DRAM0_RAS
DRAM0_CAS
DRAM0_WE

DRAM0_BS_00
DRAM0_BS_11
DRAM0_BS_22

DRAM0_CS_0
DRAM0_CS_2

DRAM0_CKE_00
RESERVED_D48
DRAM0_CKE_22
RESERVED_E46

DRAM0_ODT_0
DRAM0_ODT_2

DRAM0_CKP_0
DRAM0_CKN_0

DRAM0_CKP_2
DRAM0_CKN_2

DRAM0_DRAMRST

DRAM_VREF

ICLK_DRAM_TERMN
ICLK_DRAM_TERMN_AF42

DRAM_VDD_S4_PWROK
DRAM_CORE_PWROK

DRAM_RCOMP_00
DRAM_RCOMP_11
DRAM_RCOMP_22

RESERVED_AF40
RESERVED_AF41
RESERVED_AD40
RESERVED_AD41

*VLV_M_D/BGA

REV = 1.15

ph

PP1350_PGOOD [31]

+1.35V_SUS
+1.35V_SUS

EC_PWROK[27]

?
VLV_M_D

1 OF 13

EC_PWROK

3

3

DRAM0_DQ09_C32

DRAM0_DQ_1010
DRAM0_DQ_1111
DRAM0_DQ_1212
DRAM0_DQ_1313
DRAM0_DQ_1414
DRAM0_DQ_1515
DRAM0_DQ_1616
DRAM0_DQ_1717
DRAM0_DQ_1818
DRAM0_DQ_1919
DRAM0_DQ_2020
DRAM0_DQ_2121
DRAM0_DQ_2222
DRAM0_DQ_2323
DRAM0_DQ_2424
DRAM0_DQ_2525
DRAM0_DQ_2626
DRAM0_DQ_2727
DRAM0_DQ_2828
DRAM0_DQ_2929
DRAM0_DQ_3030
DRAM0_DQ_3131
DRAM0_DQ_3232
DRAM0_DQ_3333
DRAM0_DQ_3434
DRAM0_DQ_3535
DRAM0_DQ_3636
DRAM0_DQ_3737
DRAM0_DQ_3838
DRAM0_DQ_3939
DRAM0_DQ_4040
DRAM0_DQ_4141
DRAM0_DQ_4242
DRAM0_DQ_4343
DRAM0_DQ_4444
DRAM0_DQ_4545
DRAM0_DQ_4646
DRAM0_DQ_4747
DRAM0_DQ_4848
DRAM0_DQ_4949
DRAM0_DQ_5050
DRAM0_DQ_5151
DRAM0_DQ_5252
DRAM0_DQ_5353
DRAM0_DQ_5454
DRAM0_DQ_5555
DRAM0_DQ_5656
DRAM0_DQ_5757
DRAM0_DQ_5858
DRAM0_DQ_5959
DRAM0_DQ_6060
DRAM0_DQ_6161
DRAM0_DQ_6262
DRAM0_DQ_6363

DRAM0_DQSP_00
DRAM0_DQSN_00
DRAM0_DQSP_11
DRAM0_DQSN_11
DRAM0_DQSP_22
DRAM0_DQSN_22
DRAM0_DQSP_33
DRAM0_DQSN_33
DRAM0_DQSP_44
DRAM0_DQSN_44
DRAM0_DQSP_55
DRAM0_DQSN_55
DRAM0_DQSP_66
DRAM0_DQSN_66
DRAM0_DQSP_77
DRAM0_DQSN_77

PP3300_PCH_S5

4.7K/_2

DRM_PWOK_C2

34

5

Q35A

PJT138K

GND

DRAM0_DQ_00
DRAM0_DQ_11
DRAM0_DQ_22
DRAM0_DQ_33
DRAM0_DQ_44
DRAM0_DQ_55
DRAM0_DQ_66
DRAM0_DQ_77
DRAM0_DQ_88

R290
10K_2R295

?

PP1350

2

M36
J36
P40
M40
P36
N36
K40
K42
B32
C32
C36
A37
C33
A33
C37
B38
F36
G38
F42
J42
G40
C38
G44
D42
A41
C41
A45
B46
C40
B40
B48
B47
K52
K51
T52
T51
L51
L53
R51
R53
T47
T45
Y40
V41
T48
T50
Y42
AB40
V45
V47
AD48
AD50
V48
V50
AB44
Y45
V52
W51
AC53
AC51
W53
Y51
AD52
AD51

J38
K38
C35
B34
D40
F40
B44
C43
N53
M52
T42
T44
Y47
Y48
AB52
AA51

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

M_A_DQSP0
M_A_DQSN0
M_A_DQSP1
M_A_DQSN1
M_A_DQSP2
M_A_DQSN2
M_A_DQSP3
M_A_DQSN3
M_A_DQSP4
M_A_DQSN4
M_A_DQSP5
M_A_DQSN5
M_A_DQSP6
M_A_DQSN6
M_A_DQSP7
M_A_DQSN7

61

Q35B

PJT138K

M_A_DQ[63:0] [12]

M_A_DQSP0 [12]
M_A_DQSN0 [12]
M_A_DQSP1 [12]
M_A_DQSN1 [12]
M_A_DQSP2 [12]
M_A_DQSN2 [12]
M_A_DQSP3 [12]
M_A_DQSN3 [12]
M_A_DQSP4 [12]
M_A_DQSN4 [12]
M_A_DQSP5 [12]
M_A_DQSN5 [12]
M_A_DQSP6 [12]
M_A_DQSN6 [12]
M_A_DQSP7 [12]
M_A_DQSN7 [12]

SOC_VCCA_PWROK

C131
*0.1U/16V_4

GND

1128 place C90 to close SoC ball

2

1

2

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5
HW

HW

2

HW

Valley 1/9 (DDRA)

Valley 1/9 (DDRA)

Valley 1/9 (DDRA)

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

1A

1A

1A

2 40Monday, August 17, 2015

2 40Monday, August 17, 2015

2 40Monday, August 17, 2015

5

4

3

2

1

?
VLV_M_D

2 OF 13

DRAM1_DQ_00
DRAM1_DQ_11
DRAM1_DQ_22
DRAM1_DQ_33
DRAM1_DQ_44
DRAM1_DQ_55
DRAM1_DQ_66
DRAM1_DQ_77
DRAM1_DQ_88

DRAM1_DQ_99
DRAM1_DQ_1010
DRAM1_DQ_1111
DRAM1_DQ_1212
DRAM1_DQ_1313
DRAM1_DQ_1414
DRAM1_DQ_1515
DRAM1_DQ_1616
DRAM1_DQ_1717
DRAM1_DQ_1818
DRAM1_DQ_1919
DRAM1_DQ_2020
DRAM1_DQ_2121
DRAM1_DQ_2222
DRAM1_DQ_2323
DRAM1_DQ_2424
DRAM1_DQ_2525
DRAM1_DQ_2626
DRAM1_DQ_2727
DRAM1_DQ_2828
DRAM1_DQ_2929
DRAM1_DQ_3030
DRAM1_DQ_3131
DRAM1_DQ_3232
DRAM1_DQ_3333
DRAM1_DQ_3434
DRAM1_DQ_3535
DRAM1_DQ_3636
DRAM1_DQ_3737
DRAM1_DQ_3838
DRAM1_DQ_3939
DRAM1_DQ_4040
DRAM1_DQ_4141
DRAM1_DQ_4242
DRAM1_DQ_4343
DRAM1_DQ_4444
DRAM1_DQ_4545
DRAM1_DQ_4646
DRAM1_DQ_4747
DRAM1_DQ_4848
DRAM1_DQ_4949
DRAM1_DQ_5050
DRAM1_DQ_5151
DRAM1_DQ_5252
DRAM1_DQ_5353
DRAM1_DQ_5454
DRAM1_DQ_5555
DRAM1_DQ_5656
DRAM1_DQ_5757
DRAM1_DQ_5858
DRAM1_DQ_5959
DRAM1_DQ_6060
DRAM1_DQ_6161
DRAM1_DQ_6262
DRAM1_DQ_6363

DRAM1_DQSP_00
DRAM1_DQSN_00
DRAM1_DQSP_11
DRAM1_DQSN_11
DRAM1_DQSP_22
DRAM1_DQSN_22
DRAM1_DQSP_33
DRAM1_DQSN_33
DRAM1_DQSP_44
DRAM1_DQSN_44
DRAM1_DQSP_55
DRAM1_DQSN_55
DRAM1_DQSP_66
DRAM1_DQSN_66
DRAM1_DQSP_77
DRAM1_DQSN_77

?REV = 1.15

BG38
BC40
BA42
BD42
BC38
BD36
BF42
BC44
BH32
BG32
BG36
BJ37
BG33
BJ33
BG37
BH38
AU36
AT36
AV40
AT40
BA36
AV36
AY42
AY40
BJ41
BG41
BJ45
BH46
BG40
BH40
BH48
BH47
AY52
AY51
AP52
AP51
AW51
AW53
AR51
AR53
AP47
AP45
AK40
AM41
AP48
AP50
AK42
AH40
AM45
AM47
AF48
AF50
AM48
AM50
AH44
AK45
AM52
AL51
AG53
AG51
AL53
AK51
AF52
AF51

BF40
BD40
BG35
BH34
BA38
AY38
BH44
BG43
AU53
AV52
AP42
AP44
AK47
AK48
AH52
AJ51

M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

M_B_DQSP0
M_B_DQSN0
M_B_DQSP1
M_B_DQSN1
M_B_DQSP2
M_B_DQSN2
M_B_DQSP3
M_B_DQSN3
M_B_DQSP4
M_B_DQSN4
M_B_DQSP5
M_B_DQSN5
M_B_DQSP6
M_B_DQSN6
M_B_DQSP7
M_B_DQSN7

M_B_A[15:0][13]

D D

M_B_DM0[13]
M_B_DM1[13]
M_B_DM2[13]
M_B_DM3[13]
M_B_DM4[13]
M_B_DM5[13]
M_B_DM6[13]
M_B_DM7[13]

M_B_RAS#[13]
M_B_CAS#[13]
M_B_WE#[13]

M_B_BS0[13]
M_B_BS1[13]
M_B_BS2[13]

C C

1023 unstuff R29 by
Intel request

M_B_CS#0[13]

M_B_CKE0[13]

M_B_ODT0[13]

M_B_CLKP0[13]
M_B_CLKN0[13]

1121 remove R29,R26,C36

M_B_DRAMRST#[13]

B B

M_B_A0 M_B_DQ0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_RAS#
M_B_CAS#
M_B_WE#

M_B_BS0
M_B_BS1
M_B_BS2

M_B_CS#0

M_B_CKE0

M_B_ODT0

M_B_CLKP0
M_B_CLKN0

M_B_DRAMRST#

AY45
BB47

AW41

BB44
BB50

BC53

BB49
BF50

BC52

BE52
AY48
BE51

BD47

BA51
BH49
BH50

BD38
BH36
BC36
BH42

AT51
AM42

AK50

AK52

AV45

AV44

BB51

AY47

AY44

BF52

AT44

AT45

BG47

BE46

BD44

BF48

AP41

AT42

AV50

AV48

AT50

AT48

AT41

U19B

DRAM1_MA_00
DRAM1_MA_11
DRAM1_MA_22
DRAM1_MA_33
DRAM1_MA_44
DRAM1_MA_55
DRAM1_MA_66
DRAM1_MA_77
DRAM1_MA_88
DRAM1_MA_99
DRAM1_MA_1010
DRAM1_MA_1111
DRAM1_MA_1212
DRAM1_MA_1313
DRAM1_MA_1414
DRAM1_MA_1515

DRAM1_DM_00
DRAM1_DM_11
DRAM1_DM_22
DRAM1_DM_33
DRAM1_DM_44
DRAM1_DM_55
DRAM1_DM_66
DRAM1_DM_77

DRAM1_RAS
DRAM1_CAS
DRAM1_WE

DRAM1_BS_00
DRAM1_BS_11
DRAM1_BS_22

DRAM1_CS_0
DRAM1_CS_2

DRAM1_CKE_00
RESERVED_BE46
DRAM1_CKE_22
RESERVED_BF48

DRAM1_ODT_0
DRAM1_ODT_2

DRAM1_CKP_0
DRAM1_CKN_0

DRAM1_CKP_2
DRAM1_CKN_2

DRAM1_DRAMRST

*VLV_M_D/BGA

M_B_DQ[63:0] [13]

M_B_DQSP0 [13]
M_B_DQSN0 [13]
M_B_DQSP1 [13]
M_B_DQSN1 [13]
M_B_DQSP2 [13]
M_B_DQSN2 [13]
M_B_DQSP3 [13]
M_B_DQSN3 [13]
M_B_DQSP4 [13]
M_B_DQSN4 [13]
M_B_DQSP5 [13]
M_B_DQSN5 [13]
M_B_DQSP6 [13]
M_B_DQSN6 [13]
M_B_DQSP7 [13]
M_B_DQSN7 [13]

3

A A

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5
HW

HW

5

4

3

2

HW

Valley 2/9 (DDRB)

Valley 2/9 (DDRB)

Valley 2/9 (DDRB)

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

1A

1A

1A

3 40Monday, August 17, 2015

3 40Monday, August 17, 2015

3 40Monday, August 17, 2015

5

4

3

2

1

U19C

INT_HDMITX2P[19] EDP_TXP0 [17]
INT_HDMITX2N[19]
INT_HDMITX1P[19]
INT_HDMITX1N[19]

D D

C C

B B

INT_HDMITX0P[19]
INT_HDMITX0N[19]
INT_HDMICLK+[19]
INT_HDMICLK-[19]

INT_HDMI_HPD[19]

HDMI_DDCDATA_SW[19]

HDMI_DDCCLK_SW[19]

R491
402/F_4

R221 *0_2/S
R220 *0_2/S

GND GND

TP19
TP18

INT_HDMITX2P
INT_HDMITX2N
INT_HDMITX1P
INT_HDMITX1N
INT_HDMITX0P
INT_HDMITX0N
INT_HDMICLK+
INT_HDMICLK-

INT_HDMI_HPD
HDMI_DDCDATA_SW

HDMI_DDCCLK_SW

SOC_DDIO_RCOMP
SOC_DDIO_RCOMP_P

SOC_PIN_AM3
SOC_PIN_AM2

GPIO_NC13
GPIO_NC14

INTD_DSI_TE

BTM Strapping Table

Pin Name Strap description

GPIO_SO_SC_56

LPE_I2S2_FRM

GPIO_SO_SC_65

A A

DDI0_DDCDATA

DDI1_DDCDATA

Top Swap (A16 Override)

BIOS Boot Selection

Security Flash Descriptors

DDI0 Detect

DDI1 Detect

Sampled

PWROK

PWROK

PWROK

PWROK

PWROK

AV3
AV2
AT2
AT3
AR3
AR1
AP3
AP2

AL3
AL1

D27
C26

C28
B28

C27
B26

AK13

AK12
AM14
AM13

AM3
AM2

T2

T3
AB3
AB2

Y3

Y2

W3
W1

V2

V3

R3

R1
AD6
AD4
AB9
AB7

Y4

Y6

V4

V6
A29
C29

AB14

B30
C30

0 = Top address bit is unchanged

+1.0V_SX

DDI0_TXP_0

+1.0V_SX

DDI0_TXN_0

+1.0V_SX

DDI0_TXP_1

+1.0V_SX

DDI0_TXN_1

+1.0V_SX

DDI0_TXP_2

+1.0V_SX

DDI0_TXN_2

+1.0V_SX

DDI0_TXP_3

+1.0V_SX

DDI0_TXN_3

+1.0V_SX

DDI0_AUXP

+1.0V_SX

DDI0_AUXN

+1.8V

DDI0_HPD
DDI0_DDCDATA

DDI0_DDCCLK
DDI0_VDDEN

DDI0_BKLTEN
DDI0_BKLTCTL

DDI0_RCOMP
DDI0_RCOMP_P
RESERVED_AM14
RESERVED_AM13
VSS_AM3
VSS_AM2

RESERVED_T2
RESERVED_T3
RESERVED_AB3
RESERVED_AB2
RESERVED_Y3
RESERVED_Y2
RESERVED_W3
RESERVED_W1
RESERVED_V2
RESERVED_V3
RESERVED_R3
RESERVED_R1
RESERVED_AD6
RESERVED_AD4
RESERVED_AB9
RESERVED_AB7
RESERVED_Y4
RESERVED_Y6
RESERVED_V4
RESERVED_V6
GPIO_S0_NC13
GPIO_S0_NC14_C29
RESERVED_AB14
GPIO_S0_NC12
RESERVED_C30

*VLV_M_D/BGA

REV = 1.15

+1.8V
+1.8V

+1.8V
+1.8V
+1.8V

Configuration Note

1 = Top address bit is inverted

0 = LPC

1 = SPI

0 = Override

1 = Normal operation

0 = DDI0 not detected

1 = DDI0 detected

0 = DDI0 not detected

1 = DDI0 detected

GPIO_SO_NC_13

5

4

?
VLV_M_D

+1.0V_SX
+1.0V_SX

+1.8V

+1.8V

DDI1_DDCDATA

+1.8V

DDI1_DDCCLK

+1.8V
+1.8V

DDI1_BKLTEN

+1.8V

DDI1_BKLTCTL

RESERVED_AH14
RESERVED_AH13
RESERVED_AF14
RESERVED_AF13

VGA_DDCCLK

VGA_DDCDATA

RESERVED_T7

RESERVED_T9
RESERVED_AB13
RESERVED_AB12

RESERVED_Y12
RESERVED_Y13
RESERVED_V10

RESERVED_V9

RESERVED_T12
RESERVED_T10
RESERVED_V14
RESERVED_V13
RESERVED_T14
RESERVED_T13

RESERVED_T6

RESERVED_T4

RESERVED_P14

RESERVED_K34

GPIO_S0_NC26
GPIO_S0_NC25
GPIO_S0_NC24
GPIO_S0_NC23
GPIO_S0_NC22
GPIO_S0_NC21
GPIO_S0_NC20
GPIO_S0_NC18
GPIO_S0_NC17
GPIO_S0_NC16

3 OF 13

GPIO_S0_NC15

GPIO_S0_SC_56[7]

I2S_LRCLK[5]

SOC_OVERRIDE#[27]

Pull up +1.8V at HDMI side

AG3

DDI1_TXP_0
DDI1_TXN_0
DDI1_TXP_1
DDI1_TXN_1
DDI1_TXP_2
DDI1_TXN_2
DDI1_TXP_3
DDI1_TXN_3

DDI1_AUXP
DDI1_AUXN

DDI1_HPD

DDI1_VDDEN

VSS_AH3
VSS_AH2

VGA_RED

VGA_BLUE

VGA_GREEN

VGA_IREF
VGA_IRTN

VGA_HSYNC
VGA_VSYNC

?

PP1800_PCH GND

R264 *0_4/S

HDMI_DDCDATA_SW

PP1800_PCH GND

PP1800_PCH GND

3

EDP_TXP0

AG1

EDP_TXN0

AF3

EDP_TXP1

AF2

EDP_TXN1

AD3
AD2
AC3
AC1

AK3

EDP_AUXP

AK2

EDP_AUXN

K30

EDP_HPD_L

P30

DDI1_DDCDATA

G30
N30

SOC_DISP_ON_C

J30

SOC_EDP_BLON_C

M30

SOC_DPST_PWM_C

AH14
AH13
AF14
AF13
AH3

SOC_PIN_AH3

AH2

SOC_PIN_AH2

BA3
AY2
BA1
AW1
AY3

BD2
BF2

BC1

VGA_DDCCLK

BC2

VGA_DDCDATA

T7
T9
AB13
AB12
Y12
Y13
V10
V9
T12
T10
V14
V13
T14
T13
T6
T4
P14

K34

XDP_GPIO_S0_NC19

D32
N32
J34
K28

XDP_GPIO_S0_NC23

F28

XDP_GPIO_S0_NC22

F32

XDP_GPIO_S0_NC21

D34

XDP_GPIO_S0_NC20

J28

XDP_GPIO_S0_NC18

D28

XDP_GPIO_S0_NC17

M32

XDP_GPIO_S0_NC16

F34

XDP_GPIO_S0_NC15

GPIO_S0_SC_56

R508 *10K_4

I2S_LRCLK

R107 10K_4

I2S_DOUT[5]

DDI1_DDCDATA

R461 2.2K_4 R460 *10K_2

GPIO_NC13

R99 *10K_4

R509 *10K_2

R105 *10K_2

I2S_DOUT

SOC_OVERRIDE_NM

R110 *10K_2

R101 10K_2

EDP_TXN0 [17]
EDP_TXP1 [17]
EDP_TXN1 [17]

EDP_AUXP [17]
EDP_AUXN [17]

SOC_DISP_ON_C [15]
SOC_EDP_BLON_C [15]
SOC_DPST_PWM_C [15]

R219 *0_2/S
R222 *0_2/S

R212 *0_2/S
R213 *0_2/S

3

2

1

XDP_GPIO_S0_NC19 [11]

XDP_GPIO_S0_NC23 [11]
XDP_GPIO_S0_NC22 [11]
XDP_GPIO_S0_NC21 [11]
XDP_GPIO_S0_NC20 [11]
XDP_GPIO_S0_NC18 [11]
XDP_GPIO_S0_NC17 [11]
XDP_GPIO_S0_NC16 [11]
XDP_GPIO_S0_NC15 [11]

GNDPP1800_PCH

1029 unstuff R10398, using SoC internal PU

1029 unstuff R10410, using SoC internal PU
1115 stuff R10410 system can't boot if un-stuff R10410 on

Q32

2N7002K

GND

proto1.5 board, need intel double confirm before proto2

GND

1029 unstuff R10063, using SoC internal PU
1115 stuff R10063, it is required for eDP to be detected

4

PP1800_PCH

HPD output high
SOC active Low

EDP_HPD_L

2/9 modify Q1

2

R15
10K/F_2

Q3A

34

PJT138K

5

R28
100K_2

1 2

GND

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Valley 3/9 (Display)

Valley 3/9 (Display)

Valley 3/9 (Display)

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

NB5

NB5

NB5
HW

HW

HW

GND

EDP_HPD [17]

4 40Monday, August 17, 2015

4 40Monday, August 17, 2015

4 40Monday, August 17, 2015

1A

1A

1A

5

4

3

2

1

PP1800_PCH

R492 *10K_2

R493 *10K_2

D D

C C

B B

R483 *4.7K_4

R229 10K_4
R112 10K_4

SATA_DEVSLP_C

SATA_LED_R_N

SDIO3_PWR_EN#
SD3_WP

SD3_CD#

R482
402/F_4

U19D

BF6

SATA_TXP_0

BG7

SATA_TXN_0

AU16

SATA_RXP_0

AV16

SATA_RXN_0

BD10

SATA_TXP1

BF10

SATA_TXN_1

AY16

SATA_RXP_1

BA16

SATA_RXN_1

GND

SOC_KBC_SCI[14]

EMMC_CLK[21]

EMMC_D0[21]
EMMC_D1[21]
EMMC_D2[21]
EMMC_D3[21]
EMMC_D4[21]
EMMC_D5[21]
EMMC_D6[21]
EMMC_D7[21]

EMMC_CMD[21]

EMMC_RST#[21]

SD3_CD#[18,23]

TP76

R499 *0_2/S
R510 *0_2/S

R515 *0_2/S

R478 49.9/F_4

GND

SD3_CD#
SDMMC3_1P8_EN

SDIO3_PWR_EN#

R467 49.9/F_4

GND

ICLK_SATA_TERMP
ICLK_SATA_TERMN

SATA_GP0
SATA_DEVSLP_C
SATA_LED_R_N

SATA_RCOMP_DP
SATA_RCOMP_DN

EMMC_CLK
EMMC_D0

EMMC_D1
EMMC_D2
EMMC_D3
EMMC_D4
EMMC_D5
EMMC_D6
EMMC_D7

EMMC_CMD
EMMC_RST#

EMMC_RCOMP

SDIO3_RCOMP

BB10

ICLK_SATA_TERMP

BC10

ICLK_SATA_TERMN

BA12

SATA_GP0

AY14

SATA_GP1

AY12

SATA_LED

AU18

SATA_RCOMP_P_AU18

AT18

SATA_RCOMP_N_AT18

AT22

MMC1_CLK

AV20

MMC1_D0

AU22

MMC1_D1

AV22

MMC1_D2

AT20

MMC1_D3

AY24

MMC1_D4

AU26

MMC1_D5

AT26

MMC1_D6

AU20

MMC1_D7

AV26

MMC1_CMD

BA24

MMC1_RST

AY18

MMC1_RCOMP

BA18

SD2_CLK

AY20

SD2_D0

BD20

SD2_D1

BA20

SD2_D2

BD18

SD2_D3_CD

BC18

SD2_CMD

AY26

SD3_CLK

AT28

SD3_D0

BD26

SD3_D1

AU28

SD3_D2

BA26

SD3_D3

BC24

SD3_CD#

AV28

SD3_CMD

BF22

SD3_1P8EN

BD22

SD3_PWREN

BF26

SD3_RCOMP

*VLV_M_D/BGA

+1.8V/+3.3V
+1.8V/+3.3V
+1.8V/+3.3V
+1.8V/+3.3V
+1.8V
+1.8V/+3.3V

REV = 1.15

+1.8V
+1.8V
+1.8V

+1.8V

+1.8V
+1.8V

?
VLV_M_D

+1.0V
+1.0V

+1.8V
+1.8V
+1.8V
+1.8V

PCIE_RCOMP_P_AP14_AP14
PCIE_RCOMP_N_AP13_AP13

+1.8V/1.5V
+1.8V/1.5V
+1.8V/1.5V
+1.8V/1.5V
+1.8V/1.5V
+1.8V/1.5V
+1.8V/1.5V+1.8V/+3.3V
+1.8V/1.5V

+1.8V

4 OF 13

+1.8V

RESERVED_AV10

HDA_LPE_RCOMP

LPE_I2S2_DATAOUT

LPE_I2S2_DATAIN

+1.0V

PCIE_TXP_0
PCIE_TXN_0

PCIE_RXP_0
PCIE_RXN_0

PCIE_TXP_1
PCIE_TXN_1

PCIE_RXP_1
PCIE_RXN_1

PCIE_TXP_2
PCIE_TXN_2

PCIE_RXP_2
PCIE_RXN_2

PCIE_TXP_3
PCIE_TXN_3

PCIE_RXP_3
PCIE_RXN_3

VSS_BB7
VSS_BB5

PCIE_CLKREQ_0
PCIE_CLKREQ_1
PCIE_CLKREQ_2
PCIE_CLKREQ_3

SD3_WP_BD5

RESERVED_BB4
RESERVED_BB3

RESERVED_AV9

HDA_RST

HDA_SYNC

HDA_CLK
HDA_SDO
HDA_SDI0
HDA_SDI1

HDA_DOCKRST

HDA_DOCKEN
LPE_I2S2_CLK

LPE_I2S2_FRM

RESERVED_P34
RESERVED_N34

RESERVED_AK9
RESERVED_AK7

PROCHOT

AY7

PCIE_TX0+_WLAN_C

AY6

PCIE_TX0-_WLAN_C

AT14

PCIE_RX0+_WLAN

AT13

PCIE_RX0-_WLAN

AV6
AV4

AT10
AT9

AT7
AT6

AP12
AP10

AP6
AP4

1213 swap CLKREQ_WLAN and CLKREQ_IMAGE for

AP9

CLKREQ and CLK pins are aligned

AP7
BB7

VSS_BB7

BB5

VSS_BB5

BG3

PCIE_CLKREQ_WLAN#

BD7

PCIE_CLKREQ_IMAGE#

BG5

PCIE_CLKREQ_LAN#

BE3

PCIE_CLKREQ3#

BD5

SD3_WP

AP14

SOC_PCIE_COMP

AP13

SOC_PCIE_COMN

BB4
BB3
AV10
AV9

BF20

HDA_RCOMP

BG22

ACZ_RST#

BH20

ACZ_SYNC

BJ21

ACZ_BCLK

BG20

ACZ_SDOUT

BG19

PCH_AZ_CODEC_SDIN0

BG21
BH18

DET_TRIGGER

BG18

HDA_DOCKEN#

BF28

I2S_BCLK

BA30

I2S_LRCLK

BC30

I2S_DOUT

BD28

I2S_DIN

P34
N34

AK9
AK7

C24

SOC_PROCHOT#

?

C73

0.1U/10V_2

C369 0.1U/16V_4
C368 0.1U/16V_4

R238 *0_4/S

R133 71.5/F_4
R136 *0_2/S

R496 *0_2/S

R507 *0_2/S
R516 *0_2/S

TP93
TP94

R476 49.9/F_4

TP24
TP25
TP23
TP26
TP28

R120 *0_2/S
R121 *0_2/S
R326 *0_2/S
R108 *0_2/S

H_PROCHOT#

R41 *0_2

1021 un-stuff R10402

PCIE_TX0+_WLAN [20]
PCIE_TX0-_WLAN [20]

PCIE_RX0+_WLAN [20]
PCIE_RX0-_WLAN [20]

PCIE_CLKREQ_WLAN# [20]

GND

DET_TRIGGER [24]
AJACK_MICPRES_L [24]

PP1000_PCH

I2S_BCLK_R [24]
I2S_LRCLK_R [24]
I2S_DOUT_R [24]
I2S_DIN_R [24]

H_PROCHOT# [18,27,33]
IMVP7_PROCHOT# [28]
ALERT# [23]

GND

PCIE_CLKREQ_IMAGE#
PCIE_CLKREQ_WLAN#

I2S_DOUT

R489
402/F_4

R521 *10K_2
R522 10K_2

R106 *10K_2

1029 unstuff R10385,
using SoC internal PU

0 = LPC
1 = SPI

I2S_LRCLK
I2S_DOUT

Security Flash Descriptors
0 = Override
1 = Normal Operation

Need check to see if MOSFET
isolation needed or not

5

PP1800_PCH

I2S_LRCLK [4]
I2S_DOUT [4]

GND

A A

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5
HW

HW

5

4

3

2

HW

Valley 4/9 (SD/PCIE/SATA)

Valley 4/9 (SD/PCIE/SATA)

Valley 4/9 (SD/PCIE/SATA)

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

1A

1A

1A

5 40Monday, August 17, 2015

5 40Monday, August 17, 2015

5 40Monday, August 17, 2015

R214
1M_4

5

XTAL25_IN
XTAL25_OUT

R495 4.02K/F_4
R505 47.5/F_4

GND

CLK_PCIE_WLANN[20]
CLK_PCIE_WLANP[20]

ICLK_ICOMP
ICLK_RCOMP

CLK_PCIE_WLANN
CLK_PCIE_WLANP

C110 12P/50V_4

GND

GND

C104 12P/50V_4

1121 by X'tal vender suggestion,

D D

change C10250/C10239 from 15pF to 12pF

XTAL25_OUT

1

2

Y3

25MHZ +-10PPM

4

3

XTAL25_IN

1031 remove R417, PRDY should
be direct connection between
SoC and XDP by intel request

2'nd : HHE BG625000121

1128 add a connection and name to

PP1800_PCH

KBD_IRQ#, besides add pulled high resistor

R193 10K_2

C C

PP1800_PCH_S5

R153 *10K_2
R170 10K_2
R279 10K_2
R152 10K_2

B B

SOC_JTAG2_TDO
PCH_WAKE#
TRACKPAD_INT#
LTE_WAKE#

I2S_MCLK[24]

KBD_IRQ#[27]

XDP_H_TCK[11]

XDP_H_TRST#[11]

XDP_H_TMS[11]
XDP_H_TDI[11]

XDP_H_TDO[11]

XDP_H_PRDY#[11]

XDP_H_PREQ#_C[11]

MUX_AUD_INT1#[24]

R180 *0_2/S

R162 *0_2/S

WIFI_DISABLE#[15]

GND

PCH_WAKE_L[27]

TRACKPAD_INT#[26]

SOC_KBC_SMI[14]

I2S_MCLK

KBD_IRQ#KBD_IRQ#
SRT_CRST#

XDP_H_TCK
XDP_H_TRST#
XDP_H_TMS
XDP_H_TDI
XDP_H_TDO
XDP_H_PRDY#
XDP_H_PREQ#

SOC_SPI_CS#
SOC_SPI_MISO

SOC_SPI_MOSI
SOC_SPI_CLK

PCH_WAKE#
TRACKPAD_INT#

LTE_WAKE#
SOC_JTAG2_TDO

PCH_SPI_WP_D
SOC_GPOI7

MUX_AUD_INT1#
WIFI_DISABLE#

R469 49.9/F_4

RTC Clock 32.768KHz

RTC Circuitry(RTC)

PP3300_RTC

A A

R513 *0_6/S

30mils

+3V_RTC

R497

20K/F_4

R498

20K/F_4

C348
1u/6.3V_4

GND

5

GND

GND

C356
1u/6.3V_4

C355
1u/6.3V_4

SOC_RTEST#

SRT_CRST#

4

SOC_GPIO_RCOMP

RTC_X1

R187

10M_4

RTC_X2

4

U19E

AH12

ICLK_OSCIN

AH10

ICLK_OSCOUT

AD9

RESERVED_AD9

AD14

ICLK_ICOMP

AD13

ICLK_RCOMP

AD10

RESERVED_AD10

AD12

RESERVED_AD12

AF6

PCIE_CLKN_00

AF4

PCIE_CLKP_00

AF9

PCIE_CLKN_11

AF7

PCIE_CLKP_11

AK4

PCIE_CLKN_22

AK6

PCIE_CLKP_22

AM4

PCIE_CLKN_33

AM6

PCIE_CLKP_33

AM10

RESERVED_AM10

AM9

RESERVED_AM9

BH7

PMC_PLT_CLK_00

BH5

PMC_PLT_CLK_11

BH4

PMC_PLT_CLK_22

BH8

PMC_PLT_CLK_33

BH6

PMC_PLT_CLK_44

BJ9

PMC_PLT_CLK_55

C12

ILB_RTC_RST

D14

TAP_TCK

G12

TAP_TRST

F14

TAP_TMS

F12

TAP_TDI

G16

TAP_TDO

D18

TAP_PRDY

F16

TAP_PREQ

AT34

RESERVED

C23

PCU_SPI_CS_00

C21

PCU_SPI_CS_11

B22

PCU_SPI_MISO

A21

PCU_SPI_MOSI

C22

PCU_SPI_CLK

B18

GPIO_S5_0

B16

GPIO_S5_1

C18

GPIO_S5_2

A17

GPIO_S5_3

C17

GPIO_S5_4

C16

GPIO_S5_5

B14

GPIO_S5_6

C15

GPIO_S5_7

C13

GPIO_S5_8

A13

GPIO_S5_9

C19

GPIO_S5_10

N26

GPIO_RCOMP

*VLV_M_D/BGA

REV = 1.15

12

Y2

32.768KHZ

7/1 used 18pF for PV

?
VLV_M_D

+1.8V
+1.8V
+1.8V
+1.8V

+1.8V
+1.8V
+1.8V
+1.8V

+1.8V_S5
+1.8V_S5

+1.8V_S5
+1.8V_S5
+1.8V_S5

+1.8V_S5
+1.8V_S5

+1.8V_S5
+1.8V_S5
+1.8V
+1.8V_S5

+1.8V_S5

+1.8V
+1.8V
+1.8V
+1.8V
+1.8V
+1.8V

+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5 +1.0V

+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5

+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5

SPI ROM needs power in S3/S5 for the TXE (Trusted execution engine).

C9018p/50V_4

C9418p/50V_4

GND

+3V_RTC

+3V_RTC
+3V_RTC

5 OF 13

PP1800_PCH
PP1800_PCH_S5

+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5

+1.8V
+1.8V
+1.8V
+1.8V

R286 *0_6
R297 *0_6/S

PP3300_PCH_S5

3

SIO_UART1_RXD
SIO_UART1_TXD
SIO_UART1_RTS
SIO_UART1_CTS

SIO_UART2_RXD
SIO_UART2_TXD
SIO_UART2_RTS
SIO_UART2_CTS

PMC_SUSPWRDNACK

PMC_SUSCLK0_G24

PMC_SLP_S0IX

PMC_SLP_S4
PMC_SLP_S3

GPIO_S514_J20

PMC_ACPRESENT

PMC_WAKE_PCIE_0

PMC_BATLOW
PMC_PWRBTN

PMC_RSTBTN
PMC_PLTRST

GPIO_S517_J24

PMC_SUS_STAT

ILB_RTC_TEST

PMC_RSMRST

PMC_CORE_PWROK

ILB_RTC_X1
ILB_RTC_X2

ILB_RTC_EXTPAD

SVID_ALERT

+1.0V

SVID_DATA

+1.0V

SVID_CLK

SIO_PWM_00
SIO_PWM_11

GPIO_S5_22
GPIO_S5_23
GPIO_S5_24
GPIO_S5_25
GPIO_S5_26
GPIO_S5_27
GPIO_S5_28
GPIO_S5_29
GPIO_S5_30

SIO_SPI_CS
SIO_SPI_MISO
SIO_SPI_MOSI

SIO_SPI_CLK

PP1800_PCH_S5

3

AU34
AV34
BA34
AY34

BF34
BD34
BD32
BF32

D26
G24
F18
F22
D22
J20
D20
F26
K26
J26
BG9
F20
J24
G18

C11

B10
B7

C9
A9
B8

B24
A25
C25

AU32
AT32

K24
N24
M20
J18
M18
K18
K20
M22
M24

AV32
BA28
AY28
AY30

Q34 PJA138K

1

2

R173 10K_4

SPI_WP_ME

SPI_HOLD_ME

SIO_UART2_RXD
SIO_UART2_TXD

PMC_SUSPWRDNACK
PMC_SUSCLK0
SLP_S0IX#
SLP_S4#
SLP_S3#

ACPRESENT
SOC_PMC_WAKE#
PMC_BATLOW#
SOC_PWRBTN#
SOC_REST_BTN#
SOC_PLTRST#

PMC_SUS_STAT#

SOC_RTEST#

SOC_RSMRST#
CORE_PWROK

RTC_X1
RTC_X2
BRTC_EXTPAD

SVID_ALERT#_SOC
SVID_DATA_SOC
SVID_CLK_SOC

SIO_PWM1

XDP_GPIO_DFX0
XDP_GPIO_DFX1
XDP_GPIO_DFX2
XDP_GPIO_DFX3
XDP_GPIO_DFX4
XDP_GPIO_DFX5
XDP_GPIO_DFX6
XDP_GPIO_DFX7
XDP_GPIO_DFX8

SIO_SPI_CS#
SIO_SPI_MISO
SIO_SPI_MOSI
SIO_SPI_CLK

PP1800_PCH_ME

3

PCH_SPI_WP_D

R21 *0_2/S
R9 *0_2/S

1

2

TP60
TP58

SUS STAT OUTPUT PORT

SOC_RTEST# [11]

R523 *0_4/S

C99 0.1U/16V_4

SPEC 512177 INPUT PORT

R131 20/F_4
R111 16.9/F_4
R122 *0_4/S

TP59
TP69
TP68
TP65

R20 *3.3K/F_4

R437 3.3K/F_4

near SPI ROM as possible

Q42N7002K

3

PCH_SPI_WP_D

SPI_WP_ME

VR_SVID_ALERT#
VR_SVID_DATA
VR_SVID_CLK

TP61

PP1800_PCH_ME

C86

0.1U/16V_4

SPI_WP_ME_ROM

SPI_HOLD_ME

PP1800_PCH_ME

GPIO_SPI_WP [18]
SPI_HOLD#_BIOS [18]

To PCH

PCH_SPI_WP_D connect to GPIO58 at GRB

SPI_WP_ME [25,27]

2

PMC_SUSPWRDNACK [14]
PMC_SUSCLK0 [15]
SLP_S0IX# [14]
SLP_S4# [2,14]
SLP_S3# [14]

ACPRESENT [15]
SOC_PMC_WAKE# [15]

SOC_PWRBTN# [14]
SOC_REST_BTN# [11,18]

SOC_PLTRST# [11,14]
PMC_SUS_STAT# [14]

SOC_RSMRST# [11,14]
CORE_PWROK_R [11,27]

GND

XDP_GPIO_DFX0 [11]
XDP_GPIO_DFX1 [11]
XDP_GPIO_DFX2 [11]
XDP_GPIO_DFX3 [11]
XDP_GPIO_DFX4 [11]
XDP_GPIO_DFX5 [11]
XDP_GPIO_DFX6 [11]
XDP_GPIO_DFX7 [11]
XDP_GPIO_DFX8 [11]

8

Default PD

GND

3

R141 3.3K/F_4

To debug header

From Screw/EC

2

O_1.8VA

CORE_PWROK

C102

0.1U/10V_2

DATA, CLK CLOSE TO VR

VR_SVID_ALERT# [33]
VR_SVID_DATA [33]

VR_SVID_CLK [33]

SPI_WP_ME

U8

SPI_SI

VCC

SPI_SO

CS#

SPI_SCK

WP#

SPI_HOLD7GND

SPI_FLASH

soic8-7_9-1_27

AKE5EZN0N00

IC FLASH (8P) W25Q64FWSSIG (SOIC)

9/6 Add EC_RCIN_L for warm boot,
EC side is OD type

SOC_REST_BTN#

R30 *0_4/S

5

SOC_SPI_MOSI_R

2

SOC_SPI_MISO_R

1

SOC_SPI_CS#_R

6

SOC_SPI_CLK_R

4

GND

SOC_SPI_CS#

PMC_SUSPWRDNACK
SOC_PMC_WAKE#
ACPRESENT
PMC_BATLOW#

SOC_REST_BTN#

GND

R256 *0_4/S

LAYOUT CLOSE TO SPI ROM

3.3V

SPI_WP_ME_ROM_Q

R157 22/F_4
R145 22/F_4
R140 22/F_4
R151 22/F_4

LAYOUT CLOSE TO SPI ROM

R5 *0_2/S
R8 *0_2/S
R10 *0_2/S
R7 *0_2/S

SPI NOR FLASH

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5
HW

HW

HW

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

PP1800_PCH_S5

R468 10K_2
R464 10K_2
R475 2.2K/F_2
R472 10K_2

R254 10K_2

VR_SVID_DATA
VR_SVID_ALERT#
VR_SVID_CLK

PP1800_PCH

PP1000_PCH

R463

73.2/F_4

PP1800_PCH_ME

C36 0.1U/16V_4

2
1

U1274LVC1G34

3 5

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Valley 5/9 (SPI/GPIO/CLK)

Valley 5/9 (SPI/GPIO/CLK)

Valley 5/9 (SPI/GPIO/CLK)

1

R138

73.2/F_4

ALERT Close to SOC

EC_REST_L [27]

4

SPI_WP_ME_ROM

R24
100K_2

SOC_SPI_MOSI
SOC_SPI_MISO
SOC_SPI_CS#
SOC_SPI_CLK

PCH_SPI_SI_R [18]
PCH_SPI_SO_R [18]
PCH_SPI_CS0#_R [18]

PCH_SPI_CLK_R [18]

6

73.2/F_4

R466

6 40Monday, August 17, 2015

6 40Monday, August 17, 2015

6 40Monday, August 17, 2015

1A

1A

1A

5

D D

C2-test add RAM_ID3

PORT 1 USB CONN
PORT 2

USB CONN

PORT 3

Card Reader

MB USB3.0
HUB1

CCD

C C

PCLK_TPM[22]

B B

CLK_PCI_EC[27]

PP1800_PCH

R158
*0_2

LPC_CLKRUN_L[27]

R171 2.2K/F_2
R181 2.2K/F_2
R184 2.2K/F_2

BT

GND

PP1800_PCH_S5

GND

R228 45.3/F_4

GND

R481 49.9/F_4

PCLK_TPM
CLK_PCI_EC SOC_CLKOUT_1
LPC_CLKRUN_L

SMB_SOC_DATA
SMB_SOC_CLK
SMB_SOC_ALERTB

USBP0+[25]
USBP0-[25]

USBP1+[25]
USBP1-[25]

USBP2+[17]
USBP2-[17]

USBP3+[20]

R512 1K/F_4
R500 1K/F_4

R511 45.3/F_4

LPC_LAD0[22,27]
LPC_LAD1[22,27]
LPC_LAD2[22,27]
LPC_LAD3[22,27]

LPC_LFRAME#[22,27]

SOC_SERIRQ[14]

SMB_SOC_DATA[11]

USBP3-[20]

R185 10K_2
R137 10K_2

R501 *0_2

GND

R147 22/F_4

R156 22/F_4
R143 *0_2/S

7/20 R147 change to 22ohm

SMB_SOC_CLK[11]

USB_OC0#[14,23,25]

USB_OC1#[14,23]

2014_0528_RF suggest

GND

A A

C79 *22P/25V_2

C83 *22P/25V_2

C77 *22P/25V_2

R146 *0_2

R168 *0_2

R142 *0_2

5

PCLK_TPM

CLK_PCI_EC

LPC_CLKRUN_L

GND

4

RAM_ID0
RAM_ID1
RAM_ID2

RAM_ID3
Board ID_0
Board ID_1

ICLK_USB_TERMN_0
ICLK_USB_TERMN_1

USB_OC0#
USB_OC1#

USB_RCOMP

USB_PLL_MON

USB_HSIC_RCOMP

LPC_RCOMP
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
SOC_CLKOUT_0

SOC_CLKRUN#
SOC_SERIRQ

SMB_SOC_DATA
SMB_SOC_CLK
SMB_SOC_ALERTB

C89 12P/50V_4

C88 *12P/50V_4

C341 *12P/50V_4

4

U19F

G2

GPIO_S5_31

M3

GPIO_S5_32

L1

GPIO_S5_33

K2

GPIO_S5_34

K3

GPIO_S5_35

M2

GPIO_S5_36

N3

GPIO_S5_37

P2

GPIO_S5_38

L3

GPIO_S5_39

J3

GPIO_S5_40

P3

GPIO_S5_41

H3

GPIO_S5_42

B12

GPIO_S5_43

M16

USB_DP0

K16

USB_DN0

J14

USB_DP1

G14

USB_DN1

K12

USB_DP2

J12

USB_DN2

K10

USB_DP3

H10

USB_DN3

D10

ICLK_USB_TERMN_D10

F10

ICLK_USB_TERMN

C20

USB_OC_00

B20

USB_OC_11

D6

USB_RCOMPO

C7

USB_RCOMPI

M13

USB_PLL_MON

B4

USB_HSIC0_DATA

B5

USB_HSIC0_STROBE

E2

USB_HSIC1_DATA

D2

USB_HSIC1_STROBE

A7

USB_HSIC_RCOMP

BF18

LPC_RCOMP

BH16

ILB_LPC_AD_00

BJ17

ILB_LPC_AD_11

BJ13

ILB_LPC_AD_22

BG14

ILB_LPC_AD_33

BG17

ILB_LPC_FRAME

BG15

ILB_LPC_CLK_00

BH14

ILB_LPC_CLK_11

BG16

ILB_LPC_CLKRUN

BG13

ILB_LPC_SERIRQ

BG12

PCU_SMB_DATA

BH10

PCU_SMB_CLK

BG11

PCU_SMB_ALERT

*VLV_M_D/BGA

PCLK_TPM

CLK_PCI_EC

LPC_CLKRUN_L

REV = 1.15

+1.8V_S5
+1.8V_S5

+1.8V/+3.3V
+1.8V/+3.3V
+1.8V/+3.3V
+1.8V/+3.3V
+1.8V/+3.3V
+1.8V/+3.3V
+1.8V/+3.3V
+1.8V/+3.3V
+1.8V

+1.8V
+1.8V
+1.8V

?
VLV_M_D

6 OF 13

+1.8V
+1.8V
+1.8V
+1.8V
+1.8V
+1.8V
+1.8V

+1.8V

+1.8V
+1.8V

+1.8V
+1.8V

+1.8V
+1.8V

+1.8V
+1.8V

+1.8V
+1.8V

+1.8V
+1.8V

+1.8V
+1.8V

3

RESERVED_M10

RESERVED_M9
RESERVED_P7

RESERVED_P6

RESERVED_M7

USB3_REXT0

RESERVED_P10
RESERVED_P12

RESERVED_M4
RESERVED_M6

USB3_RXP0
USB3_RXN0

USB3_TXP0
USB3_TXN0

RESERVED_H8
RESERVED_H7

RESERVED_H5
RESERVED_H4

GPIO_S0_SC_55
GPIO_S0_SC_56
GPIO_S0_SC_57
GPIO_S0_SC_58
GPIO_S0_SC_59
GPIO_S0_SC_60
GPIO_S0_SC_61

ILB_8254_SPKR

SIO_I2C0_DATA

SIO_I2C0_CLK

SIO_I2C1_DATA

SIO_I2C1_CLK

SIO_I2C2_DATA

SIO_I2C2_CLK

SIO_I2C3_DATA

SIO_I2C3_CLK

SIO_I2C4_DATA

SIO_I2C4_CLK

SIO_I2C5_DATA

SIO_I2C5_CLK

SIO_I2C6_DATA

SIO_I2C6_CLK

GPIO_S0_SC_092
GPIO_S0_SC_093

3

2

RAM ID

R225 *1K_4
R226 1K_4
R224 1K_4

R517 *1K_4

M10
M9

P7
P6

M7
M12

USB3_P0_REXT

USB3_RXP0
USB3_RXN0

USB3_TXP0
USB3_TXN0

R514 1.24K/F_4

GND

USB3_RXP0 [25]
USB3_RXN0 [25]

USB3_TXP0 [25]
USB3_TXN0 [25]

P10
P12

M4
M6

D4
E3

K6
K7

Micron E die X000

SAMSUNG 2GB1CHX111

Micron Edie X100 AKD5JGSTL06

Micron N die

Micron N die

H8
H7

H5
H4

BD12

TRACKPAD_INT_DX

BC12

GPIO_S0_SC_56

BD14

SOC_UART_TX

BC14

SIM_DET_C

BF14

EC_IN_RW_C

BD16
BC16

SOC_UART_RX SOC_UART_TX SOC_UART_RX

BH12

BH22

I2C_0_SDA_C

BG23

I2C_0_SCL_C

BG24

I2C_1_SDA_C

BH24

I2C_1_SCL_C

BG25
BJ25

BG26
BH26

BF27
BG27

Light sensor(01/27 delete)

BH28
BG28

Touch panel(01/27 delete)

BJ29
BG29

BH30

I2C_NFC_SDA

BG30

I2C_NFC_SCL

?

R227 *1K_4

R223 *1K_4

R134 22/F_4
R129 22/F_4

R118 22/F_4
R117 22/F_4

Board ID_0

Board ID_1

R249 *1K_4

R245 *1K_4

I2C_0_SDA_R [15]
I2C_0_SCL_R [15]

I2C_1_SDA_R [24]
I2C_1_SCL_R [24]

TRACKPAD_INT_DX [26]
GPIO_S0_SC_56 [4]

SOC_UART_TX [18]

EC_IN_RW_C [15]

SOC_UART_RX [18]

2

RAM_ID(3,2,1,0)Vender Channel

Hynix
Elpida

X001
X010

SAMSUNG X011 2CH 4GB

Elpida AKD5JGST410 EDJ4216EFBG-GNL-F

X110
X101

1100

1000

PP1800_PCH_S5

Touch pad

Audio Codec

TOP B/S PN Mfr. PN

AKD5JGETW07

N/A

AKD5PGST508 K4B4G1646Q-HYK0

AKD5JGSTL06

AKD5PGST508 K4B4G1646Q-HYK0

AKD5PGSTL18

AKD5PGSTL18

SIM_DET_C
TRACKPAD_INT_DX

R484
*0_4

Un-Stuff for Test Only

I2C_0_SDA_R
I2C_0_SCL_R

I2C_1_SDA_R
I2C_1_SCL_R

I2C_NFC_SDA
I2C_NFC_SCL

NB5

NB5

NB5
HW

HW

HW

1

R247 1K_4
R248 *1K_4
R246 *1K_4

R520 *1K_4

PP1800_PCH_S5

7

RAM_ID0
RAM_ID1
RAM_ID2

RAM_ID3

Freq. 1600MHz

H5TC4G63AFR-PBA
EDJ4216EFBG-GNL-F

MT41K256M16HA-125:E

2CH
2CH

2CH
1CH
1CHHynix AKD5JGETW07 H5TC4G63AFR-PBA

MT41K256M16HA-125:E

MT41K256M16LY-107:N

MT41K256M16LY-107:N

PP1800_PCH

R485 10K_4
R504 10K_4

PP1800_PCH

R477 4.7K/_2
R488 4.7K/_2

R471 4.7K/_2
R474 4.7K/_2

R95 *4.7K/_2
R96 *4.7K/_2

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Valley 6/9 (USB/LPC/I2C)

Valley 6/9 (USB/LPC/I2C)

Valley 6/9 (USB/LPC/I2C)

Date: Sheet of

Date: Sheet of

Date: Sheet of

1CH 2GB

1CH 2GB

2CH 4GB

1

Size

4GB
4GB

4GB

2GB
2GB

7 40Monday, August 17, 2015

7 40Monday, August 17, 2015

7 40Monday, August 17, 2015

1A

1A

1A

5

4

3

2

1

8

1031 for layout suggestion by
intel, VSS_AXG_SENSE didn't

D D

+VCC_CORE

+VCC_GFX

connect to VSS_SENSE, will
connect the GND via near
VCC_AXG_SENSE

1031 for layout, add 0hm between
GND and VSS_AXG_SENSE

R518

R465

100/F_4

100/F_4

VCC_SENSE

VSS_SENSE

R462
100/F_4

C C

B B

GND

1030 for core power, change
C271,C281,C280,C278,C273 to 10uF

1206 change C271,C273,C280 to
0603 22uF for ACLL issue

0513 for z-height issue, change
C10317,C10318,C10344,C10345 to

0.85mm cap

VSS_AXG_SENSE[33]

PP1350

GND

PP1350

+VCC_CORE

R519 *0_4/S

VCC_SENSE[33]

VCC_AXG_SENSE[33]

VSS_SENSE[33]

C265 1U/6.3V_4
C269 1U/6.3V_4
C267 0.1U/16V_4

C316 22UF/6.3VS_6
C305 22UF/6.3VS_6
C304 22UF/6.3VS_6
C315 10UF/6.3V_4
C366 10U/6.3V_4

C107 22U/6.3V_6
C360 22U/6.3VS_6
C359 22U/6.3VS_6
C361 22U/6.3VS_6
C106 22U/6.3V_6
C108 22U/6.3V_6

C109 22U/6.3V_6
C396 22UF/6.3VS_6
C397 22UF/6.3VS_6
C398 22UF/6.3VS_6 C321

C399 22U/6.3VS_6

C400 22U/6.3VS_6

C401 22U/6.3VS_6
C404 10UF/6.3V_4
C405 10UF/6.3V_4

GND

GND

VCC_SENSE
VCC_AXG_SENSE
VSS_SENSEVCC_AXG_SENSE

U19G

P28

CORE_VCC_SENSE_P28

BB8

UNCORE_VNN_SENSE

N28

CORE_VSS_SENSE_N28

AD38

DRAM_VDD_S4_AD38

AF38

DRAM_VDD_S4_AF38

A48

DRAM_VDD_S4

AK38

DRAM_VDD_S4_AK38

AM38

DRAM_VDD_S4_AM38

AV41

DRAM_VDD_S4_AV41

AV42

DRAM_VDD_S4_AV42

BB46

DRAM_VDD_S4_BB46

AA27

CORE_VCC_S0IX_AA27

AA29

CORE_VCC_S0IX_AA29

AA30

CORE_VCC_S0IX_AA30

AC27

CORE_VCC_S0IX_AC27

AC29

CORE_VCC_S0IX_AC29

AC30

CORE_VCC_S0IX_AC30

AD27

CORE_VCC_S0IX_AD27

AD29

CORE_VCC_S0IX_AD29

AD30

CORE_VCC_S0IX_AD30

AF27

CORE_VCC_S0IX_AF27

AF29

CORE_VCC_S0IX_AF29

AG27

CORE_VCC_S0IX_AG27

AG29

CORE_VCC_S0IX_AG29

AG30

CORE_VCC_S0IX_AG30

P26

CORE_VCC_S0IX_P26

P27

CORE_VCC_S0IX_P27

U27

CORE_VCC_S0IX_U27

U29

CORE_VCC_S0IX_U29

V27

CORE_VCC_S0IX_V27

V29

CORE_VCC_S0IX_V29

V30

CORE_VCC_S0IX_V30

Y27

CORE_VCC_S0IX_Y27

Y29

CORE_VCC_S0IX_Y29

Y30

CORE_VCC_S0IX_Y30

AF30

TP_CORE_V1P05_S4

*VLV_M_D/BGA

REV = 1.15

?
VLV_M_D

7 OF 13

DRAM_VDD_S4_BD49
DRAM_VDD_S4_BD52
DRAM_VDD_S4_BD53
DRAM_VDD_S4_BF44
DRAM_VDD_S4_BG51

DRAM_VDD_S4_BJ48

DRAM_VDD_S4_C51
DRAM_VDD_S4_D44
DRAM_VDD_S4_F49
DRAM_VDD_S4_F52
DRAM_VDD_S4_F53
DRAM_VDD_S4_H46
DRAM_VDD_S4_M41
DRAM_VDD_S4_M42
DRAM_VDD_S4_V38
DRAM_VDD_S4_Y38

UNCORE_VNN_S3_AA24
UNCORE_VNN_S3_AC22
UNCORE_VNN_S3_AC24
UNCORE_VNN_S3_AD22
UNCORE_VNN_S3_AD24
UNCORE_VNN_S3_AF22

UNCORE_VNN_S3_AF24
UNCORE_VNN_S3_AG22
UNCORE_VNN_S3_AG24

UNCORE_VNN_S3_AJ22

UNCORE_VNN_S3_AJ24

UNCORE_VNN_S3_AK22

UNCORE_VNN_S3_AK24

UNCORE_VNN_S3_AK25

UNCORE_VNN_S3_AK27

UNCORE_VNN_S3_AK29

UNCORE_VNN_S3_AK30

UNCORE_VNN_S3_AK32
UNCORE_VNN_S3_AM22

TP2_CORE_VCC_S0IX

1031 remove TP44 and TP35 for GND vias adding

BD49
BD52
BD53
BF44
BG51
BJ48
C51
D44
F49
F52
F53
H46
M41
M42
V38
Y38

AA24
AC22
AC24
AD22
AD24
AF22
AF24
AG22
AG24
AJ22
AJ24
AK22
AK24
AK25
AK27
AK29
AK30
AK32
AM22

AA22

?

PP1350

+VCC_GFX

GND

C318
10UF/6.3V_4

22UF/6.3VS_6

C272

1U/6.3V_4

C377
22UF/6.3VS_6

C376

22UF/6.3VS_6

C268

1U/6.3V_4

C379
22UF/6.3VS_6

C266

1U/6.3V_4

1030 for Gfx power, change C266,C289,C290
to 10uF and add 2 caps 10uF

1206 change C266,C311,C315 to
0603 22uF for ACLL issue

C381
10U/6.3V_6

C310

22UF/6.3VS_6

C262

1U/6.3V_4

C296
10U/6.3V_4

C393
22UF/6.3VS_6

1030 change C60 power netname
for layout

C320
10u/6.3V_4

+VCC_GFX

C270

1U/6.3V_4

C394
22UF/6.3VS_6

C112

22u/6.3V_8

GND

C382
10U/6.3V_6

C395
22UF/6.3VS_6

C261

1U/6.3V_4

C378
22UF/6.3VS_6

A A

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5
HW

HW

5

4

3

2

HW

Valley 7/9 (Power 1)

Valley 7/9 (Power 1)

Valley 7/9 (Power 1)

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

1A

1A

1A

8 40Monday, August 17, 2015

8 40Monday, August 17, 2015

8 40Monday, August 17, 2015

5

C370 1U/6.3V_4

GND

C357 4.7U/6.3V_4

PP1000_PCH
PP1000_PCH_SX

PP1000_PCH_SX

D D

PP1000_PCH_SX

PP1000_PCH

PP1000_PCH
PP1000_PCH_SX

PP1000_PCH

C C

PP1000_PCH_S5

PP1050_PCH

PP1350_PCH_SX

PP1350_PCH

PP1350_PCH

GND

C291 4.7U/6.3V_4
C353 10U/6.3V_4

C290 10U/6.3V_4

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

C285 4.7U/6.3V_4

C297 4.7U/6.3V_4
C282 4.7U/6.3V_4
C289 4.7U/6.3V_4

USB3_V1P0_G3
VIS_V1P0_S0IX_PW

C375 0.01U/50V_4
C338 10u/6.3V_4

C337 1U/6.3V_4
C336 10u/6.3V_4

CORE_V1P05
VIS_V1P0_S0IX_PW

C334 1U/6.3V_4
C293 10U/6.3V_4

C340 10u/6.3V_4
C342 1U/6.3V_4

USB3_V1P0_G3

C364 1U/6.3V_4

C363 1U/6.3V_4

CORE_V1P05
UNCORE_V1P35_S0IX

C292 4.7U/6.3V_4

C284 4.7U/6.3V_4

UNCORE_V1P35_S0IX

C288 4.7U/6.3V_4

C300 4.7U/6.3V_4

C358 10u/6.3V_4

C365 10u/6.3V_4

GND

AD35

AF35
AF36
AA36
AJ36
AK35
AK36

AK19
AK21
AJ18

AM16

AN29
AN30
AF16
AF18

AM21
AN21

AN18
AN19

AA33
AF21

AG21

M14

AN25

AC32

AA25

AG32

BD1

AF19

AG19

AJ19

AG18
AN16

V32
BJ6

Y35
Y36

U22
V22

Y18

G1

V24
Y22
Y24

U18
U19

Y19

Y32
U36

V36

U16

4

U19H

SVID_V1P0_S3_V32
VGA_V1P0_S3_BJ6
DRAM_V1P0_S0IX_AD35
DRAM_V1P0_S0IX_AF35
DRAM_V1P0_S0IX_AF36
DRAM_V1P0_S0IX_AA36
DRAM_V1P0_S0IX_AJ36
DRAM_V1P0_S0IX_AK35
DRAM_V1P0_S0IX_AK36
DRAM_V1P0_S0IX_Y35
DRAM_V1P0_S0IX_Y36
DDI_V1P0_S0IX_AK19
DDI_V1P0_S0IX_AK21
DDI_V1P0_S0IX_AJ18
DDI_V1P0_S0IX_AM16
UNCORE_V1P0_G3_U22
UNCORE_V1P0_G3_V22
VIS_V1P0_S0IX_AN29
VIS_V1P0_S0IX_AN30
UNCORE_V1P0_S3_AF16
UNCORE_V1P0_S3_AF18
UNCORE_V1P0_S3_Y18
UNCORE_V1P0_S3_G1
PCIE_V1P0_S3_AM21
PCIE_V1P0_S3_AN21

PCIE_GBE_SATA_V1P0_S3_AN18
SATA_V1P0_S3_AN19
CORE_V1P05_S3_AA33
UNCORE_V1P0_S0IX_AF21
UNCORE_V1P0_S0IX_AG21
VIS_V1P0_S0IX_V24
VIS_V1P0_S0IX_Y22
VIS_V1P0_S0IX_Y24
USB_V1P0_S3_M14
USB_V1P0_S3_U18
USB_V1P0_S3_U19
GPIO_V1P0_S3_AN25
USB3_V1P0_G3_Y19

C3

USB3_V1P0_G3_C3

C5

UNCORE_V1P0_G3_C5

B6

UNCORE_V1P0_G3_B6
CORE_V1P05_S3_AC32
CORE_V1P05_S3_Y32
UNCORE_V1P35_S0IX_F4_U36
UNCORE_V1P35_S0IX_F5_AA25
UNCORE_V1P35_S0IX_F2_AG32
UNCORE_V1P35_S0IX_F3_V36
VGA_V1P35_S3_F1_BD1
UNCORE_V1P35_S0IX_F6
UNCORE_V1P35_S0IX_F1_AG19
ICLK_V1P35_S3_F1_AJ19

ICLK_V1P35_S3_F2
VSSA_AN16
USB_VSSA_U16

REV = 1.15

*VLV_M_D/BGA

?
VLV_M_D

8 OF 13

DRAM_V1P35_S0IX_F1_AD36

HDA_LPE_V1P5V1P8_S3_AM32

UNCORE_V1P8_S3_AM30

UNCORE_V1P8_S3_AN32

LPC_V1P8V3P3_S3_AM27

UNCORE_V1P8_G3_U24

USB_V3P3_G3_N18
USB_V3P3_G3_P18

UNCORE_V1P8_S3_U38

VGA_V3P3_S3_AN24

PCU_V1P8_G3_V25

3V_S5

PCU_V3P3_G3_N22

SD3_V1P8V3P3_S3_AN27

VSS_AD16

USB_HSIC_V1P24_G3_V18

VSS_AD18

UNCORE_V1P8_G3_AA18

RTC_VCC_P22

USB_V1P8_G3_N20

PMU_V1P8_G3_U25
CORE_V1P05_S3_AF33
CORE_V1P05_S3_AG33
CORE_V1P05_S3_AG35

CORE_V1P05_S3_U33
CORE_V1P05_S3_U35
CORE_V1P05_S3_V33

VSS_A3_A3

VSS_A49_A49

VSS_A5_A5
VSS_A51_A51
VSS_A52_A52

VSS_A6_A6

VSS_B2_B2
VSS_B52_B52
VSS_B53_B53

VSS_BE1_BE1

VSS_BE53_BE53

VSS_BG1_BG1

VSS_BG53_BG53

VSS_BH1_BH1

VSS_BH2_BH2
VSS_BH52_BH52
VSS_BH53_BH53

VSS_BJ2_BJ2
VSS_BJ3_BJ3

VSS_BJ5_BJ5
VSS_BJ49_BJ49
VSS_BJ51_BJ51
VSS_BJ52_BJ52

VSS_C1_C1

VSS_C53_C53

VSS_E1_E1

VSS_E53_E53

RESERVED_F1

PCIE_V1P0_S3_AK18

PCIE_V1P0_S3_AM18

3

AD36
AM32
AM30
AN32
AM27
U24
N18
P18
U38
AN24
V25
N22
AN27
AD16
AD18
V18
AA18
P22
N20
U25
AF33
AG33
AG35
U33
U35
V33
A3
A49
A5
A51
A52
A6
B2
B52
B53
BE1
BE53
BG1
BG53
BH1
BH2
BH52
BH53
BJ2
BJ3
BJ5
BJ49
BJ51
BJ52
C1
C53
E1
E53
F1
AK18
AM18

?

GND

UNCORE_V1P35_S0IX
UNCORE_V1P8_AN32_PWR
LPC_V3P3_PWR

V1P8_S5_PWR
PCU_V3P3_G3_PWR

UNCORE_V1P8_AN32_PWR
LPC_V3P3_PWR
PCU_V1P8_G3_V25
PCU_V3P3_G3_PWR
+VSDIO

VSS_AD18_AD16_PWR
USB_HSIC_V1P24_G3
V1P8_AA18_PEW
RTC_VCC_P22_PWR

V1P8_S5_PWR

CORE_V1P05

C287 4.7U/6.3V_4
C301 4.7U/6.3V_4
C344 4.7U/6.3V_4
C302 4.7U/6.3V_4
C286 4.7U/6.3V_4

C306 1U/6.3V_4

C317 1U/6.3V_4

C299 4.7U/6.3V_4
C295 4.7U/6.3V_4
C298 4.7U/6.3V_4
C294 0.47U/6.3V_4

C352 1U/6.3V_4
C374 1U/6.3V_4

2

GND

GND
PP1800_PCH

PP3300_PCH

PP1800_PCH_S5
PP3300_PCH_S5

PP3300_PCH
GND
PP1800_PCH_S5

+3V_RTC
PP1800_PCH_S5

GND

GND

PP1000_PCH
GND

C354 1U/6.3V_4

PP1000_PCH_S5
GND

1

9

B B

A A

PP1350_PCH

GND

C103
10U/6.3V_4

PP1000_PCH

VIS_V1P0_S0IX_PW

C312
22UF/6.3VS_6

GND

5

C371
1UF/6.3V_2

C278
22UF/6.3VS_6

GND

C324
1UF/6.3V_2

C367
1UF/6.3V_2

C322
22UF/6.3VS_6

C333
1UF/6.3V_2

C373
1UF/6.3V_2

1031 remove C285

USB3_V1P0_G3 LPC_V3P3_PWR

C372

C325

1UF/6.3V_2

1UF/6.3V_2

V1P8_S5_PWR RTC_VCC_P22_PWR

GND

4

C332
1U/6.3V_4

C331
1U/6.3V_4

C328
1U/6.3V_4

GND

C339
1U/6.3V_4

C319
1U/6.3V_4

C362

0.01U/50V_4

C323

0.01U/50V_4

3

GND

C335
*1U/6.3V_4

V1P8_AA18_PEW

VSS_AD18_AD16_PWR

GND

C345
1U/6.3V_4

GND

+VSDIO

C389
*1U/6.3V_4

PCU_V3P3_G3_PWR

C326

1U/6.3V_4

GND

UNCORE_V1P8_AN32_PWR

C309

C277

1U/6.3V_4

1U/6.3V_4

GND

2

1U/6.3V_4C313

GND

C307

C308

1U/6.3V_4

1U/6.3V_4

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5
HW

HW

HW

Valley 8/9 (Power 2)

Valley 8/9 (Power 2)

Valley 8/9 (Power 2)

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

GND

C327
1U/6.3V_4

9 40Monday, August 17, 2015

9 40Monday, August 17, 2015

9 40Monday, August 17, 2015

C349

0.1U/16V_4

1A

1A

1A

5

4

3

2

1

10

D D

?

U19I

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35

*VLV_M_D/BGA

VLV_M_D

9 OF 13

VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70

AC36
AC38
AD19
AD21
AD25
AD32
AD33
AD47
AD7
AE1
AE11
AE12
AE14
AE3
AE4
AE40
AE42
AE43
AE45
AE46
AE48
AE50
AE51
AE53
AE6
AE8
AE9
AF10
AF12
AF25
AF32
AF47
AG16
AG25
AG36

?

AG38
AH41

AH45

AJ16
AJ21
AJ25
AJ27
AJ29

AJ30
AJ32
AJ33
AJ35
AJ38

AJ53
AK10
AK14
AK16
AK33
AK41
AK44
AM12
AM19
AM24
AM25
AM29
AM33
AM35
AM36
AM40

AH4

AH7
AH9

AJ1

AJ3

M28

REV = 1.15

A11
A15
A19
A23
A27
A31
A35
A39
A43
A47

AA1
AA16
AA19
AA21

AA3
AA32
AA35
AA38
AA53
AB10

AB4
AB41
AB45
AB47

C C

AB48
AB50
AB51

AC16
AC18
AC19
AC21
AC25
AC33
AC35

AB6

REV = 1.15

U19J

VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105

*VLV_M_D/BGA

?
VLV_M_D

10 OF 13

VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140

AH47
AH48
AH50
AH51
AH6
AM44
AM51
AM7
AN1
AN11
AN12
AN14
AN22
AN3
AN33
AN35
AN36
AN38
AN40
AN42
AN43
AN45
AN46
AN48
AN49
AN5
AN51
AN53
AN6
AN8
AN9
AP40
AT12
AT16
AT19

?

AT24
AT27
AT30
AT35
AT38

AT47

AT52
AU24
AU30

AU38
AU51
AV12
AV13
AV14
AV18
AV19
AV24
AV27
AV30
AV35
AV38
AV47
AV51

AW13
AW19
AW27

AW3

AW35

AY10
AY22
AY32

AT4

AU1
AU3

AV7

REV = 1.15

U19K

VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175

*VLV_M_D/BGA

?

VLV_M_D

11 OF 13

VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210

?

U19L

AY36
AY4
AY50
AY9
BA14
BA19
BA22
BA27
BA32
BA35
BA40
BA53
BB19
BB27
BB35
BC20
BC22
BC26
BC28
BC32
BC34
BC42
BD19
BD24
BD27
BD30
BD35
BE19
BE2
BE35
BE8
BF12
BF16
BF24
BF38

?

BF30
BF36

BG31
BG34
BG39
BG42
BG45
BG49

BJ11
BJ15
BJ19
BJ23
BJ27
BJ31
BJ35
BJ39
BJ43
BJ47

BF4

BJ7
C14
C31
C34
C39
C42
C45
C49
D12
D16
D24
D30
D36
D38
E19
E35

REV = 1.15

VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245

*VLV_M_D/BGA

VLV_M_D

12 OF 13

VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280

E8
F19
F2
F24
F27
F30
F35
F5
F7
G10
G20
G22
G26
G28
G32
G34
G42
H19
H27
H35
J1
J16
J19
J22
J27
J32
J35
J40
J53
K14
K22
K32
K36
K4
K50

?

K9
L13
L19
L27
L35

M19
M26
M27
M34
M35
M38
M47
M51

N1

N16
N38
N51

P13
P16
P19
P20
P24
P32
P35
P38

P4
P47
P52

P9
T40

U1

U11
U12
U14
U21

U19M

VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS288
VSS289
VSS290
VSS291
VSS292
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315

*VLV_M_D/BGA

REV = 1.15

?
VLV_M_D

13 OF 13

VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346
VSS347
VSS348
VSS349
VSS350

U3
U30
U32
U40
U42
U43
U45
U46
U48
U49
U5
U51
U53
U6
U8
U9
V12
V16
V19
V21
V35
V40
V44
V51
V7
Y10
Y14
Y16
Y21
Y25
Y33
Y41
Y44
Y7
Y9

?

B B

A A

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5
HW

HW

5

4

3

2

HW

Valley 9/9 (GND)

Valley 9/9 (GND)

Valley 9/9 (GND)

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

1A

1A

1A

10 40Monday, August 17, 2015

10 40Monday, August 17, 2015

10 40Monday, August 17, 2015

5

INTEL Debug Port

4

3

2

1

PP1800_PCH_S5 PP1800_XDP_AB
PP1000_PCH_S5

D D

XDP_H_PREQ#

R1751K_2

R1541K_2

XDP_H_PRDY#
XDP_GPIO_DFX1

XDP_GPIO_DFX2
XDP_GPIO_DFX3

XDP_GPIO_DFX4

XDP_GPIO_DFX5
XDP_GPIO_DFX6

XDP_GPIO_DFX7
XDP_GPIO_DFX8

XDP_PMU_PWRBTN#PCH_PWRBTN_L

XDP_COREPW ROKCORE_PWROK_R

XDP_RTEST#XDP_RTEST_L
SMB_XDP_SDASMB_SOC_DATA

SMB_XDP_SCLSMB_SOC_CLK

XDP_H_TCK

XDP_H_PRDY#[6]

XDP_GPIO_DFX1[6]
XDP_GPIO_DFX2[6]

XDP_GPIO_DFX3[6]
XDP_GPIO_DFX4[6]

XDP_GPIO_DFX5[6]
XDP_GPIO_DFX6[6]

XDP_GPIO_DFX7[6]
XDP_GPIO_DFX8[6]

SOC_RSMRST#[6,14]

C347
*0.1U/10V_2

PCH_PWRBTN_L[14,27]
CORE_PWROK_R[6,27]

SMB_SOC_DATA[7]

SMB_SOC_CLK[7]

XDP_H_TCK[6]

PP1800_XDP_AB PP1800_XDP_CD

C C

SOC_RSMRST# XDP_RSMRST#

R148 *0_2/S

R232 *0_2/S
R174 *0_2/S

R182 *0_2/S

C2-test change to short pad

TP3
TP83

TP79
TP77

TP82
TP85

TP86
TP81

TP78
TP73

TP92
TP32

TP33
TP43

TP91
TP89

TP87

TP62

TP72

TP56
TP74

TP64

TP66

TP70

TP57

TP55
TP67

TP1
TP42
TP4

TP80
TP88

TP84
TP2

TP90

XDP_GPIO_S0_NC15
XDP_GPIO_DFX0

XDP_GPIO_S0_NC16

XDP_GPIO_S0_NC17

XDP_GPIO_S0_NC18
XDP_GPIO_S0_NC19

XDP_GPIO_S0_NC20
XDP_GPIO_S0_NC21

XDP_GPIO_S0_NC22
XDP_GPIO_S0_NC23

XDP_PMU_PLTRST# SOC_PLTRST#
XDP_PMU_RSTBTN#

XDP_H_TDO
XDP_H_TRST#
XDP_H_TDI
XDP_H_TMS
XDP_PRESENT_N

PP1800_PCH PP1800_XDP_CD

XDP_GPIO_S0_NC15 [4]

XDP_GPIO_DFX0 [6]

XDP_GPIO_S0_NC16 [4]
XDP_GPIO_S0_NC17 [4]

XDP_GPIO_S0_NC18 [4]
XDP_GPIO_S0_NC19 [4]

XDP_GPIO_S0_NC20 [4]
XDP_GPIO_S0_NC21 [4]

XDP_GPIO_S0_NC22 [4]
XDP_GPIO_S0_NC23 [4]

R2441K_2

R33 *0_2/S

R17 *0_2/S

C2-test change to short pad

PP3300_PCH_S5

R190
*100K_4

C-test un-stuff

B B

XDP_RTEST_L

2

2

3

*2N7002K
Q30

1

APS(01/27 delete)

XDP_H_PREQ#_C[6]

A A

XDP_H_PREQ#_C

*74AUP1G34GW

5

3

*2N7002K
Q25

1

4

U11

R35 *0R_2

SOC_RTEST# [6]

PP1800_PCH_S5

2
1

3 5

C26
*0.1U/10V_2

XDP_H_PREQ#

C27
*0.1U/10V_2

4

3

R502 *0_4
R503 *0_4

SOC_REST_BTN#

2

R16 *0_4/S

C-test un-stuff

C2-test change to short pad

SOC_PLTRST# [6,14]

SOC_REST_BTN# [6,18]

XDP_H_TDO [6]
XDP_H_TRST# [6]
XDP_H_TDI [6]
XDP_H_TMS [6]

GND

PLACE C6601 closed to XDP HOOK PIN 54

GND

PLACE C6866 closed to XDP HOOK PIN48

C16
*0.1U/10V_2

XDP_RTEST#

C1190.1U/10V_2

PLACE R6572 WITHIN 0.25" FROM XDP PIN

XDP_H_TDO

XDP_H_TMS
XDP_H_TDI

XDP_H_TCK

XDP_H_TRST#
XDP_PMU_PWRBTN#

PLACE R6866 closed to XDP

PLACE R6572 WITHIN 1.1" OF BUFFER PIN

XDP_H_PREQ#

XDP_PMU_RSTBTN#

C310.1U/10V_2

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

NB5

NB5

NB5
HW

HW

HW

Custom
Date: Sheet of

Date: Sheet of

Date: Sheet of

PP3300_PCH_S5

R2581K_2

PP1800_XDP_AB

R479 51/F_4

R480 51/F_4
R487 51/F_4

R486 51/F_4

R506 51/F_4
R161 *30K/F_4

GND

PP1800_PCH_S5

R23 200/F_4

PP1800_PCH

R34*1K_2

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

CPU/PCH XDP

CPU/PCH XDP

CPU/PCH XDP

1

11 40Monday, August 17, 2015

11 40Monday, August 17, 2015

11 40Monday, August 17, 2015

1A

1A

1A

11

1

2

3

4

5

6

7

8

12

DDR3 CHA Memory Down

U20

M_A_BS0
M_A_BS1
M_A_BS2

M_A_CLKP0
M_A_CLKN0
M_A_CKE0

M_A_ODT0
M_A_CS#0
M_A_RAS#
M_A_CAS#
M_A_WE#

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

100-BALL
SDRAM DDR3

RAM _DDR3L

Hynix AKD5JGETW00--H5TC4G63AFR-PBA

+SMDDR_VREF_DIMM

A A

B B

C C

D D

M_A_A[15:0][ 2]

M_A_BS[2:0][2]

2/3 Modify

M_A_DRAMRST#[2]

M_A_ZQ1

R490
240/F_4

1 2

M_A_CLKP0[ 2]
M_A_CLKN0[2]
M_A_CKE0[2]

M_A_ODT0[2]

M_A_DQSP2[2]

M_A_DQSP1[2]

M_A_DM2[2]
M_A_DM1[2]

M_A_DQSN2[2]
M_A_DQSN1[2]

+SMDDR_VREF_DQ0

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_CS#0[2]
M_A_RAS#[2]
M_A_CAS#[2]
M_A_WE#[2]

M_A_DQSP2
M_A_DQSP1

M_A_DM2
M_A_DM1

M_A_DQSN2
M_A_DQSN1

M_A_DRAMRST#

BYTE2_16-23
BYTE1_8-15

E3

M_A_DQ18

DQL0

F7

M_A_DQ16

DQL1

F2

M_A_DQ19

DQL2

F8

M_A_DQ17

DQL3

H3

M_A_DQ22

DQL4

H8

M_A_DQ21

DQL5

G2

M_A_DQ23

DQL6

H7

M_A_DQ20

DQL7

D7

M_A_DQ13

DQU0

C3

M_A_DQ11

DQU1

C8

M_A_DQ9

DQU2

C2

M_A_DQ10

DQU3

A7

M_A_DQ12

DQU4

A2

M_A_DQ15

DQU5

B8

M_A_DQ8

DQU6

A3

M_A_DQ14

DQU7

B2

VDD#B2

D9

VDD#D9

G7

VDD#G7

K2

VDD#K2

K8

VDD#K8

N1

VDD#N1

N9

VDD#N9

R1

VDD#R1

R9

VDD#R9

A1

VDDQ#A1

A8

VDDQ#A8

C1

VDDQ#C1

C9

VDDQ#C9

D2

VDDQ#D2

E9

VDDQ#E9

F1

VDDQ#F1

H2

VDDQ#H2

H9

VDDQ#H9

A9

VSS#A9

B3

VSS#B3

E1

VSS#E1

G8

VSS#G8

J2

VSS#J2

J8

VSS#J8

M1

VSS#M1

M9

VSS#M9

P1

VSS#P1

P9

VSS#P9

T1

VSS#T1

T9

VSS#T9

B1

VSSQ#B1

B9

VSSQ#B9

D1

VSSQ#D1

D8

VSSQ#D8

E2

VSSQ#E2

E8

VSSQ#E8

F9

VSSQ#F9

G1

VSSQ#G1

G9

VSSQ#G9

M_A_CLKP0

R391 80.6/F_4

M_A_CLKN0

R390 80.6/F_4

M_A_CLKP0

placement follow Design guide

2/2 SWAP DATA follow ZHR

U17

M8

VREFCA

H1

VREFDQ

N3

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_BS0
M_A_BS1
M_A_BS2

M_A_CLKP0
M_A_CLKN0
M_A_CKE0 M_A_CKE0 M_A_CKE0

M_A_ODT0
M_A_CS#0 M_A_CS#0 M_A_CS#0
M_A_RAS#
M_A_CAS#
M_A_WE#

2/4 0402 Type

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS0
M_A_BS1
M_A_BS2
M_A_CS#0
M_A_CKE0
M_A_CAS#
M_A_RAS#
M_A_WE#
M_A_ODT0

P7
P3
N2
P8
P2
R8
R2

T8

R3

L7
R7
N7

T3

T7
M7

M2
N8
M3

J7
K7
K9

K1

L2

J3
K3

L3

F3
C7

E7
D3

G3
B7

T2

L8

J1

L1

J9

L9

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

BA0
BA1
BA2

CK
CK
CKE

ODT
CS
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET
ZQ

NC#J1
NC#L1
NC#J9
NC#L9

100-BALL
SDRAM DDR3

RAM _DDR3L

R433 80.6/F_4
R423 80.6/F_4
R427 80.6/F_4
R436 80.6/F_4
R409 80.6/F_4
R407 80.6/F_4
R395 80.6/F_4
R410 80.6/F_4
R396 80.6/F_4
R419 80.6/F_4
R413 80.6/F_4
R414 80.6/F_4
R430 80.6/F_4
R402 80.6/F_4
R397 80.6/F_4
R420 80.6/F_4
R428 80.6/F_4

R434 80.6/F_4
R425 80.6/F_4
R438 80.6/F_4
R435 80.6/F_4
R432 80.6/F_4
R421 80.6/F_4
R429 80.6/F_4

M_A_ZQ2

R456
240/F_4

+DDR_VTT_RUN

+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0

M_A_DQSP0
M_A_DQSP3 M_A_DQSP7

M_A_DM0

M_A_DQSN0
M_A_DQSN3

M_A_DRAMRST#

C190

0.1U/16V_4

M_A_CLKN0

M_A_DQ18 [2]
M_A_DQ16 [2]
M_A_DQ19 [2]
M_A_DQ17 [2]
M_A_DQ22 [2]
M_A_DQ21 [2]
M_A_DQ23 [2]
M_A_DQ20 [2]

M_A_DQ13 [2]
M_A_DQ11 [2]
M_A_DQ9 [2]
M_A_DQ10 [2]
M_A_DQ12 [2]
M_A_DQ15 [2]
M_A_DQ8 [2]
M_A_DQ14 [2]

PP1350

M_A_DQSP0[2]
M_A_DQSP3[2]

M_A_DM0[2]
M_A_DM3[2] M_A_DM7[2]

M_A_DQSN0[2]
M_A_DQSN3[2] M_A_DQSN7[2]

2/3 Modify 2/3 Modify2/3 Modify

1 2

1 2
1 2

C205 0.2P_4

BYTE0_0-7
BYTE3_24-31

E3

M_A_DQ3
M_A_DQ5
M_A_DQ2
M_A_DQ4
M_A_DQ7
M_A_DQ0
M_A_DQ6
M_A_DQ1

M_A_DQ29
M_A_DQ27
M_A_DQ28
M_A_DQ26
M_A_DQ25
M_A_DQ30
M_A_DQ24
M_A_DQ31

M_A_DQ3 [2]
M_A_DQ5 [2]
M_A_DQ2 [2]
M_A_DQ4 [2]
M_A_DQ7 [2]
M_A_DQ0 [2]
M_A_DQ6 [2]
M_A_DQ1 [2]

M_A_DQ29 [2]
M_A_DQ27 [2]
M_A_DQ28 [2]

M_A_DQ26 [2]
M_A_DQ25 [2]
M_A_DQ30 [2]
M_A_DQ24 [2]
M_A_DQ31 [2]

PP1350

+DDR_VTT_RUN

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

B2

VDD#B2

D9

VDD#D9

G7

VDD#G7

K2

VDD#K2

K8

VDD#K8

N1

VDD#N1

N9

VDD#N9

R1

VDD#R1

R9

VDD#R9

A1

VDDQ#A1

A8

VDDQ#A8

C1

VDDQ#C1

C9

VDDQ#C9

D2

VDDQ#D2

E9

VDDQ#E9

F1

VDDQ#F1

H2

VDDQ#H2

H9

VDDQ#H9

A9

VSS#A9

B3

VSS#B3

E1

VSS#E1

G8

VSS#G8

J2

VSS#J2

J8

VSS#J8

M1

VSS#M1

M9

VSS#M9

P1

VSS#P1

P9

VSS#P9

T1

VSS#T1

T9

VSS#T9

B1

VSSQ#B1

B9

VSSQ#B9

D1

VSSQ#D1

D8

VSSQ#D8

E2

VSSQ#E2

E8

VSSQ#E8

F9

VSSQ#F9

G1

VSSQ#G1

G9

VSSQ#G9

+DDR_VTT_RUN

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

PP1350

R351

C181

0.047U/25V_4

4.7K/F_4

+SMDDR_VREF_DIMM

R366

4.7K/F_4

2/4 0402 Type 2/4 0402 Type

M_A_DQSP5[2]
M_A_DQSP4[2]

M_A_DM5[2]
M_A_DM4[2]

M_A_DQSN5[2]
M_A_DQSN4[2]

1 2

C197 1U/6.3V_ 4
C212 1U/6.3V_ 4R422 80.6/F_4
C233 1U/6.3V_ 4
C231 1U/6.3V_ 4
C240 1U/6.3V_ 4
C196 1U/6.3V_ 4
C248 1U/6.3V_ 4
C232 1U/6.3V_ 4
C10 10U/6.3V_6

PP1350

R346

4.7K/F_4

+SMDDR_VREF_DQ0

R357

4.7K/F_4

M_A_ZQ3

R372
240/F_4

C186

0.047U/25V_4

+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_BS0
M_A_BS1
M_A_BS2

M_A_CLKP0
M_A_CLKN0

M_A_ODT0
M_A_RAS#

M_A_CAS#
M_A_WE#

M_A_DQSP5
M_A_DQSP4

M_A_DM5
M_A_DM4

M_A_DQSN5
M_A_DQSN4

M_A_DRAMRST#

PP1350

PP1350

U4

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

100-BALL
SDRAM DDR3

RAM _DDR3L

C259 1U/6.3V_ 4
C256 1U/6.3V_ 4
C275 1U/6.3V_ 4
C274 1U/6.3V_ 4
C279 1U/6.3V_ 4

C8 10U/6.3V_6
C3 10U/6.3V_6
C76 10U/6.3V_6
C71 10U/6.3V_6
C4 10U/6.3V_6
C54 10U/6.3V_6

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

B2

VDD#B2

D9

VDD#D9

G7

VDD#G7

K2

VDD#K2

K8

VDD#K8

N1

VDD#N1

N9

VDD#N9

R1

VDD#R1

R9

VDD#R9

A1

VDDQ#A1

A8

VDDQ#A8

C1

VDDQ#C1

C9

VDDQ#C9

D2

VDDQ#D2

E9

VDDQ#E9

F1

VDDQ#F1

H2

VDDQ#H2

H9

VDDQ#H9

A9

VSS#A9

B3

VSS#B3

E1

VSS#E1

G8

VSS#G8

J2

VSS#J2

J8

VSS#J8

M1

VSS#M1

M9

VSS#M9

P1

VSS#P1

P9

VSS#P9

T1

VSS#T1

T9

VSS#T9

B1

VSSQ#B1

B9

VSSQ#B9

D1

VSSQ#D1

D8

VSSQ#D8

E2

VSSQ#E2

E8

VSSQ#E8

F9

VSSQ#F9

G1

VSSQ#G1

G9

VSSQ#G9

PP1350 PP1350 PP1350

BYTE5_40-47
BYTE4_32-39

M_A_DQ42

M_A_DQ42 [2]

M_A_DQ41

M_A_DQ41 [2]

M_A_DQ46

M_A_DQ46 [2]

M_A_DQ44

M_A_DQ44 [2]

M_A_DQ43

M_A_DQ43 [2]

M_A_DQ45

M_A_DQ45 [2]

M_A_DQ47

M_A_DQ47 [2]

M_A_DQ40

M_A_DQ40 [2]

M_A_DQ33

M_A_DQ33 [2]

M_A_DQ38

M_A_DQ38 [2]

M_A_DQ32

M_A_DQ32 [2]

M_A_DQ35

M_A_DQ35 [2]

M_A_DQ36

M_A_DQ36 [2]

M_A_DQ34

M_A_DQ34 [2]

M_A_DQ37

M_A_DQ37 [2]

M_A_DQ39

M_A_DQ39 [2]

PP1350

C314 1U/6.3V_ 4
C311 1U/6.3V_ 4
C346 1U/6.3V_ 4
C351 1U/6.3V_ 4
C350 1U/6.3V_ 4

C255 0.047U/25V_4
C210 0.047U/25V_4
C303 0 .047U/25V_4
C200 0 .047U/25V_4

12
12
12
12

M_A_DQSP6[2]
M_A_DQSP7[2]

M_A_DM6[2]

M_A_DQSN6[2]

M_A_ZQ4

R392
240/F_4

1 2

C238 1U/6.3V_ 4
C218 1U/6.3V_ 4
C223 1U/6.3V_ 4
C214 1U/6.3V_ 4
C203 1U/6.3V_ 4

+SMDDR_VREF_DIMM+SMDDR_VREF_DQ0

+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_BS0
M_A_BS1
M_A_BS2

M_A_CLKP0
M_A_CLKN0

M_A_ODT0
M_A_RAS#

M_A_CAS#
M_A_WE#

M_A_DQSP6

M_A_DM6
M_A_DM7M_A_DM3

M_A_DQSN6
M_A_DQSN7

M_A_DRAMRST#

C199 0.047U/25V_4
C343 0.047U/25V_4
C194 0 .047U/25V_4
C281 0 .047U/25V_4

U5

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

RAM _DDR3L

C228 1U/6.3V_ 4
C219 1U/6.3V_ 4
C236 1U/6.3V_ 4
C224 1U/6.3V_ 4
C213 1U/6.3V_ 4

12
12
12
12

100-BALL
SDRAM DDR3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

VSS#A9
VSS#B3
VSS#E1

VSS#G8

VSS#J2

VSS#J8
VSS#M1
VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

BYTE6_48-55
BYTE7_56-63

E3

M_A_DQ55

F7

M_A_DQ53

F2

M_A_DQ54

F8

M_A_DQ52

H3

M_A_DQ50

H8

M_A_DQ48

G2

M_A_DQ51

H7

M_A_DQ49

D7

M_A_DQ56

C3

M_A_DQ59

C8

M_A_DQ57

C2

M_A_DQ63

A7

M_A_DQ61

A2

M_A_DQ62

B8

M_A_DQ60

A3

M_A_DQ58

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

PP1350

M_A_DQ55 [2]
M_A_DQ53 [2]
M_A_DQ54 [2]
M_A_DQ52 [2]
M_A_DQ50 [2]
M_A_DQ48 [2]
M_A_DQ51 [2]
M_A_DQ49 [2]

M_A_DQ56 [2]
M_A_DQ59 [2]
M_A_DQ57 [2]
M_A_DQ63 [2]
M_A_DQ61 [2]
M_A_DQ62 [2]
M_A_DQ60 [2]
M_A_DQ58 [2]

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5
HW

HW

1

2

3

4

5

6

7

HW

DDR3L MEMORY DOWNx16 A

DDR3L MEMORY DOWNx16 A

DDR3L MEMORY DOWNx16 A

Date: Sheet of

Date: Sheet of

Date: Sheet of

8

1A

1A

1A

12 40Monday, August 17, 2015

12 40Monday, August 17, 2015

12 40Monday, August 17, 2015

5

4

3

2

1

13

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

VSS#A9
VSS#B3
VSS#E1

VSS#G8

VSS#J2

VSS#J8
VSS#M1
VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8

VSSQ#F9
VSSQ#G1
VSSQ#G9

BYTE2_16-23
BYTE3_24-31

E3

M_B_DQ16

F7

M_B_DQ18

F2

M_B_DQ17

F8

M_B_DQ19

H3

M_B_DQ20

H8

M_B_DQ22

G2

M_B_DQ21

H7

M_B_DQ23

D7

M_B_DQ30

C3

M_B_DQ25

C8

M_B_DQ31

C2

M_B_DQ29

A7

M_B_DQ26

A2

M_B_DQ28

B8

M_B_DQ27

A3

M_B_DQ24

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

2/4 Modify

M_B_DQ16 [3]
M_B_DQ18 [3]
M_B_DQ17 [3]
M_B_DQ19 [3]
M_B_DQ20 [3]
M_B_DQ22 [3]
M_B_DQ21 [3]
M_B_DQ23 [3]

M_B_DQ30 [3]
M_B_DQ25 [3]
M_B_DQ31 [3]
M_B_DQ29 [3]
M_B_DQ26 [3]
M_B_DQ28 [3]
M_B_DQ27 [3]
M_B_DQ24 [3]

PP1350 PP1350 PP1350 PP1350

M_B_DQSP0[3]
M_B_DQSP1[3]

M_B_DM0[3]
M_B_DM1[3]

M_B_DQSN0[3]
M_B_DQSN1[3]

+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ1

M_B_BS0
M_B_BS1
M_B_BS2 M_B_BS2

M_B_CLKP0
M_B_CLKN0
M_B_CKE0M_B_CKE0 M_B_CKE0

M_B_ODT0
M_B_RAS#

M_B_CAS#
M_B_WE# M_B_WE#M_B_WE#

M_B_DQSP0
M_B_DQSP1

M_B_DM0
M_B_DM1

M_B_DQSN0
M_B_DQSN1

M_B_DRAMRST#

M_B_ZQ2

R452
240/F_4

1 2

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

U16

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

CHB@RAM _DDR3L

100-BALL
SDRAM DDR3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

VSS#A9
VSS#B3
VSS#E1

VSS#G8

VSS#J2

VSS#J8
VSS#M1
VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8

VSSQ#F9
VSSQ#G1
VSSQ#G9

BYTE0_0-7
BYTE1_8-15

E3

M_B_DQ0

F7

M_B_DQ3

F2

M_B_DQ5

F8

M_B_DQ6

H3

M_B_DQ1

H8

M_B_DQ7

G2

M_B_DQ4

H7

M_B_DQ2

D7

M_B_DQ15

C3

M_B_DQ13

C8

M_B_DQ14

C2

M_B_DQ9

A7

M_B_DQ10

A2

M_B_DQ8

B8

M_B_DQ11

A3

M_B_DQ12

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+DDR_VTT_RUN

2/4 Modify

M_B_DQ0 [3]
M_B_DQ3 [3]
M_B_DQ5 [3]
M_B_DQ6 [3]
M_B_DQ1 [3]
M_B_DQ7 [3]
M_B_DQ4 [3]
M_B_DQ2 [3]

M_B_DQ15 [3]
M_B_DQ13 [3]
M_B_DQ14 [3]
M_B_DQ9 [3]
M_B_DQ10 [3]
M_B_DQ8 [3]
M_B_DQ11 [3]
M_B_DQ12 [3]

BYTE6_48-55

VDD#B2
VDD#D9

VDD#G7

VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

VSS#A9
VSS#B3
VSS#E1
VSS#G8

VSS#J2

VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9

VSS#T1

VSS#T9

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

BYTE4_32-39

E3

M_B_DQ52

F7

M_B_DQ55

F2

M_B_DQ53

F8

M_B_DQ50

H3

M_B_DQ48

H8

M_B_DQ51

G2

M_B_DQ49

H7

M_B_DQ54

D7

M_B_DQ35

C3

M_B_DQ37

C8

M_B_DQ34

C2

M_B_DQ32

A7

M_B_DQ39

A2

M_B_DQ33

B8

M_B_DQ38

A3

M_B_DQ36

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

2/4 Modify

M_B_DQ52 [3]
M_B_DQ55 [3]
M_B_DQ53 [3]
M_B_DQ50 [3]
M_B_DQ48 [3]
M_B_DQ51 [3]
M_B_DQ49 [3]
M_B_DQ54 [3]

M_B_DQ35 [3]
M_B_DQ37 [3]
M_B_DQ34 [3]
M_B_DQ32 [3]
M_B_DQ39 [3]
M_B_DQ33 [3]
M_B_DQ38 [3]
M_B_DQ36 [3]

M_B_DQSP5[3]
M_B_DQSP7[3]

M_B_DM5[3]
M_B_DM7[3]

M_B_DQSN5[3]
M_B_DQSN7[3]

1 2

M_B_ZQ4

R371
240/F_4

+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ1

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_BS0
M_B_BS1

M_B_CLKP0
M_B_CLKN0

M_B_ODT0M_B_ODT0
M_B_CS#0M_B_CS#0 M_B_CS#0
M_B_RAS#
M_B_CAS#

M_B_DQSP5
M_B_DQSP7

M_B_DM5
M_B_DM7

M_B_DQSN5
M_B_DQSN7

M_B_DRAMRST#

U6

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

100-BALL
SDRAM DDR3

CHB@RAM _DDR3L

VDD#B2
VDD#D9
VDD#G7

VDD#K2

VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

VSS#A9

VSS#B3

VSS#E1

VSS#G8

VSS#J2

VSS#J8

VSS#M1
VSS#M9
VSS#P1
VSS#P9

VSS#T1

VSS#T9

VSSQ#B1

VSSQ#B9
VSSQ#D1
VSSQ#D8

VSSQ#E2

VSSQ#E8

VSSQ#F9
VSSQ#G1
VSSQ#G9

U7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_BS0
M_B_BS1
M_B_BS2

M_B_CLKN0
M_B_CKE0

M_B_CS#0
M_B_RAS#
M_B_CAS#

M_B_DQSP6
M_B_DQSP4

M_B_DM6
M_B_DM4

M_B_DQSN6
M_B_DQSN4

M_B_DRAMRST#

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

CHB@RAM _DDR3L

100-BALL
SDRAM DDR3

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

VSSQ#B1

VSSQ#B9
VSSQ#D1
VSSQ#D8

VSSQ#E2

VSSQ#E8

VSSQ#F9
VSSQ#G1
VSSQ#G9

+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ1

M_B_DQSP6[3]M_B_DQSP2[3]

M_B_DQSP4[3]

M_B_DM6[3]
M_B_DM4[3]

M_B_DQSN6[3]
M_B_DQSN4[3]

M_B_ZQ3

R385
240/F_4

1 2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

BYTE5_40-47
BYTE7_56-63

M_B_DQ40
M_B_DQ46
M_B_DQ45
M_B_DQ42
M_B_DQ41
M_B_DQ43
M_B_DQ44
M_B_DQ47

M_B_DQ63
M_B_DQ61
M_B_DQ62
M_B_DQ56
M_B_DQ58
M_B_DQ57
M_B_DQ59
M_B_DQ60

M_B_DQ40 [3]
M_B_DQ46 [3]
M_B_DQ45 [3]
M_B_DQ42 [3]
M_B_DQ41 [3]
M_B_DQ43 [3]
M_B_DQ44 [3]
M_B_DQ47 [3]

M_B_DQ63 [3]
M_B_DQ61 [3]
M_B_DQ62 [3]
M_B_DQ56 [3]
M_B_DQ58 [3]
M_B_DQ57 [3]
M_B_DQ59 [3]
M_B_DQ60 [3]

2/4 Modify

<DDR>

+SMDDR_VREF_DIMM

+SMDDR_VREF_DIMM

D D

C C

M_B_A[15:0][ 3]

M_B_BS[2:0][3]

M_B_CLKP0[ 3]
M_B_CLKN0[3]

M_B_CKE0[3]

M_B_ODT0[3]
M_B_CS#0[3]
M_B_RAS#[3]
M_B_CAS#[3]
M_B_WE#[3]

M_B_DQSP3[3]

M_B_DM2[3]
M_B_DM3[3]

M_B_DQSN2[3]
M_B_DQSN3[3]

M_B_DRAMRST#[3]

M_B_ZQ1

R431
240/F_4

1 2

+SMDDR_VREF_DQ1

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_BS0
M_B_BS1
M_B_BS2

M_B_CLKP0 M_B_CLKP 0
M_B_CLKN0

M_B_ODT0
M_B_RAS#

M_B_CAS#
M_B_WE#

M_B_DQSP2
M_B_DQSP3

M_B_DM2
M_B_DM3

M_B_DQSN2
M_B_DQSN3

M_B_DRAMRST#

U9

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

100-BALL
SDRAM DDR3

CHB@RAM _DDR3L

M_B_A0
M_B_A1
M_B_A2
M_B_A3

B B

+DDR_VTT_RUN

C180

M_B_CLKP0
M_B_CLKN0

M_B_CLKP0

placement follow Design guide

A A

5

1 2

R352 80.6/F_4

1 2

R353 80.6/F_4

C185 0.2P_4

4

0.1U/10V_2

M_B_CLKN0

M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_BS0
M_B_BS1
M_B_BS2
M_B_CS#0
M_B_CKE0
M_B_CAS#
M_B_RAS#
M_B_WE#
M_B_ODT0

1 2

R382 80.6/F_4

1 2

R374 80.6/F_4

1 2

R349 80.6/F_4

1 2

R394 80.6/F_4

1 2

R337 80.6/F_4

1 2

R369 80.6/F_4

1 2

R340 80.6/F_4

1 2

R355 80.6/F_4

1 2

R339 80.6/F_4

1 2

R338 80.6/F_4

1 2

R368 80.6/F_4

1 2

R375 80.6/F_4

1 2

R373 80.6/F_4

1 2

R347 80.6/F_4

1 2

R362 80.6/F_4

1 2

R370 80.6/F_4

1 2

R393 80.6/F_4

1 2

R389 80.6/F_4

1 2

R403 80.6/F_4

1 2

R399 80.6/F_4

1 2

R412 80.6/F_4

1 2

R411 80.6/F_4

1 2

R424 80.6/F_4

1 2

R400 80.6/F_4

1 2

R398 80.6/F_4

+DDR_VTT_RUN

C178 1U/6.3V_ 4
C191 1U/6.3V_ 4
C216 1U/6.3V_ 4
C192 1U/6.3V_ 4
C221 1U/6.3V_ 4
C211 1U/6.3V_ 4 C225 1U/6.3V_ 4
C179 1U/6.3V_ 4
C220 1U/6.3V_ 4
C6 10U/6.3V_6

PP1350

R440

4.7K/F_2

+SMDDR_VREF_DQ1

C246

R439

0.047U/25V_2

4.7K/F_2

3

PP1350

PP1350

C222 1U/6.3V_ 4
C229 1U/6.3V_ 4
C204 1U/6.3V_ 4
C215 1U/6.3V_ 4
C235 1U/6.3V_ 4

C14 10U/6.3V_6
C13 10U/6.3V_6
C34 10U/6.3V_6
C2 10U/6.3V_6
C1 10U/6.3V_6
C7 10U/6.3V_6

PP1350 PP1350

C226 1U/6.3V_ 4
C206 1U/6.3V_ 4
C239 1U/6.3V_ 4

C237 1U/6.3V_ 4

12

C252 0.047U/25V_4

12

C276 0.047U/25V_4

12

C201 0 .047U/25V_4

12

C208 0 .047U/25V_4

2

C247 1U/6.3V_ 4
C243 1U/6.3V_ 4
C254 1U/6.3V_ 4
C258 1U/6.3V_ 4
C249 1U/6.3V_ 4

+SMDDR_VREF_DIMM+SMDDR_VREF_DQ1

PP1350

C283 1U/6.3V_ 4
C271 1U/6.3V_ 4
C264 1U/6.3V_ 4
C273 1U/6.3V_ 4
C280 1U/6.3V_ 4

12

C198 0.047U/25V_4

12

C187 0.047U/25V_4

12

C257 0 .047U/25V_4

12

C242 0 .047U/25V_4

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5
HW

HW

HW

DDR3L MEMORY DOWNx16 B

DDR3L MEMORY DOWNx16 B

DDR3L MEMORY DOWNx16 B

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

1A

1A

1A

13 40Monday, August 17, 2015

13 40Monday, August 17, 2015

13 40Monday, August 17, 2015

5

PWRON SEQUENCE

9/6 EC table says SERIRQ is OD pin, reserve for debugging
1128 remove R166, because SERIQR of TPM needs 3V
1128 reserve 0 ohm R387/R391 on VCCA and VCCB for debugging

D D

R215 *0_2

4

PWRON SEQUENCE

PP1800_PCH_S5

SOC_PWRBTN#[6] PCH_PWRBTN_L [11,27]

R139 10K_2

SOC_PWRBTN#

PMC_SUSPWRDNACK

3

PP1800_PCH_S5

Q19A PJT138K

PP1800_PCH_S5

2

Q19B

1022 un-stuff R182 for S5
leakage issue

5

61

PJT138K

34

R132 *10K_2

R144 *30K/F_4

PP3300_EC

2

PP3300_PCH_S5

0220 remove SPI_SIO Interface,
Q35,Q36,Q37,Q44,R486,R484,R485,

PCH_SUSPWRDNACK [27]PMC_SUSPWRDNACK[6]

R483,R426,R429,R427,R428

1

14

PP3300_PCH_S5PP1800_PCH_S5

U24

VCCA1VCCB

SOC_SERIRQ[7]

C C

PMC_SUS_STAT#[6]

USB OC

B B

SOC_SERIRQ

PP1800_PCH
SOC_KBC_SCI[5]
SOC_KBC_SMI[6]

PP1800_PCH_S5

USB_OC1#[7,23]

3

A

2

GND

GND

PMC_SUS_STAT# PCH_SUS_STAT_L

*G2129TL1U

R202 10K_2

R203 10K_2

USB_OC1#

6

4

IRQ_SERIRQ

B

5

SWITCH_EN

OE

R201 *0_4/S

U25

6

A1

Y1

5

GND

VCC

4

A23Y2

*74LVC2G07GW

R216 *0_4/S

PP1800_PCH_S5

2

1

Q31 *PJA138K

3

5

34

Q21A PJT138K

PP1800_PCH_S5

2

61

Q21B PJT138K

R208 *10K_2

1
2

GNDPP3300_EC

R209 *10K_2

R135 10K_2

R167 10K_2

IRQ_SERIRQ [22,27]

PP1800_PCH_S5

EC_SCI_L [27]
EC_SMI_L [27]

PP3300_EC
PCH_SUS_STAT_L [27]

PP3300_EC
USB_OC0_L [27]

PP3300_EC
USB_OC1_L [27]

SOC_RSMRST#[6,11]

SLP_S3#[6]

SOC_PLTRST#[6,11]USB_OC0#[7,23,25]

SOC_RSMRST#

R149

100K_2

SLP_S3#

SLP_S4#

SLP_S0IX#

SOC_PLTRST#USB_OC0#

R150 *0_4/S

GND

Q15A PJT138K

34

5

2

61

Q15B PJT138K

PP1800_PCH_S5

Q28A PJT138K

PP1800_PCH_S5PP1800_PCH_S5

Q28B

R97 *10K_2
R84 *10K_2

5

34

2

61

PJT138K

PCH_SLP_S3_L

PCH_SLP_S4_L

R205 *10K_2

R243 10K_2

R242
*100K_2

PCH_RSMRST_L [27]

PCH_SLP_S3_L [27]

PP3300_ECPP1800_PCH_S5

PCH_SLP_S4_L [27]SLP_S4#[2,6]

PP3300_EC
PCH_SLP_SX_L [27]SLP_S0IX#[6]

PP3300_PCH

PLTRST# [20,22,27]

Stuffing for notifying EC

A A

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5
HW

HW

HW

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Level Shfiter (SOC_EC)

Level Shfiter (SOC_EC)

Level Shfiter (SOC_EC)

1

1A

1A

1A

14 40Monday, August 17, 2015

14 40Monday, August 17, 2015

14 40Monday, August 17, 2015

5

D D

C C

WIFI

PMC_SUSCLK0[6]

R188 10K_2

PP1800_PCH_S5

R159 10K_2 R128

WIFI_DISABLE#[6]

SOC_PMC_WAKE#[6]

Q17A

*PJT138K

SOC_PMC_WAKE# WLAN_WAKE_L

2

PP1800_PCH_S5

B B

U22

NC1VCC

A

GND3Y

74AUP1G07GW

PP3300_WLAN

2

Q20B

PJT138K

*10K_2

34

R76 *0_4/S

61

5

R127
10K_2

PP3300_WLAN

R114

*PJT138K

PP1800_PCH_S5

5

C85

0.1U/16V_4

4

PP3300_WLAN

5

R70 *10K_2

2

6 1

Q17B

12

34

WIFI SUSCLK

10K_2

Q20A
PJT138K

PP3300_WLAN

R160
10K_2

RF_EN# [20]

WIFI_DISABLE

PP3300_WLAN

WLAN_WAKE_L [20]

WIFI WAKE

C2-test change

WIFI_SUSCLK [20]

4

HW RESET

AC Detect

SATA

Track Pad

I2C_0_SDA_R[7]

I2C_0_SCL_R[7]

PP1800_PCH

ACPRESENT[ 6]

R217 10K_4

PP1800_PCH

2

1

EC_IN_RW_C

Q26 *PJA138K

R218 *0_4/S

1023 EC_IN_RW is OD,
remove level shift and PU
to PP1800_PCH

PP1800_PCH_S5

2

1

Q11 PJA138K

1025 Delete complete SSD(connector and caps)

PP1800_PCH

2

I2C_0_SDA_R

1

Q24 FDV301N_G

R177 *0_2

PP1800_PCH

2

1

I2C_0_SCL_R I2C_0_SCL

Q22 FDV301N_G

R155 *0_2

3

I2C_0_SDA

3

3

3

3

EC_IN_RW

ACINACPRESENT

ACIN [26,27,28]

R183 2.2K/F_2

C95
*10P/50V_4

R178 2.2K/F_2

C84
*10P/50V_4

EC_IN_RW [26]EC_IN_RW_C[7]

I2C_0_SDA [26]

TP_PWR

TP_PWR

I2C_0_SCL [26]

2

S5 Power Good(+3V_S5)

0830 A24

1VS0IX_PG_1

C62
*1000P/50V_4

C12
*1000P/50V_4

2

2

1 3

2

1 3

PP3300_PCH_S5

S0iX Power Good

for proto type only, can remove at MP stage if S0ix is not needed

PP1000_PCH_SX

PP1350_PCH_SX

R82 4.7K/_2

R6 4.7K/_2

1.35VS0IX_PG_1

R189

4.7K/_2

61

Q23B
DMN2990

1VS0IX_PG_2

Q13
SX@MMBT3904-7-F

1.35VS0IX_PG_2

Q2
SX@MMBT3904-7-F

PP3300_DSW

5

R200

4.7K/_2

PP3300_PCH_S5_PG

34

Q23A
DMN2990

9/9

R62

4.7K/_2

2

C49
1000P/50V_4

R2

4.7K/_2

2

C9
1000P/50V_4

9/9

1

PP3300_DX

R59

4.7K/_2

Q10

1 3

SX@DTC144EUA

PP3300_DX

R3

4.7K/_2

Q1

1 3

SX@DTC144EUA

PP3300_PCH_S5_PG [27]

PP1000_PCH_SX_PG [27]

PP1350_PCH_SX_PG [34]

15

eDP control pin

PP3300_DX

PP3300_DSW

R40

R527

R39

100K_4

*4.7K/_2

2

5

R45

4.7K/_2

SOC_EDP_BLON_C_Q

61

Q6B
DMN2990

A A

8/11 Reserve for MV

SOC_EDP_BLON_C[4]

4.7K/_2

SOC_EDP_BLON [17]

34

Q6A

5

DMN2990

1205 To prevent the backlight flash, add a pull down on SoC_EDP_BLON_C and using
double inverting OD FETs structure

PP1800_PCH

SOC_DISP_ON_C[4]

PP1800_PCH

SOC_DPST_PWM_C[4]

4

R32 *10K_2

SOC_DISP_ON_C

R47 *10K_2

SOC_DPST_PWM_C

Q5A PJT138K

34

5

2

61

Q5B PJT138K

R29 10K_4
R25 10K_4

3

SOC_DISP_ON [17]

PP3300_DXPP1800_PCH

SOC_DPST_PWM [17]

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Level Shfiter (SOC_DEV)

Level Shfiter (SOC_DEV)

NB5

NB5

NB5
HW

HW

2

HW

Level Shfiter (SOC_DEV)

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

1A

1A

1A

15 40Monday, August 17, 2015

15 40Monday, August 17, 2015

15 40Monday, August 17, 2015

5

Power management Board

4

3

2

1

16

D D

C37
*0.1U/16V_4

C C

B B

Power Button Rest

EC_CD_RST

C38
*0.047U/25V_4

GND

1

2

3

Stuff while the EC no stuff

EC_MRDLY_RST

GND

C32
*0.047U/25V_4

U14

MRDLY

GND

RESET#

CD

*G677L308A31U

VCC

MR#

6

5

3VPCU_RST#

4

BUTTON_ONKEY_R

PP3300_RTC

C33
*0.1U/10V_2

R46 *0_4

PP3300_RTC

R57*47K_4

R49 *10K/F_4

R48 *100K/F_4

2

Q8

3

*DMG1012T-7(SOT523)

R54 *10K_2

1

GND

PP3300_RTC

*1N4448WS-7-F

PP3300_RTC

PWR_BTN_L [18,26,27]

PD2

R50

21

*1K/F_4

PP3300_DSW_EN [27,29]

A A

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5
HW

HW

5

4

3

2

HW

PM Board/Reset PBT

PM Board/Reset PBT

PM Board/Reset PBT

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

1A

1A

1A

16 40Monday, August 17, 2015

16 40Monday, August 17, 2015

16 40Monday, August 17, 2015

1

eDP Power(VGA)

PP3300_DX

2

3

4

5

6

7

8

eDP(VGA)

CN2

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

17

eDP connector

4241

USB2+_R
USB2-_R

8

1A

1A

1A

17 40Monday, August 17, 2015

17 40Monday, August 17, 2015

17 40Monday, August 17, 2015

A A

SOC_DISP_ON[15]

󲒂󰵓󰸿

C41

1U/6.3V_4

R444 *0_2/S

R445 100K_2

U15

5

IN

4

IN

3

ON/OFF

IC(5P) G5243AT11U

OUT

GND

eDP panel control(VGA)

B B

C C

SOC_DPST_PWM[15]

SOC_EDP_BLON[15]

EC_BL_DISABLE_L[27]

PP1800_PCH

Camera level shift(05/13)

R384
*0_2/S

DMIC_CLK_L[24]

DMIC_DATA_L[24]

C193

D D

0.1U/10V_2

1

R443 *0_4/S

R37

2.2K_4

To Camera Level Shift

U3

3

VCCA

5

A1

4

A2

2

GND

TXS0102DCUR

AL000102K00

2

LCDVCC_1 LCDVCC

VCCB

OE

1
2

7

B1

8

B2

1

6

EC_BL_PWM_CONN

VDD_3V3_SYS_1VDD_1V8_PMU_1

C39
*0.1U/10V_2

R442

*100K_4

D2

RB500V-40

R38 *0_8/S

C35
*2.2U/6.3V_6

C251
*0.1U/16V_4

EC_BL_EN_CONN

CCD_PWR

R4
*0_4/S

DMIC_CLK_C
DMIC_DATA_C

C11

0.1U/10V_2

*Clamp-Diode

DMIC_CLK_L
DMIC_DATA_L

*7.5K/F_4

3

C25

0.1U/10V_2

R36 *100K_2

CCD_PWR

R415

12

C207

R405 *0_2
R404 *0_2

R418

*7.5K/F_4

12

C209
*Clamp-Diode

DMIC_CLK_C

DMIC_DATA_C

C29

0.01U/50V_4

C28

22u/6.3V_8

4

CCD

DMIC

CCD power(CCD)

PP3300_DX

C227

10uF/6.3V_4

C217
*10P/50V_4

5

EDP_TXN1[4]

EDP_TXP1[4]

EDP_TXN0[4]
EDP_TXP0[4]

EDP_AUXP[4]
EDP_AUXN[4]

DMIC_DATA_C
DMIC_CLK_C

C230

0.1U/10V_2

LCDVCC

R426 *0_6/S

10UF/6.3V_4

USBP2-

C402
47P/50V_4

6/30 added for PV

0.5A

C244

VIN

C403
*47P/50V_4

CCD_PWR

6

EDP_HPD[4]

EC_BL_PWM_CONN

F1 NRHF

1 2

CCD_PWR

USB2-_R

USB2+_RUSBP2+

R416 600,0.3A
R417 600,0.3A

C19 0.1U/10V_2
C20 0.1U/10V_2

C21 0.1U/10V_2
C22 0.1U/10V_2

C23 0.1U/10V_2
C24 0.1U/10V_2

EDP_HPD

R441 *100K_2

C245 *0.1U/16V_4

C234 2.2U/25V_4
C241 2.2U/25V_4

+3.3V_USBCAM

DMIC_DATA
DMIC_CLK

USBP2+[7]
USBP2-[7]

EDP_TXN1_C
EDP_TXP1_C

EDP_TXN0_C
EDP_TXP0_C

EDP_AUXP_C
EDP_AUXN_C

C18 0.01U/50V_4

EC_BL_EN_CONN

51519-0400t-v02-40p-l

NOTE: THIS CONNECTOR REPRESENTS

CCD USB(CCD)

NB5

NB5

NB5
HW

HW

HW

7

R27 *0_4/S

8/12 Del L1

R26 *0_4/S

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom
Date: Sheet of

Date: Sheet of

Date: Sheet of

DFFC40FR081

EDP/CCD/DMIC/TS

EDP/CCD/DMIC/TS

EDP/CCD/DMIC/TS

5

4

3

2

1

PIN7 OD
PIN14 OD

GOOGLE Debug Port(MPC)

PIN19 OD
PIN22 OD
PIN28 OD

50 pin BTB is MUST, don't use 42 pin

D D

PCH_SPI_CS0#_R[6] PCH_SPI_SI_R [6]

PCH_SPI_SO_R[6]

SPI_HOLD#_BIOS[6]

C C

EC_JTAG_TCK[27] PWR_BTN_L [16,26,27]
EC_JTAG_TMS[27] EC_JTAG_TDI [27]

B B

SD3_CD#[5,23]

EC_JTAG_TDO[27]

PP3300_EC

EC_UART0_TX[27]

PP3300_INA

HDMI_MB_HP[19]

H_PROCHOT#[5,27,33]

R378 *0_2/S

R336 *0_2/S

R332 *0_4/S

R334 *0_2/S

R358 10_4

R359 *10_4

Socket part number AXK750147G

J1

1

1

PCH_SPI_CS0#_R
PCH_SPI_SO_R
SPI_HOLD#_BIOS

SOC_UART_TX_R

GPIO_SD_DECT

EC_JTAG_TCK
EC_JTAG_TMS EC_JTAG_TDI

EC_JTAG_TDO EC_JTAG_RTCK

EC JTAG

EC UART

EC_UART_TXD

PP3300_INA_R

I2C_SDA_INA I2C_SCL_INA

GPO_HPD GPIO_SPI_WP

GPIO_PROC_HOT#

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

*GD@AXK750147G

10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

2

2

4

4

6

6

8

8

10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

PCH_SPI_CLK_R
PCH_SPI_SI_R

GPIO_EC_RST#
SOC_UART_RX_R
SOC_UART_PWR

GPIO_PWR_BTN#

SYS_RESET#
EC_UART_RXD

PIN30 OD
PIN37 OD
PIN38 OD

SOC SPI

SOC UART

R354 10_4

R361 *0_2

PIN39 OD
PIN41 OD
PIN43 OD
PIN44 OD
PIN45 OD
PIN46 OD
PIN47 OD
PIN48 OD

R360 10_4

R379 *0_2/S

R342 *0_2/S

R345 *0_2/S

PIN49 OD

PIN50 OD

PP1800_PCH_ME

EC_JTAG_TCK

PP3300_EC

18

PCH_SPI_CLK_R [6]

A130828

EC_RST# [26,27]

SOC_REST_BTN# [6,11]

EC_UART0_RX [27]

I2C_SCL_INA_RI2C_SDA_INA_R

GPIO_SPI_WP [6]
LID_OPEN_L [22,27]

1021 change footprint and PN

SOC_UART_TX[7]
PCH_UART_TXD[27]
SOC_UART_RX[7]
PCH_UART_RXD[27]

SOC_UART_PWR

A A

R350 *0_2/S
R335 *0_2
R343 *0_2/S
R341 *0_2

R356 *0_4
R364 *0_4/S

SOC_UART_TX_R

SOC_UART_RX_R

PP3300_EC
PP1800_PCH

9/6 using optional instead of
level shifted, defult is from
SoC

5

4

9/13 add pull up

PP3300_INA

3

R344 4.7K/F_2
R333 4.7K/F_2

NB5

NB5

NB5
HW

HW

HW

I2C_SCL_INA_R
I2C_SDA_INA_R

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom
Date: Sheet of

Date: Sheet of

Date: Sheet of

2

Google Debug

Google Debug

Google Debug

18 40Monday, August 17, 2015

18 40Monday, August 17, 2015

18 40Monday, August 17, 2015

1

1A

1A

1A

5

4

3

2

1

1128 change HDMI CMC L2, this part

INT_HDMITX2N[4]
INT_HDMITX2P[4]

INT_HDMITX1N[4]
INT_HDMITX1P[4]

D D

INT_HDMITX0N[4]
INT_HDMITX0P[4]

INT_HDMICLK+[4]
INT_HDMICLK-[4]

Layout Notes:
Place decoupling CAPs
close to Connector

PP3300_DX

C55 0.1U/10V_2
C58 0.1U/10V_2

C63 0.1U/10V_2
C67 0.1U/10V_2

C48 0.1U/10V_2
C51 0.1U/10V_2

C72 0.1U/10V_2
C70 0.1U/10V_2

PP3300_HDMI

1115 remove R60 and change
R74 to Short PAD and size
to 0402

INT_HDMITX0N_C
INT_HDMITX0P_C

INT_HDMICLK+_C
INT_HDMICLK-_C

3

Q9

2

2N7002K

1

INT_HDMITX2N_C
INT_HDMITX2P_C

INT_HDMITX1N_C
INT_HDMITX1P_C

R65

R60

510/F_4

510/F_4

R119 510/F_4

R102 510/F_4

R93

R79

510/F_4

510/F_4

INT_HDMICLK+_CONN

INT_HDMICLK-_CONN

R80
510/F_4

R71
510/F_4

is recommended by Intel
1202 change HDMI CMC L2 to

DLP11TB800UL2L as Intel's recommendation
1205 L2 change back to DLP11SA900HL2

INT_HDMICLK+_C
INT_HDMICLK-_C

PP5000

U10

3

IN

AP2331SA-7

OUT
GND

R113 *0_4/S

8/12 Del L3

R103 *0_4/S

1
2

C30
*220P/50V_4

INT_HDMICLK-_CONN

*14V/38V/100P_4

D3

1115 change R22
to short PAD

INT_HDMITX2P_C
INT_HDMITX2N_C

INT_HDMITX1P_C
INT_HDMITX1N_C

INT_HDMITX0P_C
INT_HDMITX0N_C

INT_HDMICLK+_CONN

INT_HDMICLK-_CONN

HDMI_DDCCLK_MB
HDMI_DDCDATA_MB

HDMI_5V
HDMI_MB_HP

12

RV1

*5V/0.2p_4

*1000P/50V_4

C45

1121 remove R22

C C

J2

1

D2+

2

D2 Shield

3

D2-

4

D1+

5

D1 Shield

6

D1-

7

D0+

8

D0 Shield

9

D0-

10

CK+

11

CK Shield

12

CK-

13

CE Remote

14

NC

15

DDC CLK

16

DDC DATA

17

GND

18

+5V

19

HP DET

HDMI_CONN_19P

C40

DFHD19MR388

*1000P/50V_4

hdmi-hmr2l-ak520t-19p

1021 change footprint for
HDMI,need check layout file
again

SHELL1
SHELL3

SHELL4
SHELL2

20
22

23
21

19

HDMI DDC (HDM)

EMI ESD

1030 HDMI DDC
pulled up to

1115 change R72/R73
to short PAD

PP1800_PCH

1121 remove R72/R73

PP1800_PCH

HDMI_DDCCLK_SW[4]

B B

HDMI_DDCDATA_SW[4]

PP1800_PCH

HDMI_DDCDATA_SW

R43

R56 4.7K_4

4.7K_4

Q7

4 3

1

PJT138K

PP1800_PCH

5

2
6

R44 4.7K_4

R42 4.7K_4

HDMI_5V by intel
request

D5

RB500V-40

HDMI_DDCCLK_MBHDMI_DDCCLK_SW

D4

RB500V-40

HDMI_DDCDATA_MB

HDMI_5V

HDMI_5V

INT_HDMITX2P_C

R74 100/F_4

INT_HDMITX2N_C

INT_HDMITX1P_C

R83 100/F_4

INT_HDMITX1N_C

INT_HDMITX0P_C

R63 100/F_4

INT_HDMITX0N_C

INT_HDMICLK+_CONN

R109 100/F_4

INT_HDMICLK-_CONN

HDMI-detect (HDM)

R22
10K_2

INT_HDMI_HPD[4]

A A

5

INT_HDMI_HPD

61

Q3B
PJT138K

2

HDMI_MB_HP

4

R14
100K_2

HDMI_MB_HP [18]

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

NB5

NB5

NB5
HW

HW

3

2

HW

Custom
Date: Sheet of

Date: Sheet of

Date: Sheet of

HDMI

HDMI

HDMI

19 40Monday, August 17, 2015

19 40Monday, August 17, 2015

1

19 40Monday, August 17, 2015

1A

1A

1A

1

2

3

4

5

6

7

8

WIFI/BT COMBO (NGFF E KEY)

+WL_VDDPP1800_PCH

R447

R449

*0_4

*0_4

+WL_VIO

C260

A A

WLAN_OFF_L POWER DOWN LAN CHIP from EC?
WIFI_DISABLE_L disable Antenna from PCH?

(Low Active)

+WL_VDD

B B

NFC pin list

1.pin68-->NFC_ANT_N

2.pin66-->NFC_ANT_P

3.pin42-->NFC_WI_IN (1.8V)

4.pin40-->NFC_SWP2_IO (1.8V)

5.pin38-->NFC_ACTIVE (3.3V)

5.pin73-->NFC_NOT_ALLOWED (3.3V)

LTE Coexistence pin list (based on V0.2 spec

1.pin48-->LTE_SOUT (3.3V)

2.pin46-->LTE_SIN (3.3V)

RF_EN#[15]
WLAN_OFF_L[27]

WIFI_SUSCLK[15]

R454 *10K_4

*0.1U/16V_4

NFC_ANT_N

TP48

NFC_ANT_P

TP49

NFC_VDDANT

TP50

+WL_VIO

RF_EN#

R451 *0_4/S

PDN#

R453 *0_4/S

TP51
TP52
TP53

TP54

TP63

TP71

TP75

PLTRST#[14,22,27]

PIN54: disable Antenna

PDN#
WLAN_RST

PIN52: power down CHIP

NFC Security

NFC_WI_IN
NFC_SWP2_IO

WIFI_UART_RX

WIFI_UART_TX

BT_LED

WLAN_LED1# USBP3-

+WL_VDD

1023 change NGFF E key footprint and PN

+WL_VDD

CN3

74

3.3Vaux

72

3.3Vaux

70

NC

68

NFC_ANT_N

66

NFC_ANT_P

64

NFC_VDDANT

62

ALERT

60

I2C_CLK

58

I2C_DATA

56

W_DISA BLE

54

PDN#

52

PERST0#

50

SUSCLK_3 2KHz

48

LTE_SOUT

46

LTE_SIN

44

NC

42

NFC_WI_IN

40

NFC_SWP 2_IO

38

NC

36

UART_CTS

34

UART_RTS

32

UART_Rx

30

KEY

28

KEY

26

KEY

24

KEY

22

UART_Tx

20

UART_Wake

18

GND

16

LED#2

14

PCM_IN

12

PCM_OUT

10

PCM_SYNC

8

PCM_CLK

6

LED#1

4

3.3Vaux

2

3.3Vaux

0829 A20

NGFF

RESERVED
RESERVED

PERn1
PERp1

PEWake0#

CLKREQ0#
REFCLKN0

REFCLKP0

PERn0
PERp0

SLOT A-SD

SDIO_RESET

SDIO_WAKE

SDIO_DAT3
SDIO_DAT2
SDIO_DAT1
SDIO_DAT0

SDIO_CMD

SDIO_CLK

USB_D-

USB_D+

GND76GND

77

WLAN_NGFF CONN(Type 2230)_80152-1721

PETn1
PETp1

PETn0
PETp0

75

GND

73
71
69

GND

67
65
63

GND

61
59

WAKE/REQ 53, 55 OD

57

GND

55

WLAN_WAKE_L

53
51

GND

49
47
45

GND

43
41
39

GND

37
35
33

GND

31

KEY

29

KEY

27

KEY

25

KEY

23
21
19
17
15
13
11
9
7

GND

5
3
1

GND

USBP3+

TP5

WLAN_WAKE_L [15]

CLK_PCIE_WLANN [6]

CLK_PCIE_WLANP [6]

PCIE_RX0-_WLAN [5]

PCIE_RX0+_WLAN [5]

PCIE_TX0-_WLAN [5]
PCIE_TX0+_WLAN [5]

USBP3- [7]
USBP3+ [7]

PP3300_WLAN

+WL_VDD

R58
10K_4

BT

R473 *0_8/S

2

Q14 PJA138K

3

R87 *0_4

1

C329
10U/6.3V_6

PP1800_PCH

PCIE_CLKREQ_WLAN#PCIE_CLKREQ_WLAN#_Q

C330

0.1U/16V_4

+WL_VDD

C250
*0.1U/16V_4

PCIE_CLKREQ_WLAN# [5]

C253
*0.1U/16V_4

20

Video Codec (M.2 LGA 1216-S3) (VGA)
(0213 delete VP8/VP9)

C C

D D

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5
HW

HW

1

2

3

4

5

6

HW

7

WIFI / BT / Image Codec

WIFI / BT / Image Codec

WIFI / BT / Image Codec

Date: Sheet of

Date: Sheet of

Date: Sheet of

8

1A

1A

1A

20 40Monday, August 17, 2015

20 40Monday, August 17, 2015

20 40Monday, August 17, 2015

5

4

3

2

1

21

D D

1025 Delete complete SSD(connector and caps)

C C

EMMC (CBS)

B B

U2

EMMC_CMD[5]
EMMC_CLK[5]

EMMC_D0[5]
EMMC_D1[5]
EMMC_D2[5]
EMMC_D3[5]

EMMC_D4[5]
EMMC_D5[5]
EMMC_D6[5]
EMMC_D7[5]

EMMC_RST#[5]

A A

5

EMMC_CMD
EMMC_CLK

EMMC_D0
EMMC_D1
EMMC_D2
EMMC_D3

EMMC_D4
EMMC_D5
EMMC_D6
EMMC_D7

SOC_PLTRST#

4

R387 *0_2/S
R388 *0_2/S

R381 *0_2/S
R376 *0_2/S
R380 *0_2/S
R408 *0_2/S

R401 *0_2/S
R406 *0_2/S
R365 *0_2/S
R377 *0_2/S

EMMC_R_CMD
EMMC_R_CLK

push-pull mode

EMMC_R_D0
EMMC_R_D1
EMMC_R_D2
EMMC_R_D3

EMMC_R_D4
EMMC_R_D5
EMMC_R_D6
EMMC_R_D7

SOC_R_PLTRST#

TP47
TP46

W5

CMD

W6

CLK

H3

DAT0

H4

DAT1

H5

DAT2

J2

DAT3

J3

DAT4

J4

DAT5

J5

DAT6

J6

DAT7

U5

RST

R5

RCLK

M9

VSF_M9

M10

VSF_M10

H26M52103FMR

fbga169-samsung-kmhog0000m-0_5s
AKE3FG-TW01
IC FLASH(153P)H26M52103FMR(FBGA)TOPBSQ

K6

VCCQ

AA5

VCCQ

W4

VCCQ

Y4

VCCQ

AA3

VCCQ

T10

VCC

U9

VCC

M6

VCC

N5

VCC

K2
R10

U8
M7
P5
H6
T5
AA6
Y5
Y2
AA4
K4

VDDI

R363 *0_2R386 *0_2/S
R367 *0_2

VDDI

VSS
VSS
VSS
VSS
VSS

VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

3

GND

for host interface

VCCQ_EMMC

C189

0.1U/10V_2

VCC_EMMC

C195
*0.1U/10V_2

GND GND

C182

0.1U/10V_2

C202

0.1U/10V_2

2

C183

0.1U/10V_2

R383 *0_6/S

C184

4.7U/6.3V_4

R348 *0_6/S

C188

4.7U/6.3V_4

PP1800_PCH

PP3300_PCH

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5
HW

HW

HW

SSD NGFF/ EMMC

SSD NGFF/ EMMC

SSD NGFF/ EMMC

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

1A

1A

1A

21 40Monday, August 17, 2015

21 40Monday, August 17, 2015

21 40Monday, August 17, 2015

TPM (CLG)

1

2

3

PP3300_DX

4

4 x100nF (place close to device VDD/GND pins)

R11

+TPM_VDD

+TPM_VDD

2.2_6

22

A A

+TPM_VDD

0411 FAE : install R342 value is 4K7,
and PIN7 wo an internal PD

B B

R12 *4.7K/F_2

12

R13
*20K_4

RE

R18 *0_2/S

pin5,6,9,19,25,28 are difference between both

TPM_GPIO

TPM_PP

PROG IC OTHER(28P)SLB9655TT1.2FW4.32GOOG

6
2

7

13

14

8

12

3
1

U13

GPIO/NC6
NC2

PP
NC13

NC14

NC8

NC12
NC3

NC1

C44

0.1U/10V_2

TPM SLB9655

GND[1]4GND[2]11GND[3]18GND[4]/NC25

VDD[4]
VDD[2]

LCLK

LFRAME#

LAD3
LAD2
LAD1
LAD0

SERIRQ

NC15

C17

0.1U/10V_2

10
5

R19 *0_2/S

24
19

R51 *0_2/S

21
22

17
20
23
26

28
16

9
27

15

FOR TESTING ST33TPM12LPC:
UNSTUFF - RA, RB, RD, RE
STUFF - RC

C15

0.1U/10V_2

VDD[3]/NC5

VDD[1]/NC19

NC28/LPCPD#

LRESET#[1]

LRESET#[2]/NC9

25

C43

0.1U/10V_2

RA

RB

R53 *4.7K/F_2

R31 *0_2/S

SERIRQ_R

RC

RD

R55 10K_4

near pin 21 as possible

C42 10P/50V_4

+TPM_VDD

R52 *0_2

PCLK_TPM [7]

LPC_LFRAME# [7,27]

LPC_LAD3 [7,27]
LPC_LAD2 [7,27]
LPC_LAD1 [7,27]
LPC_LAD0 [7,27]

PLTRST# [14,20,27]

+TPM_VDD

IRQ_SERIRQ [14,27]

LED(UIF)

PP3300_RTC

C C

C5

0.1U/10V_2

LID SENSOR

2

1

VDD

S

N

GND

U1

APX9132H

3

LID_OPEN_S

OUT

D1

1

1

2

*3301D-ESD

2

LID_OPEN_L

R11K_2

LID_OPEN_L [18,27]

PWR LED

PP3300_RTC

LED1

2 1

3P WHITE LED

C152 *TVM0G5R5M261R_4

R312 360/J_4

PWR_LED#

PWR_LED# [27]

D D

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

NB5

NB5

NB5
HW

HW

1

2

3

HW

Custom
Date: Sheet of

Date: Sheet of

Date: Sheet of

TPM SLB9655 / LED

TPM SLB9655 / LED

TPM SLB9655 / LED

4

22 40Monday, August 17, 2015

22 40Monday, August 17, 2015

22 40Monday, August 17, 2015

1A

1A

1A

Thermal Sensor(THM)

A

PP3300_THM

C60 0.1U/16V_4

1022 change thermal IC
solution

U18 TMP432ADGSR

1

VCC

SCLK

2

DP1

SDA

3

DN1

ALERT#

4

DP2

OVERT#

5

GND6DN2

ADDR=0x4C

Place oo PCB BOT
Local Temp.

1030 Thermal IC VDD has two option, ome is PP3300_DSW(
=PP3300_EC), another is PP3300_DX, default is stuffing to
DSW rail

PP3300_THM

C68
2200P/50V_4

C69
2200P/50V_4

R67 *0 _4/S

H_THRMDA

H_THRMDC
H_THRMDA2

H_THRMDC2

R77 *0_4
R88 *0_4/S

OVERT#EC_RST#_R

ALERT#

OVERT#

10

9
8
7

EC_SMB2_CLK[27]
EC_SMB2_DATA[27]

ALERT#[5]

4 4

1025 remove Q31 becasue PU to PP3300_DSW at EC side already

EC_RST#_R[27]

3 3

B

Place oo PCB TOP
Remote Temp.

Base: PIN 1
Emitter: PIN 2
Collector: PIN 3

Q38

1

MMBT3904LP-7

2 3

Q29

1

MMBT3904LP-7

2 3

Place oo PCB ?
Remote Temp.

PP3300_DX
PP3300_DSW

FUNCTION DB

LTE(MNC)

PP3300_DX

C139

1u/6.3V_4

V3V3_CARD_R

30mils

C147
10U/6.3V_4

VCC_SD

USBH3-[25]

USBH3+[25]

VCC_SD

VCC_SD

C142

0.1U/16V_4

1A

R292 *0_2/S

USBH3­USBH3+

C

Card Reader

MicroSD Card Socket

SD_MMC3_DAT2

C130
10UF/6.3V_4

SCL
SDA

C129
10UF/6.3V_4

C135 0.1U/16V _4

SD_MMC3_DAT3
SDMMC3_CMD

SDMMC3_CLK

SD_MMC3_DAT0
SD_MMC3_DAT1

SD_CD#_R_C

U30

1

SCL

2

SDA

3

DM

4

DP

5

RREF

6

AVDD

C145 *12P/25V_2
C143 *12P/25V_2
C150 *12P/25V_2
C149 *12P/25V_2
C148 *12P/25V_2
C146 *12P/25V_2
C141 *12P/25V_2

GL823
QFN24(A)

G1

25

RSTZ

C138 0.1U/16V_4

C136 4.7U/6.3V _4

C144

0.1U/16V_4

R287 680/F_4

R293 *0_2/S

RREF

VCC_SD

23

24

GND

DVDD

RSTZ7SD_WP8SD_CDZ9D110D011SD_CLK

22

GPIO3

SD_MMC3_DAT2

TEST

19

21

20

D2

LED

TEST

D3

GPIO9

SD_CMD

GPIO8
PMOS

DVDD

GL823-QFN24-3V3-OGG06

12

18
17
16
15
14
13

intel CRB

L17 *0_2 /S
L16 *0_2 /S
L15 *0_2 /S

L14 *0_2 /S

L13 *0_2 /S
L12 *0_2 /S

SD3_D0_C
SD3_D1_C
SD3_D2_C
SD3_D3_C
SD3_CMD_C
SD3_CLK_C
SD3_CD#

LED

SD_MMC3_DAT3
GPIO9
SDMMC3_CMD
GPIO8

C140

0.1U/16V_4

SDMMC3_CLK
SD_MMC3_DAT0
SD_MMC3_DAT1

SDMMC3_CD

SDMMC3_WP_L

V3V3_CARD_R

TP45

R308 *0_2/S

R299

R298

D

Place close to J5002

SD3_D2_C
SD3_D3_C
SD3_CMD_C

SD3_CLK_C

SD3_D0_C
SD3_D1_C

2/3 del D28~34

V3V3_CARD_R
VCC_SD

*10K_4

VCC_SD

*0_2/S

E

SDMMC3_CD

SD3_CD#

23

SD3_CD# [5,18]

R311

*0_6/S

R310
*4.7K/J_4

SD_CD#_R_C

+V3P3S_PD_EN_CARD_C

GND

PP3300_DX

R309 *0_2/S

2

J3

COMMON

DATA2

1

CD/DATA3

2

CMD

3

VDD

4

CLK

5

VSS

6

DATA0

7

DATA1

8

C_DETECT

9

10

GND

11

GND

12

GND

13

GND

14

GND

DFHS10FR165

sdcard-ch1s-151-h-n-10p

R300 *0_2/S

R306 *1K/J_4

3

Q37

*2N7002K

1

SCL

R289 *0_2

SDA

R288 *0_2

GPIO8

R307 0_2

GPIO9

R303 *0_2

2 2

1 1

A

B

C

C-test change t o power saving mode

GPIO8 to GND

USBH2+[25]
USBH2-[25]

USB_OC1#[7,14]
USB_OC0#[7,14,25]

5/11 no stuff R5244. (For BSW)

Daughter Board

7/1 Del Common Mode Choke

USBH1+[25]
USBH1-[25]

USB2_PWR_EN[27]

R280 *0_2/S
R281 *0_2

DB_USB_OC#

D

PP5000

C127
10UF/6.3V_4

USBH1+_R
USBH1-_R

USBH2+_R
USBH2-_R

USB2_PWR_EN

Change 24 Pin connector

C124

0.1U/10V_2

CN9
DB Conn

25

25

1

26

1

26

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

DFFC24FR103

50501-02401-001-24p-l

2/4 New F/P

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5
HW

HW

HW

DB/ALS/Thermal sensor

DB/ALS/Thermal sensor

DB/ALS/Thermal sensor

Date: Sheet of

Date: Sheet of

Date: Sheet of

E

1A

1A

1A

23 40Monday, August 17, 2015

23 40Monday, August 17, 2015

23 40Monday, August 17, 2015

5

AUDIO CODEC (ADO)

+V1P8A_AVDD

+V1P8A_DVDD

C169
1U/16V_4

R317 *0_2/S

R318 *0_2/S
R524 10K_2

R321 *0_2/S
R319 *0_2/S

C165 1U/10V_4

RCVN

C166 1U/10V_4

C160
1U/10V_4

PP3300_ADO_SW

MICBIAS

R265

2.2K_4

RCVP

RCVN

R291 10K_4

I2C_MIC_SW_SDA
I2C_MIC_SW_SCL

AJACK_MICPRES_L

C390
1U/16V_4

R320 *0_2/S
R322 *0_2/S
R325 *0_2/S
R324 *0_2/S

C161
1U/16V_4

11

12

2
1

Close to PIN38Close to PIN26

C392

C171

10U/6.3V_4

0.1U/10V_2

AGND

CODEC_CLK_IN
I2S_BCLK_RR

I2S_LRCLK_RR
I2S_DOUT_RR
I2S_DIN_RR

CODEC_INT_OD_L

DMIC_DATA_R

DMIC_CLK_R
CODEC_MIC_L_PRCVP
CODEC_MIC_L_N

CODEC_C1P

CODEC_C1N

13

16

U29

VDD1

VDD2

MICP

MICN

TS3A225E

SDA
SCL

TS3A225ERTER (QFN)

4

35
33

32
30
31

37
36

34

19
18
20
21

39

40

3
2

15

SLEEVE_SENSE

U31

MCLK
BCLK

LRCLK
SDIN
SDOUT

SDA
SCL

IRQ_L

IN1/DMD
IN2/DMC
IN3
IN4

C1P

C1N

CPVDD
CPVSS

AGND

14

6

SLEEVE
TIP_SENSE

RING2_SENSE

DET_TRIGGER

28

DVDDIO

27

DVDD

MAX98090AETL+T

R323 *0_8/S

7

RING2

GND210/MIC_PRESENT8ADDR_SEL

GND13PGND

17

AGNDAGND

C391

+V1P8A_AVDD

10mils

L19

C170
1U/16V_4

I2S_MCLK[6]

I2S_BCLK_R[5]

I2S_LRCLK_R[5]

I2S_DOUT_R[5]

I2S_DIN_R[5]

I2C_1_SDA_R[7]
I2C_1_SCL_R[7]

MUX_AUD_INT1#[6]

DMIC_DATA_L[17]
DMIC_CLK_L[17]

R277 *0_4

AGND

R266 10K_4
R269 10K_4

5

BLM15PX181SN1D(180,1.5A)

C159
1U/10V_4

PP1800_PCH

D D

C C

B B

A A

R525 *0_6/S

2/3 need confirm

2/3 modify

0.1U/10V_2

Audio Headset Switch

PP3300_RTC

L10 100ohm@100MHz

C121

0.1U/16V_4

1209 reserve R220
connection from RCVP to
MIC_DET as back up in
case driver needs to be
through codec using
JACKSNS pin

MIC_DET

PP3300_RTC

26

38

AVDD

HPVDD

SLEEVE_SENSE
RING2_SENSE
SLEEVE
RING2

9

HPL

5

4

14

13

SPKLVDD

SPKRVDD

SPKLP

SPKLN
SPKRP
SPKRN

MICBIAS

RCVP/LOUTL

RCVN/LOUTR

HPSNS

JACKSNS

DGND29AGND25HPGND1SPKRGND10SPKLGND

4

3

SOC DET

+5VA

C163

C164

0.1U/10V_2

AGND

C168
1U/10V_4

C173
1U/10V_4

C162
10U/6.3V_4

R327 *0_2/S

R316 5.6_4
R315 5.6_4

C167

2.2U/25V_4

HPL
HPR

R313
*4.7K/F_2

AGND

MICBIASM ICBIAS_1

R314
*4.7K/F_2

C116 1000P/50V_4
C158 1000P/50V_4
C156 1000P/50V_4
C172 1000P/50V_4
C157 1000P/50V_4

R305 *0_4/S
R253 *0_4/S

AGND

1U/16V_4

16

L_SPK+

15

L_SPK-

12

R_SPK+

11

R_SPK-

22

8
9

5

RCVN

7

MIC_DET

4

HPOUT-L

HPL

6

HPOUT-R

HPR

23

REF

24

BIAS

PAD

17

41

DET_TRIGGER[5] AJACK_MICPRES_L[5]

HEADPHONE/Mic combo(ADO)

Codec PWR 5V(ADO)

PP3300_RTC PP3300_RTC

R251 330K_4

R301 *0_4/S

C115
1U/6.3V_4

HP_JDDET_TRIGGER_SW

AGNDAGND

Q36B
PJT138K

61

R294
330K_4

2

HP_JD_L

3

Internal Speaker

40mil for each signal

L_SPK+
L_SPK­R_SPK+
R_SPK-

PP1800_PCH

34

AGND

SLEEVE SLEEVE_R
SLEEVE_SENSE

RING2_SENSE

HPR

L5 0_6

L9 0_6

PP5000

C155

*0.1U/10V_2

R328 *0_6/S
R329 *0_6/S
R330 *0_6/S
R331 *0_6/S

C174

10P/50V_4

L11 80ohm@100MHz
R302 0_4

L6 80ohm@100MHz
R255 0_4

R272
330K_4

Q36A
PJT138K

5

C128
1U/6.3V_4

HP_JD_L

10P/50V_4

C151
*10U/6.3V_6

C175
10P/50V_4

2

PP1800_PCH

AJACK_MICPRES_LDET_TRIGGER

R237 10K_4

1

24

combo jack
Normal open

1025 change
headphone footprint

RING2_RRING2

C118

C133

10P/50V_4

C176
10P/50V_4

2

C137

*100P/50V_4

follow 0c1 pin define

L_SPK+_1
L_SPK-_1
R_SPK+_1

R_SPK-_1

C177
10P/50V_4

C114
*100P/50V_4

AGNDAGND

SPK_CONN_4P

J4

1
2
345

DFHD04MR211

88266-040xx-xxx-4p-l

and PN, need check
pin out again

1025 remove pin7

SLEEVE_R
HPL_SYSHPL

HP_JD_L
HPR_SYS
RING2_R

SLEEVE
HPR_SYS
HPL_SYS
RING2
HP_JD_L

ESD 2'nd CY00G050B00
ESD 2'nd CY00G050B00

1 2

D19 *14V/38V/100P_4

1 2

D18 *14V/38V/100P_4

1 2

D15 *14V/38V/100P_4

1 2

D16 *14V/38V/100P_4

1 2

D20 *14V/38V/100P_4

ANALOG DIGITAL

L18 PBY160808T-181Y-N_2A_6

C154

0.1U/10V_2

AGNDAGND

6

NB5

NB5

NB5
HW

HW

HW

Audio Jack

CN6

4
1

5
6

2
3

7

8

AGND

AVDD1

+5VA

C153
10U/6.3V_4

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

MAX98090/HP/SPK

MAX98090/HP/SPK

MAX98090/HP/SPK

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

PIN4 --> MIC
PIN5 --> AGND
PIN2 --> R
PIN1 --> L
PIN3 --> TRANSFER
PIN6 --> HPD

phjk-2sj3072-103111f-6p
DFTJ06FR648

24 40Monday, August 17, 2015

24 40Monday, August 17, 2015

24 40Monday, August 17, 2015

1A

1A

1A

5

USB3.0(USB)

60 mils

USBP0-_L
USBP0+_L

D D

USB3_RXN0[7]
USB3_RXP0[ 7]

USB3_TXN0[7]
USB3_TXP0[7]

2/3 Modify net name

R169 *0_4/S
R176 *0_4/S

USBP0-_C
USBP0+_C
USB3_RXN0
USB3_RXP0
USB3_TXN0_R
USB3_TXP0_R

USBP0-_C
USBP0+_C

USBP0-_L
USBP0+_L

USB3_RXN0
USB3_RXP0

C80 0.1U/10V_2
C78 0.1U/10V_2

USB3PWR

8/12 Del L4

USBP0-_C
USBP0+_C

USB3_TXN0_R
USB3_TXP0_R

D12 *5V/0.2p_4

1 2

D13 *5V/0.2p_4

1 2

D43 *5V/0.2p_4

1 2

D44 *5V/0.2p_4

1 2

D11 *5V/0.2p_4

1 2

D10 *5V/0.2p_4

1 2

HOLE
Thermal screw

H8
H-TC217BC98D59P2

C C

Write-Protect Switch

H7
*O-Y07C-1

B B

1

H4
*H-TC354I127BC315D87P2

1

H11
*H-C236D87P2

1

2

SPI_WP_ME_R

4

1

5

3

8/11 FP follow Y09

H5
H-TC217BC98D59P2

1

H2
*H-C157D98P2

1

H10
*h-belu-3

1

H6
*H-C315D232P2

1

H9
*H-C197I138D98P2

1

H12

H1

*H-C157D98P2

*H-BELU-1

1

R494 1K_4

8/5 change to 0402 type

H3
*H-C315D232P2

1

1

SPI_WP_ME [6,27]

Iout=2A

USB 3.0 Connector

CN4
USB3.0 CONN

1

VBUS

1

2

D-

2

3

D+

3

4

4

GND

5

SSRX-

5

6

6

SSRX+

7

7

GND

8

8

SSTX-

9

SSTX+

9

11111010131312

12

DFHS09FR561

ub3-tar2h-9r6393-9p-smt

SI Modified 0418

7/17 reserve D43/D44

USB HUB

1021 3G@HUB@ means HUB will be stuffed if 3G/LTE exists

USBP1-[7]
USBP1+[7]

USBP1­USBP1+

XIN

18P/50V_4

4

R231 *0_4/S
R230 *0_4/S

C134

USB_H1_N3
USB_H1_P3

USB2.0

USB2.0

Y412MHz

1 2

3

PP5000

PP3300_EC

PP5000

+3V_USB

USB_ILIM_SEL

1

C101

0.1U/10V_2

PP3300_DSW

USB_OC0#[7,14,23]

USB3_PWR_EN[27]

USB_CTL1[27]

R186 10K_2
R179 10K_2

R165 *10K_2
R163 *10K_2

R526 *0_4

7/1 Add power option

USB_H1_N3
USB_H1_P3
USBH1­USBH1+

+3V_USB
USBH2­USBH2+

RESET#_USB

1U/6.3V_4

7/1 change to 1U

2

3

USB3_ILIM_SEL

Q27
2N7002K

80 mils (Iout=2A)

D14 PDZ5.6B(5.48V-5.73V)

R164 10K_2

USB3_STATUS_L

USB3_ILIM_SEL

USB3_PWR_EN

USB_HUB_5V

+3V_USB

U27

28

VREG

1

DD-0

2

DD+0

3

DD-1

GL852G-OHG12

4

DD+1

5

VCC_A_5

6

DD-2

7

DD+2

RREF8VCC_A_99XIN10XOUT11DD-312DD+313VCC_A_14

QFN28

USBH_RREF

+3V_USB

R284
10K/F_4

C126

GND

21

USB_OC0#

USB3_CTL2
USB3_CTL3

R195
100K_2

TP41

EEPROM_SDA

nOVRP1

27

26

VCC

I2C_SDA

XOUT

XIN

+3V_USB

R207 10K_2

PGANG

PSELF

nOVRP2

24

23

22

GANG

OVR#[1]25OVR#[2]

VCC_D
SELFPWR

OVR#[3]
OVR#[4]

RESET#

14

+3V_USB

USBH3+
USBH3-

TEST

DD+4

DD-4

GND

R283
*47K_4

TPS2546RTER/GL887T-OCGO

GND

29

PP3300_DSW

Check USB Charger

U23

1

IN

9

STATUS

13

FAULT

4

ILIM_SEL

5

EN

6

CTL1

7

CTL2
CTL38DP_OUT

21
20
19
18
17
16
15

GL852G-OHG12

12

USB3PWR

OUT

15

ILIM_LO

ILIM_LO

16

ILIM_HI

ILIM_HI

17

GND_PAD

14

GND

11

USBP0-_L

DM_IN

10

USBP0+_L

DP_IN

2

USBP0-

DM_OUT

3

USBP0+

IOS_typ(mA) = 50,250/{RILIM_XX(KΩ)+0.1}

52.4mA

Follow vendor's suggestion(Close to pin 21)

+3V_USB_D

R257 *0_4/S

nOVRP3
nOVRP4
EEPROM_SCL

TP44

RESET#_USB

nOVRP1
nOVRP2

USBH3+ [23]

Cardreader

nOVRP3
nOVRP4
PSELF

PGANG
USBH_RREF

USBH3- [23]

change 619 ohm for eye diagram

USB3PWR

80 mils (Iout=2A)

(RILIM_HI 1.96A)

R199

25.5K/F_4

1021 If USB2 external IO has wake up feature, HUB
power need to be available in S5

PP3300_PCH_S5

PP3300_DX

+3V_USB

C113

0.1U/16V_4

1 2

GND

R233 10K_4
R234 10K_4
R263 10K_4
R267 10K_4
R236 10K_4

R235 100K/F_4
R296 619/F_4

USB_ILIM_SEL[27]

USB Charger

RILIM_LO is optional and the ILIM_LO pin may be left unconnected if the following conditions are met:

1. ILIM_SEL is always set high

2. Load Detection - Port Power Management is not used

3. Mouse / Keyboard wake function is not used
If conditions 1 and 2 are met but the mouse / keyboard wake function is also desired, it is recommended to use
RILIM_LO < 80.6 kΩ.
The following equation programs the typical current limit:
(1)
RILIM_XX corresponds to either RILIM_HI or RILIM_LO as appropriate.

USBH1-[23]
USBH1+[23]

USBH2-[23]

USBH2+[23]

34

XOUT

C132
18P/50V_4

GNDG ND

2/3 modify

D9 TVM0G5R5M261R_2
C75 100U/6.3V_3528

1 2

(RILIM_LO 1.07A)

R194
47K_4

USBP0- [7]

USBP0+ [7]

R239 *0_6/S

R211 *0_6

+3V_USB

GND

2

25

+3V_USB

Follow vendor's suggestion(Close to GL850G-31)

15 mil

C387

0.1U/16V_4

1 2

GND

+3V_USB

C388
10UF/6.3V_4

GND

Follow vendor's suggestion(Close to pin 28)

1 2

C383

0.1U/16V_4

1 2

C385

0.1U/16V_4

C384
1U/6.3V_4

1

C380
1U/6.3V_4

C386

0.1U/16V_4

1 2

O-Y07C-1

PAD

PAD4
*spad-c197

1

PAD9
*SPAD-RE236x236NP

1

A A

PAD5
*spad-c197

PAD1
*spad-c197

1

1

PAD7
*spad-c197

PAD8
*spad-c197

1

1

5

PAD3
*spad-c197

PAD6
*spad-c197

1

1

EMI

PP1800_PCH_S5 PP1800_PCH_S5

EC23

EC33

*0.1U/10V_2

*0.1U/10V_2

PP3300_DX PP3300_DX PP3300_DX

EC5

EC32

*0.1U/10V_2

*0.1U/10V_2

PP5000

EC6
*0.1U/10V_2

4

EC11
*0.1U/10V_2

PP1800_PCH PP1800_PCH

EC34

EC20

*0.1U/10V_2

*0.1U/10V_2

VIN_VCC_GT VIN_VCC_GT

EC22

EC21

*0.1U/25V_4

*0.1U/25V_4

PP1350 PP1000_PCH

EC24
*0.1U/10V_2

EC27
*0.1U/10V_2

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

USB3/UB2/Charger/Hole

USB3/UB2/Charger/Hole

NB5

NB5

NB5
HW

HW

3

2

HW

USB3/UB2/Charger/Hole

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

1A

1A

1A

25 40Monday, August 17, 2015

25 40Monday, August 17, 2015

25 40Monday, August 17, 2015

K/B (KBC)

5

4

3

2

1

Track PAD BOARD CONN (TPD)

26

K/B (KBC)

KB_ROW12[27]
KB_ROW08[27]
KB_ROW09[27]
KB_ROW11[27]

PWR_BTN_L

KB_ROW10[27]

KB_ROW05[27]
KB_ROW06[27]

KB_ROW03[27]

KB_COL00[27]

KB_ROW01[27]
KB_ROW04[27]

KB_COL03[27]

KB_ROW00[27]
KB_COL05[27]
KB_COL04[27]

KB_ROW07[27]
KB_COL06[27]
KB_COL07[27]
KB_COL01[27]

R274 *0_2/S

D D

KB_ROW12
KB_ROW08
KB_ROW09
KB_ROW11
KB_ROW10

KB_ROW05
KB_ROW06

KB_ROW03

KB_ROW02_SW

KB_COL00
KB_ROW01
KB_ROW04
KB_COL03
KB_COL02_SW
KB_ROW00
KB_COL05
KB_COL04
KB_ROW07
KB_COL06
KB_COL07
KB_COL01

KB_PWR_ON_L

For testing only

C C

3/5 Change TVS diode for layout

KB_COL01
KB_COL03
KB_COL04
KB_COL05
KB_COL06
KB_COL07

KB_PWR_ON_L
KB_COL02_SW
KB_ROW00
KB_ROW07

1 2

D22 *5V/0.2P_4

1 2

D42 *5V/0.2P_4

1 2

D24 *5V/0.2P_4

1 2

D27 *5V/0.2P_4

1 2

D25 *5V/0.2P_4

1 2

D29 *5V/0.2P_4

1 2

D21 *5V/0.2P_4

1 2

D26 *5V/0.2P_4

1 2

D23 *5V/0.2P_4

1 2

D28 *5V/0.2P_4

CN8

1

30

2

29
3
4
5
6
7
8
9

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28

KB_CONN_28P

DFFC28FR015

50690-0280n-v02-28p-l

KB_ROW01

D40 *5V/0.2P_4

KB_ROW03

D37 *5V/0.2P_4

KB_ROW04

D41 *5V/0.2P_4

KB_ROW05

D35 *5V/0.2P_4

KB_ROW06

D36 *5V/0.2P_4

KB_ROW08

D31 *5V/0.2P_4

KB_ROW09

D32 *5V/0.2P_4

KB_ROW10

D34 *5V/0.2P_4

KB_ROW11

D33 *5V/0.2P_4

KB_ROW12

D30 *5V/0.2P_4

KB_COL00

D39 *5V/0.2P_4

KB_ROW02_SW

D38 *5V/0.2P_4

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

TRACKPAD_INT_DX[7]

PP3300_DSW

TRACKPAD_INT#[6]

C122

1U/6.3V_4

I2C_0_SDA[15]
I2C_0_SCL[15]

S5

TP_SHDN_L[27]

TP_PWR

I2C_0_SDA

I2C_0_SCL

TOUCHPANEL_PWR_R

R262 *0_4/S

D17

RB500V-40

R275 *0_2/S

R276 *0_2/S

R278 *0_4/S

TP_PWR

U28

A2

IN

OUT

B2

EN

GND

TPS22930

C125 0.1U/10V_2

R285 * 100K_4

A1
B1

TOUCHPANEL_PWR_R

SI Modified 0418

TP_CONN_6P
CN7

1

1

R259
100K_4

R282 *0_6/S
C120
1000P/50V_4

2
3
4
5
6

2
3
4
5
6

DFFC06FR062

50503-0060N-001-6P-L

I2C ADDR 7'H67
ADLB25H0000

I2C_0_SDA_CONN
I2C_0_SCL_CONN

TRACKPAD_INT_L_CONN

2/3 modify TP CONN pin5/6

C123
*10P/50V_4

8
7

TP_PWR

0.5A

B B

HOLELESS RESET
2-CHIP(KBC)

A A

5

HOLELESS RESET
2-CHIP(KBC)

BATT_ENABLE

PP3300_RTC

R261
1M_4

C117

*2.2U/25V_4

R260 *0_2

5/15 modify,PU already at EC side

R252

R268
*4.7K/F_2

BATT_EN#

3

Q33
PJA138K

2

1

if not use ACIN, should tied to GND

󲕸󱍯

Follow CRB??

4

PWR_BTN_L[16,18, 27]BATT_EN# [28] EC_RST# [18,27]

R270 *0_2/S

PP3300_RTC

Pin 3,5,8,11 Open Drain

R271 4. 7K/F_2
R241 * 4.7K/F_2
R240 * 4.7K/F_2

1023 EC_IN_RW is OD,
remove level shift and PU
to PP1800_PCH

R273

*100K/F_4

R250 *0_2/S

BATT_ENABLE

ACPRESENT_4137

KB_COL02_SW

KB_ROW02_SW
KB_COL02
EC_IN_RW

10K_2

SLG4K4350VTR (TDFN-12)

U26

2

PWR_BTN_ L

3

BATT_ENABLE

4

AC_PRESE NT

5

KSO_SW

6

KSI_SW

3

PP3300_RTC

1

VDD

EC_ENTERING_RW

GND

PAD_GND

7

13

C111

0.1U/10V_2

EC_RST_L

EC_IN_RW

KSO_INV

if not use ACIN, should tied to GND

12

EC_RST#

11

EC_IN_RW

10

EC_ENTERING_RW

9

KB_ROW02KB_ROW02_SW

8

KB_COL02

KSI

Connect to GPIO on CPU
with PU to GPIO power
well
Connect to EC pin C5 (must
be low when EC IN RESET)

EC_IN_RW [15]

EC_ENTERING_RW [27]ACIN[ 15,27,28]

KB_ROW02 [27]

KB_COL02 [27]

2

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5
HW

HW

HW

KB/TP/FAN/HW Reset

KB/TP/FAN/HW Reset

KB/TP/FAN/HW Reset

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

1A

1A

1A

26 40Monday, August 17, 2015

26 40Monday, August 17, 2015

26 40Monday, August 17, 2015

Connect to EC reset pin
Connect to GPIO on CPU

with PU to GPIO power
well

Connect to EC pin C5 (must
be low when EC IN RESET)

5

EC(KBC)

D D

1023 SWAP RP1 pin for layout

C C

SPI_WP_ME[6,25]

B B

PP3300_ EC

A A

PP3300_ EC

KB_COL06
KB_COL05

R116

*100K_2

R115

100K_2

PP3300_ EC

R206 *0_ 2

RP1 10K_10P8R

10

9
8
7 4

PP3300_ EC

R125

100K_2

R126

*100K_2

C52

C100

1U/6.3V_4

1U/6.3V_4

EC_LPCPD#PCH_SUS_STAT_L

1

KB_COL01

2

KB_COL02KB_COL07

3

KB_COL00
KB_COL03KB_COL04

56

R98
100K_4

0711 add the R17673

PWR_BTN_ L[16,18,26]

R104100K_4

TP_SHDN_L[26]
BAT_LED0[2 8]
PP3300_ DX_EN[30]

PP3300_ PCH_PG[35]
IMVP_PW RGD_3V[33,34,35]

SUSP_VR_ EN[32]

PP1050_ PCH_PG[32,34,35 ]

PP1000_ PCH_SX_PG[15]

PP5000_ PGOOD[29]

PP3300_ DSW_E N[16,29]

USB2_PW R_EN[23]

EC_ENTERING_RW[26]

EC_RST#[ 18,26]

EC_RST#_R[23]

R124

100K_2

EC_BRD_ID1
EC_BRD_ID2
EC_BRD_ID3

R123

*100K_2

C96

C82

0.1U/10V_2

0.1U/10V_2

CLK_PCI_EC[7]

LPC_LFRAME#[7,22]

PWR_BTN_ L PWR_BTN_ L_R

TEMP_MBAT[28 ]

AD_TYPE[28]

TP11
TP13

TP27

WLAN_O FF_L[20]

VCORE_EN[33]

PP1350_ EN[31]

PP5000_ EN[29]

TP16
TP12

TP22

USB_OC1_ L[14]

ICMNT[28]

USB3_PW R_EN[25]

USB_ILIM_ SEL[25]
USB_CTL1[25]

USB_OC0_ L[14]

R204 *0_4/S

C92

0.1U/10V_2

LPC_LAD0[7,22]
LPC_LAD1[7,22]
LPC_LAD2[7,22]
LPC_LAD3[7,22]

PLTRST#[14,20,22]

EC_SCI_L[14]

IRQ_SERIRQ[14 ,22]

KB_COL00[26]
KB_COL01[26]
KB_COL02[26]
KB_COL03[26]
KB_COL04[26]
KB_COL05[26]
KB_COL06[26]
KB_COL07[26]

KB_ROW 00[26]
KB_ROW 01[26]
KB_ROW 02[26]
KB_ROW 03[26]
KB_ROW 04[26]
KB_ROW 05[26]
KB_ROW 06[26]
KB_ROW 07[26]
KB_ROW 08[26]
KB_ROW 09[26]
KB_ROW 10[26]
KB_ROW 11[26]
KB_ROW 12[26]

R86 1K_4

TP14
TP39

TP9
TP8

TP37
TP35

C93 0.1U/16V_ 4

C105

C98

0.1U/10V_2

1000P/50V_4

EC_LPCPD#

KB_COL00
KB_COL01
KB_COL02
KB_COL03
KB_COL04
KB_COL05
KB_COL06
KB_COL07

KB_ROW 00
KB_ROW 01
KB_ROW 02
KB_ROW 03
KB_ROW 04
KB_ROW 05
KB_ROW 06
KB_ROW 07
KB_ROW 08
KB_ROW 09
KB_ROW 10
KB_ROW 11
KB_ROW 12

LID_OPEN_R
EC_SPI_W P_D
EC_PA5
EC_PB0
TEMP_MBAT
AD_TYPE
PROCHOT_EC
SIO_SPI_ MOSI_EC
SIO_SPI_ MISO_EC

TP_SHDN_L
BAT_LED0
PP3300_ DX_EN
PJ3_T2CCP1 _U5TX
WLAN_O FF_L

PP3300_ PCH_PG

VCORE_EN_R

IMVP_PW RGD_3V_ R
SUSP_VR_ EN
PP1050_ PCH_PG
PP1350_ EN

PP1000_ PCH_SX_PG_R
PP5000_ EN
PP5000_ PGOOD
PP3300_ DSW_E N

SIO_SPI_CLK_EC
SIO_SPI_CS_L
PP3300_ LTE_EN
USB2_PW R_EN
EC_ENTERING_RW

USB_OC1_ L
EC_PE1
EC_PE2
ICMNT
USB3_PW R_EN
USB_ILIM_ SEL
USB_CTL1
USB_OC0_ L

EC_BRD_ID1
EC_BRD_ID2
EC_BRD_ID3

EC_RST#_R

stage

Proto
EVT
DVT
Ramp

7/2 Update EC ID table and used DVT setting.

5

4

C97
1000P/50V_4

D7

E6

E8

E9

J10

U21

B13

PL3/LPC0AD0/T1CCP1/WT1CCP1

A13

PL2/LPC0AD1/T1CCP0/WT1CCP0

C12

PL1/LPC0AD2/T0CCP1/WT0CCP1

D11

PL0/LPC0AD3/T0CCP0/WT0CCP0

H12

PM5/LPC0CLK

D12

PL4/LPC0FRAME_L/T2CCP0/WT2CCP0

F13

PM0/LPC0PD_L/T4CCP0/WT4CCP0

C13

PL5/LPC0RESET_L/T2CCP1/WT2CCP1

F12

PM1/LPC0SCI_L/T4CCP1/WT4CCP1

H13

PM4/LPC0SERIRQ

G2

PK0/AIN16/SSI3CLK

G1

PK1/AIN17/SSI3FSS

H1

PK2/AIN18/SSI3RX

H2

PK3/AIN19/SSI3TX

B11

PK4/RTCCLK/U7RX

B12

PK5/U7TX

C11

PK6/FAN0PWM1/WT1CCP0

A12

PK7/FAN0TACH1/WT1CCP1

M13

PP0/T4CCP0

L12

PP1/T4CCP1

M5

PP2/T5CCP0

J12

PP3/T5CCP1

J13

PP4/WT0CCP0

L5

PP5/WT0CCP1

D8

PP6/WT1CCP0

K6

PP7/WT1CCP1

D4

PQ0/WT2CCP0

E4

PQ1/WT2CCP1

F5

PQ2/WT3CCP0

N5

PQ3/WT3CCP1

N6

PQ4/WT4CCP0

M2

PA2/SSI0CLK

M3

PA3/SSI0FSS

L4

PA4/SSI0RX

N1

PA5/SSI0TX

F11

PB0/T2CCP0/U1RX

E11

PB1/T2CCP1/U1TX

B6

PB4/AIN10/SSI2CLK/T1CCP0

A6

PB5/AIN11/SSI2FSS/T1CCP1

C2

PD2/AIN13/SSI1RX/SSI3RX/WT3CCP0

C1

PD3/AIN12/SSI1TX/SSI3TX/WT3CCP1

B8

PN1/AIN22

N11

PN6/FAN0PWM4/WT4CCP0

A9

PJ2/T2CCP0/U5RX

C8

PJ3/T2CCP1/U5TX

D5

PJ4/C2_P/T3CCP0/U6RX

L2

PC4/C1_M/U1RX/U4RX/WT0CCP0

L1

PC5/C1_P/U1TX/U4TX/WT0CCP1

K1

PC6/C0_P/U3RX/WT1CCP0

K2

PC7/C0_M/U3TX/WT1CCP1

J3

PH4/SSI2CLK/WT3CCP0

H4

PH5/SSI2FSS/WT3CCP1

H3

PH6/SSI2RX/WT4CCP0

G4

PH7/SSI2TX/WT4CCP1

A8

PN0/AIN23

M12

HIB_L

B2

PD0/AIN15/I2C3SCL/SSI1CLK/SSI3CLK/WT2CCP0

B1

PD1/AIN14/I2C3SDA/SSI1FSS/SSI3FSS/WT2CCP1

A4

PD4/AIN7/U6RX/WT4CCP0

B4

PD5/AIN6/U6TX/WT4CCP1

A3

PD6/AIN5/U2RX/WT5CCP0

B3

PD7/AIN4/NMI/U2TX/WT5CCP1

F1

PE0/AIN3/U7RX

F2

PE1/AIN2/U7TX

E1

PE2/AIN1

E2

PE3/AIN0

A5

PE4/AIN9/I2CSCL/U5RX

B5

PE5/AIN8/I2CSDA/U5TX

A7

PE6/AIN21

B7

PE7/AIN20

K5

PQ5/WT4CCP1

M6

PQ6/WT5CCP0

L6

PQ7/WT5CCP1

G12

OSC0

G13

OSC1

G10

RST_L

TM4E1G31H6 ZRBI

F10

VDD1

VDD2

VDD3

VDD4

VDD5

PERIPHERAL INTF

D3

J9

J7

VDD8

VDD6

VDD7

LPC

VDDA

SMBUS INTF

TO PCH

KB

FAN

PECI

LOAD SW

UNUSED

UART

VR CTRL

JTAG

USB CHARGE CTRL

BRD ID

PM2/LPC0CLKRUN_L/T5CCP0/WT5CCP0

C64

C91

2.2U/25V_4

10u/6.3V _4

K13

VDDC1D6VDDC2J1VDDC3J6VDDC4

PB6/I2C5SCL/SSI2RX/T0CCP0
PB7/I2C5SDA/SSI2TX/T0CCP1

PF0/NMI/SSI1RX/T0CCP0/TRD2

PF2/NMI/SSI1CLK/T1CCP0/TRD0

PF3/SSI1FSS/T1CCP1/TRCLK

PG4/I2C1SCL/U2RX/WT0CCP0
PG5/I2C1SDA/U2TX/WT0CCP1

PG7/I2C5SDA/U2TX/WT1CCP0

PH2/FAN0PWM5/SSI3RX/WT5CCP0

PH3/FAN0TACH5/SSI3TX/WT5CCP1

PN3/FAN0TACH2/WT2CCP1
PN5/FAN0TACH3/WT3CCP1

PM7/FAN0TACH0/WT0CCP1
PN7/FAN0TACH4/WT4CCP1

VREFA_P
VREFA_M

PB2/I2C0SCL/T3CCP0

PB3/I2C0SDA/T3CCP1

PA6/I2C1SCL
PA7/I2C1SDA

PF1/SSI1TX/T0CCP1/TRD1

PF4/T2CCP0/TRD3

PF5/T2CCP1

PF6/I2C2SCL/T3CCP0
PF7/I2C2SDA/T3CCP1
PG0/I2C3SCL/T4CCP0

PG1/I2C3SDA/T4CCP1

PG2/I2C4SCL/T5CCP0

PG3/I2C4SDA/T3CCP1

PG6/I2C5SCL/WT1CCP0
PH0/SSI3CLK/WT2CCP0

PH1/SSI3FSS/WT2CCP1

PL6/T3CCP0/WT3CCP0
PL7/T3CCP1/WT3CCP1

PN2/FAN0PWM2/WT2CCP0
PN4/FAN0PWM3/WT3CCP0

PJ7/PECI0RX
PJ6/PECI0TX

PM3/T5CCP1/WT5CCP1

PM6/FAN0PWM0/WT0CCP0

PJ0/T1CCP0/U4RX
PJ1/T1CCP1/U4TX

PJ5/C2_M/T3CCP1/U6TX

PA0/U0RX

PA1/U0TX

PC0/SWCLK/T4CCP0/TCK
PC1/SWDIO/T4CCP1/TMS

PC3/SWO/T5CCP0/TDO

PC2/T5CCP1/TDI

VBAT

WAKE_L

XOSC1
XOSC0

GNDX

GNDA1
GNDA2

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9

GND10

NC

1212 change part number of EC ,which has a trial firmware inside

1211 add Test points on unused pins, need check layout to
see if all points are ok

MB ID

EC_BRD_ID3 EC_BRD_ID2 EC_BRD_ID1

1 0 0
1 0 1
1 01

1 11

4

3

C74

0.1U/10V_2

D2
D1

E10

EC_SMB0_ CLK

D13

EC_SMB0_ DATA

M4

EC_PA6

N2

EC_PA7

F4

EC_SMB2_ CLK

F3

EC_SMB2_ DATA

M9

PCH_WAKE_L

N9

PCH_RSMRST_L

L10

EC_PF2

K10

EC_REST_L

L9

EC_SMI_L

K9

CORE_PW ROK_R

N8

EC_PF6

M8

EC_PF7

L8

HWPG_S 5

K8

SOC_OVERRIDE#

N7

PCH_SUSPWRDNACK

M7

PCH_SLP_ SX_L

K7

PCH_UART_RXD

L7

PCH_UART_TXD

N4

PCH_SUS_STAT_L

N3

PCH_SLP_ S3_L

K3

PCH_PWRBTN_L

K4

PCH_SLP_ S4_L

J4

EC_PH2

J2

EC_ACIN

G11

LPC_CLKRUN_L

E12

EC_SLP_SX_L

E13

EC_PL7

G3

EC_PN2

D10

EC_PN3

L11

BAT_LED1

N12

PMU_BATLOW _L

C4

EC_PECI_RX

C6

EC_PECI_TX

H10

KBD_IRQ#

H11
L13

EC_BL_DISABLE_L

M11
C9

PP3300_ WLAN_ EN

B9

EC_PWROK

C5

PP3300_ PGOOD

L3

EC_UART0_RX

M1

EC_UART0_TX

C10

EC_JTAG_TCK

A10

EC_JTAG_TMS

A11

EC_JTAG_TDO

B10

EC_JTAG_TDI

A2
K12

PP3300_ RTC

N13

EC_WAK E_L

N10
M10
K11

C3
E3

A1
C7

ECGND

D9
E5
F9
H5
H9
J11
J5
J8

EC_SLP_SX_L
SUSP_VR_ EN
VCORE_EN
PP1350_ EN
PP5000_ EN
PP3300_ DSW_E N

3

BLM15AG121SN1D_ 4

C66

C61

1U/6.3V_4

0.1U/10V_2

PWR_LE D#

R69 0_4

R196
100K_2

PP3300_ ECPP3300_ EC_ANA

C56
1U/6.3V_4

12

12

R782 .2_6

C53

0.1U/10V_2

C81 18p/50V_ 4

Y1

32.768KHZ
C87 18p/50V_ 4

L2

PP3300_ EC_ANA

C57

0.01U/50V_4

ECGND

EC_SMB0_ CLK [28]

TP21
TP17

TP36

TP29
TP30

TP7

TP38

TP10
TP31

TP20
TP15

PP3300_ RTC

ECGND

1121 by X'tal vender suggestion,
change C107/C109 from 15pF to 18pF

EC_SMB0_ DATA [28]

EC_SMB2_ CLK [23]

EC_SMB2_ DATA [23]

PCH_WAKE_L [6]
PCH_RSMRST_L [14 ]

EC_REST_L [6]
EC_SMI_L [14]

CORE_PW ROK_R [6,11 ]

SOC_OVERRIDE# [4]

PCH_SUSPWRDNACK [14]
PCH_SLP_ SX_L [14]

PCH_UART_RXD [18]

PCH_UART_TXD [18]

PCH_SUS_STAT_L [14 ]
PCH_SLP_ S3_L [14]
PCH_PWRBTN_L [11,14]
PCH_SLP_ S4_L [14]

LPC_CLKRUN_L [7]
EC_SLP_SX_L [34]

BAT_LED1 [28]

TP34

1128 add a connection and name
to KBD_IRQ#, beside add pulled
high resistor at SoC side

KBD_IRQ# [6]

PWR_LE D# [22]

EC_BL_DISABLE_L [17]

PP3300_ WLAN_ EN [30]

EC_PWROK [2]

PP3300_ PGOOD [29]

0713 For PP3300_PGOOD

EC_UART0_RX [18]

EC_UART0_TX [18]

EC_JTAG_TCK [18]
EC_JTAG_TMS [18]

EC_JTAG_TDO [18]

EC_JTAG_TDI [18]

EC32K_X1

R172
20M_4

EC32K_X2

SM BUS ARRANGEMENT TABLE

SM Bus 0

BATT and CHARGER

SM Bus 1 NA

SM Bus 2

THERMAL SENSOR

R91

R64

R197
100K_2

100K_2

100K_2

R81
100K_2

ECGND

R191
100K_2

2

PP3300_ DSW

C50

0.01U/50V_4

0830

2

EC_ACIN
EC_RST#

EC_LPCPD#
LID_OPEN_R

LID_OPEN_R

ACIN[15,26,2 8]

SM BUS/I2C PU(KBC)

1030 Thermal IC VDD has two option, ome is
PP3300_DSW( =PP3300_EC), another is
PP3300_DX, default is stuffing to DSW rail

PROCHOT_EC

EC HIB WAKE SOURCES

PWR_BTN_ L

TP6

ACIN

C47 0.1U/16V_4

HWPG(KBC)

PP3300_ PCH_S5_PG[15]

OD pin list

EC_REST_L
BAT_LED0
BAT_LED1
PCH_RSMRST_L
SMBUS
IRQ_SERIRQ
EC_BL_DISABLE_L

PP3300_ EC

R92 10 K_2
R210 10K _2

R198 10K _2

Add diode for leakage issue

BATT and CHARGER / LCD BL

THERMAL SENSOR

R85 10 K_2

LID_OPEN_L

D8RB500V -40

LID_OPEN_L[18,22]

ACIN EC_ACIN

D7 RB500V-4 0

C46

0.1U/10V_2

EC_SMB0_ CLK
EC_SMB0_ DATA

EC_SMB2_ CLK
EC_SMB2_ DATA

2

R130
100K_4

D6 RB500V-4 0

34

5

Q12A
DMN2990

R61
47K_4

For testing only

NB5

NB5

NB5
HW

HW

HW

R75 10K_2

R166 4.7K/_2
R192 4.7K/_2

R66 4.7 K/_2
R72 4.7 K/_2

3

Q18

2N7002K

1

LID_OPEN_L

C59 0.01U/50 V_4

0714 delete Power BTN

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

KBC TI TM4E1G31H6ZRBI

KBC TI TM4E1G31H6ZRBI

KBC TI TM4E1G31H6ZRBI

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

PP3300_ RTC

PP3300_ EC

PP3300_ THM

H_PROCHOT# [5,18 ,33]

EC_WAK E_L

DMN2990

HWPG_S 5

1

Q12B

R73
47K_4

27

PP3300_ RTC

2

R68
1K_4

61

1A

1A

1A

27 40Monday, August 17, 20 15

27 40Monday, August 17, 20 15

27 40Monday, August 17, 20 15

5

DC_JACK

19.5V~45W

CN1

1

VDD
VDD

5

GND

8

WLED
ALED

DC-IN_CONN_8 P

D D

ALED

C C

WLED

WLED

7

ALED

PC24
*0.1U/25V_4

PR15

2.43K/F_6

PC15
*0.1U/25V_4

GND
GND
GND
GND

AD_ID

6

PC177
100P/50V_4

PP5000_DSW

1 3

PP5000_DSW

PR18

2.43K/F_6

1 3

2

3
4
9
10

PR166
100/F_4

PQ4
DRC5144E0L

2

2

PQ3
DRC5144E0L

+VA_AC VA

PC26

EC4

0.1U/25V_4

PR165

12.1K/F_4

BAT_LED0 [27]

BAT_LED1 [27]

*10U/25V_8

PL4
*0_8/S

PL5
*0_8/S

PR164
2K_4

PC176

0.1U/25V_4

21

PR146

*100K/F_4

1 3

PC53

set VA=17V

2

PQ18

*METR3904-G

2200P/50V_4

3

1

PR145

576K/F_4

PR157

100K/F_4

*2N7002K

PQ7
AP0203GMT-HF

5

PQ21

VA

PC27

PD1

P4SMAFJ20A

0.1U/25V_4

PD13

PDZ5.6B

2 1

2 1

AD_TYPE [27]

BAT-V

PD3

*1N4448WS-7- F

PR115
*1M_4

VIN

PR136

*1M_4

VA

PR135

2

*750K/F_4

PR129
*127K/F_4

D

VA

21

S

G

4

PD6
1N4448WS-7- F

24715LDO

ICMNT[27 ]

3
2
1

PC63

PD10

*1N4448WS-7- F

2 1

PR131 *0_4/S

PR202
100K_4

ACIN[15,26,2 7]

4

PC66

*0.01U/50V_4

0.1U/25V_4

PR128 10_8

PC141 1U/25V_6

PC165

2.2U/6.3V_4

VA

EC_SMB0_DATA

EC_SMB0_CLK

PR156 1 0K/F_4

PC101

+DC_IN_SS

PR150

4.02K/F_6

PR154 *0_2/S

PR155 *0_2/S

PR158 4.7K_4

PR152

12.4K/F_4

PR159
10/F_4

0.01U/50V_4

21

PC70

*0.1U/25V_4

+DC_IN_SS

24715_ACDRV

24715_VCC

24715_ACDET

PD14
1N4448WS-7- F

IOUT

24715_CMSRC

PC172

PR148

4.02K/F_6

PC152

0.1U/25V_4

3

4

20

6

8

9

10

5

7

100P/50V_4

CMSRC

ACDRV

VCC

ACDET

SDA

SCL

CELL

ACOK

IOUT

1
2
3

EMB20N03V

4

24715ACP

2

ACP

PU12

BQ24715RGRR

H:3 cell
Float: 2cell

GND21GND22GND23GND24GND

3

2

1

28

PQ8

5
6
7
8

PC149

0.1U/25V_4

24715ACN

PC146

0.1U/25V_4

1

ACN

25

REGN

HIDRV

PHASE

LODRV

BATDRV#

24715LDO

16

24715LDO

18

24715DHI

17

24715BST

BTST

19

24715LX

15

24715DLO

14

GND

13

24715SRP

SRP

12

24715SRN

SRN

11

24715BATDRV

PR125 0_6

PC140
1U/10V_4

PD4
RB500V-40

0.047U/50V_6

PC142

+DC_IN

24715LDO

AON7752

RC1206-R010

PR75
*0_2/S

EMB20N03V

PQ15

PQ11

PR74

21

PR73
*0_2/S

VCHGR_IN

678

35241

678

35241

PC156

0.1U/25V_4

PR153 4.02K/F_6

PC127

*0.1U/25V_4

2.2uH_7X7X1.8/6A

PR117
*2.2_6

PC136
*2200P/50V_4

PL8

VCHGR_IN

PC128

2200P/50V_4

PC124

4.7U/25V_8

PC108

10U/25V_8

PC109

PC123

4.7U/25V_8

10U/25V_8

EC13
*4.7U/25V_8

VIN

PC106

PC107

*10U/25V_8

PC150 0.1U/25V_4

PC160 0.1U/25V_4

*10U/25V_8

EC12
*4.7U/25V_8

BAT-V

PL9
*0_8/S

PL10
*0_8/S

PC132

0.1U/25V_4

EC_SMB0_DATA[27]

EC_SMB0_CLK[27]

PR103

RC1206-R010

21

BAT-V_P2

PR106
*0_2/S

+

PC138

10U/25V_8

PR99

PC105

*0_2/S

0.1U/25V_4

PC135

0.1U/25V_4

PR198
330_4

PD11

PDZ5.6B

2 1

PC220

*100P/50V_4

PD5 *SS3040HE

21

PQ14

EMB20P03V

1 5

6

2
3

7
8

4

PR199
330_4

2 1

BATT+

SMD
SMC

PD12

PDZ5.6B
PC222

*100P/50V_4

3S1P~36W

5
6

8
9
3

B_TEMP_MBAT

1

PP3300_RTC

PR196
200K_4

PR110

RC1206-R010

IN- IN+

CN5

Pack+
Pack+

BATT_EN#
I2C_DAT
I2C_CLK
B/I

GND

BATTERY_10P

PR197
1K/F_4

PC219

0.01U/50V_4

21

NC
NC

GND
GND
GND

TEMP_MBAT

PC159

0.01U/50V_4

2

BATT_EN# [26]

7
4
10

11
12

TEMP_MBAT [27]

BAT-V

BAT-V BATT+ B_TEMP_MBAT TEMP_MBAT

EC18

56P/50V_4

56P/50V_4

EC30

56P/50V_4

56P/50V_4

EC28

EC19

For EMI

VCHGR_IN

10ms one-shot circuit

B B

*0.1U/25V_4

PP5000

PC217

IN+

IN-

PR113

*0_2/S

6

OUT

INA199B1DCKR

REF

1

PR107
*0_2/S

PC216

PC215

*0.1U/25V_4

*0.1U/16V_4

5

4

IN-

IN+

PU10

V+3GND

2

PD7

RB500V-40

PC145

0.1U/16V_4

PR123 *0_6/S

PP5000

PP5000

PP5000

PR143

PR144

100K/F_4

PR149 25.5K/F_4

ICMNT

PC155

0.01U/50V_4

IMVP7_PROCHOT#[5]

A A

PC154

*100P/50V_4

PC167

0.01U/50V_4

1.5M_4

PC166
*100P/50V_4

PQ23

2N7002K

PC171

0.01U/50V_4

84

3

+

1

2

-

PU13A

LMV393IDR

PU11
NL27WZ00USG

PP5000

PR200
100K_4

PD9

1N4448WS-7- F

1
2

3

2 1

2 1

1N4448WS-7- F

PD8

LMV393IDR

PU13B

PR142

1.5M_4

PC164

-

6

100P/50V_4

7

+

PC153
100P/50V_4

5

PR141

150K/F_4

PR140

150K/F_4

PP5000

PC221

0.01U/50V_4

3

2

PC218

0.1U/25V_4

1

PR195
220K/F_4

84

7

6
5

EC16

EC17

*10U/25V_8

EC15

EC14

10U/25V_8

*10U/25V_8

*10U/25V_8

For EMI ISN

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5
HW

HW

5

4

3

2

HW

Charger(BQ24715)

Charger(BQ24715)

Charger(BQ24715)

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

1A

1A

1A

28 40Monday, August 17, 2015

28 40Monday, August 17, 2015

28 40Monday, August 17, 2015

5

4

3

2

1

DC/DC +3VS5/+5VS5

D D

PP3300_PGOOD[27]

PP3300_DSW

3VPCU_VIN

3VPCU_VIN

PP3300_DSW_EN[16,27]

C C

PP3300_RTC

PC85

PR82

*665K/F_4

PR71

*330K/F_4

PR84
*499K/F_4

10U/6.3V_6

PR81 *0_4

PR72 *100K/F_4

PR83 *0_4/S

PU7

6

LDO

3

NC

5

CLK

4

NB670PG

PGOOD

12

NB670ENLDO

NB670EN NB670VOUT

PC89
*0.1U/16V_4

ENLDO

13

EN

NB670

AGND
PGND

VCC

VOUT

BST

1

VIN

14
2

10

8

NB670SW

SW

9

SW

15

SW

16

SW

11

7

PC84
1U/6.3V_4

PC76

*0.1U/16V_4

PR56

PC210

0_6

3VPCU_VIN

PC112

PC100

4.7U/25V_8

4.7U/25V_8

0.1U/25V_4
PC74

NB670BST_SNB670BST

0.1U/25V_4

PC213

PR183
*2.2_6

PC206

*2200P/50V_4

2200P/50V_4

PR90 *0_8/S

PL6

2.2uH_7X7X1.8

PR30
*0_2/S

VIN

3.3 Volt +/- 5%

PR31 *0_8/S

PC30

22U/6.3V_8

TDC : 6A
PEAK : 8A
Width : 240mil

G3/DSW

PP3300_DSW

PC32

EC3

22U/6.3V_8

*0.1U/16V_4

For EMI reserve

PC98

+

0.1U/25V_4

PC58

PP3300_DSW_SRC

PC44

PC31

PC29

0.1U/16V_4

22U/6.3V_8

22U/6.3V_8

*150U/6.3V_3528

29

PP5000_DSW

PU9

6

PC139

1U/6.3V_4

3
5

4

11

13

NC

NC
NC

PGOOD

VCC

EN

NB669

5VPCU_VIN

4

PP5000_EN[27]

PR111 *0_4/S

PP5000_PGOOD[27]

NB671_VCC

PR116 100K/F_4

PC134

PR130 *0_4

10U/6.3V_6

PR147 *0_4/S

NB671PG

PR126
200K/F_4

NB671_VCC

NB671EN

PC151
*0.1U/16V_4

B B

Reserve for NB670 5V version.

A A

5

AGND
PGND

BST

VOUT

VIN

SW
SW
SW
SW

FB

1

14
2

10

8
9
15
16

7

12

PR133

*665K/F_4

NB671SW

NB671VOUT

NB671FB

PC148

0.1U/25V_4

PR109

0_6

*82K/F_4

PR127
*11K/F_4

NB671BST_SNB671BST

PR132

PC158

4.7U/25V_8

PC157

PC131

0.1U/25V_4

NB671FB_1

5VPCU_VIN

4.7U/25V_8

PC147

2200P/50V_4

PR96
*2.2_6

PC115
*2200P/50V_4

PL7

2.2uH/6A_7X7X1.5

3

PC168

0.1U/25V_4

PR80
*0_2/S

VIN

S3

PP5000

EC9

22U/6.3V_8

NB5

NB5

NB5
HW

HW

HW

For EMI reserve

*0.1U/16V_4

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom
Date: Sheet of

Date: Sheet of

Date: Sheet of

3V/5V (NB670/NB669)

3V/5V (NB670/NB669)

3V/5V (NB670/NB669)

1

29 40Monday, August 17, 2015

29 40Monday, August 17, 2015

29 40Monday, August 17, 2015

1A

1A

1A

+

PC116

*150U/6.3V_3528

PC113

0.1U/16V_4

PC91

PP5000_SRC

PR76 *0_8/S

PC92

22U/6.3V_8

22U/6.3V_8

2

PC104

22U/6.3V_8

PC90

5

4

3

2

1

30

7

VIN26VIN2

CT2

10

PC61
*1000P/50V_4

OUT2
OUT2

GND
GND

ON2

PP3300_DSW

PC47

0.1U/16V_4

8
9

11
15

5

PC33
*0.1U/16V_4

PP3300_DX_1PP3300_PCH_S5_1PP3300_PCH_S5 PP3300_DX

PR42
*0_6/S

PC54

0.1U/16V_4

PR26 *0_4/SPR27 *0_4/S

PC60
*10U/6.3V_6

2.5A

EC8

For EMI reserve

*0.1U/16V_4

PP3300_DX_EN [27]

TDC : 0.026A
PEAK : 0.035A
Width : 20mil

PP1350_PCH_PG[34]

1A

PP1350_PCH_PG

PP1800_PCH

PR44

*0_6/S

PP5000_DSW

PR29 *0_4/S

PR118 4.7K_4

PC65
*10U/6.3V_6

PC37

0.1U/16V_4

PP1800_PCH_S5

PC50

0.1U/16V_4

13
14

PC57

0.1U/16V_4

4

3

PC38
*0.1U/16V_4

PP1800_PCH_PG_1

PC143
*1000P/50V_4

VOUT1
VOUT1

VBIAS

ON1

PC69

1500P/50V_4

2

PP3300_DSW

1

VIN12VIN1

PU4

APL3523A

CT1

12

PP1800_PCH_PG_2

PQ20
METR3904-G

1 3

7

VIN26VIN2

CT2

10

PC59
1000P/50V_4

OUT2
OUT2

GND
GND

ON2

PC49

0.1U/16V_4

8
9

11
15

5

PR134

4.7K_4

PC144
1000P/50V_4

PR36 *0_8

PP3300_WLAN_1PP1800_PCH_1PP1800_PCH PP3300_WLAN

PC56

0.1U/16V_4

PR28 *0_4/S

PC36
*0.1U/16V_4

PP3300_PCH_S5

2

PR139

4.7K_4

PP1800_PCH_PG

PQ22

1 3

DRC5144E0L

PR43

*0_6/S

PC64
*10U/6.3V_6

PP3300_WLAN_EN [27]

EC7

1A

For EMI reserve

*0.1U/16V_4

PP1800_PCH_PG [35]

PP3300_DSW

PC34

0.1U/16V_4

PC48

0.1U/16V_4

PC55

0.1U/16V_4

PC35
*0.1U/16V_4

13

VOUT1

14

VOUT1

4

VBIAS

3

ON1

PC71

*1000P/50V_4

1

APL3523A

VIN12VIN1

PU3

CT1

12

1A

D D

PP1800_PCH_S5_PG[35]

C C

PR40

*0_6/S

PP5000_DSW

PP1800_PCH_S5_PG

PC62
*10U/6.3V_6

B B

A A

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5
HW

HW

HW

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Load Switch

Load Switch

Load Switch

1

1A

1A

1A

30 40Monday, August 17, 2015

30 40Monday, August 17, 2015

30 40Monday, August 17, 2015

1

2

3

4

5

PC6

*22U/6.3V_8

31

PC7

*22U/6.3V_8

PP3300_PCH_S5

PR37

*100K/F_4

PP1350_PGOOD[2]

A A

B B

PP1350_VREF

PP1350_EN[27]

VSFR_EN[34]

( 3mA )

VSFR_EN

+DDR_VTT_RUN

PR45

100/F_4

PC73

0.1U/16V_4

PR46 *0_4/S

PR59 *0_4/S

S3 S5

C C

S0

S3 (mainon off)

1
0

1
1

S4/S5

ON
ON ON
OFF

PC51
10U/6.3V_6

PC67

0.033U/10V_4

PP1350

PR38 *0_4/S

PC68
*0.1U/16V_4

20

2

1

4

19

PC45

*10U/6.3V_6

PP5000_DSW

VTTREF+1.35VSUS

ON ON

OFF

OFF OFF0 0

PC72
*0.1U/16V_4

VTT
VTTSNS

VTTGND

VTTREF
VLDOIN

PR41
*0_2/S
PR35
*0_2/S

1P35V_S5

1P35V_S3

7

S58S3

RT8231BGQW

LPMB

VID

3

11

1P35V_VID

PU5

PR33
243K/F_4

1P35V_TON

1P35V_CS

1P35V_PGOOD

9

13

10

CS

TON

PGOOD

VDDQ

PGND

FB

5

6

14

1P35V_FB

1P35V_VDDQ

10.2K/F_4

PR53
10K/F_4

PR47

17

UGATE

18

BOOT1

16

PHASE

15

LGATE

12

VDD

PAD

21

PR182

499K/F_4

1P35V_UGATE

PC46
1U/6.3V_4

PR32

2.2_6

PP5000_DSW

1P35V_BOOT

1P35V_PHASE
1P35V_LGATE
1P35V_VDD

VO=(0.675(R1+R2)/R2)

PC41

0.1U/25V_4

PQ6

EMB20N03V

PQ5

AON7752

Rds(on) 14m ohm

35241

35241

PC205

PC43

PC52

4.7U/25V_8

PL3

1uH_7X7X1.5

PC204

2200P/50V_4

678

0.1U/25V_4

4.7U/25V_8

678

PR22
*2.2_6

PC22
*2200P/50V_4

PL13
*0_8/S

VIN+VIN_DDR

PC203

+1.35V +/- 5%
Countinue current:6A
Peak current:8A
OCP minimum:12A

PC8

PP1350

PJP1
*POWER_JP/S

1 2

PC14

22U/6.3V_8

22U/6.3V_8

PC23

PC20

*22U/6.3V_8

*22U/6.3V_8

0.1U/25V_4

PR4
*0_2/S

+1.35VSUS_S

PC3

0.1U/16V_4

D D

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5
HW

HW

HW

Date: Sheet of

Date: Sheet of

1

2

3

4

Date: Sheet of

DDR3 (RT8231B)/1.8VS5

DDR3 (RT8231B)/1.8VS5

DDR3 (RT8231B)/1.8VS5

5

1A

1A

1A

31 40Monday, August 17, 2015

31 40Monday, August 17, 2015

31 40Monday, August 17, 2015

5

PP1050_PCH_PG[27,34,35]

D D

PP1000_PCH_PG[35]

PP3300_DSW

PP3300_DX

PP1050_PCH_PG 8002LX1.05V

PR13 *0_4/S

PR21
10K/F_4

PR24 *0_4/S

PC21

1000p/50V_4

PR25 *0_6/S

5

1

APW8826QCI-TRG

PU2

PG

EN

R2

PR7 100K/F_4

C C

PP3300_DSW

PP1000_PCH_S5_PG[35]

PR14 *0_6/S

PP3300_DSW

PP1000_PCH_S5_PG

PC13

0.01U/50V_4

PR6 *0_4/S

PR9

10_6

PC4

10U/6.3V_6

554PG_1.0V
554PVIN_1.0V

554SVIN_1.0V

PC10

1U/6.3V_4

4

PC25

4.7U/6.3V_6

4

3

VIN

LX

2

GND

FB

6

R1

PR17

11.3K/F_4

PR20
15K/F_4

VO=(0.6(R1+R2)/R2)

PC2

*2200P/50V_4

PU1

4

PG

9

PVIN

10

PVIN

RT8068A

8

SVIN

11

GND

PL2

1uH/2.6A_2520

PR2

*2.2_6

1

NC

2

LX

3

LX

7

NC

6

FB

5

EN

PC12

1000p/50V_4

PR19
*0_2/S

554LX_1.0V

554NC_1.0V
554FB_1.0V
554EN_1.0V

PP1050_PCH_SRC

PC19

PC18

10U/6.3V_6

PL1

1uH/3.42A

PC16

*22P/50V_4

PC186

*68P/50V_4

PR11 *0_4/S

10U/6.3V_6

PR23 *0_6/S

PC17

0.1U/16V_4

554FB_1.0V_S

R1

R2

3

1.05Volt +/- 5%
TDC : 0.75A
PEAK : 1A
Width : 40mil

PP1050_PCH

EC2

For EMI reserve

*0.1U/16V_4

PP1000_PCH_S5_SRC

PR3

PR12

6.81K/F_4

PR8

10K/F_4

*0_2/S

PC11

0.1U/16V_4

V0=0.6*(R1+R2)/R2

SUSP_VR_EN [27]

1.0Volt +/- 5%
TDC : 2.07A
PEAK : 2.75A
Width : 100mil

PP1000_PCH_S5

PR5
*0_8/S

PC5

22U/6.3V_8

EC1

For EMI reserve

*0.1U/16V_4

2

1

32

B B

A A

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
C

C

C

NB5

NB5

NB5
HW

HW

5

4

3

2

HW

+1.05V/+1V

+1.05V/+1V

+1.05V/+1V

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

1A

1A

1A

32 40Monday, August 17, 2015

32 40Monday, August 17, 2015

32 40Monday, August 17, 2015

5

4

3

2

1

33

D D

12

PC170

4.7u/25V_8

PR68 3.65K/F_4

PR64

11K/F_4

PR57 1/F_4

Core

12

PC130

4.7u/25V_8

*2.2_6

PR119

PC137

*2200P/50V_4

PR122 3.65K/F_4

2

VIN_VCC_GT

PC161

PC174

4.7u/25V_8

0.33uH/19.5A_7X7X1.5

PR160

*0_2/S

95833_ISUMPG_1

VIN_VCC_CORE

PC133

4.7u/25V_8

PC125

PR137

*0_2/S

PR79

11K/F_4

PR112 1/F_4

PC95

2200p/50V_4

PL12

PR161
*0_2/S

95833_ISUMNG_1

PR124 *0_8/S

2200p/50V_4

PL11

0.33uH/19.5A_7X7X1.5

95833_ISUMP_1

12

12

+

+

PC96

95833_ISUMN_1

PR138
*0_2/S

*100u/16V_7343

+VCC_GFX

PC229*22u/6.3V_6

PC231*10U/6.3V_6

PC2280.1u/16V_4

VIN

+VCC_CORE

PC225*22u/6.3V_6

PC2270.1u/16V_4

PC224*10U/6.3V_6

NB5

NB5

NB5
HW

HW

HW

*100u/16V_7343

VIN

+VCC_GFX

PC173

+

PC163220u/2V_7343

+

1

For EMI reserve

EC31

*0.1U/16V_4

220u/2V_7343

For EMI reserve

EC29

*0.1U/16V_4

+VCC_GFX
PEAK : 14A
OCP : 18A
Width : 600mil

+VCC_CORE

+VCC_CORE
PEAK : 12A
OCP : 18A
Width : 500mil

33 40Monday, August 17, 2015

33 40Monday, August 17, 2015

33 40Monday, August 17, 2015

PC179

PC230*22u/6.3V_6

+

*220u/2V_7343

GFX_CORE Load Line :

-5.9mV/A for SDP=4.5W

PC162220u/2V_7343

PC226*22u/6.3V_6

+

VCORE Load Line :

-5.9mV/A for SDP=4.5W

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

+VCC_CORE(ISL95833)

+VCC_CORE(ISL95833)

+VCC_CORE(ISL95833)

Date: Sheet of

Date: Sheet of

Date: Sheet of

1A

1A

1A

PR188

PC212

*2K/F_4

*330p/50V_4

PR191

PC214

24.9K/F_4

PC110

100P/50V_4

95833_BOOTG

95833_UGATEG

95833_PHASEG

95833_LGATEG

95833_LGATE1

95833_PHASE1

95833_UGATE1

95833_BOOT1

95833_COMP

100P/50V_4
PC114

PR190

24.9K/F_4

PR186
*2K/F_4

1000P/50V_4

PR105
*0_4/S

PC120

1u/10V_4

1000P/50V_4

*330p/50V_4

PP5000

PC209

PC208

PR104
*0_4/S

PC119

1u/10V_4

PC122

0.22u/25V_6

PC121

0.22u/25V_6

PR92

21K/F_4

PR91

64.9K/F_4

3

95833_UGATEG

95833_UGATE1

PR97

1_6

95833_LGATEG

95833_ISUMPG

PC93

*0.1u/25V_4

95833_ISUMNG

PR108

1_6

95833_LGATE1

95833_ISUMP

PC78

*0.1u/25V_4

95833_ISUMN

95833_UGATEG_1

PQ25
FDMS3664S

PC87

0.1u/25V_4

95833_UGATE1_1

PQ19
FDMS3669S

PC77

0.1u/25V_4

G1

1

S1/D2

8

G2

PC86

*4700P/25V_4

G1

1

S1/D2

8

G2

PR94

PC117

*330p/50V_4

PC118
*0.01u/50V_4

2

VR_ON

15

PGOOD

27

PGOODG

6

VR_HOT#

3

SCLK

4

ALERT#

5

SDA

VCC_AXG_SENSE_SRC
VSS_AXG_SENSE_SRC

ISEN28ISEN1

PR184
*0_2/S

PP5000

PC99

*0.01u/50V_4

PC97
*330p/50V_4

95833_ISUMNG

PR86

*649/F_4

PC102*4700P/25V_4

PR85 1.47K/F_4

95833_NTCG

95833_ISUMPG

1

32

33

PAD

NTCG

NTC

7

9

95833_NTC

95833_ISUMN

31

ISUMPG

ISUMNG

PU8

ISL95833HRTZ-T

ISUMP10ISUMN11RTN12FB13COMP

95833_ISUMP

PC83

*4700P/25V_4

PR78

1.27K/F_4
PR54

*649/F_4

VSS_SENSE_SRC
VCC_SENSE_SRC

4

VCC_AXG_SENSE[8]
VSS_AXG_SENSE[8]

PR102 *0_4/S
PR101 *0_4/S

Parallel

C C

PP3300_DX

PR63

PR55

27.4K/F_4

*100K/F_4

PR70 *0_4/S
PR69 *0_4/S

VCORE_EN[27]

IMVP_PWRGD_3V[27,34,35]

PP3300_DX

PR185 1.91K/F_4

95833_NTC

PR192

3.83K/F_4

PC211

43p/50V_4

PR189

27.4K/F_4

PP1000_PCH

H_PROCHOT#[5,18,27]

B B

VR_SVID_CLK[6]

VR_SVID_ALERT#[6]

VR_SVID_DATA[6]

PR187

470K_4 NTC

A A

PP3300_DX

VR_SVID_CLK

VR_SVID_ALERT#

VR_SVID_DATA

PR48

470K_4 NTC

VSS_SENSE[8]
VCC_SENSE[8]

PR51 *0_4/S

PR194 *1.91K/F_4
PR193 *0_4

PR52 *499/F_4

PR62 20/F_4

PR61 *0_4/S

PR65 16.9/F_4

95833_NTCG

PR49

3.83K/F_4

Parallel

5

2K/F_4

PR93

PC111

499/F_4

470p/50V_4

95833_COMPG

28

29

30

FBG

RTNG

PR88

499/F_4

VCCP

COMPG

BOOTG

UGATEG

PHASEG

LGATEG

PWM2

LGATE1

PHASE1

UGATE1

BOOT1

14

470p/50V_4

PR89 2K/F_4

VDD

22

21

26

25

24

23

20

19

18

17

16

PC103

VIN_VCC_GT

PC175

0.1U/25V_4

95833_PHASEG

PR87

2.61K/F_4

12

10K/F_4 NTC

PC126

0.1U/25V_4

95833_PHASE1

PC207

33n/25V_4

PR201

PC223

*2.2_6

*2200P/50V_4

PR151

12

12

VIN_VCC_CORE

12

PR114

2.61K/F_4

PR120

10K/F_4 NTC

2

D1D1D1

9

S2S2S2

567

PC94

33n/25V_4

2

D1D1D1

9

S2S2S2

567

PC88

*4700P/25V_4

1

2

3

4

5

PP1350PP1000_PCH_S5

OUT2
OUT2

GND
GND

ON2

1.35V_PG_2

PC190

0.1U/16V_4

PP1350_PCH_SX_1PP1000_PCH_SX_1PP1000_PCH_SX PP1350_PCH_SX

8
9

11
15

5

PC189

0.1U/16V_4

VSFR_EN EC_SLP_SX_L

PC188
*0.1U/16V_4

PR67

4.7K_4

2

PC80
1000P/50V_4

PR174
*0_6/S

PC191
*10U/6.3V_6

PR173 *0_4/S

PR175 *0_4/P

PP3300_PCH_S5

PR77

4.7K_4

PP1350_PCH_PG

PQ9

1 3

DRC5144E0L

EC25

For EMI reserve

*0.1U/16V_4

PP1050_PCH_PG

PP1350_PCH_PG [30]

TDC : 0.28A
PEAK : 0.375A
Width : 20mil

EC_SLP_SX_L [27]

PP1000_PCH

PP1350_PCH_SX

PR169 *0_8

PP1350_PCH_SX PP1350_PCH

PR172 *0_6

PC182

0.1U/16V_4

1

A A

IMVP_PWRGD_3V[27,33,35]

PP1350_PCH_SX_PG[15]

B B

TDC : 1.43A
PEAK : 1.9A
Width : 80mil

IMVP_PWRGD_3V

PP1350_PCH_SX_PG

PR168
*0_6/S

PP5000_DSW

PR171 *0_4/S

PP1350_PCH

PC180
*10U/6.3V_6

PC185

0.1U/16V_4

PR170*0_4/P

PR58 4.7K_4

PC181

0.1U/16V_4

PC183
*0.1U/16V_4

13

VOUT1

14

VOUT1

4

VBIAS

3

ON1

PC184

2200P/50V_4

1.35V_PG_1

PC79
*1000P/50V_4

VIN12VIN1

PU14

APL3523A

CT1

12

2

7

VIN26VIN2

CT2

10

PC187
2200P/50V_4

PQ10
METR3904-G

1 3

VSFR_EN[31]

SUSP_VR_EN[27,32]

PP1050_PCH_PG[27,32,35]

PP1000_PCH_SX

PP1350_PCH

VSFR_EN

34

C C

D D

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5
HW

HW

HW

Date: Sheet of

Date: Sheet of

1

2

3

4

Date: Sheet of

LDO (1V/1.35V/1.5V/1.8V)

LDO (1V/1.35V/1.5V/1.8V)

LDO (1V/1.35V/1.5V/1.8V)

5

1A

1A

1A

34 40Monday, August 17, 2015

34 40Monday, August 17, 2015

34 40Monday, August 17, 2015

1

2

3

4

5

1.0V_PG_2

PQ1
METR3904-G

1 3

PP3300_DSW

PC42

0.1U/16V_4

PC39

1U/6.3V_4

PP1800_PCH_PG[30]

3

VIN

2

EN
VDD4GND

1

PGOOD

R2

PR10

4.7K_4

2

PC9
1000P/50V_4

NC

PU6
G9661

VOUT

GND

ADJ

7

R1

127K/F_4

PR60
100K/F_4

VO=(0.8(R1+R2)/R2)
R2<120Kohm

PP3300_PCH_S5

PR16

4.7K_4

PQ2

1 3

DRC5144E0L

5

6

8
9

PR50

PP1000_PCH_PG

PC75

10U/6.3V_6

PP1000_PCH_PG [32]

TDC : 0.049A
PEAK : 0.065A
Width : 20mil

PP1800_PCH_S5_S

PC81

*10U/6.3V_6

PP1800_PCH_S5

PR66

*0_6/S

PC82

0.1U/16V_4

EC10

For EMI reserve

35

*0.1U/16V_4

PP1350PP1000_PCH_S5

TDC : 2.07A
PEAK : 2.75A
Width : 100mil

PR178 *0_4/S

IMVP_PWRGD_3V

2

PQ17

DRC5144E0L

PR177
*0_6/S

1 3

PC194
*10U/6.3V_6

PR176 *0_4/S

PR98
1M_4

PR100
1M_4

A A

PP5000_DSW

IMVP_PWRGD_3V[27,33,34]

B B

PP1800_PCH_PG

C C

PC197

0.1U/16V_4

2

PC193

0.1U/16V_4

PC192

0.1U/16V_4

PC195
*0.1U/16V_4

3

1

13

VOUT1

14

VOUT1

4

VBIAS

3

ON1

PC196

2200P/50V_4

PQ13
2N7002K

1

VIN12VIN1

PU15

APL3523A

CT1

12

PR95

22_8

PP3300_PCH_S5

7

VIN26VIN2

OUT2
OUT2

CT2

10

PC198
2200P/50V_4

PP3300_PCH

GND
GND

ON2

PC202

0.1U/16V_4

8

PP1350_PCH_1PP1000_PCH_1PP1000_PCH PP1350_PCH

9

11
15

5

VIN

3

2

1

PR121
1M_4

PQ16

2N7002K

PC199
*0.1U/16V_4

PC201

0.1U/16V_4

PC129
*2.2n/50V_4

PR181
*0_6/S

PC200
*10U/6.3V_6

PR179 *0_4/S

PR180

*100K/F_4

PP3300_DSWVIN

3

2

PQ12
AO3404

1

TDC : 0.025A
PEAK : 0.033A
Width : 20mil

EC26

For EMI reserve

TDC : 0.315A
PEAK : 0.42A

*0.1U/16V_4

Width : 20mil

PP1050_PCH_PG

PP1000_PCH_S5_PG[32]

PP3300_PCH

PP1050_PCH_PG [27,32,34]

PP1000_PCH

PR1 4.7K_4

PP1000_PCH_S5_PG

1.0V_PG_1

PR34
*0_4/S

PC40

*0.1U/16V_4

PP1800_PCH_S5_PG[30]

PP3300_DSW

2

PC1
*1000P/50V_4

PC28

10U/6.3V_6

PP5000_DSW

PR39 100K_4

PR162

4.7K_4

PR163

4.7K_4

PC169
1000P/50V_4

2

2

3.3V_PG_2

PC178
*1000P/50V_4

2

PQ26
METR3904-G

1 3

PP3300_PCH

D D

PR167 4.7K_4

1

3.3V_PG_1

PQ24

1 3

DRC5144E0L

PP3300_PCH_PG [27]

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5
HW

HW

HW

Date: Sheet of

Date: Sheet of

3

4

Date: Sheet of

LDO(1.2V/3.3V/1.8V)

LDO(1.2V/3.3V/1.8V)

LDO(1.2V/3.3V/1.8V)

5

1A

1A

1A

35 40Monday, August 17, 2015

35 40Monday, August 17, 2015

35 40Monday, August 17, 2015

1

2

3

4

5

3VPCU_VIN 5VPCU_VIN +VIN_DDR

A A

RFC2
*2200P/50V_4

B B

*2200P/50V_4

RFC1
*2200P/50V_4

VIN_VCC_GT VIN_VCC_CORE

RFC5
*2200P/50V_4

RFC4
*2200P/50V_4RFC3

VIN_VCC_CORE

VIN_VCC_GT

VIN_VCC_CORE [33]

VIN_VCC_GT [17,25,28,29,31,33,35]

36

C C

D D

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

NB5

NB5

NB5
HW

HW

1

2

3

HW

4

Custom
Date: Sheet of

Date: Sheet of

Date: Sheet of

EMI/RF

EMI/RF

EMI/RF

36 40Monday, August 17, 2015

36 40Monday, August 17, 2015

36 40Monday, August 17, 2015

5

1A

1A

1A

5

Support S0iX

1

BAT-VVIN

EC_ACIN

ACPRESENT

D D

PP3300_RTC

2

5

PP3300_DSW

PP3300_DSW_EN PP5000_EN

4

VIN

1

V1P0A
TLV62130A

C C

B B

EN

PP3300_DSW

5

V1P8A
G9661-25

EN

PP1000_PCH_S5_PGD

PP3300_DSW

5

V3P3A
TPS22930

EN

PP1800_PCH_S5_PGD

S5 PWR

VIN

1

DDR VDDQ
VR

S5 PG

S3

S5

PP1000_PCH_SX_PG

A A

3V/5V

EN2

VOUT

PG

SUSP_VR_EN

VOUT

PG

VOUT

PP1350_EN

5

CHARGER

1

VIN

VR

PP1350

PP1350_VREF

+DDR_VTT_RUN

PP1350_PGOOD

PP5000_DSW

PP5000

EN1

PG

8

PP1000_PCH_S5

PP1000_PCH_S5_PGD

7

10

PP1800_PCH_S5

PP1800_PCH_S5_PGD

9

12

PP3300_PCH_S5

MOS

PP3300_PCH_S5_PGD

11

48

22

20

PP5000_PGOOD

23

24

49

25

S0IX
S3 PWR

Battery

5

19

21

49

+DDR_VTT_RUN

9

VCC can follow in the CORE rail sequence
or at the same time

11

13

S3
S3
S0IX

S3

S0 PWR

4

PWR
BTN

6

PP3300_PCH_S5_PGD

13

PP3300_PCH_PG (ALL_S0_PGD)

42

PP1350_PGOOD

25

PP5000_PGOOD

18

VCORE_PGOOD

29

44

EC_SLP_SX_L

VTT_PWRGD

S0IX

MOS

please PP3300_DX_EN
early than VCORE_EN

VIN

1

IMVP
VR

SVID

CPU

4

+V1P0S

AON7400AL

ENENENENEN

+V1P05S

TLV62150ARGTR

+V1P35S

AO3404

+V1P8S

G9661-25

+V3P3S

AO3404

8

1

23

5

PP3300_DSW

5

50

S0 PWR

VCC

VNN

PG

EN

PG

PG

PG

PG

PG

PWR_BTN_L

HWPG_S5

HWPG_S0

EC_SLP_SX_L

S0IX_PGD

VCORE_EN

29

31

+VCORE

+VGFX

30

VCORE_PGOOD

VCORE_EN

PP1000_PCHPP1000_PCH_S5

PP1000_PCH_PG
MOS

IMVP_PWRGD_3V

35

PP1050_PCH_PG

36

PP1000_PCH_PG

34

PP1350_PCHPP1350

PP1350_PCH_PG

MOS

PP1050_PCH_PG

PP1800_PCHPP3300_DSW

PP1800_PCH_PG

PP1500_PCH_PG

PP3300_PCH

PP3300_PCH_PG

MOS

PP1800_PCH_PG

3

EC_ACIN

PCH_RSMRST_L

EC

CORE_PWROK

EC_PWROK

PP5000_EN

PP1350_EN

SUSP_VR_EN

PP3300_DX_EN

7

28

32

29

33

34

32

PP1050_PCHVIN

1922

PP3300_DSW_EN

4

+VSFR
MOS AO3404

+V1P0SX
MOS AO3404

14

16

PMC_SUSPWRDNACK

PCH_SLP_S4_L

18

PCH_SLP_S3_L

PP1350

23

VOUT

EN

EC_SLP_SX_L

PP1000_PCH

33

VOUT

EN

PP1350_PCH_SX_PG

t1 : RTC_VCC to ILB_RTC_TEST# de-assertion 9ms -min (2-3)

t1 : RTC_VCC to PMC_RSMRST# de-assertion 9ms-min (2-11)

27

45

PP1350_PCH_SX

MOS

PP1350_PCH_SX_PG

44

47

PP1000_PCH_SX

MOS

PP1000_PCH_SX_PG

46

2

ILB_RTC_RST#

3

ILB_RTC_TEST#

3

ACPRESENT

PMC_SUSCLK[0]

15

PCH_PWRBTN_L

17

PMC_CORE_PWROK

52

PMC_SUS_STAT#

53

PLTRST#

54

43

PCH_SLP_SX_L

ILB_RTC_RST#

ILB_RTC_TEST#

ACPRESENT

RSMRST#

PMC_SUSCLK[0]

SUSACK

PWRBTN#

SLP_S4#

SLP_S3#

PMC_CORE_
PWROK

PMC_SUS_
STAT#

PLTRST#

SLP_S0IX#

PCH

CPU

51

PP1350_PGOOD

25

DRAM_CORE_PWROK

46

DRAM_VDD_
S4_PWROK

DRAM_CORE_
PWROK

SVID

SVID

2

PP3300_RTC

VRTC

V1P0A

V1P24A

V1P8A

V3P3A

V1P0S

V1P05S

V1P35S

VAUD

V1P8S

VSDIO
VLPC
V3P3S

CORE PWR

VDDQ PWR

GPU PWR

1

37

PP1000_PCH_S5

PP1200_PCH_S5

PP1800_PCH_S5

PP3300_PCH_S5

PP1000_PCH

PP1050_PCH

PP1350_PCH

PP1500_PCH_TS

PP1800_PCH

PP3300_PCH

+VCORE

PP1350

+VGFX

S0IX

48

S0IX

t2 : V3P3A valid to PMC_RSMRST# de-assertion 10us -min (8-11)

37

38

36

39

40

38

t3 : PMC_RSMRST# to Internal RTC clock stable 100ms -max (11- RTC clock)
t4 : Internal RTC clock stable to PMC_SUSCLK[0] toggling 5ms -min (RTC clock - 12)
t5 : PMC_SLP_S4# de-assertion to PMC_SLP_S3# de-assertion 30us -min (15-25)
t6a : Core Well stable to DRAM_CORE_PWROK and PMC_CORE_PWROK assertion

(no PCIE device) 10ms -min (43-45)

t6b : Core Well stable to DRAM_CORE_PWROK and PMC_CORE_PWROK assertion
(for power rails needed by pcie device) 99ms -min (43-45)

t7 : DRAM/PMC_CORE_PWROK to PMC_SUS_STAT# 1ms -min (45-46)
t8 : PMC_SUS_STAT# de-assertion to PMC_PLTRST# de-assertion 60us -min (46-47)

a 10us to 2000us delay is required between rails to avoid inrush current caused by multiple loads
turning on simultaneously and fast charging of VR output decoupling

41

PROJECT : Belu

PROJECT : Belu

42

40

3

2

NB5

NB5

NB5
HW

HW

HW

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Power Sequence

Power Sequence

Power Sequence

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

37 40Monday, August 17, 2015

37 40Monday, August 17, 2015

37 40Monday, August 17, 2015

1A

1A

1A

1

2

3

4

5

6

7

8

PP1800_PCH

38

2.2K2.2K

A A

SMBUS

AP2BH10
BG12

SMB_SOC_CLK
SMB_SOC_DAT

PP1800_PCH

XDP

Bay-trail M

BH22
BG23

I2C_0_SDA_C
I2C_0_SCL_C

4.7K4.7K

TRACK PAD

0x4bh

PP1800_PCH

4.7K4.7K

I2C_1_SDA_C

BG24

I2C_1_SCL_C

BH24

I2C

I2C_4_SDA_C

B B

BF27
BG27

I2C_4_SCL_C

Audio Codec

0x20h

PP1800_PCH

4.7K4.7K

ALS

0x44h

PP1800_PCH

4.7K4.7K

BH28
BG28

I2C_5_SDA_C
I2C_5_SCL_C

TOUCH SCREEN

0x4ah

PP3300_EC

C C

100

4.7K4.7K

Battery

100

EC_SMB0_CLK

E10

EC_SMB0_DATA

D3

Charger

PP3300_DX

KBC
TI

SMBUS

D D

1

F4

EC_SMB2_CLK

F3 EC_SMB2_DATA

2

3

4

4.7K4.7K

Thermal sensor

0x4ch

PROJECT : Belu

PROJECT : Belu

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5
HW

HW

5

6

HW

7

SMBUS_I2C

SMBUS_I2C

SMBUS_I2C

Date: Sheet of

Date: Sheet of

Date: Sheet of

8

1A

1A

1A

38 40Monday, August 17, 2015

38 40Monday, August 17, 2015

38 40Monday, August 17, 2015

5

4

3

2

1

(G3/DSW)

I

EC

D D

PP3300_DSW_EN

EC

VREG5

EN1

PP3300_DSW
PP5000

EN2

Vin

PP5000_PGOOD

PWRGDPP5000_EN

TPS5122

VREG3

VIN

II

SUSP_VR_EN

EC

C C

III

EC

PP1350_EN

VSFR_EN

PP1000_PCH_S5

Vout

V1P0A

EN

TLV62130A

S5 EN

S3 EN

PWRGD

Vin

PP1350_PGOOD

PP1350 PWRGD

+VSM

TPS51216

Vin

PP5000_DSW

PP5000

S5_Vout

S3_Vout

(S3)

PP5000

(G3/DSW)

PP3300_DSW

(ALW)

PP3300_RTC

(S5) (S5)

PP1000_PCH_S5_PG PP1800_PCH_S5_PG

PP3300_DSWVIN

EC

S5_Vout

S3_Vout

PP1800_PCH_S5

Vout

V1P8A

EN

G9661-25

Vin

PP1350

(S3)

PP1350_VREF

+DDR_VTT_RUN

(S0IX)

(S3)

PWRGD

PP3300_PCH_S5_PG
HWPG_S5

PP3300_PCH_PG
ALL_S0_PG

PP1000_PCH_SX_PG
ALL_S0IX_PG

PP3300_DSW

VIN

EC_SLP_SX_L

(USB Charger)

EC

USB1_PWR_EN

EC

USB2_PWR_EN

V3P3A

EN Vout

TPS22930

Vin

PG0

EC_PWROK(PH2) DRAM_CORE_PWROK

EC

PC4

CORE_PWROK(PF5)

PL6

TPS2546

TPS2546

(S5)

PP3300_PCH_S5

PG3

USBPWR1

USBPWR2

HW_circuit
HWPG

PP3300_PCH_S5_PG

SOC

PMC_CORE_PWROK

PCH_SLP_SX_L

PP3300_DSW

PP3300_DX

EC

PCH

PCH

EC

EC

PP3300_DX_EN

PP3300_WLAN_EN

PP3300_LTE_EN

TP_SHDN_L

EC_EDP_VDD_EN

TPS22964CYZPR

TPS22930

TPS22965DSGR

TPS22930

G5243AT11U

39

(S0)

PP3300_DX

PP3300_WLAN

+3V_LTE

(S3)

TP_PWR

(S0)

LCDVCC

Vout

ISL95833

Vin

+VCORE

PGOODG

Vout

(S0)

IMVP_PWRGD_3V

+VGFX

PP1000_PCH

Vout

EN EN

+V1P0S

AON7400AL

(S0)

Vin

PP1000_PCH_S5

PWRGD

(S0)

PP1000_PCH_PG

VIN

PP1050_PCH

Vout

+V1P05S

TLV62150ARGTR

Vin

PWRGD

(S0)

PP1050_PCH_PG

PP1350

EN

PP1350_PCH

Vout

+V1P35S

AO3404

Vin

PWRGD

(S0)

PP1350_PCH_PG

PP3300_DSW

EN

PP1800_PCH

Vout

+V1P8S

G9661-25

Vin

PWRGD

(S0)

PP1800_PCH_PG

B B

IV

+VCORE / +VGFX

EC

VR_EN

EN

VIN

PP3300_PCH

A A

PP1800_PCH_PG

Vout

EN

+V3P3S

AO3404

PWRGD

Vin

PP3300_DSW

5

(S0)

PP3300_PCH_PG
ALL_S0_PG

EC

V

PP1050_PCH_PG

EC_SLP_SX_L

R

VSFR_EN

R

4

PP1350_PCH_SX

(S0iX)

PP1350

EN

Vout

+VSFR

MOS AO3404

Vin

HW_circuit
HWPG

VCORE_PWRGD

PP1350_PCH_SX_PG

3

R
R

V1P0SX_EN

PP1000_PCH

PP1000_PCH_SX

(S0iX)

Vout

EN

+V1P0SX

MOS AO3404

Vin

HW_circuit
HWPG

R

PROJECT : Belu

PROJECT : Belu

PP1000_PCH_SX_PG

NB5

NB5

NB5
HW

HW

2

HW

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

BTM PWR CONTROL

BTM PWR CONTROL

BTM PWR CONTROL

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

39 40Monday, August 17, 2015

39 40Monday, August 17, 2015

39 40Monday, August 17, 2015

1A

1A

1A

5

Version

Model

10/11

1A

0CX

D D

C C

B B

A A

DOC NO.

Change PU9 VCC, CLK, PG (Page 29)B01

B02

Change PU4 VCC, PG (Page 29)
Change PR29 from 100K/F_4 to 10K/F_4 (Page 32)B03

B04 Remove 15V, PR17. Mount PR16 (Page 34)

Remove 15V, PR72. Mount PR73 (Page 35)B05

10/14

Change U11 LVDS power switch footprint to sot23-5 (Page 17)B06

B07 Unstuff PR188 due to PP5000_PGOOD (PN0) i s 5V tolerant input pin (Page 29)

10/16

B08

Change PJ1 from DFPJ06MR007 t o DFHD05MR080 (Page 28)

10/17

Change C126 from *10U/6.3V_8 to *10U/6.3V_6 due to height l imit (Page 24)B09
Change USB3.0 ESD D8,D9 route (Page 24)B10
Change R384 from 0_4 to 0_8, remove R376,R377. Merge UNCORE _V1P35_S0IX_A, UNCORE_V1P35_S 0IX_B & UNCORE_V1P35_S0IX (Pag e 9)B11

B12 Change R354 from 0_4 to 0_8, remove R357. Merge CORE_V1P05_S3_PW, & COR E_V1P05. They are of the same power state and rail (Page 9)

10/18

B13

Correct BIOS Strap, mount R12 8 and dismount R434 (Page 4)

B14

Add R553 0_4, connect U12 pin 6 ALERT# to H_PROCHOT# (Page 5, 23)

B15 Change Y2 from BG332768224 to BG332768111 due to height limit, change C 91,C92 from 18pf to 15pf (Pag e 6)

Add R554,R555 0_6 option S0 & S5 for PCU_V1P8_G3_V25 (Page 9)B16

B17 Change R469, EC_RST#_Q pull up from PP330 0_DX to PP3300_DSW (Page 23)

Swap L4 vertically (Page 25)B18

B19 Power modified:

Change PD1 from BCMAJ22AZ00 t o BCAFJ20AZ00 (Page 28)

10/21

B20

un-stuff R553 (Page 5)

B21

change SEL debugf footprint a nd PN(Page 18)

B22

change footprint and PN for H DMI (Page 19)

B23

change footprint and PN for U SB3(Page 25)

B24

change footprint for Hole3,4, 5,7 and add hole11(Page 25)

10/22

B25

un-stuff R182 for S5 leakage issue (Page 14)

B26

change thermal IC (Page 23)

B27

PJ1 pin1 change to VA (Page 2 8)

10/23

B28

unstuff R28 by Intel reques ( Page 2)

B29

unstuff R29 by Intel reques ( Page 3)

B30

RAM ID strap pin resistor cha nge to 1K, would be stronger ( Page 7)

B31

change cap C230 from 0.2pF to 3.3pF (Page 12)

B32

change cap C228 from 0.2pF to 3.3pF (Page 13)

B33

EC_IN_RW is OD,remove level s hift and PU to PP1800_PCH (Pag e 15,26)
change NGFF E key footprint a nd PN (Page 20)

B34

change footprint for Hole3,4, 5 and add 2 PAD for BATT_EN re serve (Page 25)

B35

SWAP L4 pin for layout (Page 25)

B36

SWAP RP1 pin for layout (Page 27)

B37

10/24

B38

change M_A_ODT0 PU to VTTby I ntel request (Page 12)

B39

change M_B_ODT0 PU to VTTby I ntel request (Page 13)

B40

correct schematic for R469 PU power rail (Page 23)

B41

SWAP L4 pin again for layout (Page 25)

B42

change footprint for Hole1,7, 9 (Page 25)

10/25

B43

Delete complete SSD(connector and caps), unstuff R215 and a dd test points on SATA signal s (Page 5,15,21)

B44

1025 add LTE SUSCLK feature ( Page 6,15,23)

B45

the damping of SDIO change to 0 ohm by Intel request Page 1 6)

B46

add PU for SDIO WP by Intel r equest (Page 16)

B47

remove Q31 becasue PU to PP33 00_DSW at EC side already (Pag e 23)

B48

change headphone CN6 footprin t and PN (Page 24)

B49

stuff PR188 due to 3.3V to EC is more safe(Page 29)

B50

PR135 change from 300 to 348 ohm for proto1 issue (Page 33)

B51

PR155 change from 300 to 340 ohm for proto1 issue (Page 33)

B52

PC57 change from 68p to 120p PC50 change from 150p to 2200p for proto1 issue (Page 33)

B53 PC99 change from 68p to 120p PC106 change from 150p to 2200p for proto1 issue (Page 33)

10/29

B54

unstuff R128,R372,R386,R364 u sing SoC internal PU (Page 4,5 )

B55

eDP power change to PIC fuse (Page 17)

B56

change R358 to 0 ohm by intel request( Page 21)

B57

remove pulled up resistors fo r eMMC data and cmd (Page 21)

10/30

B58

change C60 power netname for layout (Page 8)

B59

U10 change to 74AUP1G34 and s tuff it (Page 11)

B60

remove PREQ# pulled up resist or R323( Page 11)

B61

stuff Q47,R531,R530 and un-st uff R533,R542 for Track Pad I2 C (Page 15)

B62

HDMI DDC pulled up to HDMI_5V by intel request (Page 19)

B63

add Power LED for Intel testi ng (Page 22)

B64

Thermal IC VDD has two option , ome is PP3300_DSW(=PP3300_EC ), another is PP3300_DX, defa ult is stuffing to DSW rail( P age 23,27)

B65

add Power BTN for Intel testi ng(Page 27)

B66

for Gfx power, change C266,C2 89,C290 to 10uF and add 2 caps 10uF (Page 8)

B67

for core power, change C271,C 281,C280,C278,C273 to 10uF( Pa ge 8)

B68

for VR compensation, PR26 cha nge to 16.9K,PR23 change 10 oh m,PC50 change 1200pF,PC40 cha nge to 270pF,un-stuff PR22,PC5 4(Page 33)

B69 for VR compensation, PR76 change to 16.9K ,PR86 change 10 ohm,PC106 chan ge 1200pF,PC114 change to 270 pF,un-stuff PR80,PC101(Page 33 )

10/31

B70

remove TP44 and TP35 for GND vias adding (Page 8)

B71

remove C285( Page 9)

B72

N.C U10 pin1(Page 11)

B73

un-stuff PR129,PC37,PR158,PC1 18(Page 33)
stuff R273,R286,R289,R323 for Intel request(Page 11)

B74
B75

for layout suggestion by inte l, VSS_AXG_SENSE didn't connec t to VSS_SENSE, will connect the GND via near VCC_AXG_SENSE (Page 8)

B76

add 0.1u on PP1000_PCH for po wer request(Page 33)

B77

remove R417, PRDY should be d irect connection between SoC a nd XDP by intel request (Page 6)

B78

for layout, add 0hm between G ND and VSS_AXG_SENSE (Page 8)

11/1

B79

add option BOM R446,R449 for EC CLK for power saving by Int el request (Page 7)

B80

stuff C16(Page 11)
B81 correct C351 footprint(Page 16)
B82 change Hole4 footprint (Page 25)

11/4

Change PR135 from 348/F_4 to 340/F_4 (Page 33)B83

11/11

C01 Remove CH@ USB charge option,eMMC@ eMMC option (Page 25)
C02 Add CHB@ option for single channel SKU (P age 13)

11/15

C03 stuff R372, system can't boot if un-stuff R372 on proto1.5 board, need intel double confirm before p roto2 (Page 4)
C04 stuff R386, it is required for eDP (Page4 )
C05 U18 footprint change to 5 pin which is sa me as eDP power switch (Page 1 6)
C06 correct U11 orcad symbol, pin5 needs conn ect to power input (Page 17)
C07 remove R60 and change R74 to Short PAD an d size to 0402 (Page 19)
C08

change R72/R73/R22 to short P AD(Page 19)
C09

PR128 change to 1.62K (Page 3 3)
C10 Revising block diagram (Page 1)

11/18

C11 add TP on pin38/73 for NFC function (Page 20)

11/21

C12 remove R28,R25,C35 (Page2)
C13 remove R29,R26,C36 (Page 3)
C14 by X'tal vender suggestion,change C105/C1 06 from 15pF to 12pF (Page 6)
C15 remove R22/R72/R73 (Page 19)
C16

remove R365(Page 21)
C17

remove R91,R92,R94,R85 for ca ncelling non USB charger SKU ( Page 25)
C18 change USB3 CMC L5,L3, this part is recom mended by Intel (Page 25)
C19 by X'tal vender suggestion, change C107/C 109 from 15pF to 18pF (Page 27 )

11/28

C20 add a connection and name to KBD_IRQ#, be sides add pulled high resistor (Page6)
C21 remove R29,R26,C36 (Page 3)
C22 by X'tal vender suggestion,change C105/C1 06 from 15pF to 12pF (Page 6)
C23 remove R166, because SERIQR of TPM needs 3V (Page 14)
C24

reserve 0 ohm R387/R391 on VC CA and VCCB for debugging(Page 14)
C25

change HDMI CMC L2, this part is recommended by Intel (Page 19)
C26 remove HDMI EMI solution R30,R32,R40,R57 (Page 19)
C27 remove R358 by intel requst and has confi rmed with EMI (Page 21)
C28 add pullup 10K on SERIRQ_R to TPM_VDD (Pa ge 22)

11/29

C29 change PQ1,PQ2 part number (Page28)
C30 add and stuff 470pF on PC7 and reserve 47 00pF on PC18 for EMI solution (Page 28)
C31 because of power source of PU24,PU25 chan ge to VIN, so that need change sensing power net (Page 32)

PQ29 change MOSFET with lower Rdson(Page 32)

C32
C33

change solutions of PP1050_PC H and P1000_PCH_S5 ,which powe r sources are VIN, it is bett er for power efficiency (Page 32)

PP1000_PCH changes from conve rt to power MOSFET type for po wer efficiency improvement(Pa ge 32)

C34

PP1350_PCH change from LDO to power MOSFET (Page 34)

C35

PP3300_PCH change from LDO to power MOSFET(Page 35)

C36
C37 Revising block diagram,power sequence, an d power tree for power changes by Intel suggestion(Page 1,3 7,39)

12/02

add C285 for U18 input inrush current (Page16)C38
C39

PJ2 changes footprint for lay out (Page 28)

change PC65 and PC39 from 4.7 uF to 10uF (Page 32)C40

add PR169,PR49 for Intel requ est,stuff PR169 as default(Pag e 32)C41
C42 add PR166,PR46 for Intel request,stuff PR 166 as default(Page 32)

PQ29 change back AO3404(Page 32)C43
C44 PQ13 change to lower Rdson part, besides source of PQ13 changes to PP10 00_PCH_S5 (Page 32)
C45 revising pull up power rail of PR169 and PR166(Page 32)
C46 change L2,(HDMI CMC),L3,L5(USB3)to DLP11 TB800UL2L as Intel's recommend ation (Page 19,25)

12/04

for z-height issue, change C7 2,C75,C81 to 0.85mm cap (Page8 )C47
C48

reserve 3x1000pF cap for EMI( Page 25)

change Hole1 to be battery en able function (Page 25)C49

for z-height issue changePC48 ,PC49 to 0.85mm cap(Page 29)C50
C51 del PAD1 and PAD2(Page 25)

12/05

add 0.1uFx2 on PP1350 for EMI request (Page12)C52
C53

To prevent the backlight flas h, add a pull down on SoC_EDP_ BLON_C and using double inver ting OD FETs structure(Page 15 )

R551 changes to 1K to isolate SD socket and servo/SoC (Page 16)C54

SD3_WP is 1.8V power rail in SoC,change external Pulled up power well of SD3_WP to 1.8V power(Page 16)C55
C56 L2 change back to DLP11SA900HL2(Page 19)
C57 Swap L3,L5 pin for layout smoothly(Page 2 5)

12/06

change PU16,PU17 part number( Page 28)

C58
C59 change C271,C273,C280,C266,C311,C315 to 0 603 22uF for ACLL issue(Page 8 )

12/09

reserve R220connection from R CVP to MIC_DET as back up in c ase driver needs to be throug h codec using JACKSNS pinr(Pag e 24)

C60
C61 remove JP9,JP13 for ACLL improvement(Page 33)

12/11

add pulled up resistors on SD IO data/cmd lines (Page16)C62
C63

add back pulled up resistors for eMMC I/F(Page 21)

co-layout ST and Infineon TPM , if change to ST,R56,R57,R60, R72,R38, ST PN is ST33ZP24AR2 8PVSM(Page 22)C64

change footprint for Hole9(Pa ge 25)C65
C66 move EC_PWROK from PH2 to PJ1(Page 27)
C67 add Test points on unused pins, need chec k layout to see if all points are ok(Page 27)

12/12

add new RAMID 101 for single channel SKU (Page7)C68
C69

all Pulled up resistors of SD IO data/cmd to be un-stuffed(P age 16)

all Pulled up resistors of eM MC data/cmd to be un-stuffed,a nd R361 change to 47K ohm as well(Page 21)C70

add 2 holes , leave N.C(Page 25)C71

Stuff NUT on Hole4,5(Page 25)C72

change part number of EC ,whi ch has a trial firmware inside (Page 27)C73

reserve PR170 for battery cel l selection(Page 28)C74
C75 stuff PC211(Page 28)

12/13

swap CLKREQ_WLAN and CLKREQ_I MAGE for CLKREQ and CLK pins a re aligned (Page5)C76
C77

change pull up power of PP330 0_PCH_PG to PP3300_EC (Page 35 )

Board ID of proto2 change to 001 (Page27)

C78
C79

un-stuff PR176,PC202 as snubb er isnt needed (Page 28)

un-stuff PR74,PC104,PR81,PC11 5 as snubber isnt needed (Page 33)C80

PROJECT MODEL
:

PART NUMBER: DRAWING BY: REVISON:

5

4

Chrome APPROVED BY:

4

CHANGE LIST

3

2

1

40

PROJECT : Belu

PROJECT : Belu

DATE:

3

2

PROJECT : Belu

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev
Custom

Custom

Custom

Change list-1

Change list-1

Change list-1

NB5

NB5

NB5
HW

HW

HW

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

40 40Mon day, Au gust 17, 2015

40 40Mon day, Au gust 17, 2015

40 40Mon day, Au gust 17, 2015

1A

1A

1A