5
4
3
2
1
TPV-INVENTA TECHNOLOGY CO.,LTD.(TNI)
D D
RDC2. EE Div. HW Department II
Board name : MotherBoard Schematic
Nell (Nisene2 LarryBird) Project :
Version : M0C
C C
Initial Date : 2012/02/10
PCB P/N. : 6050A2516301
PCBA P/N. : 1310A2516301
B B
A A
5
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Key Component
Key Component
4
3
Key Component
<Circuit diagram NO.>
<Circuit diagram NO.>
<Circuit diagram NO.>
COVER SHEET
COVER SHEET
COVER SHEET
Date
Date
Date
2
OEM MODEL
NISENE 2 C
NISENE 2 C
NISENE 2 C
OEM MODEL
OEM MODEL
T&I MODEL
T&I MODEL
T&I MODEL
PCB NAME
PCB NAME
PCB NAME
XXXXXXXXXXXX
XXXXXXXXXXXX
XXXXXXXXXXXX
Sheet
of
14 3 Tuesday, May 08, 2012
Sheet
of
14 3 Tuesday, May 08, 2012
Sheet
of
14 3 Tuesday, May 08, 2012
1
Size
Size
Size
Rev
Rev
Rev
remark
remark
remark
<remark>
<remark>
<remark>
5
02 TABLE OF CONTENTS
CONTENTS
D D
01 TITLE PAGE
02 TABLE OF CONTENTS
03 SYSTEM BLOCK DIAGRAM
04 CLK/SMBUS/RESET MAP
05 CPU-CLK/CTRL/MISC/PEG (1/4)
06 CPU-Memory (2/4)
07 CPU-Power (3/4)
08 CPU-GND (4/4)
09 DDR3 SODIMM9.2 CHA
10 DDR3 SODIMM5.2 CHB
11 eDP to LVDS PS8625
12 MXM 3.0 TYPE-A
C C
13 BACKLIGHT CTRL/CONVERTER
14 CP-PCI/E/DMI/USB/CLK (1/6)
15 CP-SATA/HOST/GPIO/VGA (2/6)
16 CP-SMB/LPC/AUDIO/RTC (3/6)
17 CP-POWER (4/6)
18 CP-GND/NVRAM/XDP (5/6)
19 CP STRAPS (6/6)
20 Audio Codec 92HD91/SSM2306
21 Audio DRV604/D-MIC
22 GIGA LAN RTL8171FH-CG/LED
23 CR/HDD/ODD/WEBCAM
24 MINI PCIe x 3/FAN
25 USB3.0 CONTROLLER
B B
26 USB3.0/USB2.0 CONN
27 SCALAR/TOUCH SCREEN
28 EC IT8518E
29 DEBUG CIRCUIT
30 SYSTEM +3V/+5V
31 +1.5V_SUS/MEM_VTT/DC-IN
32 +1.05V/+1V
33 +0.85V/+12V
34 +1.8V/+1.1V/+19V_S0/DIS
35 NCP6133
36 NCP6133/MOS
37 POWER SEQUENCE
A A
38 GPIO TABLE
39 HISTORY
SHEET
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
XTAL LIST
PARTS DIP/SMT Frequence PPM CL
1
2
3
4
USB LIST
PORT NET NAME FUNCTION
USB0N/P USB0N/P
USB1N/P USB1N/P
USB2N/P USB2N/P
USB3N/P USB3N/P
USB4N/P USB4_WLAN_N/P
USB5N/P USB5_TV_N/P
USB10N/P USB10_WEBCAM_N/P
USB11N/P USB11_TSCREEN_N
PCIE LIST
PORT NET NAME FUNCTION
PETN/P2 PCIE_USB3_TXN/P
PERN/P2
PETN/P3
PERN/P3
PETN/P4
PERN/P4
PETN/P5
PERN/P5
PETN/P6
PERN/P6
SATA LIST
PORT NET NAME FUNCTION
SATA0TXN/P
SATA0RXN/P
SATA1TXN/P
SATA1RXN/P
SATA4TXN/P
SATA4RXN/P
4
X3 25MHz SMT
X4 SMT ±20
X6 SMT ±20
25MHz
48MHz
X5 32.768KHz
±20
±20 SMT
USB9_DONGLE_N/P USB9N/P
PCIE_USB3_RXN/P
PCIE_LAN_TXN/P
PCIE_LAN_RXN/P
PCIE_CR_TXN/P
PCIE_CR_RXN/P
PCIE_TV_TXN/P
PCIE_TV_RXN/P
PCIE_WLAN_RXN/P
PCIE_WLAN_TXN/P
SATA_TX0N/P
SATA HDD
mSATA
SATA ODD
H21
H21
NUT3D1_7D0-3_0
NUT3D1_7D0-3_0
SATA_RX0N/P
SATA_TX1N/P
SATA_RX1N/P
SATA_TX4N/P
SATA_RX4N/P
H22
H22
NUT3D1_7D0-3_0
NUT3D1_7D0-3_0
10pF/10pF
10pF/10pF
18pF/12pF
7pF/7pF
SIDE IO
SIDE IO
REAR IO
REAR IO
REAR IO
REAR IO
WLAN CARD
TV CARD
DONGLE
H27
H27
NUT3D1_7D0-3_0
NUT3D1_7D0-3_0
USB 3.0
GIGA LAN
CARD
READER
TV CARD
MODULE
WLAN CARD
MODULE
H10
H10
NUT3D1_7D0-3_0
NUT3D1_7D0-3_0
3
ALWAYS
DC-in
VER:M0C
J_MXM1 B-CAS
+3V_LDO/+5V_LDO
S5
S3
S0
4.1mm
H3
ID4.1/OD8.0H3ID4.1/OD8.0
1
2
3 8
4
5
6
4.1mm
H15
H15
ID4.1/OD8.0
ID4.1/OD8.0
1
2
3 8
4
5
6
H11
H11
NUT3D1_7D0-3_0
NUT3D1_7D0-3_0
2
POWER STATES
STATE
SIGNAL
FCH_SLP_S3#
FCH_SLP_S5#
-
-
-
+3.3V +VBAT_IN
+VIN +19V O OO
+3.3V/+5V
+3V_S5
+5V_S5
+3.3V
+5V
+5V_S3 +5V O
+3V_S3 +3.3V
+1.1V_S3
+1.1V
+1.5V_S3 +1.5V
+MEM_VTT +0.75V
+3V_S0/+5V_S0
+12V_S0
+3.3V/+5V
+12V
+1.8V_S0 +1.8V
+1.5V_S0
+1.05V_S0
+CPU_VCCIO
+1.5V
+1.05V
+1.0V
+0.85V_S0 +0.85V
+CPU_AXG
+CPU_VCC
VER:M0C
3.5mm
H4
ID3.5/OD8.0H4ID3.5/OD8.0
1
2
9
7
9
7
9
3 8
4
7
5
6
H16
H16
ID3.5/OD8.0
ID3.5/OD8.0
1
2
9
3 8
4
7
5
6
JWLAN1 JTV1 JmSATA1
H12
H12
1
SVC/SVD
SVC/SVD
3.5mm 3.5mm 3.5mm
H5
ID3.5/OD8.0H5ID3.5/OD8.0
3 8
4
H17
H17
ID3.5/OD8.0
ID3.5/OD8.0
3 8
4
NUT3D1_7D0-3_0
NUT3D1_7D0-3_0
H6
ID3.5/OD8.0H6ID3.5/OD8.0
2
1
2
9
3 8
4
7
5
2
5
5
6
3.5mm 3.5mm 3.5mm
H18
H18
ID3.5/OD8.0
ID3.5/OD8.0
1
2
9
3 8
7
4
6
5
H13
H13
NUT3D1_7D0-3_0
NUT3D1_7D0-3_0
1
S0
HIGH
HIGH
OO
O
O
OO
OO
OX
OX X
O
O
O
O
O
H7
ID3.5/OD8.0H7ID3.5/OD8.0
1
6
1
6
9
7
9
7
2
3 8
4
5
3.5mm
H26
H26
ID3.5/OD8.0
ID3.5/OD8.0
2
3 8
4
5
1
9
7
6
1
9
7
6
H23
H23
NUT3D1_7D0-3_0
NUT3D1_7D0-3_0
1
S3
LOW
HIGH
LOW
LOW
G3
S5 VOTAGE
LOW
LOW
HIGH HIGH HIGH S5_PWR_ON LOW
O OO
O
X
O
OO O
O
O
X
X
X
O
X
X
X
X
X
X
X
X
X OX X
X
X
X OX
X
X
X
X
X
X
X
X
X X OX
XX O
X
X
3.5mm
H14
H14
ID3.5/OD8.0
ID3.5/OD8.0
2
3 8
4
5
1
6
X
X
9
7
H24
H24
NUT3D1_7D0-3_0
NUT3D1_7D0-3_0
1
X
X
X
CPU THERMAL MODULE
HOLE
H1
H1
NUT3D1_7D0-3_0
NUT3D1_7D0-3_0
1
H8H8
1
H19H19
1
1
REMARK
S5_PWR_ON
COIN BATTERY
DC-IN
H2
H2
NUT3D1_7D0-3_0
NUT3D1_7D0-3_0
1
H9H9
1
CPU BOTTOM
THERMAL PAD HOLE
H20H20
1
H25H25
1
5
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
1
1
4
1
1
3
1
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Key Component
Key Component
Key Component
<Circuit diagram NO.>
<Circuit diagram NO.>
<Circuit diagram NO.>
COVER SHEET
COVER SHEET
COVER SHEET
Date
Date
Date
2
OEM MODEL
NISENE 2 C
OEM MODEL
NISENE 2 C
OEM MODEL
NISENE 2 C
T&I MODEL
T&I MODEL
T&I MODEL
PCB NAME
PCB NAME
PCB NAME
XXXXXXXXXXXX
XXXXXXXXXXXX
XXXXXXXXXXXX
Sheet
of
24 3 Tuesday, May 08, 2012
Sheet
of
24 3 Tuesday, May 08, 2012
Sheet
of
24 3 Tuesday, May 08, 2012
1
Size
Size
Size
Rev
Rev
Rev
remark
remark
remark
<remark>
<remark>
<remark>
5
4
3
2
1
03 SYSTEM BLOCK DIAGRAM
SO-DIMM Slot One
1333/1600 MHz
Max. support up to 4GB
SO-DIMM Slot One
1333/1600 MHz
Max. support up to 4GB
Page.
Page.
Dual-channel
memory controller
DDR3 Channel A
DDR3 Channel B
Intel CPU
GFX x16
MXM LVDS
D D
CONN
MXM LVDS
Nvidia (Graphics)
N13M-GE2
Page.13
PCI-e Gen2 I/O
Interfaces
Sandy Bridge
FCLGA/LGA1155
32nm/37.5mmx37.5mm
(TDP 65W)
DP1
Page.
UMA LVDS
CONN
SATA HDD
C C
B B
Side IO 1
USB3.0 CN
Side IO 2
USB3.0 CN
Power CN
SATA ODD
Power CN
Card Reader
CN
RJ45 CN
(Transformer+Surge)
USB-SS 1
UMA LVDS
MDIP/MDIN
USB-SS 0 USB-SS2
12V
5V
5V
PS8625
eDP to LVDS
1920x1200@60hz
HDD
SATA CN
SATA FLASH
mSATA CN
ODD
SATA CN
Card Reader
JMB389
TV Card
Mini card CN
Giga LAN
RTL8171EH
Page.
WLAN
25MHz
(BT Option)
Mini card CN
USB 3.0
Controller
TUSB7320
Page.11
VGA Head er
for De bug
SATA 1
SATA 4
PCIe 4 x1
PCIe 5 x1
USB 5
PCIe 3 x1
PCIe 6 x1
USB 4
PCIe 2 x1
DVI/Digital Display (Port D)
RGBHV
SATA I, II, III
SATA I, II SATA
PCIe Gen-1
32.768KHz
VGA
SATA SATA 0
PCIe
25MHz
DMI x4
Intel PCH
- H61
Couger Point
LPC
SPI
HDA
SPI
USB-HS USB 2.0
HD Audio
RTC
Battery
SPI Flash
64Mb
For BIOS
USB-HS 0,1,2,3
USB-HS 4 To WLAN CN
USB-HS 5 To TV CN
USB-HS 9
USB-HS 10
USB-HS 11
4 x Rear
USB CN
DONGLE
USB CN
WebCAM
CN
Touch Screen
CN
Audio CODEC
92HD91
Audio AMP
DRV604
CLK / DATA
3V_S5, 5V_S5
DDR_1.5V
1.1V_S3
1.2V_S0
DDR_VTT(0.75V)
3V_S0
5V_S0
2.5V_S0
12V_S0
CPU_CORE
CPU_VGFX
Line Out
HP Out
System Power
Adaptor IN
TPS51218
TPS51218
TPS51218
LDO RT9199
P-MOS/P1403EVG
P-MOS/P1403EVG
APL5930
TPS54332
ISL6277
Line out
Rear Jack
Headphone
Side Jack
Speaker
2W/ch CN
MIC
Side Jack
D-MIC
CN
System power
A A
management control
system control signal
EC / ITE8518
SPI
SPI Flash
8Mb
For EC
FIR CN
I2C
FG, PWM
5
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
Thremal Sensor
4
CPU
FAN
CN
3
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Key Component
Key Component
Key Component
<Circuit diagram NO.>
<Circuit diagram NO.>
<Circuit diagram NO.>
COVER SHEET
COVER SHEET
COVER SHEET
Date
Date
Date
2
OEM MODEL
NISENE 2 C
OEM MODEL
NISENE 2 C
OEM MODEL
NISENE 2 C
T&I MODEL
T&I MODEL
T&I MODEL
PCB NAME
PCB NAME
PCB NAME
XXXXXXXXXXXX
XXXXXXXXXXXX
XXXXXXXXXXXX
Sheet
of
34 3 Tuesday, May 08, 2012
Sheet
of
34 3 Tuesday, May 08, 2012
Sheet
of
34 3 Tuesday, May 08, 2012
1
Size
Size
Size
Rev
Rev
Rev
remark
remark
remark
<remark>
<remark>
<remark>
5
04 CLK/SMBUS/RESET MAP
4
3
2
1
INTERNAL CLOCK MODE
0ohm
0ohm
PCHPCICLK
LPC_CLK
ITP_CLKINN/P
0ohm 0ohm
CLKOUT_ITPXDP_N/P
CLKOUT_PCI3
CLKIN_PCILOOPBACK
CPU
SOCKET H2
CLK_DMI_N/P
CLKOUT_DMI_N/P
PCH
COUGAR POINT
BCLK0/#0
FOR RTC
MEM_MA_CLK_H/L[0..1]
MEM_MB_CLK_H/L[0..1]
GPP_CLK3P/N
GPP_CLK2P/N
GPP_CLK1P/N
GPP_CLK0P/N
SLT_GFX_CLKP/N
DISP2_CLKP/N
XTAL25_O UT/IN
25MHZ 32.768KHZ
PCIE_WLAN_CLKP/N
PCIE_TV_CLKP/N
PCIE_LAN_CLKP/N
PCIE_USB3_CLKN/P
PCIE_CR_CLKP/N
GFX_S0_CLKP/N
CH_A_DIMM0
MINI PCIE
WLAN MODULE
MINI PCIE
TV MODULE
RTL8171EH
GIGA LAN
USB 3.0
TUSB7320
CARDREADER
JMB389
MXM
CARD
CH_B_DIMM1
RESET Block Diagram
D D
C C
CH_A_SODIMM
CH_B_SODIMM
PS8625_RST#
0ohm
0ohm
1Kohm
RESET#
RESET#
PS8625
UMA LVDS
MXM CARD
JMB389
CARDREADER
MINI PCIE
WLAN MODULE
MINI PCIE
TV MODULE
MINI PCIE
mSATA MODULE
LPC PIN
HEADER
DDR3_DRAMRST#
PCH_PLTRST#
SM_DRAMRST#
CPU
SOCKET H2
RESET#
PCH
COUGAR POINT
PLTRST_CPU_N
PLTRST#
KBRST#
RSMRST#
PLTRST_N
FCH_KBRST#
FCH_RSMRST#
CPU
XDP
RTL8171EH
LPCRST#
EC IT8518
WRST#
HW RC
REST
EC_RESET#
CPU
XDP
CK_XDP_R_DN/P
CPU
XDP
EC IT8518
CK_XDP_DN/P
CLK_ITPXDP_N/P_R
CK_P_33M_PCI3
PCIE_CR_CLK
SM Bus MAP
B B
PCH COUGAR POINT
SML1CLK/DATA SML0CLK/DATA SMB_CLK/DATA
DDR CHA SO-DIMM
DDR CHB SO-DIMM
PCH_SMB_MAIN_CLK/DAT
MINI PCIe
DEVICE x3
XDP
A A
5
4
0ohm
LPC
EC_SCLK0
EC_SDATA0
PS8625
EEROM
3
ITE8518
Ext. Thermal IC
GMT G781_1
Add: G781-1-->9A
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Key Component
Key Component
Key Component
Date
Date
Date
2
EC_SCLK2
EC_SDATA2
THERM_SCLK
THERM_SDATA
<Circuit diagram NO.>
<Circuit diagram NO.>
<Circuit diagram NO.>
COVER SHEET
COVER SHEET
COVER SHEET
OEM MODEL
OEM MODEL
OEM MODEL
T&I MODEL
T&I MODEL
T&I MODEL
PCB NAME
PCB NAME
PCB NAME
Sheet
Sheet
Sheet
Panel
EDID EEPROM
EC_EDID_CLK
EC_EDID_DAT
EDID SWITCH
MXM_LVDS_DDC_CLK
MXM_LVDS_DDC_DAT
MXM CARD
NISENE 2 C
NISENE 2 C
NISENE 2 C
XXXXXXXXXXXX
XXXXXXXXXXXX
XXXXXXXXXXXX
of
44 3 Tuesday, May 08, 2012
of
44 3 Tuesday, May 08, 2012
of
44 3 Tuesday, May 08, 2012
1
Size
Size
Size
Rev
Rev
Rev
remark
remark
remark
<remark>
<remark>
<remark>
1
PCIEX16 & DMI
J1C
J1C
GRCOMP
B11
B12
D12
D11
C10
C9
E10
E9
B8
B7
C6
C5
A5
A6
E2
E1
F4
F3
G2
G1
H3
H4
J1
J2
K3
K4
L1
L2
M3
M4
N1
N2
W5
W4
V3
V4
Y3
Y4
AA4
AA5
P3
P4
R2
R1
T4
T3
U2
U1
B5
C4
B4
PEG_RX[0]
PEG_RX#[0]
PEG_RX[1]
PEG_RX#[1]
PEG_RX[2]
PEG_RX#[2]
PEG_RX[3]
PEG_RX#[3]
PEG_RX[4]
PEG_RX#[4]
PEG_RX[5]
PEG_RX#[5]
PEG_RX[6]
PEG_RX#[6]
PEG_RX[7]
PEG_RX#[7]
PEG_RX[8]
PEG_RX#[8]
PEG_RX[9]
PEG_RX#[9]
PEG_RX[10]
PEG_RX#[10]
PEG_RX[11]
PEG_RX#[11]
PEG_RX[12]
PEG_RX#[12]
PEG_RX[13]
PEG_RX#[13]
PEG_RX[14]
PEG_RX#[14]
PEG_RX[15]
PEG_RX#[15]
DMI_RX[0]
DMI_RX#[0]
DMI_RX[1]
DMI_RX#[1]
DMI_RX[2]
DMI_RX#[2]
DMI_RX_3
DMI_RX#[3]
PE_RX[0]
PE_RX#[0]
PE_RX[1]
PE_RX#[1]
PE_RX[2]
PE_RX#[2]
PE_RX[3]
PE_RX#[3]
PEG_ICOMPO
PEG_RCOMPO
PEG_ICOMPI
CPU_GFX_RXP0 12
CPU_GFX_RXN0 12
CPU_GFX_RXP1 12
CPU_GFX_RXN1 12
CPU_GFX_RXP2 12
CPU_GFX_RXN2 12
CPU_GFX_RXP3 12
CPU_GFX_RXN3 12
CPU_GFX_RXP4 12
CPU_GFX_RXN4 12
A A
CPU_GFX_RXP5 12
CPU_GFX_RXN5 12
CPU_GFX_RXP6 12
CPU_GFX_RXN6 12
CPU_GFX_RXP7 12
CPU_GFX_RXN7 12
CPU_GFX_RXP8 12
CPU_GFX_RXN8 12
CPU_GFX_RXP9 12
CPU_GFX_RXN9 12
CPU_GFX_RXP10 12
CPU_GFX_RXN10 12
CPU_GFX_RXP11 12
CPU_GFX_RXN11 12
CPU_GFX_RXP12 12
CPU_GFX_RXN12 12
CPU_GFX_RXP13 12
CPU_GFX_RXN13 12
CPU_GFX_RXP14 12
CPU_GFX_RXN14 12
CPU_GFX_RXP15 12
CPU_GFX_RXN15 12
DMI_IT_MR_DP0 14
DMI_IT_MR_DN0 14
DMI_IT_MR_DP1 14
DMI_IT_MR_DN1 14
DMI_IT_MR_DP2 14
DMI_IT_MR_DN2 14
DMI_IT_MR_DP3 14
DMI_IT_MR_DN3 14
B B
+CPU_VCCIO
R721 24.9 1% R721 24.9 1%
Note:
(1).SHORT B4 & C4 TOGETHER, ROUTE AS A SINGLE 4 MIL TRACE TO R81
(2).ROUTE B5 TO R81 AS A SEPERATE 12 MIL TRACE
(3).PCIE X4 LANES ARE NOT SUPPORTED ON DESKTOP CPU SKUS
FDI
AC5
DL_INT 15
R0402
R0402
DL_FSYNC_0
DL_LSYNC_0
DL_FSYNC_1
DL_LSYNC_1
DL_INT
SNB_IPL_RCOMP
AC4
AE5
AE4
AG3
AE2
AE1
DL_FSYNC_0 15
DL_LSYNC_0 15
C C
+CPU_VCCIO
DL_FSYNC_1 15
DL_LSYNC_1 15
R731
R731
24.9 1%
24.9 1%
J1D
J1D
FDI_FSYNC_0
FDI_LSYNC_0
FDI_FSYNC_1
FDI_LSYNC_1
FDI_INT
FDI_COMPIO
FDI_ICOMPO
2
SKT_H2
SKT_H2
REV = 4
REV = 4
BALLMAP_REV = 1.6
BALLMAP_REV = 1.6
DMI GEN PEG
DMI GEN PEG
SKT_H2
SKT_H2
REV = 4
REV = 4
BALLMAP_REV = 1.6
BALLMAP_REV = 1.6
FDI_TX[0]
FDI_TX[0]
PEG_TX[0]
PEG_TX#[0]
PEG_TX[1]
PEG_TX#[1]
PEG_TX[2]
PEG_TX#[2]
PEG_TX[3]
PEG_TX#[3]
PEG_TX[4]
PEG_TX#[4]
PEG_TX[5]
PEG_TX#[5]
PEG_TX[6]
PEG_TX#[6]
PEG_TX[7]
PEG_TX#[7]
PEG_TX[8]
PEG_TX#[8]
PEG_TX[9]
PEG_TX#[9]
PEG_TX[10]
PEG_TX#[10]
PEG_TX[11]
PEG_TX#[11]
PEG_TX[12]
PEG_TX#[12]
PEG_TX[13]
PEG_TX#[13]
PEG_TX[14]
PEG_TX#[14]
PEG_TX[15]
PEG_TX#[15]
DMI_TX[0]
DMI_TX#[0]
DMI_TX[1]
DMI_TX#[1]
DMI_TX[2]
DMI_TX#[2]
DMI_TX[3]
DMI_TX#[3]
PE_TX[0]
PE_TX#[0]
PE_TX[1]
PE_TX#[1]
PE_TX[2]
PE_TX#[2]
PE_TX[3]
PE_TX#[3]
SKT_H2
SKT_H2
3 OF 11
3 OF 11
FDI
FDI
LINK
LINK
?
?
FDI_TX[0]
FDI_TX#[0]
FDI_TX[1]
FDI_TX#[1]
FDI_TX[2]
FDI_TX#[2]
FDI_TX[3]
FDI_TX#[3]
FDI_TX[4]
FDI_TX#[4]
FDI_TX[5]
FDI_TX#[5]
FDI_TX[6]
FDI_TX#[6]
FDI_TX[7]
FDI_TX#[7]
SKT_H2
SKT_H2
4 OF 11
4 OF 11
3
H2_E
C13
C14
E14
E13
G14
G13
F12
F11
J14
J13
D8
D7
D3
C3
E6
E5
F8
F7
G10
G9
G5
G6
K7
K8
J5
J6
M8
M7
L6
L5
N5
N6
V7
V6
W7
W8
Y6
Y7
AA7
AA8
P8
P7
T7
T8
R6
R5
U5
U6
AC8
AC7
AC2
AC3
AD2
AD1
AD4
AD3
AD7
AD6
AE7
AE8
AF3
AF2
AG2
AG1
?
?
FDI_TX_0_DP
FDI_TX_0_DN
FDI_TX_1_DP
FDI_TX_1_DN
FDI_TX_2_DP
FDI_TX_2_DN
FDI_TX_3_DP
FDI_TX_3_DN
FDI_TX_4_DP
FDI_TX_4_DN
FDI_TX_5_DP
FDI_TX_5_DN
FDI_TX_6_DP
FDI_TX_6_DN
FDI_TX_7_DP
FDI_TX_7_DN
CPU_GFX_TXP0 12
CPU_GFX_TXN0 12
CPU_GFX_TXP1 12
CPU_GFX_TXN1 12
CPU_GFX_TXP2 12
CPU_GFX_TXN2 12
CPU_GFX_TXP3 12
CPU_GFX_TXN3 12
CPU_GFX_TXP4 12
CPU_GFX_TXN4 12
CPU_GFX_TXP5 12
CPU_GFX_TXN5 12
CPU_GFX_TXP6 12
CPU_GFX_TXN6 12
CPU_GFX_TXP7 12
CPU_GFX_TXN7 12
CPU_GFX_TXP8 12
CPU_GFX_TXN8 12
CPU_GFX_TXP9 12
CPU_GFX_TXN9 12
CPU_GFX_TXP10 12
CPU_GFX_TXN10 12
CPU_GFX_TXP11 12
CPU_GFX_TXN11 12
CPU_GFX_TXP12 12
CPU_GFX_TXN12 12
CPU_GFX_TXP13 12
CPU_GFX_TXN13 12
CPU_GFX_TXP14 12
CPU_GFX_TXN14 12
CPU_GFX_TXP15 12
CPU_GFX_TXN15 12
DMI_MT_IR_DP0 14
DMI_MT_IR_DN0 14
DMI_MT_IR_DP1 14
DMI_MT_IR_DN1 14
DMI_MT_IR_DP2 14
DMI_MT_IR_DN2 14
DMI_MT_IR_DP3 14
DMI_MT_IR_DN3 14
FDI_TX_0_DP 15
FDI_TX_0_DN 15
FDI_TX_1_DP 15
FDI_TX_1_DN 15
FDI_TX_2_DP 15
FDI_TX_2_DN 15
FDI_TX_3_DP 15
FDI_TX_3_DN 15
FDI_TX_4_DP 15
FDI_TX_4_DN 15
FDI_TX_5_DP 15
FDI_TX_5_DN 15
FDI_TX_6_DP 15
FDI_TX_6_DN 15
FDI_TX_7_DP 15
FDI_TX_7_DN 15
H_VIDSLCK 35
H_VIDSOUT 35
H_VIDALRT# 35
+1.5V_S3
CPU_THERMTRIP_N 15,28
4
+CPU_VCCIO
VER:M0B
C993
1UF 10V
C993
1UF 10V
C0402
C0402
H_VIDSLCK
H_VIDSOUT
H_VIDALRT# VIDALERT_N
H_PM_SYNC_0 15
PCH_PECI 15
EC_PECI 28
H_PROCHOT_N 28,35
H_SKTOCC_N 16
H_SNB_N 19
R699
1K 1% R0402
R699
1K 1% R0402
Place R685, R686, R687, and R689 close to CPU pin
VER:M0B
change PART ID
R686
R686
R687
110R 1%
110R 1%
R0402
R0402
NC/0ohm
NC/0ohm
NC/0ohm
NC/0ohm
NC/0ohm
NC/0ohm
NC/0ohm
NC/0ohm
NC/0ohm
NC/0ohm
C633
C633
NC/100N 16V
NC/100N 16V
C0402
C0402
R687
75R 1%
75R 1%
R0402
R0402
R689
R689
R0402
R0402
R0402_SHORT
R0402_SHORT
R0402_SHORT
R0402_SHORT
R0402_SHORT
R0402_SHORT
R0402_SHORT
R0402_SHORT
SNB_DDR_VREF
R703 NC/1K 1% R0402R703 NC/1K 1% R0402
R704 NC/1K 1% R0402R704 NC/1K 1% R0402
R705 NC/1K 1% R0402R705 NC/1K 1% R0402
R706 NC/1K 1% R0402R706 NC/1K 1% R0402
R707 NC/1K 1% R0402R707 NC/1K 1% R0402
R708 NC/1K 1% R0402R708 NC/1K 1% R0402
R709 NC/1K 1% R0402R709 NC/1K 1% R0402
R710 NC/1K 1% R0402R710 NC/1K 1% R0402
R711 NC/1K 1% R0402R711 NC/1K 1% R0402
R712 NC/1K 1% R0402R712 NC/1K 1% R0402
R713 NC/1K 1% R0402R713 NC/1K 1% R0402
R714 NC/1K 1% R0402R714 NC/1K 1% R0402
R715 NC/1K 1% R0402R715 NC/1K 1% R0402
R716 NC/1K 1% R0402R716 NC/1K 1% R0402
R717 NC/1K 1% R0402R717 NC/1K 1% R0402
R718 NC/1K 1% R0402R718 NC/1K 1% R0402
R719 NC/1K 1% R0402R719 NC/1K 1% R0402
R720 NC/1K 1% R0402R720 NC/1K 1% R0402
45.3R 1% R0402
45.3R 1% R0402
H_PWRGD 16,8
H_DRAMPWRGD 16
PLTRST_CPU_N 8
CFG0 8
R685
R685
NC/90.9R 1%
NC/90.9R 1%
R0402
R0402
R692
R692
R693
R693
R694
R694
R696
R696
R697
R697
R702
R702
1K 1%
1K 1%
R0402
R0402
Below configuration is defined on CRB page 14.
CFG2-->H-->NORM-->L-->REVERSE
CFG5-->SEL(0)-->H
CFG6-->SEL(1)-->H
1X16
CFG5-->SEL(0)-->L
CFG6-->SEL(1)-->H
2X8
CFG5-->SEL(0)-->L
CFG6-->SEL(1)-->L
X8,X4,X2,X1
5
CLK_DMI_P 14
CLK_DMI_N 14
R691 NC/100R R0402R691 NC/100R R0402
H_PWRGD
PLTRST_CPU_N
H_PECI
H_CATERR_N
H_PROCHOT_R_N
H_THERMTRIP_N
H_SKTOCC_R_N
H_SNB_N
CLK_DMI_P
CLK_DMI_N
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
AT14
J1E
J1E
W2
W1
C37
B37
A37
J40
AJ19
F36
E38
J35
E37
H34
G35
AJ33
K32
AJ22
H36
J36
J37
K36
L36
N35
L37
M36
J38
L35
M38
N36
N38
N39
N37
N40
G37
G36
AY3
H7
H8
6
BCLK[0]
BCLK#[0]
VIDSCLK
VIDSOUT
VIDALERT#
UNCOREPWRGOOD
SM_DRAMPWROK
RESET#
PM_SYNC
PECI
CATERR#
PROCHOT#
THERMTRIP#
SKTOCC#
PROC_SEL
SM_VREF
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD
RSVD
RSVD
RSVD
+CPU_VCCIO
R724
R724
NC/51R 1/16W
NC/51R 1/16W
R0402
R0402
SKT_H2
SKT_H2
REV = 4
REV = 4
BALLMAP_REV = 1.6
BALLMAP_REV = 1.6
MISC
MISC
Pull up
R725
R725
NC/1K 1%
NC/1K 1%
R0402
R0402
VCCIO_SELECT
VCCSA_VID_0
VCCSA_SENSE
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSSIO_SENSE
VCCAXG_SENSE
VSSAXG_SENSE
TRST#
PRDY#
PREQ#
DBR#
BCLK_ITP
BCLK_ITP#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
SKT_H2
SKT_H2
5 OF 11
5 OF 11
R726
R726
NC/51R 1/16W
NC/51R 1/16W
R0402
R0402
7
+5V_S0
VCCIO_SEL=1.5~1.8V
P33
P34
T2
A36
B36
AB4
AB3
L32
M32
L39
TDO
L40
TDI
M40
TCK
L38
TMS
J39
K38
K40
E39
C40
D40
H40
H38
G38
G40
G39
F38
E40
F40
B39
J33
L34
L33
K34
N33
M34
AV1
AW2
L9
J9
K9
L31
J31
K31
AD34
AD35
?
?
R727
R727
51R 1/16W
51R 1/16W
R0402
R0402
VCCIO_SEL
VSA_SEL 33
VCC_CPU_+0.85V_SENSE 33
VCORE_VCC_SEN 35
VCORE_VSS_SEN 35
VCC_CPU_VCCIO_SENSE 32
VSS_CPU_VCCIO_SENSE 32
VCCAXG_SENSE 35
VSSAXG_SENSE 35
H_TDO
H_TDI
H_TCK
H_TMS
H_TRST_N
H_PRDY_N
H_PREQ_N
XDP_DBRESET_N
ITP_CLKINP
ITP_CLKINN
H_BPM0_N
H_BPM1_N
H_BPM2_N
H_BPM3_N
H_BPM4_N
H_BPM5_N
H_BPM6_N
H_BPM7_N
R728
R728
NC/1K 1%
NC/1K 1%
R0402
R0402
H_CATERR_N
H_PROCHOT_R_N
H_THERMTRIP_N
H_PECI
H_PWRGD
R698
R698
R700
R700
R701
R701
H_TDO 8
H_TDI 8
H_TCK 8
H_TMS 8
NC/0ohm
NC/0ohm
NC/0ohm
NC/0ohm
NC/0ohm
NC/0ohm
H_BPM0_N 8
H_BPM1_N 8
H_BPM2_N 8
H_BPM3_N 8
H_BPM4_N 8
H_BPM5_N 8
H_BPM6_N 8
H_BPM7_N 8
VER:M0B
R0402_SHORT
R0402_SHORT
VER:M0B
C994
C994
NC/100N 25V
NC/100N 25V
FP_RST_DBR_N
R0402
R0402
R0402
R0402
R690
R690
10K 1%
10K 1%
R0402
R0402
VCCIO_SEL 32
R688
R688
4.7K
4.7K
R0402
R0402
H_TRST_N 8
H_PRDY_N 8
H_PREQ_N 8
CK_XDP_DP
CK_XDP_DN
8
+3VSB
R695
R695
NC/220R 1%
NC/220R 1%
R0402
R0402
FP_RST_DBR_N 16,8
CK_XDP_DP 14,8
CK_XDP_DN 14,8
CPU_PLTRST_Buffer
D D
PLTRST_N
PLTRST_N 16,22, 28,8
If PLT_RST driver current enough. need to use buffer
R741 10K 1%
R741 10K 1%
R0402
R0402
+3VSB
R737
R737
R738
R738
1K 1%
1K 1%
R0402
R0402
Q62
Q62
PMBT3904
PMBT3904
NC/0ohm
NC/0ohm
R0402
R0402
+3VSB
U42
U42
1
NC
VCC
2
A
3
GND
NC7S14P5X_NL
NC7S14P5X_NL
Y#
5
100N 16V C0402
100N 16V C0402
4
C970
C970
R739 180 5%
R739 180 5%
R0402
R0402
PLTRST_CPU_N
R740
R740
75R 1%
75R 1%
R0402
R0402
Close to U42
1
2
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Key Component
Key Component
3
4
5
Key Component
<Circuit diagram NO.>
<Circuit diagram NO.>
<Circuit diagram NO.>
COVER SHEET
COVER SHEET
COVER SHEET
Date
Date
Date
6
OEM MODEL
NISENE 2 C
NISENE 2 C
NISENE 2 C
OEM MODEL
OEM MODEL
T&I MODEL
T&I MODEL
T&I MODEL
PCB NAME
PCB NAME
PCB NAME
XXXXXXXXXXXX
XXXXXXXXXXXX
XXXXXXXXXXXX
Sheet
of
54 3 Tuesday, May 08, 2012
Sheet
of
54 3 Tuesday, May 08, 2012
Sheet
of
54 3 Tuesday, May 08, 2012
7
8
Size
Size
Size
Rev
Rev
Rev
remark
remark
remark
<remark>
<remark>
<remark>
1
A A
2
3
4
5
6
7
8
Channel_A Channel_B
SKT_H2
SKT_H2
REV = 4
REV = 4
BALLMAP_REV = 1.6
BALLMAP_REV = 1.6
MEM_MA_WE_L 9
MEM_MA_CAS_L 9
MEM_MA_RAS_L 9
MEM_MA_BANK0 9
MEM_MA_BANK1 9
MEM_MA_BANK2 9
MEM_MA_CS_L0 9
MEM_MA_CS_L1 9
MEM_MA_CKE0 9
MEM_MA_CKE1 9
MEM_MA_ODT0 9
MEM_MA_ODT1 9
R743
R743
R0402
R0402
MEM_MA_ADD[15..0] 9
MEM_MA_CLK_H0 9
MEM_MA_CLK_L0 9
MEM_MA_CLK_H1 9
MEM_MA_CLK_L1 9
0ohm
R0402
0ohm
R0402
intel sch rev:0.5 page:8
+1.5V_S3
R745
R745
NC/10K 1%
NC/10K 1%
R0402
R0402
Q64
Q64
NC/PMBT3904
NC/PMBT3904
MEM_MB_DATA[63..0] 10 MEM_MB_ADD[15..0] 10
DDR3_DRAMRST#
C636
C636
NC/100N 16V
NC/100N 16V
C0402
C0402
DDR3_DRAMRST#
Q63
Q63
NC/PMBT3904
NC/PMBT3904
DDR3_DRAMRST# 10,9
MEM_MB_DQS_H0 10
MEM_MB_DQS_H1 10
MEM_MB_DQS_H2 10
MEM_MB_DQS_H3 10
MEM_MB_DQS_H4 10
MEM_MB_DQS_H5 10
MEM_MB_DQS_H6 10
MEM_MB_DQS_H7 10
MEM_MB_DQS_L0 10
MEM_MB_DQS_L1 10
MEM_MB_DQS_L2 10
MEM_MB_DQS_L3 10
MEM_MB_DQS_L4 10
MEM_MB_DQS_L5 10
MEM_MB_DQS_L6 10
MEM_MB_DQS_L7 10
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
MEM_MB_DQS_H0
MEM_MB_DQS_H1
MEM_MB_DQS_H2
MEM_MB_DQS_H3
MEM_MB_DQS_H4
MEM_MB_DQS_H5
MEM_MB_DQS_H6
MEM_MB_DQS_H7
MEM_MB_DQS_L0
MEM_MB_DQS_L1
MEM_MB_DQS_L2
MEM_MB_DQS_L3
MEM_MB_DQS_L4
MEM_MB_DQS_L5
MEM_MB_DQS_L6
MEM_MB_DQS_L7
AM10
AP10
AR10
AM12
AM13
AR13
AP13
AR12
AP12
AR28
AR29
AP28
AP29
AM28
AM29
AP32
AP31
AP35
AP34
AR32
AR31
AR35
AR34
AM32
AM31
AM34
AM35
AH35
AH34
AE34
AE35
AN13
AN29
AP33
AG35
AN12
AN28
AR33
AM33
AG34
AG7
SB_DQ[0]
AG8
SB_DQ[1]
AJ9
SB_DQ[2]
AJ8
SB_DQ[3]
AG5
SB_DQ[4]
AG6
SB_DQ[5]
AJ6
SB_DQ[6]
AJ7
SB_DQ[7]
AL7
SB_DQ[8]
AM7
SB_DQ[9]
SB_DQ[10]
AL10
SB_DQ[11]
AL6
SB_DQ[12]
AM6
SB_DQ[13]
AL9
SB_DQ[14]
AM9
SB_DQ[15]
AP7
SB_DQ[16]
AR7
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
AP6
SB_DQ[20]
AR6
SB_DQ[21]
AP9
SB_DQ[22]
AR9
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
AL12
SB_DQ[28]
AL13
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
AL28
SB_DQ[34]
AL29
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
AL35
SB_DQ[50]
AL32
SB_DQ[51]
SB_DQ[52]
AL31
SB_DQ[53]
SB_DQ[54]
AL34
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
AJ35
SB_DQ[60]
AJ34
SB_DQ[61]
AF33
SB_DQ[62]
AF35
SB_DQ[63]
AH7
SB_DQS[0]
AM8
SB_DQS[1]
AR8
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
AL33
SB_DQS[6]
SB_DQS[7]
AH6
SB_DQS#[0]
AL8
SB_DQS#[1]
AP8
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#7]
SKT_H2
MEM_MA_DATA[63..0] 9
B B
C C
MEM_MA_DQS_H0 9
MEM_MA_DQS_H1 9
MEM_MA_DQS_H2 9
MEM_MA_DQS_H3 9
MEM_MA_DQS_H4 9
MEM_MA_DQS_H5 9
MEM_MA_DQS_H6 9
MEM_MA_DQS_H7 9
MEM_MA_DQS_L0 9
MEM_MA_DQS_L1 9
MEM_MA_DQS_L2 9
MEM_MA_DQS_L3 9
MEM_MA_DQS_L4 9
MEM_MA_DQS_L5 9
MEM_MA_DQS_L6 9
MEM_MA_DQS_L7 9
MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
MEM_MA_DQS_H0
MEM_MA_DQS_H1
MEM_MA_DQS_H2
MEM_MA_DQS_H3
MEM_MA_DQS_H4
MEM_MA_DQS_H5
MEM_MA_DQS_H6
MEM_MA_DQS_H7
MEM_MA_DQS_L0
MEM_MA_DQS_L1
MEM_MA_DQS_L2
MEM_MA_DQS_L3
MEM_MA_DQS_L4
MEM_MA_DQS_L5
MEM_MA_DQS_L6
MEM_MA_DQS_L7
AW37
AW35
AU35
AU39
AU36
AY36
AU38
AU37
AR40
AR37
AN38
AN37
AR39
AR38
AN39
AN40
AL40
AL37
AJ38
AJ37
AL39
AL38
AJ39
AJ40
AG40
AG37
AE38
AE37
AG39
AG38
AE39
AE40
AV37
AP38
AK38
AF38
AV36
AP39
AK39
AF39
AJ3
SA_DQ[0]
AJ4
SA_DQ[1]
AL3
SA_DQ[2]
AL4
SA_DQ[3]
AJ2
SA_DQ[4]
AJ1
SA_DQ[5]
AL2
SA_DQ[6]
AL1
SA_DQ[7]
AN1
SA_DQ[8]
AN4
SA_DQ[9]
AR3
SA_DQ[10]
AR4
SA_DQ[11]
AN2
SA_DQ[12]
AN3
SA_DQ[13]
AR2
SA_DQ[14]
AR1
SA_DQ[15]
AV2
SA_DQ[16]
AW3
SA_DQ[17]
AV5
SA_DQ[18]
AW5
SA_DQ[19]
AU2
SA_DQ[20]
AU3
SA_DQ[21]
AU5
SA_DQ[22]
AY5
SA_DQ[23]
AY7
SA_DQ[24]
AU7
SA_DQ[25]
AV9
SA_DQ[26]
AU9
SA_DQ[27]
AV7
SA_DQ[28]
AW7
SA_DQ[29]
AW9
SA_DQ[30]
AY9
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
AK3
SA_DQS[0]
AP3
SA_DQS[1]
AW4
SA_DQS[2]
AV8
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
AK2
SA_DQS#[0]
AP2
SA_DQS#[1]
AV4
SA_DQS#[2]
AW8
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SKT_H2
REV = 4
REV = 4
BALLMAP_REV = 1.6
BALLMAP_REV = 1.6
J1A
J1A
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
SA_WE#
SA_CAS#
SA_RAS#
SA_BS_0
SA_BS[1]
SA_BS[2]
SA_CS#[0]
SA_CS#[1]
SA_CS#[2]
SA_CS#[3]
SA_CKE[0]
SA_CKE[1]
SA_CKE[2]
SA_CKE[3]
SA_ODT[0]
SA_ODT[1]
SA_ODT[2]
SA_ODT[3]
SA_CK[0]
SA_CK#[0]
SA_CK[1]
SA_CK#[1]
SA_CK[2]
SA_CK#[2]
SA_CK[3]
SA_CK#[3]
SM_DRAMRST#
SA_DQS[8]
SA_DQS#[8]
SA_ECC_CB[0]
SA_ECC_CB[1]
SA_ECC_CB[2]
SA_ECC_CB[3]
SA_ECC_CB[4]
SA_ECC_CB[5]
SA_ECC_CB[6]
SA_ECC_CB[7]
DDR_A
DDR_A
SKT_H2
SKT_H2
1 OF 11
1 OF 11
DDR3_DRAMRST_N_R
AV27
AY24
AW24
AW23
AV23
AT24
AT23
AU22
AV22
AT22
AV28
AU21
AT21
AW32
AU20
AT20
AW29
AV30
AU28
AY29
AW28
AV20
AU29
AV32
AW30
AU33
AV19
AT19
AU18
AV18
AV31
AU32
AU30
AW33
AY25
AW25
AU24
AU25
AW27
AY27
AV26
AW26
AW18
AV13
AV12
AU12
AU14
AW13
AY13
AU13
AU11
AY12
AW12
?
?
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_WE_L
MEM_MA_CAS_L
MEM_MA_RAS_L
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2
MEM_MA_CS_L0
MEM_MA_CS_L1
MEM_MA_CKE0
MEM_MA_CKE1
MEM_MA_ODT0
MEM_MA_ODT1
MEM_MA_CLK_H0
MEM_MA_CLK_L0
MEM_MA_CLK_H1
MEM_MA_CLK_L1
DDR3_DRAMRST_N_R
R746
R746
NC/0ohm
NC/0ohm
J1B
J1B
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
SB_WE#
SB_CAS#
SB_RAS#
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CS#[0]
SB_CS#[1]
SB_CS#[2]
SB_CS#[3]
SB_CKE[0]
SB_CKE[1]
SB_CKE[2]
SB_CKE[3]
SB_ODT[0]
SB_ODT[1]
SB_ODT[2]
SB_ODT[3]
SB_CK[0]
SB_CK[0]
SB_CK[0]
SB_CK#[0]
SB_CK[1]
SB_CK#[1]
SB_CK[2]
SB_CK#[2]
SB_CK[3]
SB_CK#[3]
SB_DIMM_DQVREF
SA_DIMM_DQVREF
SB_DQS[8]
SB_DQS#[8]
SB_ECC_CB[0]
SB_ECC_CB[1]
SB_ECC_CB[2]
SB_ECC_CB[3]
SB_ECC_CB[4]
SB_ECC_CB[5]
SB_ECC_CB[6]
SB_ECC_CB[7]
DDR_B
DDR_B
SKT_H2
SKT_H2
2 OF 11
2 OF 11
?
?
AK24
AM20
AM19
AK18
AP19
AP18
AM18
AL18
AN18
AY17
AN23
AU17
AT18
AR26
AY16
AV16
AR25
AK25
AP24
AP23
AM24
AW17
AN25
AN26
AL25
AT26
AU16
AY15
AW15
AV15
AL26
AP26
AM26
AK26
AL21
AL22
AL20
AK20
AL23
AM22
AP21
AN21
AH1
AH4
AN16
AN15
AL16
AM16
AP16
AR16
AL15
AM15
AR15
AP15
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_WE_L
MEM_MB_CAS_L
MEM_MB_RAS_L
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
MEM_MB_CS_L0
MEM_MB_CS_L1
MEM_MB_CKE0
MEM_MB_CKE1
MEM_MB_ODT0
MEM_MB_ODT1
MEM_MB_CLK_H0
MEM_MB_CLK_L0
MEM_MB_CLK_H1
MEM_MB_CLK_L1
DIMM_VREFB
DIMM_VREFA
C635
C635
NC/100N 16V
NC/100N 16V
C0402
C0402
MEM_MB_WE_L 10
MEM_MB_CAS_L 10
MEM_MB_RAS_L 10
MEM_MB_BANK0 10
MEM_MB_BANK1 10
MEM_MB_BANK2 10
MEM_MB_CS_L0 10
MEM_MB_CS_L1 10
MEM_MB_CKE0 10
MEM_MB_CKE1 10
MEM_MB_ODT0 10
MEM_MB_ODT1 10
MEM_MB_CLK_H0 10
MEM_MB_CLK_L0 10
MEM_MB_CLK_H1 10
MEM_MB_CLK_L1 10
close to DIMM
R742
R742
R744
R744
C637
C637
NC/100N 16V
NC/100N 16V
C0402
C0402
NC/0ohm
NC/0ohm
NC/0ohm
NC/0ohm
R0402_SHORT
R0402_SHORT
R0402_SHORT
R0402_SHORT
VREF_DQ_B
VREF_DQ_A
If SM_DRAMRST buffer
strength is not enough,
D D
1
2
3
need to pop this circuit.
4
T&I (TP V-INV ENTA TECHNO LOGY C O., LTD)
T&I (TP V-INV ENTA TECHNO LOGY C O., LTD)
T&I (TP V-INV ENTA TECHNO LOGY C O., LTD)
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Key Component
Key Component
5
Key Component
6
<Circuit diagram NO.>
<Circuit diagram NO.>
<Circuit diagram NO.>
COVER SHEET
COVER SHEET
COVER SHEET
Date
Date
Date
OEM MODEL
NISENE 2 Custom
OEM MODEL
NISENE 2 Custom
OEM MODEL
NISENE 2 Custom
T&I MOD EL
T&I MOD EL
T&I MOD EL
PCB NAME
PCB NAME
PCB NAME
XXXXXXXXXXXX
XXXXXXXXXXXX
XXXXXXXXXXXX
Sheet
of
64 3 Tuesd ay, M ay 08 , 20 12
Sheet
of
64 3 Tuesd ay, M ay 08 , 20 12
Sheet
of
64 3 Tuesd ay, M ay 08 , 20 12
7
Size
Size
Size
Rev
Rev
Rev
remark
<remark>
remark
<remark>
remark
<remark>
8
5
4
3
2
1
75A 35A
+CPU_VCC +CPU_VCC
D D
C C
B B
A12
A13
A14
A15
A16
A18
A24
A25
A27
A28
B15
B16
B18
B24
B25
B27
B28
B30
B31
B33
B34
C15
C16
C18
C19
C21
C22
C24
C25
C27
C28
C30
C31
C33
C34
C36
D13
D14
D15
D16
D18
D19
D21
D22
D24
D25
D27
D28
D30
D31
D33
D34
D35
D36
E15
E16
E18
E19
E21
E22
E24
E25
E27
E28
E30
E31
E33
E34
E35
F15
F16
F18
F19
F21
F22
F24
F25
F27
F28
F30
F31
J1F
J1F
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
SKT_H2
SKT_H2
REV = 1.6
REV = 1.6
BALLMAP_REV = 1.6
BALLMAP_REV = 1.6
CPU POWER
CPU POWER
SKT_H2
SKT_H2
6 OF 11
6 OF 11
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
F32
F33
F34
G15
G16
G18
G19
G21
G22
G24
G25
G27
G28
G30
G31
G32
G33
H13
H14
H15
H16
H18
H19
H21
H22
H24
H25
H27
H28
H30
H31
H32
J12
J15
J16
J18
J19
J21
J22
J24
J25
J27
J28
J30
K15
K16
K18
K19
K21
K22
K24
K25
K27
K28
K30
L13
L14
L15
L16
L18
L19
L21
L22
L24
L25
L27
L28
L30
M14
M15
M16
M18
M19
M21
M22
M24
M25
M27
M28
M30
+CPU_VCC
+CPU_AXG
C652
C652
22UF 6.3V
22UF 6.3V
C0805
C0805
AB33
AB34
AB35
AB36
AB37
AB38
AB39
AB40
AC33
AC34
AC35
AC36
AC37
AC38
AC39
AC40
W33
W34
W35
W36
W37
W38
T33
T34
T35
T36
T37
T38
T39
T40
U33
U34
U35
U36
U37
U38
U39
U40
Y33
Y34
Y35
Y36
Y37
Y38
SKT_H2
SKT_H2
J1G
J1G
REV = 4
REV = 4
BALLMAP_REV = 1.6
BALLMAP_REV = 1.6
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
VCCAXG
C653
C653
22UF 6.3V
22UF 6.3V
C0805
C0805
GFX POWER GFX POWER
GFX POWER GFX POWER
SKT_H2
SKT_H2
7 OF 11
7 OF 11
C654
C654
22UF 6.3V
22UF 6.3V
C0805
C0805
C655
C655
22UF 6.3V
22UF 6.3V
C0805
C0805
C656
C656
22UF 6.3V
22UF 6.3V
C0805
C0805
8.5A
+0.85V_S0
8.8A
+1.8V_S0
C657
C657
22UF 6.3V
22UF 6.3V
C0805
C0805
1.5A
AG33
AJ16
AJ17
AJ26
AJ28
AJ32
AK15
AK17
AK19
AK21
AK23
AK27
AK29
AK30
AK11
AK12
C658
C658
22UF 6.3V
22UF 6.3V
C0805
C0805
M13
AA3
AB8
AF8
D10
H10
H11
H12
M10
M11
M12
A11
W3
J10
K10
K11
L11
L12
A7
B9
D6
E3
E4
G3
G4
J3
J4
J7
J8
L3
L4
L7
N3
N4
N7
R3
R4
R7
U3
U4
U7
V8
J1H
J1H
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCPLL
VCCPLL
C659
C659
22UF 6.3V
22UF 6.3V
C0805
C0805
SKT_H2
SKT_H2
REV = 4
REV = 4
BALLMAP_REV = 1.6
BALLMAP_REV = 1.6
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
IO/SA/PLL
IO/SA/PLL
POWER
POWER
SKT_H2
SKT_H2
8 OF 11
8 OF 11
C660
C660
22UF 6.3V
22UF 6.3V
C0805
C0805
AJ13
AJ14
AJ23
AJ24
AR20
AR21
AR22
AR23
AR24
AU19
AU23
AU27
AU31
AV21
AV24
AV25
AV29
AV33
AW31
AY23
AY26
AY28
AJ20
C661
C661
22UF 6.3V
22UF 6.3V
C0805
C0805
+1.5V_S3 +CPU_VCCIO
8.5A
+1.8V_S0-->Decoupling
+1.8V_S0
77m-ohm
+
+
C638
C638
220uF/6.3V
220uF/6.3V
C639
C639
10uF 6.3V
10uF 6.3V
C0603
C0603
10uF-->Inside processor socket cavity
220uF-->As close to RM keep-out as possible
+0.85V_S0-->Decoupling
+0.85V_S0
7m-ohm
+
+
C641
C641
220uF/6.3V
220uF/6.3V
+1.5V_S0-->Decoupling
+1.5V_S3
C643
C643
22UF 6.3V
22UF 6.3V
C0805
C0805
C648
C648
22UF 6.3V
22UF 6.3V
C0805
C0805
Close to power pins
+CPU_AXG
C664
C664
C663
C663
C662
C662
22UF 6.3V
22UF 6.3V
C0805
C0805
+CPU_VCCIO
C957
C957
22UF 6.3V
22UF 6.3V
C0805
C0805
22UF 6.3V
22UF 6.3V
C0805
C0805
22UF 6.3V
22UF 6.3V
C0805
C0805
C973
C973
22UF 6.3V
22UF 6.3V
C0805
C0805
C640
C640
10uF 6.3V
10uF 6.3V
C0603
C0603
C644
C644
22UF 6.3V
22UF 6.3V
C0805
C0805
C649
C649
22UF 6.3V
22UF 6.3V
C0805
C0805
C974
C974
22UF 6.3V
22UF 6.3V
C0805
C0805
C665
C665
22UF 6.3V
22UF 6.3V
C0805
C0805
C642
C642
10uF 6.3V
10uF 6.3V
10uF-->Inside processor socket cavity
C0603
C0603
220uF-->As close to RM keep-out as possible
C647
C647
C646
C646
C645
C645
22UF 6.3V
22UF 6.3V
C0805
C0805
C650
C650
22UF 6.3V
22UF 6.3V
C0805
C0805
C666
C666
22UF 6.3V
22UF 6.3V
C0805
C0805
C963
C963
22UF 6.3V
22UF 6.3V
C0805
C0805
22UF 6.3V
22UF 6.3V
C0805
C0805
C651
C651
22UF 6.3V
22UF 6.3V
C0805
C0805
C667
C667
22UF 6.3V
22UF 6.3V
C0805
C0805
C972
C972
22UF 6.3V
22UF 6.3V
C0805
C0805
22UF 6.3V
22UF 6.3V
C0805
C0805
C961
C961
22UF 6.3V
22UF 6.3V
C0805
C0805
C971
C971
22UF 6.3V
22UF 6.3V
C0805
C0805
C959
C959
22UF 6.3V
22UF 6.3V
C0805
C0805
C958
C958
22UF 6.3V
22UF 6.3V
C0805
C0805
C962
C962
22UF 6.3V
22UF 6.3V
C0805
C0805
C675
C670
C670
C671
22UF 6.3V
22UF 6.3V
C0805
C0805
4
C671
22UF 6.3V
22UF 6.3V
C0805
C0805
C672
C672
22UF 6.3V
22UF 6.3V
C0805
C0805
C673
C673
22UF 6.3V
22UF 6.3V
C0805
C0805
C669
C669
C668
C668
22UF 6.3V
22UF 6.3V
22UF 6.3V
22UF 6.3V
C0805
C0805
C0805
C0805
A A
5
C674
C674
22UF 6.3V
22UF 6.3V
C0805
C0805
C675
22UF 6.3V
22UF 6.3V
C0805
C0805
C676
C676
22UF 6.3V
22UF 6.3V
C0805
C0805
3
C677
C677
22UF 6.3V
22UF 6.3V
C0805
C0805
C964
C975
C975
C966
C966
22UF 6.3V
22UF 6.3V
22UF 6.3V
22UF 6.3V
C0805
C0805
C0805
C0805
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Key Component
Key Component
Key Component
Date
Date
Date
C969
C969
22UF 6.3V
22UF 6.3V
C0805
C0805
<Circuit diagram NO.>
<Circuit diagram NO.>
<Circuit diagram NO.>
COVER SHEET
COVER SHEET
COVER SHEET
2
C976
C976
22UF 6.3V
22UF 6.3V
C0805
C0805
C960
C960
22UF 6.3V
22UF 6.3V
C0805
C0805
C964
22UF 6.3V
22UF 6.3V
C0805
C0805
OEM MODEL
OEM MODEL
OEM MODEL
T&I MODEL
T&I MODEL
T&I MODEL
PCB NAME
PCB NAME
PCB NAME
C968
C968
C965
C965
22UF 6.3V
22UF 6.3V
22UF 6.3V
22UF 6.3V
C0805
C0805
C0805
C0805
NISENE 2 Custom
NISENE 2 Custom
NISENE 2 Custom
XXXXXXXXXXXX
XXXXXXXXXXXX
XXXXXXXXXXXX
Sheet
Sheet
Sheet
of
74 3 Tuesday, May 08, 2012
of
74 3 Tuesday, May 08, 2012
of
74 3 Tuesday, May 08, 2012
Size
Size
Size
Rev
Rev
Rev
remark
<remark>
remark
<remark>
remark
1
<remark>
5
SKT_H2
SKT_H2
J1I
J1I
A17
A23
A26
A29
A35
AA33
AA34
AA35
AA36
AA37
AA38
D D
C C
B B
AC1
AC6
AD33
AD36
AD38
AD39
AD40
AD5
AD8
AE33
AE36
AF34
AF36
AF37
AF40
AG36
AH2
AH3
AH33
AH36
AH37
AH38
AH39
AH40
AH5
AH8
AJ12
AJ15
AJ18
AJ21
AJ25
AJ27
AJ36
AK10
AK13
AK14
AK16
AK22
AK28
AK31
AK32
AK33
AK34
AK35
AK36
AK37
AK40
AL11
AL14
AL17
AL19
AL24
AL27
AL30
AL36
AM1
AM11
AM14
AM17
AM2
AM21
AM23
AM25
AV39
AA6
AB5
AE3
AF1
AF5
AF6
AF7
AJ5
AK1
AK4
AK5
AK6
AK7
AK8
AK9
AL5
A4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS_AK10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS_NCTF
VSS_NCTF
SKT_H2
SKT_H2
9 OF 11
9 OF 11
REV = 4
REV = 4
BALLMAP_REV = 1.6
BALLMAP_REV = 1.6
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM27
AM3
AM30
AM36
AM37
AM38
AM39
AM4
AM40
AM5
AN10
AN11
AN14
AN17
AN19
AN22
AN24
AN27
AN30
AN31
AN32
AN33
AN34
AN35
AN36
AN5
AN6
AN7
AN8
AN9
AP1
AP11
AP14
AP17
AP22
AP25
AP27
AP30
AP36
AP37
AP4
AP40
AP5
AR11
AR14
AR17
AR18
AR19
AR27
AR30
AR36
AR5
AT1
AT10
AT12
AT13
AT15
AT16
AT17
AT2
AT25
AT27
AT28
AT29
AT3
AT30
AT31
AT32
AT33
AT34
AT35
AT36
AT37
AT38
AT39
AT4
AT40
AT5
AT6
AT7
AT8
AT9
AU1
AU15
AU26
AU34
AU4
AU6
AU8
AV10
AV11
AV14
AV17
AV35
AV38
AW10
AW11
AW14
AW16
AW36
AW6
AY11
AY14
AY18
AY35
AY37
AV3
AV6
AY4
AY6
AY8
B10
B13
B14
B17
B23
B26
B29
B32
B35
B38
C11
C12
C17
C20
C23
C26
C29
C32
C35
D17
D20
D23
D26
D29
D32
D37
D39
E11
E12
E17
E20
E23
E26
E29
E32
E36
G11
G12
G17
G20
G23
G26
G29
G34
F10
F13
F14
F17
F20
F23
F26
F29
F35
F37
F39
B6
C7
C8
D2
D4
D5
D9
E7
E8
F1
F2
F5
F6
F9
G7
B3
J1K
J1K
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS_NCTF
VSS_NCTF
SKT_H2
SKT_H2
11 OF 11
11 OF 11
4
REV = 4
REV = 4
BALLMAP_REV = 1.6
BALLMAP_REV = 1.6
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G8
H1
H17
H2
H20
H23
H26
H29
H33
H35
H37
H39
H5
H6
H9
J11
J17
J20
J23
J26
J29
J32
K1
K12
K13
K14
K17
K2
K20
K23
K26
K29
K33
K35
K37
K39
K5
K6
L10
L17
L20
L23
L26
L29
L8
M1
M17
M2
M20
M23
M26
M29
M33
M35
M37
M39
M5
M6
M9
N8
P1
P2
P36
P38
P40
P5
P6
R33
R35
R37
R39
R8
T1
T5
T6
U8
V1
V2
V33
V34
V35
V36
V37
V38
V39
V40
V5
W6
Y5
Y8
AD37
AJ29
AJ30
AJ31
AV34
AW34
AU40
AW38
AB7
AG4
P35
P37
P39
R34
R36
R38
R40
A38
C2
D1
J1J
J1J
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
NCTF
NCTF
NCTF
NCTF
NCTF
H2_XDP
R747
R747
51R 1/16W
51R 1/16W
R0402
R0402
H_PWRGD 16,5
PCH_PWR_BTN# 16,28
CPU_PWR_GD 16,28
SKT_H2
SKT_H2
REV = 4
REV = 4
BALLMAP_REV = 1.6
BALLMAP_REV = 1.6
SPARES
SPARES
+CPU_VCCIO
R748
R748
51R 1/16W
51R 1/16W
R0402
R0402
PLTRST_N 16,22,28,5
CFG0 5
+3V_S0
R762
R762
R763
R763
AT11
RSVD
AP20
RSVD
AN20
RSVD
AU10
RSVD
AY10
RSVD
AF4
RSVD
AB6
RSVD
AE6
RSVD
AJ11
RSVD
D38
RSVD
C39
RSVD
C38
RSVD
J34
RSVD
N34
RSVD
SKT_H2
SKT_H2
10 OF 11
10 OF 11
?
?
R749
R749
R750
R750
51R 1/16W
51R 1/16W
51R 1/16W
51R 1/16W
R0402
R0402
R0402
R0402
R754 1K 1% R0402R754 1K 1% R0402
R756
3.3K 1%
3.3K 1%
R758 NC/1K 1%R0402R758 NC/1K 1%R0402
R759 1K 1% R0402R759 1K 1% R0402
R761
NC/0ohm
NC/0ohm
PCH_SMB_MAIN_DAT 10,16,24,9
PCH_SMB_MAIN_CLK 10,16,24,9
NC/8.2K R0402
NC/8.2K R0402
NC/8.2K R0402
NC/8.2K R0402
3
R751
R751
51R 1/16W
51R 1/16W
R0402
R0402
H_PREQ_N 5
H_PRDY_N 5
H_BPM0_N 5
H_BPM1_N 5
H_BPM2_N 5
H_BPM3_N 5
H_BPM4_N 5
H_BPM5_N 5
H_BPM6_N 5
H_BPM7_N 5
R0402R756
R0402
R0402_SHORTR761
R0402_SHORT
H_TCK 5
PCH_SMB_MAIN_CLK
PCH_SMB_MAIN_DAT
2
H_TDO
H_TDI
H_TMS
H_TCK
H_TRST_N
H_PREQ_N
H_PRDY_N
H_BPM0_N
H_BPM1_N
H_BPM2_N
H_BPM3_N
H_BPM4_N
H_BPM5_N
H_BPM6_N
H_BPM7_N
XDP_PWRGD
XDP_PLTRST_N
+CPU_VCCIO +CPU_VCCIO
XDP_EAR
XDP_VR_READY
H_TCK
1
GND0
3
OBSFN_A0
5
OBSFN_A1
7
GND2
9
OBSDATA_A0
11
OBSDATA_A1
13
GND4
15
OBSDATA_A2
17
OBSDATA_A3
19
GND6
21
OBSFN_B0
23
OBSFN_B1
25
GND8
27
OBSDATA_B0
29
OBSDATA_B1
31
GND10
33
OBSDATA_B2
35
OBSDATA_B3
37
GND12
39
PWRGOOD/HOO K0
41
HOOK1
43
VCC_OBS_AB
45
HOOK2
47
HOOK3
49
GND14
51
SDA
53
SCL
55
TCK1
57
TCK0
59
GND16
XDP_BSH-030
XDP_BSH-030
GND1
OBSFN_C0
OBSFN_C1
GND3
OBSDATA_C0
OBSDATA_C1
GND5
OBSDATA_C2
OBSDATA_C3
GND7
OBSFN_D0
OBSFN_D1
GND9
OBSDATA_D0
OBSDATA_D1
GND11
OBSDATA_D2
OBSDATA_D3
GND13
IPTCLK/H OOK4
ITPCLK#/H OOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND15
TDO
TRSTN
TMS
GND17
NC1
NC2
JXDPCPU1
JXDPCPU1
TDI
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
61
62
R752
R752
NC/1K 1%
NC/1K 1%
R0402
R0402
CK_XDP_R_DP
CK_XDP_R_DN
H_CPURST_XDP_R_N
FP_RST_DBR_N
H_TDO
H_TRST_N
H_TDI
H_TMS
+CPU_VCCIO
R753
R753
NC/1.5K 1%
NC/1.5K 1%
R0402
R0402
XDP_PWRGD
XDP_EAR
R755
NC/0ohm
R0402_SHORTR755
NC/0ohm
R757
R760 1K 1% R0402R760 1K 1% R0402
R0402_SHORT
NC/0ohm
R0402_SHORTR757
NC/0ohm
R0402_SHORT
FP_RST_DBR_N 16,5
H_TDO 5
H_TRST_N 5
H_TDI 5
H_TMS 5
1
CK_XDP_DP 14,5
CK_XDP_DN 14,5
PLTRST_CPU_N 5
A A
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Key Component
Key Component
Key Component
Date
Date
5
4
3
Date
<Circuit diagram NO.>
<Circuit diagram NO.>
<Circuit diagram NO.>
COVER SHEET
COVER SHEET
COVER SHEET
2
OEM MODEL
NISENE 2 Custom
OEM MODEL
NISENE 2 Custom
OEM MODEL
NISENE 2 Custom
T&I MODEL
T&I MODEL
T&I MODEL
PCB NAME
PCB NAME
PCB NAME
XXXXXXXXXXXX
XXXXXXXXXXXX
XXXXXXXXXXXX
Sheet
Sheet
Sheet
of
84 3 Tuesday, May 08, 2012
of
84 3 Tuesday, May 08, 2012
of
84 3 Tuesday, May 08, 2012
Size
Size
Size
Rev
Rev
Rev
remark
<remark>
remark
<remark>
remark
1
<remark>
5
VER:M0B
JDDR1 is change to 10.1mm height
4
3
2
1
CHA DDR 10.1H(DIMM-1)
8.8A
3.4A
+1.5V_S3
+3V_S0
TP129 TP129
DDR3_DRAMRST#
VREF_DQ_A
VREF_CA_A
C693
100N 16V
100N 16V
C0402
C0402
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
199
77
122
125
198
30
1
126
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
C694
C694
100N 16V
100N 16V
C0402
C0402
JDDR1B
JDDR1B
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDDSPD
NC1
NC2
NCTEST
EVENT#
RESET#
VREFDQ
VREFCA
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
SOCKET 204P
SOCKET 204P
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
GND-S1
GND-S2
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
205
206
207
NC3
208
NC4
1A
+MEM_VTT
+1.5V_S3
+1.5V_S3
R764
R764
1K 1%
1K 1%
R0402
R0402
R765
R765
1K 1%
1K 1%
R0402
R0402
R766
R766
1K 1%
1K 1%
R0402
R0402
R767
R767
1K 1%
1K 1%
R0402
R0402
Close to SO-DIMM A
C678
C678
NC/100N 25V
NC/100N 25V
C0402
C0402
VREF_DQ_A
C680
C680
C679
C679
1nF 50V
1nF 50V
100N 16V
100N 16V
C0402
C0402
C0402
C0402
Close to SO-DIMM A
VER:M0C
C681
C681
2.2uF 6.3V
2.2uF 6.3V
C0402
C0402
VREF_CA_A
C683
C683
1nF 50V
1nF 50V
C682
C682
C0402
C0402
100N 16V
100N 16V
C0402
C0402
VREF_DQ_A
VREF_CA_A
R0402
R0402
MEM_MA_ADD[15..0] 6
MEM_MA_BANK0 6
MEM_MA_BANK1 6
MEM_MA_BANK2 6
MEM_MA_CS_L0 6
MEM_MA_CS_L1 6
MEM_MA_CLK_H0 6
MEM_MA_CLK_L0 6
MEM_MA_CLK_H1 6
MEM_MA_CLK_L1 6
MEM_MA_CKE0 6
MEM_MA_CKE1 6
MEM_MA_CAS_L 6
MEM_MA_RAS_L 6
MEM_MA_WE_L 6
PCH_SMB_MAIN_CLK 10,16,24,8
PCH_SMB_MAIN_DAT 10,16,24,8
MEM_MA_ODT0 6
MEM_MA_ODT1 6
MEM_MA_DQS_H0 6
MEM_MA_DQS_H1 6
MEM_MA_DQS_H2 6
MEM_MA_DQS_H3 6
MEM_MA_DQS_H4 6
MEM_MA_DQS_H5 6
MEM_MA_DQS_H6 6
MEM_MA_DQS_H7 6
MEM_MA_DQS_L0 6
MEM_MA_DQS_L1 6
MEM_MA_DQS_L2 6
MEM_MA_DQS_L3 6
MEM_MA_DQS_L4 6
MEM_MA_DQS_L5 6
MEM_MA_DQS_L6 6
MEM_MA_DQS_L7 6
+3V_S0
D D
C C
DIMM1(CHANNEL-A)
ADDRESS = 0:0 [SA1:SA0]
MEM_MA_SA0
R768 NC/10K 1%
MEM_MA_SA1
R768 NC/10K 1%
R769 10K 1% R769 10K 1%
R770 10K 1% R770 10K 1%
B B
Note:
If SA0 = 0, SA1 = 0
SO-DIMMA SPD Address is 0xA0
SO-DIMMA TS Address is 0x30
If SA0= 1, SA1 = 0
SO-DIMMA SPD Address is 0xA2
SO-DIMMA TS Address is 0x32
+1.5V_S3
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2
MEM_MA_CS_L0
MEM_MA_CS_L1
MEM_MA_CLK_H0
MEM_MA_CLK_L0
MEM_MA_CLK_H1
MEM_MA_CLK_L1
MEM_MA_CKE0
MEM_MA_CKE1
MEM_MA_CAS_L
MEM_MA_RAS_L
MEM_MA_WE_L
MEM_MA_SA0
MEM_MA_SA1
MEM_MA_ODT0
MEM_MA_ODT1
MEM_MA_DQS_H0
MEM_MA_DQS_H1
MEM_MA_DQS_H2
MEM_MA_DQS_H3
MEM_MA_DQS_H4
MEM_MA_DQS_H5
MEM_MA_DQS_H6
MEM_MA_DQS_H7
MEM_MA_DQS_L0
MEM_MA_DQS_L1
MEM_MA_DQS_L2
MEM_MA_DQS_L3
MEM_MA_DQS_L4
MEM_MA_DQS_L5
MEM_MA_DQS_L6
MEM_MA_DQS_L7
C684
C684
10uF 6.3V
10uF 6.3V
C0603
C0603
JDDR1A
JDDR1A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
SOCKET 204P
SOCKET 204P
SOCKET,DDR3 DIMM,204P,T IN,10.1MM,30D,SMD,REVERSE,TR
SOCKET,DDR3 DIMM,204P,T IN,10.1MM,30D,SMD,REVERSE,TR
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
Place close to DIMM1
C685
C685
C686
C686
C687
10uF 6.3V
10uF 6.3V
C0603
C0603
C687
10uF 6.3V
10uF 6.3V
C0603
C0603
10uF 6.3V
10uF 6.3V
C0603
C0603
5
MEM_MA_DATA0
DQ0
7
MEM_MA_DATA1
DQ1
15
MEM_MA_DATA2
DQ2
17
MEM_MA_DATA3
DQ3
4
MEM_MA_DATA4
DQ4
6
MEM_MA_DATA5
DQ5
16
MEM_MA_DATA6
DQ6
18
MEM_MA_DATA7
DQ7
21
MEM_MA_DATA8
DQ8
23
MEM_MA_DATA9
DQ9
33
MEM_MA_DATA10
35
MEM_MA_DATA11
22
MEM_MA_DATA12
24
MEM_MA_DATA13
34
MEM_MA_DATA14
36
MEM_MA_DATA15
39
MEM_MA_DATA16
41
MEM_MA_DATA17
51
MEM_MA_DATA18
53
MEM_MA_DATA19
40
MEM_MA_DATA20
42
MEM_MA_DATA21
50
MEM_MA_DATA22
52
MEM_MA_DATA23
57
MEM_MA_DATA24
59
MEM_MA_DATA25
67
MEM_MA_DATA26
69
MEM_MA_DATA27
56
MEM_MA_DATA28
58
MEM_MA_DATA29
68
MEM_MA_DATA30
70
MEM_MA_DATA31
129
MEM_MA_DATA32
131
MEM_MA_DATA33
141
MEM_MA_DATA34
143
MEM_MA_DATA35
130
MEM_MA_DATA36
132
MEM_MA_DATA37
140
MEM_MA_DATA38
142
MEM_MA_DATA39
147
MEM_MA_DATA40
149
MEM_MA_DATA41
157
MEM_MA_DATA42
159
MEM_MA_DATA43
146
MEM_MA_DATA44
148
MEM_MA_DATA45
158
MEM_MA_DATA46
160
MEM_MA_DATA47
163
MEM_MA_DATA48
165
MEM_MA_DATA49
175
MEM_MA_DATA50
177
MEM_MA_DATA51
164
MEM_MA_DATA52
166
MEM_MA_DATA53
174
MEM_MA_DATA54
176
MEM_MA_DATA55
181
MEM_MA_DATA56
183
MEM_MA_DATA57
191
MEM_MA_DATA58
193
MEM_MA_DATA59
180
MEM_MA_DATA60
182
MEM_MA_DATA61
192
MEM_MA_DATA62
194
MEM_MA_DATA63
C688
C688
C689
C689
10uF 6.3V
10uF 6.3V
180P 50V
180P 50V C693
C0603
C0603
MEM_MA_DATA[63..0] 6
VER:M0C
Change 10.1 DDR3 Socket P/N
DDR3_DRAMRST# 10,6
+1.5V_S3
C690
C690
100N 16V
100N 16V
C0402
C0402
Place close to DIMM1
C691
C691
100N 16V
100N 16V
C0402
C0402
C692
C692
100N 16V
100N 16V
C0402
C0402
+3V_S0
+MEM_VTT
C700
C700
C699
C697
C697
C698
A A
5
4.7uF 10V
4.7uF 10V
C0603
C0603
C698
NC/4.7uF 10V
NC/4.7uF 10V
C0603
C0603
C699
100N 16V
100N 16V
C0402
C0402
180P 50V
180P 50V
4
3
C695
C695
100N 16V
100N 16V
C0402
C0402
C696
C696
10PF 50V
10PF 50V
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Key Component
Key Component
Key Component
<Circuit diagram NO.>
<Circuit diagram NO.>
<Circuit diagram NO.>
COVER SHEET
COVER SHEET
COVER SHEET
Date
Date
Date
2
OEM MODEL
NISENE 2 C
OEM MODEL
NISENE 2 C
OEM MODEL
NISENE 2 C
T&I MODEL
T&I MODEL
T&I MODEL
PCB NAME
PCB NAME
PCB NAME
XXXXXXXXXXXX
XXXXXXXXXXXX
XXXXXXXXXXXX
Sheet
of
94 3 Tuesday, May 08, 2012
Sheet
of
94 3 Tuesday, May 08, 2012
Sheet
of
94 3 Tuesday, May 08, 2012
1
Size
Size
Size
Rev
Rev
Rev
remark
remark
remark
<remark>
<remark>
<remark>
5
VER:M0B
JDDR1 is change to 6.0mm height
4
3
2
1
CHB DDR 6.0H(DIMM-2)
MEM_MB_DATA[63..0] 6
MEM_MB_SA1
MEM_MB_SA0
MEM_MB_ADD[15..0] 6
MEM_MB_BANK0 6
MEM_MB_BANK1 6
MEM_MB_BANK2 6
MEM_MB_CS_L0 6
MEM_MB_CS_L1 6
MEM_MB_CLK_H0 6
MEM_MB_CLK_L0 6
MEM_MB_CLK_H1 6
MEM_MB_CLK_L1 6
MEM_MB_CKE0 6
MEM_MB_CKE1 6
MEM_MB_CAS_L 6
MEM_MB_RAS_L 6
MEM_MB_WE_L 6
PCH_SMB_MAIN_CLK 16,24,8,9
PCH_SMB_MAIN_DAT 16,24,8,9
MEM_MB_ODT0 6
MEM_MB_ODT1 6
MEM_MB_DQS_H0 6
MEM_MB_DQS_H1 6
MEM_MB_DQS_H2 6
MEM_MB_DQS_H3 6
MEM_MB_DQS_H4 6
MEM_MB_DQS_H5 6
MEM_MB_DQS_H6 6
MEM_MB_DQS_H7 6
MEM_MB_DQS_L0 6
MEM_MB_DQS_L1 6
MEM_MB_DQS_L2 6
MEM_MB_DQS_L3 6
MEM_MB_DQS_L4 6
MEM_MB_DQS_L5 6
MEM_MB_DQS_L6 6
MEM_MB_DQS_L7 6
R775
10K 1%
R0402R775
10K 1%
R0402
R776
10K 1%
R0402R776
10K 1%
R0402
D D
C C
DIMM2(CHANNEL-B)
B B
ADDRESS = 1:0 [SA1:SA0]
+3V_S0
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
MEM_MB_CS_L0
MEM_MB_CS_L1
MEM_MB_CLK_H0
MEM_MB_CLK_L0
MEM_MB_CLK_H1
MEM_MB_CLK_L1
MEM_MB_CKE0
MEM_MB_CKE1
MEM_MB_CAS_L
MEM_MB_RAS_L
MEM_MB_WE_L
MEM_MB_SA0
MEM_MB_SA1
MEM_MB_ODT0
MEM_MB_ODT1
MEM_MB_DQS_H0
MEM_MB_DQS_H1
MEM_MB_DQS_H2
MEM_MB_DQS_H3
MEM_MB_DQS_H4
MEM_MB_DQS_H5
MEM_MB_DQS_H6
MEM_MB_DQS_H7
MEM_MB_DQS_L0
MEM_MB_DQS_L1
MEM_MB_DQS_L2
MEM_MB_DQS_L3
MEM_MB_DQS_L4
MEM_MB_DQS_L5
MEM_MB_DQS_L6
MEM_MB_DQS_L7
JDDR2A
JDDR2A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
SOCKET 204P
SOCKET 204P
SOCKET,DDR3 DIMM,204P,0.6m m,GOLD FLASH,6.00MM,25D,SMD ,REVERSE ,TR
SOCKET,DDR3 DIMM,204P,0.6m m,GOLD FLASH,6.00MM,25D,SMD ,REVERSE ,TR
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
5
MEM_MB_DATA0
DQ0
7
MEM_MB_DATA1
DQ1
15
MEM_MB_DATA2
DQ2
17
MEM_MB_DATA3
DQ3
4
MEM_MB_DATA4
DQ4
6
MEM_MB_DATA5
DQ5
16
MEM_MB_DATA6
DQ6
18
MEM_MB_DATA7
DQ7
21
MEM_MB_DATA8
DQ8
23
MEM_MB_DATA9
DQ9
33
MEM_MB_DATA10
35
MEM_MB_DATA11
22
MEM_MB_DATA12
24
MEM_MB_DATA13
34
MEM_MB_DATA14
36
MEM_MB_DATA15
39
MEM_MB_DATA16
41
MEM_MB_DATA17
51
MEM_MB_DATA18
53
MEM_MB_DATA19
40
MEM_MB_DATA20
42
MEM_MB_DATA21
50
MEM_MB_DATA22
52
MEM_MB_DATA23
57
MEM_MB_DATA24
59
MEM_MB_DATA25
67
MEM_MB_DATA26
69
MEM_MB_DATA27
56
MEM_MB_DATA28
58
MEM_MB_DATA29
68
MEM_MB_DATA30
70
MEM_MB_DATA31
129
MEM_MB_DATA32
131
MEM_MB_DATA33
141
MEM_MB_DATA34
143
MEM_MB_DATA35
130
MEM_MB_DATA36
132
MEM_MB_DATA37
140
MEM_MB_DATA38
142
MEM_MB_DATA39
147
MEM_MB_DATA40
149
MEM_MB_DATA41
157
MEM_MB_DATA42
159
MEM_MB_DATA43
146
MEM_MB_DATA44
148
MEM_MB_DATA45
158
MEM_MB_DATA46
160
MEM_MB_DATA47
163
MEM_MB_DATA48
165
MEM_MB_DATA49
175
MEM_MB_DATA50
177
MEM_MB_DATA51
164
MEM_MB_DATA52
166
MEM_MB_DATA53
174
MEM_MB_DATA54
176
MEM_MB_DATA55
181
MEM_MB_DATA56
183
MEM_MB_DATA57
191
MEM_MB_DATA58
193
MEM_MB_DATA59
180
MEM_MB_DATA60
182
MEM_MB_DATA61
192
MEM_MB_DATA62
194
MEM_MB_DATA63
VER:M0C
Change 6 DDR3 Socket P/N
DDR3_DRAMRST# 6, 9
Vref-DQ : Reference voltage for DQ0–DQ63, CB0–CB7 and PAR_IN. When in single ended mode used for DQS0–DQS7.
Vref-CA : Reference voltage for A0-A15, BA0–BA2, RAS#, CAS#, WE#, S0#, S01#, CKE0, CKE1, ODT0 and ODT1.
RESET#(Output) : A synchronously forces all registered output LOW when RESET# is LOW.
This signal can be used during power up to ensure that CKE is LOW and DQs are High-Z.
+3V_S0
+1.5V_S3
+3V_S0
DDR3_DRAMRST#
VREF_DQ_B
VREF_CA_B
C707
C707
100N 16V
100N 16V
C0402
C0402
3.4A
TP130 TP130
C708
C708
10PF 50V
10PF 50V
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
199
77
122
125
198
30
1
126
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
JDDR2B
JDDR2B
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDDSPD
NC1
NC2
NCTEST
EVENT#
RESET#
VREFDQ
VREFCA
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
SOCKET 204P
SOCKET 204P
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
GND-S1
GND-S2
+1.5V_S3
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
205
206
207
NC3
208
NC4
1A
+MEM_VTT
+1.5V_S3
R771
R771
1K 1%
1K 1%
R0402
R0402
R772
R772
1K 1%
1K 1%
R0402
R0402
R773
R773
1K 1%
1K 1%
R0402
R0402
R774
R774
1K 1%
1K 1%
R0402
R0402
Close to SO-DIMM B
C701
C701
NC/100N 25V
NC/100N 25V
C0402
C0402
VREF_DQ_B
C702
C702
C703
C703
100N 16V
100N 16V
1nF 50V
1nF 50V
C0402
C0402
C0402
C0402
Close to SO-DIMM B
VER:M0C
C704
C704
2.2uF 6.3V
2.2uF 6.3V
C0402
C0402
VREF_CA_B
C705
C705
C706
C706
100N 16V
100N 16V
1nF 50V
1nF 50V
C0402
C0402
C0402
C0402
VREF_DQ_B
VREF_CA_B
+MEM_VTT
C712
C712
C711
C710
C710
C709
C709
NC/4.7uF 10V
NC/4.7uF 10V
4.7uF 10V
4.7uF 10V
C0603
C0603
C0603
C0603
+1.5V_S3
C718
A A
5
C718
10uF 6.3V
10uF 6.3V
C0603
C0603
C711
100N 16V
100N 16V
C0402
C0402
C719
C719
10uF 6.3V
10uF 6.3V
C0603
C0603
180P 50V
180P 50V
C720
C720
10uF 6.3V
10uF 6.3V
C0603
C0603
4
C721
C721
10uF 6.3V
10uF 6.3V
C0603
C0603
C722
C722
10uF 6.3V
10uF 6.3V
C0603
C0603
C723
C723
180P 50V
180P 50V
3
+1.5V_S3
C713
C713
100N 16V
100N 16V
C0402
C0402
C714
C714
100N 16V
100N 16V
C0402
C0402
C715
C715
100N 16V
100N 16V
C0402
C0402
C717
C717
C716
C716
100N 16V
100N 16V
100N 16V
100N 16V
C0402
C0402
C0402
C0402
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Key Component
Key Component
Key Component
<Circuit diagram NO.>
<Circuit diagram NO.>
<Circuit diagram NO.>
COVER SHEET
COVER SHEET
COVER SHEET
Date
Date
Date
2
OEM MODEL
NISENE 2 C
OEM MODEL
NISENE 2 C
OEM MODEL
NISENE 2 C
T&I MODEL
T&I MODEL
T&I MODEL
PCB NAME
PCB NAME
PCB NAME
XXXXXXXXXXXX
XXXXXXXXXXXX
XXXXXXXXXXXX
Sheet
of
10 43 Tuesday, May 08, 2012
Sheet
of
10 43 Tuesday, May 08, 2012
Sheet
of
10 43 Tuesday, May 08, 2012
1
Size
Size
Size
Rev
Rev
Rev
remark
remark
remark
<remark>
<remark>
<remark>
5
4
3
2
1
TA1n
TA1p
TB1n
TB1p
VDDIO
TC1n
TC1p
TCK1n
TCK1p
ENPVCC
TD1n
TD1p
DDC_SDA
DDC_SCL
RLV_AMP
REXT
CSCL_MSCL
CSDA_MSDA
ENBLT
RLV_CFG
RLV_LNK
R0402R790
R0402
R0402R791
R0402
(Odd)
LVDS_L0_N
LVDS_L0_P
LVDS_L1_N
LVDS_L1_P
LVDS_L2_N
LVDS_L2_P
LVDS_CLKL_N
LVDS_CLKL_P
LVDS_L3_N
LVDS_L3_P
Single link
LVDS
42
LVDS_U0_N
41
LVDS_U0_P
40
LVDS_U1_N
39
LVDS_U1_P
38
37
LVDS_U2_N
36
LVDS_U2_P
35
LVDS_CLKU_N
34
LVDS_CLKU_P
33
ENPVCC
32
LVDS_U3_N
31
LVDS_U3_P
30
CONV_EDID_DATA
29
CONV_EDID_CLK
R781
R783
R784
CSCL_MSCL
CSDA_MSDA
UMA_BKLTCTL 13,18
(EVEN)
R779
Optional Panel EDID EEPROM
4.99K 1%
R0402R781
4.99K 1%
R0402
4.99K 1%
R0402R783
4.99K 1%
R0402
0ohm
R0402R784
0ohm
R0402
+3V_S0
R787
R787
4.7K
4.7K
R0402
R0402
0ohm
0ohm
UMA_BKLTEN 13,18
R788
R788
4.7K
4.7K
R0402
R0402
Dual link
LVDS
R0402R779
R0402
CONV_EDID_CLK 13
CONV_EDID_DATA
CONV_EDID_CLK
+3V_S0
C977
C977
100N 16V
100N 16V
C0402
C0402
RLV_LNK
I2C_CFG = "H"
EEPROM for Initial C ode
I2C Add ress: 0xA0
Suggest mini mum 8Kbit
CONV_EDID_DATA 13
R533 2.2K OHM 1% R533 2.2K OHM 1%
R534 2.2K OHM 1% R534 2.2K OHM 1%
8
VCC
7
WP
6
SCL
5
SDA
M24C02- RMN6T P
M24C02- RMN6T P
U44
U44
1
A0
2
A1
3
A2
4
GND
+VDDIO_CONV
C727
C727
100N 16V
100N 16V
C0402
C0402
+3V_S0
Initial Code EEPROM
LVDS_U1_N
LVDS_U1_P
LVDS_U0_N
LVDS_U0_P
LVDS_CLKU_P
LVDS_U3_N
LVDS_U3_P
LVDS_U2_N
LVDS_U2_P
EC64
EC64
100N 16V
100N 16V
C0402
C0402
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
VER:M0B
Reference is change
31
UMA_CN1
UMA_CN1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
BLACK_CONN
BLACK_CONN
32
LVDS_L2_P
LVDS_L2_N
LVDS_L3_P
LVDS_L3_N
LVDS_CLKL_P LVDS_CLKU_N
LVDS_CLKL_N
LVDS_L0_P
LVDS_L0_N
LVDS_L1_P
LVDS_L1_N
+5VS0_LCD +5VS0_LCD
VER:M0B
+3V_S0 +VDDIO_CONV
600R/500mA
600R/500mA
1 2
R1028
R1028
10K 1%
10K 1%
R0402
R0402
C431
C431
1UF 10V
1UF 10V
C0402
C0402
C978
C978
1UF 6.3V
1UF 6.3V
C0603
C0603
R1029
R1029
10K 1%
10K 1%
R0402
R0402
PS8625_RST#
C432
C432
2.2uF 10V
2.2uF 10V
C0603
C0603
L62
D D
+VDDIO_CONV
C C
PS8625_PD#
L0603L62
L0603
C725
C725
10NF 50V
10NF 50V
C0402
C0402
C979
C979
1UF 6.3V
1UF 6.3V
C0603
C0603
+VDDRX
+VDDRX
VER:M0B
+3V_S0 +VDDIOX_CONV
600R/500mA
600R/500mA
1 2
C726
C726
100N 16V
100N 16V
C0402
C0402
VER:M0C
C981
C981
1UF 6.3V
1UF 6.3V
C0603
C0603
L63
L0603L63
L0603
CONVERTER_DPD_AUXN 15
CONVERTER_DPD_AUXP 15
CONVERTER_DPD_TXP0 15
CONVERTER_DPD_TXN0 15
CONVERTER_DPD_TXP1 15
CONVERTER_DPD_TXN1 15
PCH_PLTRST# 12,16,23,24,25,29
UMA_PDSW# 13,28 UMA_VDD_EN 13,18
CONVERTER_DDPD_HPD 15
CONV_BKLTCTL 13
+VDDIOX_CONV
MXM_PRSNT#
L:MXM
H:PCH
600R/500mA
600R/500mA
1 2
L64
L64
L0603
C729
C729
1UF 6.3V
1UF 6.3V
C0603
C0603
L0603
+VDDIO_CONV
C980
C980
1UF 6.3V
1UF 6.3V
C0603
C0603
Note:
The decoupling caps C9, C15, C16, C17, C18, C21
shall be close to the power pins as possible
+VDDRX
R792
R792
R778
R778
0ohm
0ohm
0ohm
0ohm
C730
C730
4.7uF 10V
4.7uF 10V
C0603
C0603
R0402
R0402
R0402
R0402
L52
L52
PS8625_RST#
PS8625_PD#
2.2UH 0.8A
2.2UH 0.8A
1 2
L0805
L0805
C724
C724
100N 16V
100N 16V
C0402
C0402
U43
U43
1
DAUXn
2
DAUXp
3
GND
4
DRX0p
5
DRX0n
6
VDDRX
7
DRX1p
8
DRX1n
9
RST#
10
PD#
11
HPD
12
PWMO
13
VDDIOX
14
VDDIOX
57
Epad
SW_OUT VDD12_PS8625
VDD12_PS8625
55
51
50
48
NC56NC
TA0n54TA0p53TB0n52TB0p
TC0n49TC0p
VDDIO
PS8625
PS8625
SW_OUT15SW_OUT16GNDX17GNDX18VDD1219TESTMODE20RLV_LNK/GPIO021RLV_CFG22ENBLT23CSDA/MSDA24CSCL/MSCL25REXT26BLV_AMP27GND
C732
C732
C731
C731
100N 16V
100N 16V
10NF 50V
10NF 50V
C0402
C0402
C0402
C0402
46
45
43
TD0n44TD0p
PWMI
TCK0n47TCK0p
(Even)
28
Noe:
R13: LVDS output swing control
4.99K for default swing, change the value for swing adj ust
Power On Configuration
RLV_CFG +VDDIO_CONV
R785 NC/4.7K R0402R785 NC/4.7K R0402
RLV_CFG: LVDS color depth and data mapping selection, internal pull-down ~80K
L: 8-bit LVDS, VESA mapping
M: 8-bit LVDS, JEIDA mapping
H: 6-bit LVDS, both VESA and JEIDA mapping
RLV_LNK +VDDIO_CONV
RLV_LNK: LVDS single link or dual link selection, internal pull-down ~80K
L: Single link LVDS
B B
H: Dual link LVDS
R786 NC/4.7K R0402R786 NC/4.7K R0402
R789 4.7K R0402R789 4.7K R0402
R790
NC/0ohm
EC_SCLK0 13,16,27,28
EC_SDATA0 13,16,27, 28
NC/0ohm
R791
NC/0ohm
NC/0ohm
Switching Regulator Layout Guideline
1. Place the switching regulator inductor (L3) close to SW_OUT Pins (Pin15, Pin16).
2. The SW_OUT output traces should be as wide as possible.
A A
3. The GNDX pins (Pin17, Pin18) should be connected to the main PCB ground plane, with the device GND pins of the PS8625 connected to separate GND island (GNDA) for the device.
The GND island (GNDA) should be connected to the main GND plane (GND) with a single-point connection by use of a wide PCB trace.
4. Place the 4.7uF decoupling Capacitor (C4) for VDDIOX close to VDDIOX pin.
5. The GND of the 4.7uF capacitor (C4) for VDDIOX should be placed close to the GND of 4.7uF capacitor (C5) behind Inductor.
6. Place the bead (L2) for VDDIOX close to PS8625.
5
4
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Key Component
Key Component
3
Key Component
<Circuit diagram NO.>
<Circuit diagram NO.>
<Circuit diagram NO.>
COVER SHEET
COVER SHEET
COVER SHEET
Date
Date
Date
2
OEM MODEL
NISENE 2 C
NISENE 2 C
NISENE 2 C
OEM MODEL
OEM MODEL
T&I MODEL
T&I MODEL
T&I MODEL
PCB NAME
PCB NAME
PCB NAME
XXXXXXXXXXXX
XXXXXXXXXXXX
XXXXXXXXXXXX
Sheet
of
11 43 Tuesday, May 08, 2012
Sheet
of
11 43 Tuesday, May 08, 2012
Sheet
of
11 43 Tuesday, May 08, 2012
Size
Size
Size
Rev
Rev
Rev
remark
<remark>
remark
<remark>
remark
1
<remark>
5
VER:M0B VER:M0B
C744
0.22u 16V C0402
C744
CPU_GFX_TXP0 5
CPU_GFX_TXP1 5
CPU_GFX_TXP2 5
CPU_GFX_TXP3 5
CPU_GFX_TXP4 5
CPU_GFX_TXP5 5
CPU_GFX_TXP6 5
CPU_GFX_TXP7 5
CPU_GFX_TXP8 5
CPU_GFX_TXP9 5
CPU_GFX_TXP10 5
CPU_GFX_TXP11 5
CPU_GFX_TXP12 5
CPU_GFX_TXP13 5
CPU_GFX_TXP14 5
D D
CPU_GFX_TXP15 5
CPU_GFX_TXN0 5
CPU_GFX_TXN1 5
CPU_GFX_TXN2 5
CPU_GFX_TXN3 5
CPU_GFX_TXN4 5
CPU_GFX_TXN5 5
CPU_GFX_TXN6 5
CPU_GFX_TXN7 5
CPU_GFX_TXN8 5
CPU_GFX_TXN9 5
CPU_GFX_TXN10 5
CPU_GFX_TXN11 5
CPU_GFX_TXN12 5
CPU_GFX_TXN13 5
CPU_GFX_TXN14 5
CPU_GFX_TXN15 5
Close to MXM CONN.
EC_MXM_PWRGD 28
C C
THERM_SCLK 28
THERM_SDATA 28
B B
C743
C743
C742
C742
C770
C770
C768
C768
C767
C767
C765
C765
C764
C764
C740
C740
C761
C761
C760
C760
C753
C753
C734
C734
C750
C750
C733
C733
C738
C738
C808
C808
C803
C803
C801
C801
C799
C799
C797
C797
C795
C795
C793
C793
C791
C791
C787
C787
C785
C785
C783
C783
C747
C747
C781
C781
C780
C780
C746
C746
C778
C778
PCH_PLTRST# 11,16,23,24,25,29
R794
R796
MXM_PNL_PWR_EN 13
MXM_PNL_BL_EN 13
MXM_PNL_BLADJ 13
R803
R804
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
0.22u 16V C0402
GFX_S0_CLKP 14
GFX_S0_CLKN 14
NC/0ohm
NC/0ohm
NC/0ohm
NC/0ohm
TP142 TP142
MXM_DVI_HPD 27
NC/0ohm
NC/0ohm
NC/0ohm
NC/0ohm
+3VSB
MXM_PRSNT_R#
MXM_PRSNT_L#
MXM_PEX_STD_SW# MXM_PEX_STD_SW#
R0402_SHORTR794
R0402_SHORT
MXM_PWR_GOOD_R MXM_PWR_GOOD_R
R0402_SHORTR796
R0402_SHORT
MXM_CLK_REQ#_R MXM_CLK_REQ#_R
MXM_DVI_HPD
MXM_PNL_PWR_EN
MXM_PNL_BL_EN
MXM_PNL_BLADJ
R0402_SHORTR803
R0402_SHORT
R0402_SHORTR804
R0402_SHORT
MXM_PEX_TXP0
MXM_PEX_TXP1
MXM_PEX_TXP2
MXM_PEX_TXP3
MXM_PEX_TXP4
MXM_PEX_TXP5
MXM_PEX_TXP6
MXM_PEX_TXP7
MXM_PEX_TXP8
MXM_PEX_TXP9
MXM_PEX_TXP10
MXM_PEX_TXP11
MXM_PEX_TXP12
MXM_PEX_TXP13
MXM_PEX_TXP14
MXM_PEX_TXP15
MXM_PEX_TXN0
MXM_PEX_TXN1
MXM_PEX_TXN2
MXM_PEX_TXN3
MXM_PEX_TXN4
MXM_PEX_TXN5
MXM_PEX_TXN6
MXM_PEX_TXN7
MXM_PEX_TXN8
MXM_PEX_TXN9
MXM_PEX_TXN10
MXM_PEX_TXN11
MXM_PEX_TXN12
MXM_PEX_TXN13
MXM_PEX_TXN14
MXM_PEX_TXN15
GFX_S0_CLKP GF X_S0_CLKP
GFX_S0_CLKN GFX_S0_CLKN
MXM_SMB_CLK
MXM_SMB_DAT
VER:M0C
R806
R806
2.2K OHM 1%
2.2K OHM 1%
R0402
R0402
MXM_PRSNT#
MXM_PRSNT_R#
MXM_PRSNT_L#
A A
R811
NC/0ohm
R0402_SHORTR811
NC/0ohm
R0402_SHORT
R814
NC/0ohm
R0402_SHORTR814
NC/0ohm
R0402_SHORT
5
L:MXM
H:PCH
MXM_PRSNT# 28
+3V_S0
150
144
138
122
116
110
104
98
92
86
80
74
68
62
56
50
148
142
136
120
114
108
102
96
90
84
78
72
66
60
54
48
155
153
156
281
19
154
164
162
168
170
172
160
158
31
276
274
234
236
23
25
27
34
32
21
J_MXM1A
J_MXM1A
PEX_TX0
PEX_TX1
PEX_TX2
PEX_TX3
PEX_TX4
PEX_TX5
PEX_TX6
PEX_TX7
PEX_TX8
PEX_TX9
PEX_TX10
PEX_TX11
PEX_TX12
PEX_TX13
PEX_TX14
PEX_TX15
PEX_TX0#
PEX_TX1#
PEX_TX2#
PEX_TX3#
PEX_TX4#
PEX_TX5#
PEX_TX6#
PEX_TX7#
PEX_TX8#
PEX_TX9#
PEX_TX10#
PEX_TX11#
PEX_TX12#
PEX_TX13#
PEX_TX14#
PEX_TX15#
PEX_REF_CLK
PEX_REFCLK#
PEX_RST#
2
PRSNT_R#
PRSNT_L#
PEX_STD_SW#
6
PWR_GOO D
PEX_CLK_REQ#
VGA_HSYNC
VGA_VSYNC
VGA_RED
VGA_GREEN
VGA_BLUE
VGA_DDC_CLK
VGA_DDC_DAT
DVI_HPD
DP_A_HPD
DP_B_HPD
DP_C_HPD
DP_D_HPD
PNL_PWR_EN
PNL_BL_EN
PNL_BL_PWM
SMB_CLK
SMB_DAT
VGA_DISABLE
CONN
CONN
R807 10K 1%
R807 10K 1%
R808 10K 1%
R808 10K 1%
R809 10K 1%
R809 10K 1%
R810 10K 1%
R810 10K 1%
R812 10K 1%
R812 10K 1%
R813 4.7K R0402R813 4.7K R0402
R815 4.7K R0402R815 4.7K R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
4
PEX_RX0
PEX_RX1
PEX_RX2
PEX_RX3
PEX_RX4
PEX_RX5
PEX_RX6
PEX_RX7
PEX_RX8
PEX_RX9
PEX_RX10
PEX_RX11
PEX_RX12
PEX_RX13
PEX_RX14
PEX_RX15
PEX_RX0#
PEX_RX1#
PEX_RX2#
PEX_RX3#
PEX_RX4#
PEX_RX5#
PEX_RX6#
PEX_RX7#
PEX_RX8#
PEX_RX9#
PEX_RX10#
PEX_RX11#
PEX_RX12#
PEX_RX13#
PEX_RX14#
PEX_RX15#
LVDS_UCLK
LVDS_UCLK#
LVDS_UTX0
LVDS_UTX0#
LVDS_UTX1
LVDS_UTX1#
LVDS_UTX2
LVDS_UTX2#
LVDS_UTX3
LVDS_UTX3#
LVDS_LCLK
LVDS_LCLK#
LVDS_LTX0
LVDS_LTX0#
LVDS_LTX1
LVDS_LTX1#
LVDS_LTX2
LVDS_LTX2#
LVDS_LTX3
LVDS_LTX3#
LVDS_DDC_CLK
LVDS_DDC_DAT
DP_A_AUX
DP_A_AUX#
DP_A_L0
DP_A_L0#
DP_A_L1
DP_A_L1#
DP_A_L2
DP_A_L2#
DP_A_L3
DP_A_L3#
DP_B_AUX
DP_B_AUX#
DP_B_L0
DP_B_L0#
DP_B_L1
DP_B_L1#
DP_B_L2
DP_B_L2#
DP_B_L3
DP_B_L3#
MXM_PWR_LEVEL
MXM_PWR_GOOD_R
MXM_TH_OVERT#
MXM_TH_ALERT#
MXM_WAKE#
MXM_LVDS_DDC_CLK
MXM_LVDS_DDC_DAT
MXM_LVDS_UTX1#
MXM_LVDS_UTX1
MXM_LVDS_UTX0#
MXM_LVDS_UTX0
MXM_LVDS_UCLK#
MXM_LVDS_UCLK
MXM_LVDS_UTX3#
MXM_LVDS_UTX3
MXM_LVDS_UTX2#
MXM_LVDS_UTX2
4
149
143
137
123
117
111
105
99
93
87
81
75
69
63
57
51
147
141
135
121
115
109
103
97
91
85
79
73
67
61
55
49
171
169
195
193
189
187
183
181
177
175
178
176
202
200
196
194
190
188
184
182
35
33
279
277
255
253
261
259
267
265
273
271
272
270
248
246
254
252
260
258
266
264
MXM_PEX_RXP0
MXM_PEX_RXP1
MXM_PEX_RXP2
MXM_PEX_RXP3
MXM_PEX_RXP4
MXM_PEX_RXP5
MXM_PEX_RXP6
MXM_PEX_RXP7
MXM_PEX_RXP8
MXM_PEX_RXP9
MXM_PEX_RXP10
MXM_PEX_RXP11
MXM_PEX_RXP12
MXM_PEX_RXP13
MXM_PEX_RXP14
MXM_PEX_RXP15
MXM_PEX_RXN0
MXM_PEX_RXN1
MXM_PEX_RXN2
MXM_PEX_RXN3
MXM_PEX_RXN4
MXM_PEX_RXN5
MXM_PEX_RXN6
MXM_PEX_RXN7
MXM_PEX_RXN8
MXM_PEX_RXN9
MXM_PEX_RXN10
MXM_PEX_RXN11
MXM_PEX_RXN12
MXM_PEX_RXN13
MXM_PEX_RXN14
MXM_PEX_RXN15
MXM_LVDS_UCLK
MXM_LVDS_UCLK#
MXM_LVDS_UTX0
MXM_LVDS_UTX0# MXM_LVDS_UTX0#
MXM_LVDS_UTX1
MXM_LVDS_UTX1#
MXM_LVDS_UTX2
MXM_LVDS_UTX2#
MXM_LVDS_UTX3
MXM_LVDS_UTX3#
MXM_LVDS_LCLK MXM_LVDS_LCLK
MXM_LVDS_LCLK# MXM_LVDS_LCLK#
MXM_LVDS_LTX0
MXM_LVDS_LTX0#
MXM_LVDS_LTX1
MXM_LVDS_LTX1#
MXM_LVDS_LTX2
MXM_LVDS_LTX2#
MXM_LVDS_LTX3
MXM_LVDS_LTX3#
MXM_LVDS_DDC_CLK
MXM_LVDS_DDC_DAT
MXM_DVI_AUX
MXM_DVI_AUX#
MXM_DVI_L2_C
MXM_DVI_L2#_C
MXM_DVI_L1_C
MXM_DVI_L1#_C
MXM_DVI_L0_C
MXM_DVI_L0#_C
MXM_DVI_CLK_C
MXM_DVI_CLK#_C
MXM_TH_OVERT#
MXM_TH_ALERT#
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
EC65
EC65
100N 16V
100N 16V
C0402
C0402
C773
0.22u 16V C0402
C773
0.22u 16V C0402
C772
0.22u 16V C0402
C772
0.22u 16V C0402
C771
0.22u 16V C0402
C771
0.22u 16V C0402
C737
0.22u 16V C0402
C737
0.22u 16V C0402
C769
0.22u 16V C0402
C769
0.22u 16V C0402
C736
0.22u 16V C0402
C736
0.22u 16V C0402
C766
0.22u 16V C0402
C766
0.22u 16V C0402
C741
0.22u 16V C0402
C741
0.22u 16V C0402
C763
0.22u 16V C0402
C763
0.22u 16V C0402
C762
0.22u 16V C0402
C762
0.22u 16V C0402
C735
0.22u 16V C0402
C735
0.22u 16V C0402
C754
0.22u 16V C0402
C754
0.22u 16V C0402
C752
0.22u 16V C0402
C752
0.22u 16V C0402
C751
0.22u 16V C0402
C751
0.22u 16V C0402
C749
0.22u 16V C0402
C749
0.22u 16V C0402
C748
0.22u 16V C0402
C748
0.22u 16V C0402
C809
0.22u 16V C0402
C809
0.22u 16V C0402
C804
0.22u 16V C0402
C804
0.22u 16V C0402
C802
0.22u 16V C0402
C802
0.22u 16V C0402
C800
0.22u 16V C0402
C800
0.22u 16V C0402
C798
0.22u 16V C0402
C798
0.22u 16V C0402
C796
0.22u 16V C0402
C796
0.22u 16V C0402
C794
0.22u 16V C0402
C794
0.22u 16V C0402
C792
0.22u 16V C0402
C792
0.22u 16V C0402
C788
0.22u 16V C0402
C788
0.22u 16V C0402
C786
0.22u 16V C0402
C786
0.22u 16V C0402
C784
0.22u 16V C0402
C784
0.22u 16V C0402
C782
0.22u 16V C0402
C782
0.22u 16V C0402
C790
0.22u 16V C0402
C790
0.22u 16V C0402
C789
0.22u 16V C0402
C789
0.22u 16V C0402
C774
0.22u 16V C0402
C774
0.22u 16V C0402
C745
0.22u 16V C0402
C745
0.22u 16V C0402
R798
R799
C814
NC/100N 16VC0402
C814
NC/100N 16VC0402
C815
NC/100N 16VC0402
C815
NC/100N 16VC0402
C812
NC/100N 16VC0402
C812
NC/100N 16VC0402
C813
NC/100N 16VC0402
C813
NC/100N 16VC0402
C810
NC/100N 16VC0402
C810
NC/100N 16VC0402
C811
NC/100N 16VC0402
C811
NC/100N 16VC0402
C816
NC/100N 16VC0402
C816
NC/100N 16VC0402
C817
NC/100N 16VC0402
C817
NC/100N 16VC0402
VER:M0B
VER:M0B
Stuff R802,Un-Stuff R805
R802
R805
31
MXM_CN1
MXM_CN1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
WHITE_CONN
WHITE_CONN
32
Close to MXM CONN.
MXM_LVDS_DDC_CLK 13
MXM_LVDS_DDC_DAT 13
NC/0ohm
R0402R798
NC/0ohm
R0402
NC/0ohm
R0402R799
NC/0ohm
R0402
NC/0ohm
NC/0ohm
NC/0ohm
NC/0ohm
MXM_LVDS_LTX2
MXM_LVDS_LTX2#
MXM_LVDS_LTX3
MXM_LVDS_LTX3#
MXM_LVDS_LCLK
MXM_LVDS_LCLK#
MXM_LVDS_LTX0
MXM_LVDS_LTX0#
MXM_LVDS_LTX1
MXM_LVDS_LTX1#
+5VS0_LCD +5VS0_LCD
+3V_S0
R0402_SHORTR802
R0402_SHORT
R0402R805
R0402
3
CPU_GFX_RXP0 5
CPU_GFX_RXP1 5
CPU_GFX_RXP2 5
CPU_GFX_RXP3 5
CPU_GFX_RXP4 5
CPU_GFX_RXP5 5
CPU_GFX_RXP6 5
CPU_GFX_RXP7 5
CPU_GFX_RXP8 5
CPU_GFX_RXP9 5
CPU_GFX_RXP10 5
CPU_GFX_RXP11 5
CPU_GFX_RXP12 5
CPU_GFX_RXP13 5
CPU_GFX_RXP14 5
CPU_GFX_RXP15 5
CPU_GFX_RXN0 5
CPU_GFX_RXN1 5
CPU_GFX_RXN2 5
CPU_GFX_RXN3 5
CPU_GFX_RXN4 5
CPU_GFX_RXN5 5
CPU_GFX_RXN6 5
CPU_GFX_RXN7 5
CPU_GFX_RXN8 5
CPU_GFX_RXN9 5
CPU_GFX_RXN10 5
CPU_GFX_RXN11 5
CPU_GFX_RXN12 5
CPU_GFX_RXN13 5
CPU_GFX_RXN14 5
CPU_GFX_RXN15 5
MXM_DVI_SCLK 27
MXM_DVI_SDAT 27
MXM_DVI_L2 27
MXM_DVI_L2# 27
MXM_DVI_L1 27
MXM_DVI_L1# 27
MXM_DVI_L0 27
MXM_DVI_L0# 27
MXM_DVI_CLK 27
MXM_DVI_CLK# 27
R801
R801
10K 1%
10K 1%
R0402
R0402
MXM_TH# 28
3
2
+VIN
C739
C739
10PF 50V
10PF 50V
10PF 50V
10PF 50V
C0402
C0402
C0402
C0402
VER:M0C
Change MXM connector P/N
VER:M0B
DVI level shift
MXM_PWR_EN_R
R1139
R1139
NC/100K 1%
NC/100K 1%
R0402
R0402
R1131 NC/499R 1% R0402R1131 NC/499R 1% R0402
R1132 NC/499R 1% R0402R1132 NC/499R 1% R0402
R1133 NC/499R 1% R0402R1133 NC/499R 1% R0402
R1134 NC/499R 1% R0402R1134 NC/499R 1% R0402
R1135 NC/499R 1% R0402R1135 NC/499R 1% R0402
R1136 NC/499R 1% R0402R1136 NC/499R 1% R0402
R1137 NC/499R 1% R0402R1137 NC/499R 1% R0402
R1138 NC/499R 1% R0402R1138 NC/499R 1% R0402
Q79
Q79
NC/SSM3K7002BS
NC/SSM3K7002BS
MXM_DVI_L2_C
MXM_DVI_L2#_C
MXM_DVI_L1_C
MXM_DVI_L1#_C
MXM_DVI_L0_C
MXM_DVI_L0#_C
MXM_DVI_CLK_C
MXM_DVI_CLK#_C
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Key Component
Key Component
Key Component
Date
Date
Date
2
C755
C755
10uF 25V
10uF 25V
C1206
C1206
+5V_S0
C775
C775
22UF
22UF
C0805
C0805
<Circuit diagram NO.>
<Circuit diagram NO.>
<Circuit diagram NO.>
COVER SHEET
COVER SHEET
COVER SHEET
C756
C756
10uF 10V
10uF 10V
4.7uF 10V
4.7uF 10V
C0603
C0603
1A
C0805
C0805
10uF 25V
10uF 25V
C1206
C1206
C776
C776
+3V_S0
C805
C805
C757
C757
100N 16V
100N 16V
100N 16V
100N 16V
C0402
C0402
TP147 TP147
C0402
C0402
1A
22UF 25V
22UF 25V
C1210
C1210
C777
C777
C806
C806
J_MXM1C
J_MXM1C
E3-6
GND_E3
E3-7
GND_E3
E3-8
GND_E3
E3-9
GND_E3
E3-10
GND_E3
E4-6
GND_E4
E4-7
GND_E4
E4-8
GND_E4
E4-9
GND_E4
E4-10
GND_E4
E1-1
PWR_SRC0
E1-2
PWR_SRC0
E1-3
PWR_SRC0
E1-4
C759
C759
C758
C758
22UF 25V
22UF 25V
C1210
C1210
C779
C779
100N 16V
100N 16V
C0402
C0402
C807
C807
100N 16V
100N 16V
C0402
C0402
MXM_PWR_LEVEL
MXM_WAKE#
MXM_PWR_EN_R 28
MXM_TH_OVERT#
MXM_TH_ALERT#
MXM_TH_PWM
OEM MODEL
NISENE 2 C
OEM MODEL
NISENE 2 C
OEM MODEL
NISENE 2 C
T&I MODEL
T&I MODEL
T&I MODEL
PCB NAME
PCB NAME
PCB NAME
XXXXXXXXXXXX
XXXXXXXXXXXX
XXXXXXXXXXXX
Sheet
12 43 Tuesday, May 08, 2012
Sheet
12 43 Tuesday, May 08, 2012
Sheet
12 43 Tuesday, May 08, 2012
PWR_SRC0
E1-5
PWR_SRC0
E1-6
PWR_SRC0
E1-7
PWR_SRC0
E1-8
PWR_SRC0
E1-9
PWR_SRC0
E1-10
PWR_SRC0
E2-1
PWR_SRC1
E2-2
PWR_SRC1
E2-3
PWR_SRC1
E2-4
PWR_SRC1
E2-5
PWR_SRC1
E2-6
PWR_SRC1
E2-7
PWR_SRC1
E2-8
PWR_SRC1
E2-9
PWR_SRC1
E2-10
PWR_SRC1
1
5V_0
3
5V_1
5
5V_2
7
5V_3
9
5V_4
278
3V3_0
280
3V3_1
191
GND50
192
GND51
197
GND52
198
GND53
203
GND54
204
GND55
209
GND56
210
GND57
215
GND58
216
GND59
221
GND60
222
GND61
228
GND62
244
GND63
250
GND64
251
GND65
256
GND66
257
GND67
262
GND68
263
GND69
268
GND70
269
GND71
275
GND72
283
GND73
J_MXM1B
J_MXM1B
29
HDMI_CEC
18
PWR_LEVEL
38
OEM0
39
OEM1
40
OEM2
41
OEM3
42
OEM4
43
OEM5
44
OEM6
45
OEM7
4
WAKE#
8
PWR_EN
26
GPIO0
28
GPIO1
30
GPIO2
20
TH_OVERT#
22
TH_ALERT#
24
TH_PWM
10
RSVD0
12
RSVD1
14
RSVD2
16
RSVD3
159
RSVD4
161
RSVD5
163
RSVD6
165
RSVD7
167
RSVD8
227
RSVD9
229
RSVD10
231
RSVD11
233
RSVD12
235
RSVD13
237
RSVD14
238
RSVD15
239
RSVD16
240
RSVD17
241
RSVD18
242
RSVD19
243
RSVD20
245
RSVD21
247
RSVD22
249
RSVD23
CONN
CONN
of
of
of
1
E3-1
GND_E3
E3-2
GND_E3
E3-3
GND_E3
E3-4
GND_E3
E3-5
GND_E3
E4-1
GND_E4
E4-2
GND_E4
E4-3
GND_E4
E4-4
GND_E4
E4-5
GND_E4
11
GND0
13
GND1
15
GND2
17
GND3
36
GND4
37
GND5
46
GND6
47
GND7
52
GND8
53
GND9
58
GND10
59
GND11
64
GND12
65
GND13
70
GND14
71
GND15
76
GND16
77
GND17
82
GND18
83
GND19
88
GND20
89
GND21
94
GND22
95
GND23
100
GND24
101
GND25
106
GND26
107
GND27
112
GND28
113
GND29
118
GND30
119
GND31
124
GND32
125
GND33
133
GND34
134
GND35
139
GND36
140
GND37
145
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
DP_C_AUX
DP_C_AUX#
DP_C_L3
DP_C_L2
DP_C_L1
DP_C_L0
DP_C_L3#
DP_C_L2#
DP_C_L1#
DP_C_L0#
DP_D_AUX
DP_D_AUX#
DP_D_L3
DP_D_L2
DP_D_L1
DP_D_L0
DP_D_L3#
DP_D_L2#
DP_D_L1#
DP_D_L0#
Size
Size
Size
Rev
Rev
Rev
remark
remark
remark
146
151
152
157
166
173
174
179
180
185
186
282
<remark>
<remark>
<remark>
225
223
219
213
207
201
217
211
205
199
232
230
226
220
214
208
224
218
212
206
CONN
CONN
1
5
4
3
2
1
MXM & UMA BACKLIGHT ENABLE AUTO SELECT LCD POWER ENABLE
+5V_S0
R819
R819
10K 1%
10K 1%
R0402
R0402
R0402
Q67
Q67
DUAL 2N7002PS
DUAL 2N7002PS
LCD_BL_EN
Q69
Q69
DUAL 2N7002PS
DUAL 2N7002PS
LCD_VDDEN
+5V_S0
R833
R833
10K 1%
10K 1%
R0402
R0402
LCD_ENABKL
Q71
Q71
SSM3K7002BS
SSM3K7002BS
R0402
PMBT3904
PMBT3904
Q65
Q65
CONV_EDID_CLK 11
MXM_LVDS_DDC_CLK 12
VER: M0B
CONV_EDID_DATA 11
MXM_LVDS_DDC_DAT 12
GFX_ID_5V
VER: M0B
SSM3K7002BS
SSM3K7002BS
CONVERTER CONNECTOR
PCH_EDID_SW 15
EC_EDID_SW 28
EC_SCLK0
CONV_EDID_CLK
EC_SDATA0
CONV_EDID_DATA
DEFAULT LOW
(SCALAR PATH)
EC_SCLK0 11,16,27,28
EC_SDATA0 11, 16,27,28
4
R818
R818
2.2K OHM 1%
D D
VER:M0C
UMA_PDSW#
UMA_PDSW# 11,28
C C
R826 4.7K R0402R826 4.7K R0402
UMA_BKLTEN 11,18
MXM_PNL_BL_EN 12
UMA_VDD_EN 11,18
MXM_PNL_PWR_EN 12
2.2K OHM 1%
R0402
R0402
GFX_ID-_5V
PMBT3904
PMBT3904
Q66
Q66
GFX_ID_5V
UMA_BKLTEN
MXM_PNL_BL_EN
GFX_ID-_5V
GFX_ID_5V
UMA_VDD_EN
MXM_PNL_PWR_EN
GFX_ID-_5V
R825
R825
8.2K 1/16W
8.2K 1/16W
G
G
S
S
D D
D D
S
S
G
G
G
G
S
S
D D
D D
S
S
G
G
BACKLIGHT ENABLE
R834
R834
10K 1%
10K 1%
R0402
R0402
Q8.G
Q72
B B
R0402
R840 NC/4.7K
EC_ENABKL 28
LCD_BL_EN
SCAL_BL_EN 27
A A
R840 NC/4.7K
R841 4.7K
R841 4.7K
R842 NC/4.7K
R842 NC/4.7K
5
R0402
R0402
R0402
R0402
R0402
Q72
PMBT3904
PMBT3904
IC_VCC_EN
R827
R827
10K 1%
10K 1%
R0402
R0402
Q68
Q68
JBL1
JBL1
CONN
CONN
EC_EDID_SW
+5V_S0
R849
R851
R854
R856
+5V_S0
+3V_S0
C982
C982
10uF 6.3V
10uF 6.3V
C0603
C0603
100N 16V
100N 16V
PMBT3904
PMBT3904
11 12
1
2
3
4
5
6
7
8
9
10
NC/0ohm
NC/0ohm
NC/0ohm
NC/0ohm
NC/0ohm
NC/0ohm
NC/0ohm
NC/0ohm
C820
C820
C0402
C0402
10K 1%
10K 1%
R0402
R0402
R828
R828
Q9.G
Q70
Q70
Q11.B
2A
JBL1.3
JBL1.4
U6.3
R0402_SHORTR849
R0402_SHORT
R0402_SHORTR851
R0402_SHORT
U8.3
R0402_SHORTR854
R0402_SHORT
R0402_SHORTR856
R0402_SHORT
R860
NC/0.05R
NC/0.05R
R862
0ohm
0ohm
R863 NC/4.7K
R863 NC/4.7K
R864 4.7K R0402R864 4.7K R0402
C821
C821
100N 25V
100N 25V
C0402
C0402
R0402R862
R0402
5
4
3
1
2
3
1
2
3
R0402R860
R0402
R0402
R0402
U45
U45
OUT
IN
IN
GND2EN
G5243AT11U
G5243AT11U
R829 NC/4.7K
R829 NC/4.7K
R830 4.7K
R830 4.7K
R831 NC/4.7K
R831 NC/4.7K
JBL1.1
C822
C822
10uF 25V
10uF 25V
C1206
C1206
R835 0ohm
R835 0ohm
R836 NC/0ohm
R836 NC/0ohm
R837 NC/0ohm
R837 NC/0ohm
R838 0ohm
R838 0ohm
R1143 NC/0ohm
R1143 NC/0ohm
R839 0ohm
R839 0ohm
LCD_ID0
LCD_ID1
LCD_ID2
LCD_ID3
U46
U46
S6B1
GND
VCC
A
B0
74LVC1G3157GW
74LVC1G3157GW
U48
U48
S6B1
GND
VCC
A
B0
74LVC1G3157GW
74LVC1G3157GW
EDID_SW
3
1
U45_OUT
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
+3V_S0
5
4
5
4
Change to 3A
R401
R401
R1206_SHORT
R1206_SHORT
LCD_VDDEN
PF1
PF1
PTCR
PTCR
1 2
C823
C823
10uF 25V
10uF 25V
C1206
C1206
LCD_ENABKL
VER:M0B
C824
C824
100N 16V
100N 16V
C0402
C0402
NC/0 OHM 1/4W
NC/0 OHM 1/4W
SCAL_LCD_PWREN 27
EC_LCD_VDD_EN 28
t
t
SCAL_BL_ADJ 27
MXM_PNL_BLADJ 12
CONV_BKLTCTL 11
UMA_BKLTCTL 11,18
EC_BLADJ 28
C825
C825
100N 16V
100N 16V
C0402
C0402
EDID_CLK
EDID_DATA
NC/22P 50V
NC/22P 50V
EC67
EC67
C0402
C0402
+VIN_INV
4.7K
4.7K
R0402
R0402
R844
R844
C818
C818
10uF 10V
10uF 10V
C0805
C0805
+5VS0_LCD
R850
R850
4.7K
4.7K
R0402
R0402
EC68
EC68
NC/22P 50V
NC/22P 50V
C0402
C0402
Panel ID
Panel ID
LCD_ID0 28
LCD_ID1 28
LCD_ID2 28
SW1
SW1
1
R77.2
8
7
NC/HRM-04-T/R
NC/HRM-04-T/R
ID3
00
2
34 56
0
EC66
EC66
100P 50V
100P 50V
C0402
C0402
R823
NC/100R
NC/100R
R0402R823
R0402
0001
1 0 00
101 0
00 1 1
VER:M0B
+VIN
+3V_S0
R249
R249
100K 1%
100K 1%
R0402
R0402
R1144 0R R1144 0R
NC/22P 50V
NC/22P 50V
C991
C991
C0402
C0402
C250
C250
100N 25V
100N 25V
C0402
C0402
Q13
Q13
AO3401A
AO3401A
EDID
+3V_S0
C826
C826
1UF 10V
1UF 10V
C0402
R845
R845
4.7K
4.7K
R0402
R0402
C0402
U47
U47
8
EDID_WP
EC_EDID_SW
7
6
5
CAT24C02WI-GT3
CAT24C02WI-GT3
R8614.7K R0402R8614.7K R0402
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
T&I (TPV-INVENTA TECHNOLOGY CO., LTD)
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Circuit diagram NO. Larrybird M0B
Key Component
Key Component
Key Component
Date
Date
Date
2
VCC
WP
SCL
SDA
2Kbit
R866
<Circuit diagram NO.>
<Circuit diagram NO.>
<Circuit diagram NO.>
COVER SHEET
COVER SHEET
COVER SHEET
A0
A1
A2
GND
Q7.B
PMBT3904
PMBT3904
1
2
3
4
Q75
Q75
NC/0.05R
NC/0.05R
EDID_A0 EDID_ A0
EDID_A1
EDID_A2
R0402R866
R0402
R846
R846
NC/10K 1%
NC/10K 1%
R0402
R0402
R857
R857
0ohm
0ohm
R0402
R0402
EDID_WP
OEM MODEL
OEM MODEL
OEM MODEL
T&I MODEL
T&I MODEL
T&I MODEL
PCB NAME
PCB NAME
PCB NAME
Sheet
Sheet
Sheet
LCD_ID3 28
R0402
R0402
R820 10K 1%
R820 10K 1%
R0402
R0402
R821 10K 1%
R821 10K 1%
R822 10K 1%
R822 10K 1%
R824 NC/10K 1%
R824 NC/10K 1%
ID0 ID1 ID2
0
R0402
R0402
Panel
Samsung
R0402
R0402
VER:M0C
LG
CMI
1 001
0 0 1 0
+VIN_INV
C331
C331
C330
C330
100N 25V
100N 25V
100N 25V
100N 25V
C0402
C0402
C0402
C0402
R377
R377
100K 1%
100K 1%
R0402
R0402
SSM3K7002BS
SSM3K7002BS
Q60
Q60
+3V_S0
R848
R848
R847
R847
NC/10K 1%
NC/10K 1%
NC/10K 1%
NC/10K 1%
R0402
R0402
R0402
R0402
R858
R858
R855
R855
0ohm
0ohm
0ohm
0ohm
R0402
R0402
R0402
R0402
NISENE 2 C
NISENE 2 C
NISENE 2 C
XXXXXXXXXXXX
XXXXXXXXXXXX
XXXXXXXXXXXX
of
13 43 Tuesday, May 08, 2012
of
13 43 Tuesday, May 08, 2012
of
13 43 Tuesday, May 08, 2012
+3VSB +3V_S5
R816
R816
NC/0ohm
NC/0ohm
R0603
R0603
R72.1
1
Size
Size
Size
Rev
Rev
Rev
remark
remark
remark
VER:M0C
<remark>
<remark>
<remark>
R817
R817
NC/0ohm
NC/0ohm
R0603_SHORT
R0603_SHORT