HP TouchSmart 610 Schematic

8

WWW.MANUALS.CLAN.SU

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Schematic Page Description

Schematic Page Description Schematic Page Description

D D

01 -- Page Description 02 -- System Block Diagram_V12_ 03 -- Power Map 04 -- Power Sequence 1/2 05 -- Power Sequence 2/2 06 -- Clock Block Diagram

C C

07 -- SMBus Block Diagram 08 -- GPIO list 09 -- TBD 10 -- CPU-DDR3 (1/4) 11 -- CPU-HOST BUS (2/4) 12 -- CPU-POWER (3/4) 13 -- CPU-GND (4/4) 14 -- DDR3 CHA DIMM 0

B B

15 -- DDR3 CHA DIMM 1 16 -- DDR3 CHB DIMM 0 17 -- DDR3 CHB DIMM 1 18 -- PCH-PCI 19 -- PCH-DMI, PCI-E, USB 20 -- PCH-SATA, MLINK, GPIO

21 -- PCH-MISC, GPIO, SMBUS 22 -- PCH-DISPLAY, FDILINK 23 -- PCH-CLOCK DISTRIBUTION 24 -- PCH-POWER 25 -- PCH-GND 26 -- RTC / SPI / Debug LED 27 -- MXM 3.0 28 -- HD Audio Codec(92HD89D3) 29 -- AMP (SSM2306) 30-- CardReader(RTS5138) 31 -- SATA HDD/ODD/SSD 32 -- MINI PCIE (WLAN/TV) 33 -- SIDE USB CONNECTOR 34 -- USB/CCD/BT/MT 35 -- DP to LVDS (STDP4010) 36 -- STDP4010 & eDP connector 37 -- Panel (EDID) 38 -- Panel (Control) 39 -- uC (CG7216AM) 40 -- EC ITE 8519E/FLASH

41 -- FAN/Thermal Protection 42 -- I/O Board connector 43 -- CPU/PCH XDP 44 -- ACIN 45 -- 3VPCU/5VPCU(RT8206) 46 -- 1.8V_SFR/1.05V_PCH 47 -- 1.5V_DDR3(TPS51116) 48 -- LDO +1.8V/1.1VSUS 49 -- CPU(NCP6151S) 50 -- CPUDRIVER 51 -- VCC_IO/VCC_SA 52 -- DISCHARGE 53 -- 12VHDD 54 -- CHANGE LIST

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Page Description

Date: Sheet of

8

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Date: Sheet of

PROJECT :

2

WJ1

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7

8

Sugar Bay System Block Diagram

MXM LVDS(2ch) output

M/B

A A

DDR3-SODIMM 1&2

DDR3-SODIMM 3&4

DDR3 1066/1333 MT/s

LGA1155 socket

CPU

Sandy Bridge

Ivy Bridge

FDI

DMI

PEG

MXM 3.0 Type A (35W) Type B (75W)

MXM_LVDS(2ch)

MXM_eDP

DP to LVDS STDP4010

MXM eDP output

UMA LVDS(2ch) CONN

UMA_LVDS(2ch)

UMA_DP(2 lane)

32.768KHz

UMA_eDP(4 lane)

3.5" SATA HDD

B B

SATA - SSD

SATA - ODD

32.768KHz

SATA Gen3

SATA Gen1

PCH

Cougar Point

H67

UMA DP CONN

UMA_DP(4 lane)

UMA eDP CONN

IR Blaster

40pin

USB2.0

GenericB from MXM

IR Blaster

I2C

ITE KBC

IT8519E

LPC

PCI-E

3D Camera

USB2.0 Ports

For dongle

USB2.0 Ports

For BT

USB2.0 Ports

Side*2

20pin

LED Panel

Panel Connector

eDP 1.2

30pin

2D LCD Panel (2ch LVDS)

3D LCD Panel (eDP)

calar Board

S

ST Athena

25MHz

GLAN

RT8111E

Or

HDMI in

RJ45

IR Blaster

Sub-Woofer

Line Out

2

DRV601

Mini PCI-E Card

WLAN

2D/3D Backlight

Converter

C C

PWMconnect

PSoC Cypress CG7216AM

G-Sensor

CPU FAN (5V)

System FAN(12V)

URAT

SPI ROM

Azalia

AUDIO Amplifier SSM2306

Audio Codec

IDT 92HD89D

AUDIO Amplifier SSM2306

Connector to int Speaker

DRV604

HeadPhone/Mic Combo Jack

4

LED_drive

Stereo Sync

Sync_AudioJack

Internal Emitter circuit

IR_LED

D D

VESA mini Din 3pin

1

connect Scalar

2

Line in

DMic

Connector to int Speaker

3

6 in 1

RTS5138-GR

Card reader Conn

Mic

Sync_AudioJack

5

Mini PCI-E Card

TV

RF in

SPDIF

Line Out

Sub-Woofer

Connect Audio Codec

6

UPD720200

Rear I/O Board

ODD board

PWR BTN

IR Board

DMic

CONFIDENTIAL

7

USB2.0 Ports

USB 3.0

USB2.0 /3.0 Ports

ODD Eject

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

PROJECT :

System Block Diagram

8

WJ1

2 54Monday, October 18, 2010

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WWW.MANUALS.CLAN.SU

DestinationPower Rail Voltage S0 Current

CPU_CORE

Sandy Bridge: CPU core

V_AXG

Sandy Bridge: CPU AXG

System Agent

Sandy Bridge : Memory controller

VCC_IO

D D

C C

PCH: DMI 1.1V PCH : CPU_IO

Sandy Bridge: Internal processor PLL 1.71V~1.8V~1.89V

1.8V_SFR

PCH : PCH : Dual channel NAND I/F

+1.8V

LAN re-driver

Sandy Bridge: CPU I/O Voltage for DDRIII

1.5V_DDR3

DIMM :

SMDDR_VTERM

1.05V_PCH PCH :PCH_1.05V

+1.5V

DDRIII Terminator:

PCH : Vcc core I/O buffer PCH : DMI buffer voltage PCH : Display PLL A power PCH : Display PLL B power

Mini PCIE : +1.5V(WLAN)

1.1V_SUS

3V_SUS

PCH: I/O buffer voltage

+3V

PCH: Display DAC Analog power IDT 92HD80 : DVDD Mini PCIE : +3.3V(WLAN) CAREMA

3V FOR MXM STDP4010 (M/B) RTS5138

PCH: Core well Ref. voltage

+5V

SATA ODD SATA HDD(2.5'' x SSD) LCD Panel (SAMSUNG)

5V FOR MXM

0.65V~1.3V

0.5 V~1.3V 35A

0.925 V/0.85 V

HI-->1.05V Low-->1.1V

1.05V~1.1V~1.16V

1.71V~1.8V~1.89V

1.425V~1.5V~1.575V

0.75V 2A

0.998V~1.05V~1.1V

1.425V~1.5V~1.575V

3.14V~3.3V~3.47V

3.135V~3.3V~3.465V

3.102V~3.3V~3.498V

3.0V~3.3V~3.6V

4.75V~5V~5.25V

4.5V~5V~5.5V

4.7V~5V~5.3V

+5V_S3 USB: x 12 ports 5V 6A

+12V

SSD HDD FAN_CPU CONVERTER : 12V

B B

LCD Panel (LG) 11.6V~12V~12.4V

PCH : Intel Management Engine PCH : Suspend well I/O Buffer

+3V_S5

PCH : HD Audio controller EC(IT8519) : VSTBY SPI FLASH ROM

+5V_S5

PCH : Suspend well Ref. Voltage 4.75V~5V~5.25V

3VPCU

EC(IT8519) : VPCU

11.4V~12V~12.6V

11.4V~12V~12.6V 12V 2A

3.14V~3.3V~3.47V

3.0V~3.3V~3.6V

5VPCU

CONVERTER(SUMSUNG) : Vin 17V~19V~21V

VIN

CONVERTER : Vin

19V FOR MXM

+1.2V

STDP4010 (M/B)

A A

5

17V~19V~21V 19V

1.14V~1.2V~1.26V

112A

8.8AVCC_SA

8.5A (TDC)

0.065A

0.001A

1.1A

0.196A

0.156A

9A 11A

1.629A

3.251A

0.065A

0.075A

0.5A

0.357A

0.069A

2.75A

1A

0.11A

0.035A

0.001A

1.5A

0.65A

1.6A

2.5A

0.46A

0.226A

1.08A

0.086A

0.168A

0.006A

0.001A

1.1A

1.6A 10A

0.21A

4

VIN

3

2

1

3

MAINON

NCP1589Adaptor

+12V

S5_ON15V

G

MOS

D

AO4496

S

+5V_S5

SUSD

5VPCU

MOS

AO4496

G

D

S

+5V_S3

MAIND

G

RT8206

3VPCU

MAINON SUSON

TPS51116RGE

ENABLE

NCP6151S

SYS_SHDN#

MOS

D

S

AO4468

S5_ON15V

G

MOS

D

S

AO4496

SUSD

G

MOS

D

S

AO4496

MAIND

G

MOS

D

S

AO6402

SMDDR_VTERM

3VPCU

1.5V_DDR3

DRVON

NCP5901

+3V_S5

3V_SUS

+3V

+5V

MAINON

LDO

G9731

D

G

OP

S

+1.8V

MAINON

MOS

AO4468

G

D

S

1.8V_SFR

MAINON

G

D

AO6402A

MOS

D

AOL1448

MAINON

G

LDO

OP

G9731

LDO

OP

APL5930

S

MAINON

G

SUSON

G

D

S

D

S

+1.5V

1.05V_PCH

+1.2V

1.1V_SUS

V_AXG

DRVON

NCP5901

VCC_IO

MAINON

ISL95870

4

3

VR_PVCCUSA_SEL

G

MOS

D

S

AOL1448

VCC_SA

CPU_CORE

Quanta Computer Inc.

PROJECT :

WJ1

PROJECT :

WJ1

PROJECT :

Size Document Numb er Rev

2

CONFIDENTIAL

Size Document Numb er Rev

Power Map

Date: Sheet of

1

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Power Sequence

CPU

Sandy Bridge

21 22

PWRGD_DRAM

DRAMPWROK

PCH

Cougar Point

H67

PWROK_EC

16

ITE ITE8519 EC

Ivy Bridge

H_PWRGOOD

PROCPWRGD

SLP_S3#

23

PLTRST#

+3V_S5

+5V_S5 +3V

+5V

1.05V_PCH

1.8V_SFR

VCC_IO

PCH_PWRBTN#

8910

RSMRST#

7

SLP_S4#

4

PWRBTN#

D D

RTC

VCCRTC

RTC_RST#

SRTC_RST#

21

2

logical AND of the PCH’s PWROK and SYS_PWROK

AND

C C

APWROK

PWROK

SYS_PWROK

PWRGD_3V

17

VCCP_VR_RDY_R

20

B B

4

DDR3

other PCI/PCIe device

6

14

12

1.5V_DDR3

12

SMDDR_VTERM

HWPG

USB Port

15

+5V_S3

AND

12

3

HWPG_1.5V_DDR3

HWPG_3/5V

2

S5_ON15V

6

MOS

6

MOS

12

MOS

13

SMDDR_VTERM

G

D

S

S5_ON15V

G

D

S

SUSD

G

D

S

TPS51116RGE

12

+3VPCU

11

SUSON

+3V_S5

13

11

1.8V_SFR 14

+1.8V 14

D

G

S

G9731

MAINON

LDO

OP

MAINON

+3V

3V_SUS

13

14

D

S

MOS

G

MAIND

12

D

S

MOS

G

SUSD

+5V_S5

14

LDO

OP

D

S

LDO

OP

G

MAINON

+12V

+5V

1.1V_SUS

13

14

15

12

13

+1.5V

MAINON

NCP1589

MAINON 13

S

G

D

MOS

MAIND

APL5930

14

13

+5V_S3

SUSON

11

MAINON

12

G

1.5V_DDR3

MOS

D

S

15

1.05V_PCH

+1.2V

14

D

G

S

MAINON

VR_PVCCUSA_SEL

3

5

3

+5VPCU

1

4

5

DC Jack

VIN

3

RT8206

11

VRON

HWPG

18

15

SUSON

MAINON

S5_PWR_ON

+3V

14

5

11

13

VCCRTC

3VPCU_EC

+3VPCU

3 1

3

VCC_SA

Control signal RTC Power PCU Power

A A

S5 Power SUS Power S0 Power

VCCP_VR_RDY_R

5

4

3

20

LDO

16 14

D

VCC_IO

OP

G

S

19

V_AXG

CPU_CORE

20

VCORE_PG

19

ISL95870

DRVON

NCP5901

DRVON

2

3

VIN_VTT

18

VRON 18

3

NCP6151

VIN_CPU

18

Quanta Computer Inc.

PROJECT :

WJ1

CONFIDENTIAL

Size Document Number Rev

Power Se quence 1/2

Date: Sheet of

1

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POWER SEQUENCE

D D

C C

B B

Voltage Rails

Power S0 Ctl SignalS3 S4 S5

VCCRTC 3V VIN 19V 5VPCU

+5V_S5

3V_S5

+ +5V_S3 5V 3V_SUS

1.5V_DDR3 SMDDR_VTERM

1.1V_SUS +5V +3V +12V +1.8V

1.8V_SFR +1.5V

1.05V_PCH VCC_IO +1.2V 1.2V V_AXG CPU_CORE VCC_SA

3VPCU_EC VIN_CPU 19 V VIN_VTT VIN_LCD USBVCC2 USB3.0_VCC1 USB3.0_VCC2 3V_USB_A VIN_MXM +5V_MXM +3V_MXM

12V_HDD

+ +5V_HDD +12V_SSD +5V_SSD LCDVCC +5V_Touch CCD_PWR VDDA_CODEC +AZA_VDD +3V_TV VCC3_CARD

Voltage

ON

ON ON ON O

ON ON ON ON OFF

5V

ON ON ON ON OFF

3.3V3VPCU

ONONON

5V

3.3V

ON ON ON ON

3.3V

ON ON

1.5V

ON

0.75V

ON

1.1V

ON

5V

ON

3.3V

ON

12V

ON

1.8V

ON

1.8V

ON

1.5V

ON

1.05V

ON

1.05V

ON ON OFF OFF OFF OFF OFF

0.5~1.3V

N

O

0.65~1.3V

ON

0.925 /0.85 V

ON

Voltage

3.3V

ON ON ON ON ON OFF ON ON ON ON ON

19V

ON

19V

ON

5V

ON ON

5V

ON ON

5V

ON ON

3V

ON ON

19V

ON

5V

ON

3.3V

ON

12V

ON

5V

ON

12V

ON

5V

ON

12 /5V

ON

5V

ON

3.3V

ON

5V

ON

3.3V

ON

3.3V

ON

3.3V

ON

ON ON

ON

O

N

OFF OFF

F

OF

ON

OFF

ON

OFF

ON

OFF

OFF OFF

OFF

F

OF

OFF

ONONONONONONON

OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF

OFF

PCU

ON ON ON ON

ON

OFF

ON

OFF

ON

OFF OFF OFF OFF

OFF

PCUPower S0 S 3 S4 S5

OFF OFF

ON

OFF OFF OFF OFF

OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF

OFF

G3

N

Adaptor in Adaptor in Adaptor in

OFF

S5_PWR_ON

OFF

S5_PWR_ON

OFF

SUSD SUSD

OFF

SUSON

OFF

USON

S

OFF

SUSON

OFF

MAIND

OFF

MAIND

OFF

MAINON

OFF

MAINON

OFF

MAINON

OFF

MAINON

OFF

MAINON

OFF

MAINON

OFF

MAINON STDP4010 VR

ON

OFF

VRON

OFF

VR_PVCCUSA_SEL

OFF

G3

RTC, PCH

IR Receiver EC, Flash PCH, AMP, BT PCH, G-sensor, XDP, SPI flash ROM USB3.0, USB2.0

DDR3, CPU DDR3 I/O DDR3

PCH, CRT, Multi-touch , ODD, HDD, SSD, Buzzer, Panel CG7216, CCD, D-Mic, USB controller, WL, TV, RTS5138, Codec, MXM, PCH, DDR3, Flash, EEPROM FAN, Panel, HDD, SSD LAN re-driver PCH, CPU_PLL WL, TV PCH_I/O, PCH_CLK, PCH_PLL, PCH_CORE XDP, PCH_DMI, PCH_PROIO, CPU_IO

CPU_AXG CPU_Core CPU_SA

EC

Converter/B USB2.0 port USB3.0 port USB3.0 port USB3.0 controller MXM MXM MXM HDD HDD SSD SSD Panel_LVDS Multi_touch CCD Codec, Audio jack Codec TV card RTS5138

1.5V_DDR3/SMDDR_VTERM /1.1V_SUS/3V_SUS/+5V_S3

VCC_IO/VCC_SA/+12V/+5V/+3V/1.8V_SFR/+1.8V/+1.5 V/1.05V_PCH

SYS_PWROK/PWROK/APWROK

VCCRTC

RTC_RST#

VIN/5VPCU/3VPCU

PWRBTN#

S5_PWR_ON

+3V_S5/+5V_S5

RSMRST#

PCH_SUSCLK

PCH_PWRBTN#

SLP_S4#

SLP_S3#

SUSON

MAINON

HWPG

PWROK_EC

VRON

CPU_CORE/V_AXG

VCORE_PG

PWRGD_DRAM

H_PWRGOOD

SUS_STAT#

PLTRST#

9ms,min

Minimum duration of PWRBTN# ass ertion = 16ms

10ms,min

RSMRST# and SLP_SUS# deassertion to SUSCLK toggling

5ms,min

study

30us,min

100ms,min

Clock

MAINON high to VRON high TUSB7320 limit

PWROK high to PCH clock outputs stable

1ms,min

ClockPCH Clock

PCH clock output stable to PROC PWRGD high1ms,min

1ms,min

60us,min

A A

Quanta Computer Inc.

PROJECT :

WJ1

PROJECT :

WJ1

PROJECT :

Size Document Number Rev

Power Sequ ence 2/2

5

4

3

2

CONFIDENTIAL

Power Sequ ence 2/2

Date: Sheet of

1

WJ1

5 54Monday, October 18, 2010

B

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WWW.MANUALS.CLAN.SU

4

3

2

1

6

Sandy Bridge

D D

100 MHz

100MHz 100MHz

100 MHz

USB3.0 controller

C C

D/B UPD720200

100MHz

CLK_PCIE_USB3.0P CLK_PCIE_USB3.0N

100 MHz

PCH Cougar Point Internal CLK gen

CLK_100M_CPU_CLK_P CLK_100M_CPU_CLK_N

CLK_100M_XDP_HEADER_P CLK_100M_XDP_HEADER_N

XDP

CLK_100M_XDP_HEADER_P CLK_100M_XDP_HEADER_N CLK_PCH_XDP_P CLK_PCH_XDP_N

48 MHz

100 MHz

33MHz

Card Reader RTS5138

8MHz

4

CLK_48M_CARD

WLAN

100MHz

CLK_PCH_WLAN_P CLK_PCH_WLAN_N

33MHz LPC_DEBUG_CLK

GB LAN

33MHz PCI_CLKBK

TV

00MHz

CLK_PCIE_LOMP CLK_PCIE_LOMN

1

B B

100 MHz

33 MHz

100 MHz

100MHz

CLK_PCH_TV_P CLK_PCH_TV_N

MXM

25 MHz 32.768kHz

100MHz

CLK_PCIE_VGAP CLK_PCIE_VGAN

100 MHz

33MHz

EC ITE 8519

A A

33MHz

32.768kHz

5

EC_CLK_33M

4

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

CLOCK BLOCK DIAGRAM

3

2

CONFIDENTIAL

CLOCK BLOCK DIAGRAM

Date: Sheet of

PROJECT :

WJ1

1

B

6 54Monday, October 18, 2010

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WWW.MANUALS.CLAN.SU

4

3

2

1

7

WJ1 SMbus Block Diagram

FOX H:9.2 white FOX H:5.2 white

PCB Placement

PCB Placement PCB Placement

SMBDATA_PCH_MAIN

D D

SMBCLK_PCH_MAIN

R

CLK_SDATA/CLK_SCLK

DDR CHA SO-DIMM 0 DDR CHA SO-DIMM 1

DDR CHB SO-DIMM 0 DDR CHB SO-DIMM 1

A0 A2

Min PCIe Slot Min PCIe Slot

depends on Device depends on Device

SUYIN H:5.2 RVS Black SUYIN H:9.2 RVS Black

PCB Placement

A4 A6

C C

PCH

XDP_CPU_SMBDAT

XDP_CPU_SMBCLK

R

CPU XDP

TBD

R

EEPROM_SDA EEPROM_SCL

XDP_PCH_SMBDAT XDP_PCH_SMBCLK

PCH XDP

Switch EDID ROM

TBD

A1 A4

SMBDATA0_PCH/SMBCLK0_PCH

STDP4010

SMBDATA1_PCH/SMBCLK1_PCH

B B

LCD_DAT LCD_CLK

MXM

MXMDATA MXMCLK

SMBDAT1 SMBCLK1

EC

LPC

A A

Host

5

Host

4

SMBDAT0 SMBCLK0

ver 3.0

External Thermal IC

AL001032002 _IC OTHER(8P) ADM1032ARMZ-2R(MSOP)

THERM_DAT_EC THERM_CLK_EC

R R R

TBD

98 9E 56

MXM_CRTDDAT MXM_CRTDCLK

CRT

TBD

32

G-Sensor CG7216

9A

3

TBD

GS_SDA GS_SCL

CONFIDENTIAL

2

uC_DAT uC_CLK

TBD

Size Document Number Rev

Date: Sheet of

Scaler

TBD

Scalar_I2C_DAT Scalar_I2C_CLK

R

Quanta Computer Inc.

PROJECT :

SMBus Block Diagram

1

WJ1

B

7 54Monday, October 18, 2010

B

5

WWW.MANUALS.CLAN.SU

4

3

2

1

8

GPIO/PIN

I/ONAME

I

B

D D

I I

O

I

O

C C

I

O

I

B B

I

O

I

DESCRIPTION

ACTIVE

INITAL : HIGH / ACTIVE : LOW

GPIO/PIN

I/ONAME

DESCRIPTION

ACTIVE

I

B

I I

O

I

O

I

O

I

O

I

A A

Quanta Computer Inc.

PROJECT :

GPIO List

PROJECT :

1

Size Document Number Rev

5

4

3

2

CONFIDENTIAL

Size Document Number Rev

Date: Sheet of

WJ1

8 54Monday, October 18, 2010

B

5

WWW.MANUALS.CLAN.SU

4

3

2

1

9

D D

C C

B B

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

TBD

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

WJ1

1

B

9 54Monday, October 18, 2010

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WWW.MANUALS.CLAN.SU

4

3

2

1

10

M_WE_B _N (16,17) M_CAS_B_ N (16,17) M_RAS_B_ N (16,17)

M_BA_B[2 :0] (16,17)

M_SCS_B_ N[3:0] (16,17)

M_SCKE_B [3:0] (16,17)

M_ODT_B[3:0] (16,17)

CK_M_DDR0_B_DP (16 ) CK_M_DDR0_B_DN (16) CK_M_DDR1_B_DP (16 ) CK_M_DDR1_B_DN (16) CK_M_DDR2_B_DP (17 ) CK_M_DDR2_B_DN (17) CK_M_DDR3_B_DP (17 ) CK_M_DDR3_B_DN (17)

T49T49

M_B_A[15 :0] (16,17)M_B_DQ[63:0](16,17)

U2B

AM10

AP10 AR10

AM12 AM13 AR13 AP13

AR12 AP12 AR28 AR29

AP28 AP29 AM28 AM29 AP32 AP31 AP35 AP34 AR32 AR31 AR35 AR34 AM32 AM31

AM34 AM35 AH35

AH34 AE34 AE35

AF33 AF35

AN13 AN29 AP33

AG35

AN12 AN28 AR33 AM33 AG34

AL10

AL12 AL13

AL28 AL29

AL35 AL32

AL31 AL34

AJ35 AJ34

AL33

AG7 AG8

AJ9

AJ8 AG5 AG6

AJ6

AJ7

AL7 AM7

AL6 AM6

AL9 AM9 AP7 AR7

AP6 AR6 AP9 AR9

AH7 AM8 AR8

AH6

AL8 AP8

U2B

SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7

SB_DQS_N_0 SB_DQS_N_1 SB_DQS_N_2 SB_DQS_N_3 SB_DQS_N_4 SB_DQS_N_5 SB_DQS_N_6 SB_DQS_N_7

LGA1155

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14 SB_MA_15

SB_WE # SB_CAS# SB_RAS#

SB_BS0 SB_BS1 SB_BS2

SB_CS_N0 SB_CS_N1 SB_CS_N2 SB_CS_N3

SB_CKE0 SB_CKE1 SB_CKE2 SB_CKE3

SB_ODT0 SB_ODT1 SB_ODT2 SB_ODT3

SB_CK0

SB_CK_N0

SB_CK1

SB_CK_N1

SB_CK2

SB_CK_N2

SB_CK3

SB_CK_N3

SB_DQS_8

SB_DQS_N_8

SB_ECC_CB0 SB_ECC_CB1 SB_ECC_CB2 SB_ECC_CB3 SB_ECC_CB4 SB_ECC_CB5 SB_ECC_CB6 SB_ECC_CB7

DDR_1

AK24 AM20 AM19 AK18 AP19 AP18 AM18 AL18 AN18 AY17 AN23 AU17 AT18 AR26 AY16 AV16

AR25 AK25 AP24

AP23 AM24 AW17

AN25 AN26 AL25 AT26

AU16 AY15 AW15 AV15

AL26 AP26 AM26 AK26

AL21 AL22 AL20 AK20 AL23 AM22 AP21 AN21

AN16 AN15

AL16 AM16 AP16 AR16 AL15 AM15 AR15 AP15

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_WE_B _N M_CAS_B_ N M_RAS_B_ N

M_BA_B0 M_BA_B1 M_BA_B2

M_SCS_B_ N0 M_SCS_B_ N1 M_SCS_B_ N2 M_SCS_B_ N3

M_SCKE_B 0 M_SCKE_B 1 M_SCKE_B 2 M_SCKE_B 3

M_ODT_B0 M_ODT_B1 M_ODT_B2 M_ODT_B3

CK_M_DDR0_B_DP CK_M_DDR0_B_DN CK_M_DDR1_B_DP CK_M_DDR1_B_DN CK_M_DDR2_B_DP CK_M_DDR2_B_DN CK_M_DDR3_B_DP CK_M_DDR3_B_DN

TP_M_DATA_B_CB

M_A_DQ[63:0](14,15) M_A_A[15 :0] (14,15)

D D

C C

M_DQS_A_ DP[7:0](14,15)

B B

M_DQS_A_ DN[7:0](14,15)

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_DQS_A_ DP0 M_DQS_A_ DP1 M_DQS_A_ DP2 M_DQS_A_ DP3 M_DQS_A_ DP4 M_DQS_A_ DP5 M_DQS_A_ DP6 M_DQS_A_ DP7

M_DQS_A_ DN0 M_DQS_A_ DN1 M_DQS_A_ DN2 M_DQS_A_ DN3 M_DQS_A_ DN4 M_DQS_A_ DN5 M_DQS_A_ DN6 M_DQS_A_ DN7

AU35

AW37

AU39 AU36

AW35

AY36 AU38 AU37 AR40 AR37 AN38 AN37 AR39 AR38 AN39 AN40 AL40 AL37 AJ38 AJ37 AL39 AL38 AJ39 AJ40 AG40 AG37 AE38 AE37 AG39 AG38 AE39 AE40

AV37 AP38 AK38 AF38

AV36 AP39 AK39 AF39

AJ3 AJ4 AL3 AL4 AJ2 AJ1 AL2 AL1 AN1 AN4 AR3 AR4 AN2 AN3 AR2 AR1 AV2

AW3

AV5

AW5

AU2 AU3 AU5 AY5 AY7 AU7 AV9 AU9

AV7 AW7 AW9

AY9

AK3

AP3 AW4

AV8

AK2

AP2

AV4 AW8

U2A

SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7

SA_DQS_N_0 SA_DQS_N_1 SA_DQS_N_2 SA_DQS_N_3 SA_DQS_N_4 SA_DQS_N_5 SA_DQS_N_6 SA_DQS_N_7

LGA1155

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14 SA_MA_15

SA_WE_N

SA_CAS_N SA_RAS_N

SA_BS0 SA_BS1 SA_BS2

SA_CS_N0 SA_CS_N1 SA_CS_N2 SA_CS_N3

SA_CKE0

SA_CKE1

SA_CKE2

SA_CKE3

SA_ODT0

SA_ODT1

SA_ODT2

SA_ODT3

SA_CK0

SA_CK_N0

SA_CK1

SA_CK_N1

SA_CK2

SA_CK_N2

SA_CK3

SA_CK_N3

SM_DRAMRST_N

SA_DQS_8

SA_DQS_N_8 SA_ECC_CB0

SA_ECC_CB1 SA_ECC_CB2 SA_ECC_CB3 SA_ECC_CB4 SA_ECC_CB5 SA_ECC_CB6 SA_ECC_CB7

DDR_0

M_A_A0

AV27

M_A_A1

AY24

M_A_A2

AW24

M_A_A3

AW23

M_A_A4

AV23

M_A_A5

AT24

M_A_A6

AT23

M_A_A7

AU22

M_A_A8

AV22

M_A_A9

AT22

M_A_A10

AV28

M_A_A11

AU21

M_A_A12

AT21

M_A_A13

AW32

M_A_A14

AU20

M_A_A15

AT20

M_WE_A _N

AW29

M_CAS_A_ N

AV30

M_RAS_A_ N

AU28

M_BA_A0

AY29

M_BA_A1

AW28

M_BA_A2

AV20

M_SCS_A_ N0

AU29

M_SCS_A_ N1

AV32

M_SCS_A_ N2

AW30

M_SCS_A_ N3

AU33

M_SCKE_A 0

AV19

M_SCKE_A 1

AT19

M_SCKE_A 2

AU18

M_SCKE_A 3

AV18

M_ODT_A0

AV31

M_ODT_A1

AU32

M_ODT_A2

AU30

M_ODT_A3

AW33

CK_M_DDR0_A_DP

AY25

CK_M_DDR0_A_DN

AW25

CK_M_DDR1_A_DP

AU24

CK_M_DDR1_A_DN

AU25

CK_M_DDR2_A_DP

AW27

CK_M_DDR2_A_DN

AY27

CK_M_DDR3_A_DP

AV26

CK_M_DDR3_A_DN

AW26

DDR3_DRAMRS T_N_R DDR3_DRAMRS T_N

AW18

AV13 AV12

AU12 AU14 AW13 AY13 AU13 AU11 AY12 AW12

M_WE_A _N (14,15) M_CAS_A_ N (14,15) M_RAS_A_ N (14,15)

M_SCS_A_ N0 (14) M_SCS_A_ N1 (14) M_SCS_A_ N2 (15) M_SCS_A_ N3 (15)

CK_M_DDR0_A_DP (14 ) CK_M_DDR0_A_DN (14) CK_M_DDR1_A_DP (14 ) CK_M_DDR1_A_DN (14) CK_M_DDR2_A_DP (15 ) CK_M_DDR2_A_DN (15) CK_M_DDR3_A_DP (15 ) CK_M_DDR3_A_DN (15)

R491 0/J_4R491 0/J_4

M_BA_A[2 :0] (14,15)

M_SCKE_A [3:0] (14,15)

M_ODT_A[3:0] (14,15)

C537

C537 *1U/10V_4_X7R

*1U/10V_4_X7R

DDR3_DRAMRS T_N (14,15,16 ,17)

M_DQS_B_ DP[7:0](16,17)

M_DQS_B_ DN[7:0](16,17)

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_DQS_B_ DP0 M_DQS_B_ DP1 M_DQS_B_ DP2 M_DQS_B_ DP3 M_DQS_B_ DP4 M_DQS_B_ DP5 M_DQS_B_ DP6 M_DQS_B_ DP7

M_DQS_B_ DN0 M_DQS_B_ DN1 M_DQS_B_ DN2 M_DQS_B_ DN3 M_DQS_B_ DN4 M_DQS_B_ DN5 M_DQS_B_ DN6 M_DQS_B_ DN7

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

CPU-DDR3

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

1

WJ1

B

10 54Monday, October 1 8, 2010

B

5

WWW.MANUALS.CLAN.SU

4

3

2

1

11

U2C

B11

PEG_RX_0

B12

PEG_RX_N0

D12

PEG_RX_1

D11

PEG_RX_N1

C10

PEG_RX_2

C9

PEG_RX_N2

E10

PEG_RX_3

E9

PEG_RX_N3

B8

PEG_RX_4

B7

PEG_RX_N4

C6

PEG_RX_5

C5

PEG_RX_N5

A5

PEG_RX_6

A6

PEG_RX_N6

E2

PEG_RX_7

E1

PEG_RX_N7

F4

PEG_RX_8

F3

PEG_RX_N8

G2

PEG_RX_9

G1

PEG_RX_N9

H3

PEG_RX_10

H4

PEG_RX_N10

J1

PEG_RX_11

J2

PEG_RX_N11

K3

PEG_RX_12

K4

PEG_RX_N12

L1

PEG_RX_13

L2

PEG_RX_N13

M3

PEG_RX_14

M4

PEG_RX_N14

N1

PEG_RX_15

N2

PEG_RX_N15

W5

DMI_RX_0

W4

DMI_RX_N0

V3

DMI_RX_1

V4

DMI_RX_N1

Y3

DMI_RX_2

Y4

DMI_RX_N2

AA4

DMI_RX_3

AA5

DMI_RX_N3

P3

PE_RX_0

P4

PE_RX_N0

R2

PE_RX_1

R1

PE_RX_N1

T4

PE_RX_2

T3

PE_RX_N2

U2

PE_RX_3

U1

PE_RX_N3

B5

PEG_ICOMPO

C4

PEG_RCOMPO

B4

PEG_COMPI

LGA1155

CAD NOTE: PIN B5 ROUTING TO RESISTOR NEED TO BE 10 MILS PIN C4 AND B4 ROUTING TO RESIST OR NEED TO BE 4 M ILS THERE ARE SPAC ING RULES ALSO - CHECK RULES DOCUM ENT

U2D

AC5

FDI_FSYNC_0

AC4

FDI_LSYNC_0

AE5

FDI_FSYNC_1

AE4

FDI_LSYNC_1

AG3

FDI_INT

AE2

FDI_COMPIO

AE1

FDI_ICOMPO

LGA1155

FDI LINK

R349

R349 1K/J_4

1K/J_4

PEGDMIGEN

H_PWRGD PCH_PECI H_CATERR_N

PEG_TX_0

PEG_TX_N0

PEG_TX_1

PEG_TX_N1

PEG_TX_2

PEG_TX_N2

PEG_TX_3

PEG_TX_N3

PEG_TX_4

PEG_TX_N4

PEG_TX_5

PEG_TX_N5

PEG_TX_6

PEG_TX_N6

PEG_TX_7

PEG_TX_N7

PEG_TX_8

PEG_TX_N8

PEG_TX_9

PEG_TX_N9

PEG_TX_10

PEG_TX_N10

PEG_TX_11

PEG_TX_N11

PEG_TX_12

PEG_TX_N12

PEG_TX_13

PEG_TX_N13

PEG_TX_14

PEG_TX_N14

PEG_TX_15

PEG_TX_N15

DMI_TX_0

DMI_TX_N0

DMI_TX_1

DMI_TX_N1

DMI_TX_2

DMI_TX_N2

DMI_TX_3

DMI_TX_N3

PE_TX_0

PE_TX_N0

PE_TX_1

PE_TX_N1

PE_TX_2

PE_TX_N2

PE_TX_3

PE_TX_N3

FDI_TX_0

FDI_TX_N0

FDI_TX_1

FDI_TX_N1

FDI_TX_2

FDI_TX_N2

FDI_TX_3

FDI_TX_N3

FDI_TX_4

FDI_TX_N4

FDI_TX_5

FDI_TX_N5

FDI_TX_6

FDI_TX_N6

FDI_TX_7

FDI_TX_N7

R350

R350 *51/J_4

*51/J_4

C13 C14 E14 E13 G14 G13 F12 F11 J14 J13 D8 D7 D3 C3 E6 E5 F8 F7 G10 G9 G5 G6 K7 K8 J5 J6 M8 M7 L6 L5 N5 N6

V7 V6 W7 W8 Y6 Y7 AA7 AA8

P8 P7 T7 T8 R6 R5 U5 U6

FDI_TX_0_DP

AC8

FDI_TX_0_DN

AC7

FDI_TX_1_DP

AC2

FDI_TX_1_DN

AC3

FDI_TX_2_DP

AD2

FDI_TX_2_DN

AD1

FDI_TX_3_DP

AD4

FDI_TX_3_DN

AD3

FDI_TX_4_DP

AD7

FDI_TX_4_DN

AD6

FDI_TX_5_DP

AE7

FDI_TX_5_DN

AE8

FDI_TX_6_DP

AF3

FDI_TX_6_DN

AF2

FDI_TX_7_DPFDI_INT

AG2

FDI_TX_7_DN

AG1

R190

R190 *1K/J_4

*1K/J_4

PEG_TXP0 PEG_TXN0 PEG_TXP1 PEG_TXN1 PEG_TXP2 PEG_TXN2 PEG_TXP3 PEG_TXN3 PEG_TXP4 PEG_TXN4 PEG_TXP5 PEG_TXN5 PEG_TXP6 PEG_TXN6 PEG_TXP7 PEG_TXN7 PEG_TXP8 PEG_TXN8 PEG_TXP9 PEG_TXN9 PEG_TXP10 PEG_TXN10 PEG_TXP11 PEG_TXN11 PEG_TXP12 PEG_TXN12 PEG_TXP13 PEG_TXN13 PEG_TXP14 PEG_TXN14 PEG_TXP15 PEG_TXN15

VCC_IO

R347

R347 *1K/J_4

*1K/J_4

PEG_TXP0 (27) PEG_TXN0 (27) PEG_TXP1 (27) PEG_TXN1 (27) PEG_TXP2 (27) PEG_TXN2 (27) PEG_TXP3 (27) PEG_TXN3 (27) PEG_TXP4 (27) PEG_TXN4 (27) PEG_TXP5 (27) PEG_TXN5 (27) PEG_TXP6 (27) PEG_TXN6 (27) PEG_TXP7 (27) PEG_TXN7 (27) PEG_TXP8 (27) PEG_TXN8 (27) PEG_TXP9 (27) PEG_TXN9 (27) PEG_TXP10 (27) PEG_TXN10 (27) PEG_TXP11 (27) PEG_TXN11 (27) PEG_TXP12 (27) PEG_TXN12 (27) PEG_TXP13 (27) PEG_TXN13 (27) PEG_TXP14 (27) PEG_TXN14 (27) PEG_TXP15 (27) PEG_TXN15 (27)

PCH_DMI_RX0P (19) PCH_DMI_RX0N (19) PCH_DMI_RX1P (19) PCH_DMI_RX1N (19) PCH_DMI_RX2P (19) PCH_DMI_RX2N (19) PCH_DMI_RX3P (19) PCH_DMI_RX3N (19)

Rev B,Delete

VCC_IO

R366,R369,R381,R377,R382,R378,R344,R376,R429, R370,R375,R374,R352,R373,R372,R348,

R351 *1K/J_4R351 *1K/J_4

FDI_TX_0_DP (19) FDI_TX_0_DN (19) FDI_TX_1_DP (19) FDI_TX_1_DN (19) FDI_TX_2_DP (19) FDI_TX_2_DN (19) FDI_TX_3_DP (19) FDI_TX_3_DN (19) FDI_TX_4_DP (19) FDI_TX_4_DN (19) FDI_TX_5_DP (19) FDI_TX_5_DN (19) FDI_TX_6_DP (19) FDI_TX_6_DN (19) FDI_TX_7_DP (19) FDI_TX_7_DN (19)

R343 *1K/J_4R343 *1K/J_4

CAD NOTE: PLACE AS NEAR AS POSIBLE TO PROCESSOR

The CFG[x] signals have a default value of "1", if not terminated on the board

* CFG[6:5] BIFURCATION: 11=DEFAULT X16, 10=2X8, 01=RESERVED, 00=X8,X4,X4 *3,4,5,6,7,8,9 ALL HAVE INTERNAL PULL-UPS * CFG[2] , 1 = Normal operation, 0 = Lane numbers reversed

1.5V_DDR3

R456

R456 100/F_4

100/F_4

R462

R462 100/F_4

100/F_4

H_VIDSOUT(49)

H_VIDALERT(49)

CLK_100M_CPU_CLK_P(23) CLK_100M_CPU_CLK_N(23)

H_VIDSCLK(49)

VREF_CPU_DDR_IN

R364 0/J_4R364 0/J_4 R362 0/J_4R362 0/J_4

VR_HOT#(49)

H_PROCHOT#(44)

C490

0.1U/10V_4_X7R

Rev B, R371 change to NU

PD_TEST_CPU_5 PD_TEST_CPU_6

PLTRST#_R(21)

D19D19

R337 0/J_4R337 0/J_4

PD_TEST_CPU_0_R(43)

R365

R365 *54.9/F_4

*54.9/F_4

VCC_IO

R340

R340 51/J_4

51/J_4

PLTRST#_R

VCC_IO

CAD NOTE: PLACE NEAR CPU

R363

R341

110/F_4

75/F_4

CLK_100M_CPU_CLK_P CLK_100M_CPU_CLK_N

R361 44.2/F_4R361 44.2/F_4

H_PWRGD

H_PWRGD(21,43)

DF_TVS(18)

R184 0/J_4R184 0/J_4

T50T50

R371 *0/J_4R371 *0/J_4

T51T51 T52T52 T53T53 T54T54 T55T55 T56T56 T57T57 T58T58 T59T59 T60T60 T61T61 T62T62 T63T63 T64T64 T65T65

+3V

0.1U/10V_4_X7R

2 1

3 5

PWRGD_DRAM CPUPLTRST#

PM_SYNC

R183 0/J_4R183 0/J_4

H_CATERR_N H_PROCHOT_N H_THERMTRIP_N

H_SKTOCC_N DF_TVS

VREF_CPU_DDR_IN

C401

U16

U16 TC7SH08FU

TC7SH08FU

PWRGD_DRAM(21)

PM_SYNC(20) PCH_PECI(20,40)

H_CATERR_N(26)

H_SKTOCC_N(21)

Rev B, R367 change to 120 ohm

VIDALERT_N

PD_TEST_CPU_0 PD_TEST_CPU_1 PD_TEST_CPU_2 PD_TEST_CPU_3 PD_TEST_CPU_4 PD_TEST_CPU_5 PD_TEST_CPU_6 PD_TEST_CPU_7 PD_TEST_CPU_8 PD_TEST_CPU_9 PD_TEST_CPU_10 PD_TEST_CPU_11 PD_TEST_CPU_12 PD_TEST_CPU_13 PD_TEST_CPU_14 PD_TEST_CPU_15 PD_TEST_CPU_16 PD_TEST_CPU_17

R367 120/F_4R367 120/F_4

4

U2E

W2 W1

C37 B37 A37

J40

AJ19

F36 E38

J35 E37 H34 G35

AJ33

K32

AJ22

H36

J36

J37 K36

L36 N35

L37

M36

J38

L35

M38

N36 N38 N39 N37 N40 G37 G36

AT14

AY3

H7 H8

LGA1155

R368

R368 75/F_4

75/F_4

BCLK_0 BCLK_N0

VIDSCLK VIDSOUT VIDALERT_N

UNCOREPWRGOOD SM_DRAMPWROK RESET_N

PM_SYNC PECI CATERR_N PROCHOT_N THERMTRIP_N

SKTOCC_N PROC_SEL

SM_VREF

CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17

RSVD_16 RSVD_23 RSVD_28 RSVD_29

CPUPLTRST#

VCCSA_VID

VCCSA_SENSE

VCC_SENSE VSS_SENSE

VCCIO_SENSE

VSSIO_SENSE

VCCAXG_SENSE VSSAXG_SENSE

TRST_N PRDY_N PREQ_N

DBR_N RSVD_1 RSVD_2

BPM_N0 BPM_N1 BPM_N2 BPM_N3 BPM_N4 BPM_N5 BPM_N6 BPM_N7

RSVD_24 RSVD_30 RSVD_37 RSVD_36 RSVD_33

RSVD_40 RSVD_39

RSVD_18 RSVD_20

RSVD_38 RSVD_32 RSVD_34

RSVD_35 RSVD_50

RSVD_53 RSVD_51

RSVD_52

Thermal Trip

TDO

TDI

TCK

TMS

P34 T2

A36 B36

AB4 AB3

L32 M32

L39 L40 M40 L38 J39 K38 K40 E39 C40 D40

H40 H38 G38 G40 G39 F38 E40 F40

B39 J33 L34 L33 K34

N33 M34

AV1 AW2

L9 J9 K9

L31 J31

K31 AD34

AD35

H_THERMTRIP_N

VR_PVCCUSA_SEL VCCSA_SENSE

VCODE_VCC_SEN VCORE_VSS_SEN

VCCP_SENSE VSSP_SENSE

VCCAXG_SENSE VSSAXG_SENSE

XDP_CPU_TDO XDP_CPU_TDI XDP_CPU_TCLK0 XDP_CPU_TMS XDP_CPU_TRST_N XDP_CPU_PRDY_N XDP_CPU_PREQ_N

XDP_CPU_DBRESET_N CLK_100M_XDP_HEADER_P CLK_100M_XDP_HEADER_N

XDP_CPU_MBP_N0 XDP_CPU_MBP_N1 XDP_CPU_MBP_N2 XDP_CPU_MBP_N3 XDP_CPU_MBP_N4 XDP_CPU_MBP_N5 XDP_CPU_MBP_N6 XDP_CPU_MBP_N7

Z1218 Z1219

Z1220 Z1221

T16T16

VCC_IO

VR_PVCCUSA_SEL (51) VCCSA_SENSE (51)

VCORE_VCC_SEN (49) VCORE_VSS_SEN (49)

VTT_SENSE+ (51) VTT_SENSE- (51)

V_GT_VCC_SEN (49) V_GT_VSS_SEN (49)

CLK_100M_XDP_HEADER_P (23,43) CLK_100M_XDP_HEADER_N (23,43)

XDP_CPU_MBP_N[0:7] (43)

T48T48 T47T47

T46T46 T45T45

VCC_IO VCC_IO

3

2

Q13

*FDV301N_25V_220mA

1

R321

R321 *51/J_4

*51/J_4

Q26

2

*MMBT3904_40V_200mA

1 3

R322 0/J_4R322 0/J_4

R182 0/J_4R182 0/J_4

SYS_SHDN#

PCH_THERMTRIP#

CAD NOTE: PLACE NEXT TO CPU

VCC_IO

R379

R379 51/J_4

51/J_4

R198

R198 *10K/J_4

*10K/J_4

C248

C248 *1U/16V_6_X5R

*1U/16V_6_X5R

SYS_SHDN# (45)

PCH_THERMTRIP# (20)

+3V_S5

R342

R189

51/J_4

*220/J_4

R380

R380 51/J_4

51/J_4

CAD NOTE: PLACE NEXT TO CPU

D5

D5 *BAS316_75V_200mA

*BAS316_75V_200mA

XDP_CPU_TDO (43) XDP_CPU_TDI (43) XDP_CPU_TCLK0 (43) XDP_CPU_TMS (43) XDP_CPU_TRST_N (43)

XDP_CPU_PRDY_N (43) XDP_CPU_PREQ_N (43)

SYS_RST# (21,43)

PCH_DMI_TX0P(19) PCH_DMI_TX0N(19) PCH_DMI_TX1P(19) PCH_DMI_TX1N(19) PCH_DMI_TX2P(19) PCH_DMI_TX2N(19) PCH_DMI_TX3P(19) PCH_DMI_TX3N(19)

R139 *1K/F_4R139 *1 K/F_4

R140 *1K/F_4R140 *1 K/F_4

R142 *1K/F_4R142 *1 K/F_4

R138 *1K/F_4R138 *1 K/F_4

R483 24.9/F_4R483 24.9/F_4

PEG_RXP0 PEG_RXN0 PEG_RXP1 PEG_RXN1 PEG_RXP2 PEG_RXN2 PEG_RXP3 PEG_RXN3 PEG_RXP4 PEG_RXN4 PEG_RXP5 PEG_RXN5 PEG_RXP6 PEG_RXN6 PEG_RXP7 PEG_RXN7 PEG_RXP8 PEG_RXN8 PEG_RXP9 PEG_RXN9 PEG_RXP10 PEG_RXN10 PEG_RXP11 PEG_RXN11 PEG_RXP12 PEG_RXN12 PEG_RXP13 PEG_RXN13 PEG_RXP14 PEG_RXN14 PEG_RXP15 PEG_RXN15

GICOMPO

R141 *1K/F_4R141 *1 K/F_4

FDI_FSYNC_0 FDI_LSYNC_0

FDI_FSYNC_1 FDI_LSYNC_1

FDI_COMP

PEG_RXP0(27) PEG_RXN0(27) PEG_RXP1(27)

VCC_IO

FDI_FSYNC_0(19) FDI_LSYNC_0(19)

FDI_FSYNC_1(19) FDI_LSYNC_1(19)

VCC_IO

PEG_RXN1(27) PEG_RXP2(27) PEG_RXN2(27) PEG_RXP3(27) PEG_RXN3(27) PEG_RXP4(27) PEG_RXN4(27) PEG_RXP5(27) PEG_RXN5(27) PEG_RXP6(27) PEG_RXN6(27) PEG_RXP7(27) PEG_RXN7(27) PEG_RXP8(27) PEG_RXN8(27) PEG_RXP9(27) PEG_RXN9(27) PEG_RXP10(27) PEG_RXN10(27) PEG_RXP11(27) PEG_RXN11(27) PEG_RXP12(27) PEG_RXN12(27) PEG_RXP13(27) PEG_RXN13(27) PEG_RXP14(27) PEG_RXN14(27) PEG_RXP15(27) PEG_RXN15(27)

FDI_INT(19)

R165 24.9/F_4R165 24.9/F_4

D D

C C

FDI DISABLE GUIDELINES (FROM PDG) FDI SIGNAL RECOMMENDATION FDI_TX[7:0] FLOAT FDI_TX_N[7:0] FLOAT FDI_FSYNC 1K RESISTOR TO VCC_FDI OR VSS FDI_LSYNC 1K RESISTOR TO VCC_FDI OR VSS FDI_INT 1K RESISTOR TO VCC_FDI OR VSS

B B

A A

5

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

CPU-HOST BUS

Date: Sheet of

4

3

2

Date: Sheet of

PROJECT :

1

WJ1

B

11 54Monday, October 18, 201 0

B

5

WWW.MANUALS.CLAN.SU

4

3

2

1

VCC_IO

AJ13 AJ14 AJ23 AJ24 AR20 AR21 AR22 AR23 AR24 AU19 AU23 AU27 AU31 AV21 AV24 AV25 AV29 AV33 AW31 AY23 AY26 AY28

AJ20

C527

C527 10U/6.3V_8_X5R

10U/6.3V_8_X5R

1.5V_DDR3CPU_CORE CPU_CO RE

C526

C526 10U/6.3V_8_X5R

10U/6.3V_8_X5R

C531

C531 10U/6.3V_8_X5R

10U/6.3V_8_X5R

U2H

VCC_SA

1.8V_SFR

VCC_SA

C244

C221

C221 10U/6.3V_8_X5R

10U/6.3V_8_X5R

22U/6.3V_8_X5R

PVCCP_34

C233

22U/6.3V_8_X5R

M13

VCCIO_34

A11

VCCIO_1

A7

VCCIO_2

AA3

VCCIO_3

AB8

VCCIO_4

AF8

VCCIO_5

AG33

VCCIO_6

AJ16

VCCIO_7

AJ17

VCCIO_8

AJ26

VCCIO_9

AJ28

VCCIO_10

AJ32

VCCIO_11

AK15

VCCIO_12

AK17

VCCIO_13

AK19

VCCIO_14

AK21

VCCIO_15

AK23

VCCIO_16

AK27

VCCIO_17

AK29

VCCIO_18

AK30

VCCIO_19

B9

VCCIO_20

D10

VCCIO_21

D6

VCCIO_22

E3

VCCIO_23

E4

VCCIO_24

G3

VCCIO_25

G4

VCCIO_26

J3

VCCIO_27

J4

VCCIO_28

J7

VCCIO_29

J8

VCCIO_30

L3

VCCIO_31

L4

VCCIO_32

L7

VCCIO_33

N3

VCCIO_35

N4

VCCIO_36

N7

VCCIO_37

R3

VCCIO_38

R4

VCCIO_39

R7

VCCIO_40

U3

VCCIO_41

U4

VCCIO_42

U7

VCCIO_43

V8

VCCIO_44

W3

VCCIO_45

H10

VCCSA_1

H11

VCCSA_2

H12

VCCSA_3

J10

VCCSA_4

K10

VCCSA_5

K11

VCCSA_6

L11

VCCSA_7

L12

VCCSA_8

M10

VCCSA_9

M11

VCCSA_10

M12

VCCSA_11

AK11

VCCPLL_1

AK12

VCCPLL_2

LGA1155

C530

C530 10U/6.3V_8_X5R

10U/6.3V_8_X5R

C532

C532 10U/6.3V_8_X5R

10U/6.3V_8_X5R

C227

22U/6.3V_8_X5R

VDDQ_1 VDDQ_2 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8

VDDQ_9 VDDQ_10 VDDQ_11 VDDQ_12 VDDQ_13 VDDQ_14 VDDQ_15 VDDQ_16 VDDQ_17 VDDQ_18 VDDQ_19 VDDQ_20 VDDQ_21 VDDQ_22 VDDQ_23

VDDQ_3

POWER

U2F

A12

VCC_1

A13

VCC_2

A14

VCC_3

A15

VCC_4

A16

VCC_5

A18

VCC_6

A24

VCC_7

A25

D D

C C

B B

VCC_IO

C238

22U/6.3V_8_X5R

VCC_8

A27

VCC_9

A28

VCC_10

B15

VCC_11

B16

VCC_12

B18

VCC_13

B24

VCC_14

B25

VCC_15

B27

VCC_16

B28

VCC_17

B30

VCC_18

B31

VCC_19

B33

VCC_20

B34

VCC_21

C15

VCC_22

C16

VCC_23

C18

VCC_24

C19

VCC_25

C21

VCC_26

C22

VCC_27

C24

VCC_28

C25

VCC_29

C27

VCC_30

C28

VCC_31

C30

VCC_32

C31

VCC_33

C33

VCC_34

C34

VCC_35

C36

VCC_36

D13

VCC_37

D14

VCC_38

D15

VCC_39

D16

VCC_40

D18

VCC_41

D19

VCC_42

D21

VCC_43

D22

VCC_44

D24

VCC_45

D25

VCC_46

D27

VCC_47

D28

VCC_48

D30

VCC_49

D31

VCC_50

D33

VCC_51

D34

VCC_52

D35

VCC_53

D36

VCC_54

E15

VCC_55

E16

VCC_56

E18

VCC_57

E19

VCC_58

E21

VCC_59

E22

VCC_60

E24

VCC_61

E25

VCC_62

E27

VCC_63

E28

VCC_64

E30

VCC_65

E31

VCC_66

E33

VCC_67

E34

VCC_68

E35

VCC_69

F15

VCC_70

F16

VCC_71

F18

VCC_72

F19

VCC_73

F21

VCC_74

F22

VCC_75

F24

VCC_76

F25

VCC_77

F27

VCC_78

F28

VCC_79

F30

VCC_80

F31

VCC_81

LGA1155

C228

22U/6.3V_8_X5R

C239

22U/6.3V_8_X5R

VCC_82 VCC_83 VCC_84 VCC_85 VCC_86 VCC_87 VCC_88 VCC_89 VCC_90 VCC_91 VCC_92 VCC_93 VCC_94 VCC_95 VCC_96 VCC_97 VCC_98

VCC_99 VCC_100 VCC_101 VCC_102 VCC_103 VCC_104 VCC_105 VCC_106 VCC_107 VCC_108 VCC_109 VCC_110 VCC_111 VCC_112 VCC_113 VCC_114 VCC_115 VCC_116 VCC_117 VCC_118 VCC_119 VCC_120 VCC_121 VCC_122 VCC_123 VCC_124 VCC_125 VCC_126 VCC_127 VCC_128 VCC_129 VCC_130 VCC_131 VCC_132 VCC_133 VCC_134 VCC_135 VCC_136 VCC_137 VCC_138 VCC_139 VCC_140 VCC_141 VCC_142 VCC_143 VCC_144 VCC_145 VCC_146 VCC_147 VCC_148 VCC_149 VCC_150 VCC_151 VCC_152 VCC_153 VCC_154 VCC_155 VCC_156 VCC_157 VCC_158 VCC_159 VCC_160 VCC_161

F32 F33 F34 G15 G16 G18 G19 G21 G22 G24 G25 G27 G28 G30 G31 G32 G33 H13 H14 H15 H16 H18 H19 H21 H22 H24 H25 H27 H28 H30 H31 H32 J12 J15 J16 J18 J19 J21 J22 J24 J25 J27 J28 J30 K15 K16 K18 K19 K21 K22 K24 K25 K27 K28 K30 L13 L14 L15 L16 L18 L19 L21 L22 L24 L25 L27 L28 L30 M14 M15 M16 M18 M19 M21 M22 M24 M25 M27 M28 M30

C223

C520

22U/6.3V_8_X5R

R477 0/J_4R477 0 /J_4

C222

22U/6.3V_8_X5R

V_AXG

C440

22U/6.3V_8_X5R

+

C394

I+C394

I

330U/2V_ 7343

ev B, C394 change to Stuff

R

C528

C528 10U/6.3V_8_X5R

10U/6.3V_8_X5R

C522

C522 10U/6.3V_8_X5R

10U/6.3V_8_X5R

C438

C442

C441

22U/6.3V_8_X5R

* PLACE BACKSIDE OF MCP CAVITY

22U/6.3V_8_X5R

CPU_CORE

C229

C229 22U/6.3V_8_X5R

22U/6.3V_8_X5R

CPU_CORE

C240

C240 22U/6.3V_8_X5R

22U/6.3V_8_X5R

CPU_CORE

C237

C237 22U/6.3V_8_X5R

22U/6.3V_8_X5R

C439

C437

22U/6.3V_8_X5R

C230

C230 22U/6.3V_8_X5R

22U/6.3V_8_X5R

C494

C494 22U/6.3V_8_X5R

22U/6.3V_8_X5R

C242

C242 22U/6.3V_8_X5R

22U/6.3V_8_X5R

C393

22U/6.3V_8_X5R

C231

C231 22U/6.3V_8_X5R

22U/6.3V_8_X5R

C474

C474 22U/6.3V_8_X5R

22U/6.3V_8_X5R

C236

C236 22U/6.3V_8_X5R

22U/6.3V_8_X5R

U2G

AB33

VCCAXG_1

AB34

VCCAXG_2

AB35

VCCAXG_3

AB36

VCCAXG_4

AB37

VCCAXG_5

AB38

VCCAXG_6

AB39

VCCAXG_7

AB40

VCCAXG_8

AC33

VCCAXG_9

AC34

VCCAXG_10

AC35

VCCAXG_11

AC36

VCCAXG_12

AC37

VCCAXG_13

AC38

VCCAXG_14

AC39

VCCAXG_15

AC40

VCCAXG_16

T33

VCCAXG_17

T34

VCCAXG_18

T35

VCCAXG_19

T36

VCCAXG_20

T37

VCCAXG_21

T38

VCCAXG_22

T39

VCCAXG_23

T40

VCCAXG_24

U33

VCCAXG_25

U34

VCCAXG_26

U35

VCCAXG_27

U36

VCCAXG_28

U37

VCCAXG_29

U38

VCCAXG_30

U39

VCCAXG_31

U40

VCCAXG_32

W33

VCCAXG_33

W34

VCCAXG_34

W35

VCCAXG_35

W36

VCCAXG_36

W37

VCCAXG_37

W38

VCCAXG_38

Y33

VCCAXG_39

Y34

VCCAXG_40

Y35

VCCAXG_41

Y36

VCCAXG_42

Y37

VCCAXG_43

Y38

VCCAXG_44

LGA1155

C234

C234 22U/6.3V_8_X5R

22U/6.3V_8_X5R

C493

C493 22U/6.3V_8_X5R

22U/6.3V_8_X5R

C241

C241 22U/6.3V_8_X5R

22U/6.3V_8_X5R

C235

C235 22U/6.3V_8_X5R

22U/6.3V_8_X5R

C475

C475 22U/6.3V_8_X5R

22U/6.3V_8_X5R

C232

C232 22U/6.3V_8_X5R

22U/6.3V_8_X5R

C243

C243 22U/6.3V_8_X5R

22U/6.3V_8_X5R

C473

C473 22U/6.3V_8_X5R

22U/6.3V_8_X5R

C495

C495 22U/6.3V_8_X5R

22U/6.3V_8_X5R

+

C249

I+C249

I

330U/2V_ 7343

12

VCC_IO

C524

22U/6.3V_8_X5R

A A

5

* PLACE ON TOPSIDE IN SOCKET CAVITY

C529

C224

22U/6.3V_8_X5R

C523

C220

22U/6.3V_8_X5R

VCC_SA

C219

10U/6.3V_8_X5R

* PLACE ON TOPSIDE IN SOCKET CAVITY

10U/6.3V_8_X5R

4

C521

1.8V_SFR

C525

C525 22U/6.3V_8_X5R

22U/6.3V_8_X5R

C518

C518 10U/6.3V_8_X5R

10U/6.3V_8_X5R

3

CPU_CORE

C650

C650 22U/6.3V_8_X5R

22U/6.3V_8_X5R

C654

C654 22U/6.3V_8_X5R

22U/6.3V_8_X5R

Rev B, Add C648 ~C654

C653

C653 22U/6.3V_8_X5R

22U/6.3V_8_X5R

2

C649

C649 22U/6.3V_8_X5R

22U/6.3V_8_X5R

C652

C652 22U/6.3V_8_X5R

22U/6.3V_8_X5R

C648

C648 22U/6.3V_8_X5R

22U/6.3V_8_X5R

+

C651

I+C651

I

330U/2V_ 7343

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

CPU-POWER

Date: Sheet of

PROJECT :

WJ1

12 54Monday, October 1 8, 2010

1

12 54Monday, October 1 8, 2010

B

5

WWW.MANUALS.CLAN.SU

4

3

2

1

13

U2I

A17

VSS_1

A23

VSS_2

A26

VSS_3

A29

VSS_4

A35

VSS_5

AA33

VSS_6

AA34

VSS_7

AA35

VSS_8

AA36

VSS_9

AA37

D D

C C

B B

VSS_10

AA38

VSS_11

AA6

VSS_12

AB5

VSS_13

AC1

VSS_14

AC6

VSS_15

AD33

VSS_16

AD36

VSS_17

AD38

VSS_18

AD39

VSS_19

AD40

VSS_20

AD5

VSS_21

AD8

VSS_22

AE3

VSS_23

AE33

VSS_24

AE36

VSS_25

AF1

VSS_26

AF34

VSS_27

AF36

VSS_28

AF37

VSS_29

AF40

VSS_30

AF5

VSS_31

AF6

VSS_32

AF7

VSS_33

AG36

VSS_34

AH2

VSS_35

AH3

VSS_36

AH33

VSS_37

AH36

VSS_38

AH37

VSS_39

AH38

VSS_40

AH39

VSS_41

AH40

VSS_42

AH5

VSS_43

AH8

VSS_44

AJ12

VSS_45

AJ15

VSS_46

AJ18

VSS_47

AJ21

VSS_48

AJ25

VSS_49

AJ27

VSS_50

AJ36

VSS_51

AJ5

VSS_52

AK1

VSS_53

AK10

VSS_54

AK13

VSS_55

AK14

VSS_56

AK16

VSS_57

AK22

VSS_58

AK28

VSS_59

AK31

VSS_60

AK32

VSS_61

AK33

VSS_62

AK34

VSS_63

AK35

VSS_64

AK36

VSS_65

AK37

VSS_66

AK4

VSS_67

AK40

VSS_68

AK5

VSS_69

AK6

VSS_70

AK7

VSS_71

AK8

VSS_72

AK9

VSS_73

AL11

VSS_74

AL14

VSS_75

AL17

VSS_76

AL19

VSS_77

AL24

VSS_78

AL27

VSS_79

AL30

VSS_80

AL36

VSS_81

AL5

VSS_82

AM1

VSS_83

AM11

VSS_84

AM14

VSS_85

AM17

VSS_86

AM2

VSS_87

AM21

VSS_88

AM23

VSS_89

AM25

VSS_90 VSS_NCTF_1A4VSS_NCTF_2

LGA1155

VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98

VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180

AM27 AM3 AM30 AM36 AM37 AM38 AM39 AM4 AM40 AM5 AN10 AN11 AN14 AN17 AN19 AN22 AN24 AN27 AN30 AN31 AN32 AN33 AN34 AN35 AN36 AN5 AN6 AN7 AN8 AN9 AP1 AP11 AP14 AP17 AP22 AP25 AP27 AP30 AP36 AP37 AP4 AP40 AP5 AR11 AR14 AR17 AR18 AR19 AR27 AR30 AR36 AR5 AT1 AT10 AT12 AT13 AT15 AT16 AT17 AT2 AT25 AT27 AT28 AT29 AT3 AT30 AT31 AT32 AT33 AT34 AT35 AT36 AT37 AT38 AT39 AT4 AT40 AT5 AT6 AT7 AT8 AT9 AU1 AU15 AU26 AU34 AU4 AU6 AU8 AV10 AV39

AV11 AV14 AV17

AV35 AV38

AW10 AW11 AW14 AW16 AW36

AY11 AY14 AY18 AY35

AY37

AV3

AV6

AW6

AY4 AY6 AY8

B10 B13 B14 B17 B23 B26 B29 B32 B35 B38

C11 C12 C17 C20 C23 C26 C29 C32 C35

D17 D20

D23 D26 D29 D32 D37 D39

E11 E12 E17 E20 E23 E26 E29 E32 E36

F10 F13 F14 F17

F20 F23 F26 F29 F35 F37 F39

G11 G12 G17 G20 G23 G26 G29 G34

B6

C7 C8

D2

D4 D5 D9

E7 E8 F1

F2

F5 F6 F9

G7

U2J

VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199 VSS_200 VSS_201 VSS_202 VSS_203 VSS_204 VSS_205 VSS_206 VSS_207 VSS_208 VSS_209 VSS_210 VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220 VSS_221 VSS_222 VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230 VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_NCTF_3

LGA1155

VSS_271 VSS_272 VSS_273 VSS_274 VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325 VSS_326 VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350 VSS_351 VSS_352 VSS_353 VSS_354 VSS_355 VSS_356 VSS_357 VSS_358 VSS_359 VSS_360

VSS_NCTF_4

G8 H1 H17 H2 H20 H23 H26 H29 H33 H35 H37 H39 H5 H6 H9 J11 J17 J20 J23 J26 J29 J32 K1 K12 K13 K14 K17 K2 K20 K23 K26 K29 K33 K35 K37 K39 K5 K6 L10 L17 L20 L23 L26 L29 L8 M1 M17 M2 M20 M23 M26 M29 M33 M35 M37 M39 M5 M6 M9 N8 P1 P2 P36 P38 P40 P5 P6 R33 R35 R37 R39 R8 T1 T5 T6 U8 V1 V2 V33 V34 V35 V36 V37 V38 V39 V40 V5 W6 Y5 Y8 B3

VTT_SEL

VTT_SEL(51)

T43T43 T42T42 T44T44 T13T13 T14T14

*PVCCP_SEL --> POR 1.05 (VTT_SEL=H) / 1.00V (VTT_SEL=L) LEVELS

Z1516 Z1517 Z1518 Z1519 Z1520

AD37 AJ29

AJ30 AJ31 AV34

AW34

AU40

AW38

U2K

AB7

RSVD_4 RSVD_5

AG4

RSVD_8 RSVD_10 RSVD_11 RSVD_12 RSVD_19 RSVD_21

P33

RSVD_42

P35

RSVD_43

P37

RSVD_44

P39

RSVD_45

R34

RSVD_46

R36

RSVD_47

R38

RSVD_48

R40

RSVD_49

A38

NCTF_1 NCTF_2 NCTF_3

C2

NCTF_4

D1

NCTF_5

SPARES

LGA1155

FC_AH1 FC_AH4

RSVD_15 RSVD_14 RSVD_13 RSVD_17 RSVD_22

RSVD_7 RSVD_3 RSVD_6 RSVD_9

RSVD_27 RSVD_26 RSVD_25 RSVD_31 RSVD_41

VREF_DQ_DDRB_R

AH1

VREF_DQ_DDRA_R

AH4 AT11

AP20 AN20 AU10 AY10

CAD NOTE: PLACE NEAR CPU PINS

AF4 AB6 AE6 AJ11

D38 C39 C38 J34

PD_CPU_RS VD_4_N34

N34

C161

0.1U/10V_4_X7R

R169 24 .9/F_4R169 24 .9/F_4

R137 0/J_4R137 0/J_4 R136 0/J_4R136 0/J_4

C162

0.1U/10V_4_X7R

VREF_DQ_DDRB (16,17) VREF_DQ_DDRA (14,15)

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Re

Size Document Number Rev

CPU-GND

Date: Sheet

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

WJ1

13 54Monday, October 1 8, 2010

1

13 54Monday, October 1 8, 2010

v B

B

of

5

WWW.MANUALS.CLAN.SU

4

3

2

1

CHANNEL A DIMM 0

C540

0.1U/16V_4_X7R

C435 0.1U/16V_4_X7RC435 0.1U/16V_4_X7R

C374

C374 10U/6.3V_6_X5R

10U/6.3V_6_X5R

14 54Monday, October 18, 2010

14

B

M_A_A[15:0](10,15)

D D

M_BA_A0(10,15) M_BA_A1(10,15)

M_BA_A2(10,15) M_SCS_A_N0(10) M_SCS_A_N1(10)

CK_M_DDR0_A_DP(10) CK_M_DDR0_A_DN(10) CK_M_DDR1_A_DP(10) CK_M_DDR1_A_DN(10)

M_SCKE_A0(10) M_SCKE_A1(10) M_CAS_A_N(10,15) M_RAS_A_N(10,15)

M_WE_A_N(10,15)

C C

CLK_SDATA(15,16,17,26,32,37,43)

M_ODT_A0(10)

M_ODT_A1(10)

M_DQS_A_DP0(10,15) M_DQS_A_DP1(10,15) M_DQS_A_DP2(10,15) M_DQS_A_DP3(10,15) M_DQS_A_DP4(10,15) M_DQS_A_DP5(10,15) M_DQS_A_DP6(10,15) M_DQS_A_DP7(10,15) M_DQS_A_DN0(10,15) M_DQS_A_DN1(10,15)

B B

R392

R392 *0/J_4

*0/J_4

R391

A A

0/J_4

M_DQS_A_DN2(10,15) M_DQS_A_DN3(10,15) M_DQS_A_DN4(10,15) M_DQS_A_DN5(10,15) M_DQS_A_DN6(10,15) M_DQS_A_DN7(10,15)

+3V +3V

R360

R360 *0/J_4

*0/J_4

R359

R359 0/J_4

0/J_4

SA1_A_0 SA0_A_0

PD SA0

S

SPD SA1

5

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_BA_A0 M_BA_A1 M_BA_A2 M_SCS_A_N0 M_SCS_A_N1 CK_M_DDR0_A_DP CK_M_DDR0_A_DN CK_M_DDR1_A_DP CK_M_DDR1_A_DN M_SCKE_A0 M_SCKE_A1 M_CAS_A_N M_RAS_A_N M_WE_A_N SA0_A_0 SA1_A_0

M_ODT_A0 M_ODT_A1

M_DQS_A_DP0 M_DQS_A_DP1 M_DQS_A_DP2 M_DQS_A_DP3 M_DQS_A_DP4 M_DQS_A_DP5 M_DQS_A_DP6 M_DQS_A_DP7 M_DQS_A_DN0 M_DQS_A_DN1 M_DQS_A_DN2 M_DQS_A_DN3 M_DQS_A_DN4 M_DQS_A_DN5 M_DQS_A_DN6 M_DQS_A_DN7

0

XMM2A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

PC2100 DDR3 SDRAM SO-DIMM

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

MK4000116

PC2100 DDR3 SDRAM SO-DIMM

12 29 47

64 137 154 171 188

10

27

45

62 135 152 169 186

DDR3-DIMM0_H=9.2_Standard

ddr-as0a626-jasg-7h-204p-ldv

DG

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46

(204P)

DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

M_A_DQ1

7

M_A_DQ2

15

M_A_DQ3

17

M_A_DQ4

4

M_A_DQ5

6

M_A_DQ6

16

M_A_DQ7

18

M_A_DQ8

21

M_A_DQ9

23

M_A_DQ10

33

M_A_DQ11

35

M_A_DQ12

22

M_A_DQ13

24

M_A_DQ14

34

M_A_DQ15

36

M_A_DQ16

39

M_A_DQ17

41

M_A_DQ18

51

M_A_DQ19

53

M_A_DQ20

40

M_A_DQ21

42

M_A_DQ22

50

M_A_DQ23

52

M_A_DQ24

57

M_A_DQ25

59

M_A_DQ26

67

M_A_DQ27

69

M_A_DQ28

56

M_A_DQ29

58

M_A_DQ30

68

M_A_DQ31

70

M_A_DQ32

129

M_A_DQ33

131

M_A_DQ34

141

M_A_DQ35

143

M_A_DQ36

130

M_A_DQ37

132

M_A_DQ38

140

M_A_DQ39

142

M_A_DQ40

147

M_A_DQ41

149

M_A_DQ42

157

M_A_DQ43

159

M_A_DQ44

146

M_A_DQ45

148

M_A_DQ46

158

M_A_DQ47

160

M_A_DQ48

163

M_A_DQ49

165

M_A_DQ50

175

M_A_DQ51

177

M_A_DQ52

164

M_A_DQ53

166

M_A_DQ54

174

M_A_DQ55

176

M_A_DQ56

181

M_A_DQ57

183

M_A_DQ58

191

M_A_DQ59

193

M_A_DQ60

180

M_A_DQ61

182

M_A_DQ62

192

M_A_DQ63

194

CK_M_DDR0_A_DP CK_M_DDR0_A_DN

CK_M_DDR1_A_DP CK_M_DDR1_A_DN

R451 *100K/F_4R451 *100K/F_4

R459 *100K/F_4R459 *100K/F_4

M_A_DQ0

5

PCH

4

M_A_DQ[63:0] (10,15)

+3V

R390 *10K/J_4R390 *10K/J_4

H:9.5 Black

PCB Placement

C476 1U/6.3V_4_X5RC476 1U/6.3V_4_X5R

C497 1U/6.3V_4_X5RC497 1U/6.3V_4_X5R

C510 1U/6.3V_4_X5RC510 1U/6.3V_4_X5R

PM_EXTTS#0(15)

DDR3_DRAMRST_N(10,15,16,17)

VREF_DQ_DDRA(13,15) VREF_CA_DDRA(15)CLK_SCLK(15,16,17,26,32,37,43)

+3V

C396

C403

0.1U/16V_4_X7R

PM_EXTTS#0

3

1.5V_DDR3

C454 1U/6.3V_4_X5RC454 1U/6.3V_4_X5R

+3V

PM_EXTTS#0 DDR3_DRAMRST_N

VREF_DQ_DDRA VREF_CA_DDRA

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM0_H=9.2_Standard

1.5V_DDR3

C514

C448

10U/6.3V_6_X5R

+3V

C404

2.2U/6.3V_6_X5R

XMM2B

PC2100 DDR3 SDRAM SO-DIMM

(204P)

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

VTT1 VTT2

GND GND

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

SMDDR_VTERM

Place these Caps near So-Dimm0.

C491

0.1U/10V_4_X5R

C487

0.1U/10V_4_X5R

C377

C377 1U/6.3V_4_X5R

1U/6.3V_4_X5R

C491

C503

C456

10U/6.3V_6_X5R

C406

0.1U/10V_4_X5R

C465

C507

10U/6.3V_6_X5R

SMDDR_VTERM

1U/6.3V_4_X5R

10U/6.3V_6_X5R

2

C372

C513

1.5V_DDR3

C554

C553

2.2U/6.3V_6_X5R

1.5V_DDR3

R420

C427

+

330U/2V_7343

2.2U/6.3V_6_X5R

R499 0/J_4R499 0/J_4

R425 0/J_4R425 0/J_4

R422

R422 1K/F_4

1K/F_4

C373

1U/6.3V_4_X5R

Quanta Computer Inc.

PROJECT :

R501

1K/F_4

R500

1K/F_4

C457

C446

0.1U/10V_4_X5R

C376

C376 1U/6.3V_4_X5R

1U/6.3V_4_X5R

Size Document Number Rev

DDR3 CHA DIMM 0

Date: Sheet of

C554

VREF_DQ_DDRA

C541

0.1U/16V_4_X7R

C422

2.2U/6.3V_6_X5R

VREF_CA_DDRA

C371

C371 10U/6.3V_6_X5R

10U/6.3V_6_X5R

0.1U/16V_4_X7R

C423

0.1U/16V_4_X7R

C436 0.1U/16V_4_X7RC436 0.1U/16V_4_X7R

C375

10U/6.3V_6_X5R

WJ1

1

5

WWW.MANUALS.CLAN.SU

4

3

2

1

CHANNEL A DIMM 1

M_A_A[15:0](10,14)

D D

M_BA_A0(10,14) M_BA_A1(10,14)

M_BA_A2(10,14) M_SCS_A_N2(10) M_SCS_A_N3(10)

CK_M_DDR2_A_DP(10) CK_M_DDR2_A_DN(10) CK_M_DDR3_A_DP(10) CK_M_DDR3_A_DN(10)

M_SCKE_A2(10) M_SCKE_A3(10) M_CAS_A_N(10,14) M_RAS_A_N(10,14)

M_WE_A_N(10,14)

C C

CLK_SDATA(14,16,17,26,32,37,43)

M_ODT_A2(10)

M_ODT_A3(10)

M_DQS_A_DP0(10,14) M_DQS_A_DP1(10,14) M_DQS_A_DP2(10,14) M_DQS_A_DP3(10,14) M_DQS_A_DP4(10,14) M_DQS_A_DP5(10,14) M_DQS_A_DP6(10,14) M_DQS_A_DP7(10,14) M_DQS_A_DN0(10,14) M_DQS_A_DN1(10,14) M_DQS_A_DN2(10,14)

R345

R345 0/J_4

0/J_4

R339

R339 *0/J_4

*0/J_4

M_DQS_A_DN3(10,14) M_DQS_A_DN4(10,14) M_DQS_A_DN5(10,14) M_DQS_A_DN6(10,14) M_DQS_A_DN7(10,14)

+3V

R346

R346 *0/J_4

*0/J_4

SA0_A_1

R338

R338 0/J_4

0/J_4

B B

A A

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_BA_A0 M_BA_A1 M_BA_A2 M_SCS_A_N2 M_SCS_A_N3 CK_M_DDR2_A_DP CK_M_DDR2_A_DN CK_M_DDR3_A_DP CK_M_DDR3_A_DN M_SCKE_A2 M_SCKE_A3 M_CAS_A_N M_RAS_A_N M_WE_A_N SA0_A_1 SA1_A_1

CLK_SCLK(14,16,17,26,32,37,43)

M_ODT_A2 M_ODT_A3

M_DQS_A_DP0 M_DQS_A_DP1 M_DQS_A_DP2 M_DQS_A_DP3 M_DQS_A_DP4 M_DQS_A_DP5 M_DQS_A_DP6 M_DQS_A_DP7 M_DQS_A_DN0 M_DQS_A_DN1 M_DQS_A_DN2 M_DQS_A_DN3 M_DQS_A_DN4 M_DQS_A_DN5 M_DQS_A_DN6 M_DQS_A_DN7

CK_M_DDR2_A_DP CK_M_DDR2_A_DN

CK_M_DDR3_A_DP CK_M_DDR3_A_DN

SA1_A_1

SPD SA0 1

107

119

109 108

114 121 101 103 102 104

115 110 113 197 201 202 200

116 120

136 153 170 187

137 154 171 188

135 152 169 186

98 97 96 95 92 91 90 86 89 85

84 83

80 78

79

73 74

11 28 46 63

12 29 47 64

10 27 45 62

XMM1A

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15

BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA

ODT0 ODT1

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

IC SOCKET DDRIII SO-DIMM(204P_H5.2_STD)I

R454 *100K/F_4R454 *100K/F_4

R450 *100K/F_4R450 *100K/F_4

PC2100 DDR3 SDRAM SO-DIMM

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46

(204P)

DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ47 M_A_DQ46 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQ0

5

H:5.2 white

PCB Placement

PCH

M_A_DQ[63:0] (10,14)

Swap DQ46,DQ47

DDR3_DRAMRST_N

C538

I

100P/50V_4_NPO

C478 1U/6.3V_4_X5RIC478 1U/6.3V_4_X5R

C499 1U/6.3V_4_X5RIC499 1U/6.3V_4_X5R

C459 1U/6.3V_4_X5RIC459 1U/6.3V_4_X5R

I

PM_EXTTS#0(14)

DDR3_DRAMRST_N(10,14,16,17)

VREF_DQ_DDRA(13,14) VREF_CA_DDRA(14)

+3V

C399

I

0.1U/10V_4_X7R

1.5V_DDR3

C511 1U/6.3V_4_X5RIC511 1U/6.3V_4_X5R

I

+3V

PM_EXTTS#0 DDR3_DRAMRST_N

C400

I

0.1U/10V_4_X7R

1.5V_DDR3

C509

I

10U/6.3V_6_X5R

+3V

C402

I

2.2U/6.3V_6_X5R

C472

I

10U/6.3V_6_X5R

XMM1B

100 105 106 111 112 117 118 123 124

199

122 125

198

126

75 76 81 82 87 88 93 94 99

77

30

1

2 3 8

9 13 14 19 20 25 26 31 32 37 38 43

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

VDDSPD NC1

NC2 NCTEST

EVENT# RESET#

VREF_DQ VREF_CA

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15

IC SOCKET DDRIII SO-DIMM(204P_H5.2_STD)I

PC2100 DDR3 SDRAM SO-DIMM

(204P)

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

VTT1 VTT2

GND GND

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

Place these Caps near So-Dimm0.

C453

C467

I

10U/6.3V_6_X5R

C395

I C395

I

0.1U/10V_4_X5R

C464

C449

I

10U/6.3V_6_X5R

SMDDR_VTERM

C505

I

10U/6.3V_6_X5R

C367

I

1U/6.3V_4_X5R

I

0.1U/10V_4_X5R

C445

I

0.1U/10V_4_X5R

1U/6.3V_4_X5R

C492

C368

IC368

I

C484

I

0.1U/10V_4_X5R

C519

I

0.1U/10V_4_X5R

C369

I

1U/6.3V_4_X5R

SMDDR_VTERM

0.1U/10V_4_X5R

I C370

I

1U/6.3V_4_X5R

C549

C550

I

0.1U/10V_4_X7R

C364

C366

I

10U/6.3V_6_X5R

VREF_CA_DDRAVREF_DQ_DDRA

I

IC370

15

C429

C434

I

0.1U/10V_4_X7R

C365

I

10U/6.3V_6_X5R

I

SPD SA1

5

0

Size Document Number Rev

DDR3 CHA DIMM 1

Date: Sheet of

4

3

2

Date: Sheet of

Quanta Computer Inc.

PROJECT :

WJ1

1

15 54Monday, October 18, 2010

B

5

WWW.MANUALS.CLAN.SU

4

3

2

1

CHANNEL B DIMM 2

M_B_A[15:0](10,17)

D D

M_BA_B0(10,17) M_BA_B1(10,17)

M_BA_B2(10,17) M_SCS_B_N0(10) M_SCS_B_N1(10)

CK_M_DDR0_B_DP(10)

CK_M_DDR0_B_DN(10) CK_M_DDR1_B_DP(10) CK_M_DDR1_B_DN(10)

M_SCKE_B0(10) M_SCKE_B1(10) M_CAS_B_N(10,17) M_RAS_B_N(10,17) M_WE_B_N(10,17)

C C

B B

R384

R384 0/J_4

0/J_4

R385

A A

R385 *0/J_4

*0/J_4

CLK_SDATA(14,15,17,26,32,37,43)

M_ODT_B0(10) M_ODT_B1(10)

M_DQS_B_DP0(10,17)

M_DQS_B_DP1(10,17)

M_DQS_B_DP2(10,17)

M_DQS_B_DP3(10,17)

M_DQS_B_DP4(10,17)

M_DQS_B_DP5(10,17)

M_DQS_B_DP6(10,17)

M_DQS_B_DP7(10,17)

M_DQS_B_DN0(10,17) M_DQS_B_DN1(10,17) M_DQS_B_DN2(10,17) M_DQS_B_DN3(10,17) M_DQS_B_DN4(10,17) M_DQS_B_DN5(10,17) M_DQS_B_DN6(10,17) M_DQS_B_DN7(10,17)

+3V

R393

R393 *0/J_4

*0/J_4

SA0_B_0

SA1_B_0

R394

R394 0/J_4

0/J_4

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_BA_B0 M_BA_B1 M_BA_B2

M_SCS_B_N0

M_SCS_B_N1 CK_M_DDR0_B_DP CK_M_DDR0_B_DN CK_M_DDR1_B_DP CK_M_DDR1_B_DN

M_SCKE_B0

M_SCKE_B1

M_CAS_B_N

M_RAS_B_N

M_WE_B_N

SA0_B_0

SA1_B_0

M_ODT_B0

M_ODT_B1

M_DQS_B_DP0

M_DQS_B_DP1

M_DQS_B_DP2

M_DQS_B_DP3

M_DQS_B_DP4

M_DQS_B_DP5

M_DQS_B_DP6

M_DQS_B_DP7

M_DQS_B_DN0

M_DQS_B_DN1

M_DQS_B_DN2

M_DQS_B_DN3

M_DQS_B_DN4

M_DQS_B_DN5

M_DQS_B_DN6

M_DQS_B_DN7

XMM4A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

PC2100 DDR3 SDRAM SO-DIMM

12 29 47

64 137 154 171 188

10

27

45

62 135 152 169 186

DDR3-DIMM0_H=5.2_Standard

PC2100 DDR3 SDRAM SO-DIMM

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

M_B_DQ32----JDIM4.130-----JDIM3.130 M_B_DQ36----JDIM4.129-----JDIM3.129

M_B_DQ41----JDIM4.147-----JDIM3.147 M_B_DQ43----JDIM4.149-----JDIM3.149 M_B_DQ42----JDIM4.159-----JDIM3.159 M_B_DQ40----JDIM4.157-----JDIM3.157

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46

(204P)

DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

CK_M_DDR0_B_DP CK_M_DDR0_B_DN CK_M_DDR1_B_DP

7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ36 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ32 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ41 M_B_DQ43 M_B_DQ40 M_B_DQ42 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

R449 *100K/F_4R449 *100K/F_4 R453 *100K/F_4R453 *100K/F_4

M_B_DQ0

5

M_B_DQ[63:0] (10,17)

pin confirm with Intel

DDR3_DRAMRST_N(10,14,15,17)

+3V

R397 *10K/J_4R397 *10K/J_4

CK_M_DDR1_B_DN

H:5.2 Black

PCB Placement

PM_EXTTS#1(17)

VREF_DQ_DDRB(13,17) VREF_CA_DDRB(17)CLK_SCLK(14,15,17,26,32,37,43)

C508 1U/6.3V_4_X5RC508 1U/6.3V_4_X5R

C517 1U/6.3V_4_X5RC517 1U/6.3V_4_X5R

+3V

C405

0.1U/16V_4_X7R

PM_EXTTS#1

C479 1U/6.3V_4_X5RC479 1U/6.3V_4_X5R

C477 1U/6.3V_4_X5RC477 1U/6.3V_4_X5R

PM_EXTTS#1 DDR3_DRAMRST_N

C407

0.1U/16V_4_X7R

1.5V_DDR3

+3V

VREF_DQ_DDRB VREF_CA_DDRB

1.5V_DDR3

2.2U/6.3V_6_X5R

XMM4B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM0_H=5.2_Standard

C466

C452

+3V

10U/6.3V_6_X5R

C410

C452

10U/6.3V_6_X5R

C501

1.5V_DDR3

44

VSS16

48

VSS17

49

VSS18

54

VSS19

55

VSS20

60

VSS21

61

VSS22

65

VSS23

66

VSS24

71

VSS25

72

VSS26

127

VSS27

128

VSS28

133

VSS29

134

VSS30

138

VSS31

139

VSS32

144

VSS33

145

VSS34

150

VSS35

151

VSS36

155

VSS37

156

VSS38

161

VSS39

162

VSS40

167

VSS41

168

VSS42

172

VSS43

173

VSS44

178

VSS45

179

VSS46

184

VSS47

185

VSS48

189

VSS49

190

VSS50

195

VSS51

196

VSS52

(204P)

PC2100 DDR3 SDRAM SO-DIMM

VTT1 VTT2

GND GND

203 204

205 206

SMDDR_VTERM

Place these Caps near So-Dimm0.

C515

C488

C444

C469

10U/6.3V_6_X5R

C409

0.1U/10V_4_X5R

C486

C458

10U/6.3V_6_X5R

SMDDR_VTERM

C386

C386 1U/6.3V_4_X5R

1U/6.3V_4_X5R

C461

0.1U/10V_4_X5R

C498

0.1U/10V_4_X5R

C391

1U/6.3V_4_X5R

C488

0.1U/10V_4_X5R

C392

C392 1U/6.3V_4_X5R

1U/6.3V_4_X5R

R498

R498 1K/F_4

1K/F_4

R495

R495 1K/F_4

1K/F_4

1.5V_DDR3

C535

330U/2V_7343

+

C542

2.2U/6.3V_6_X5R

R496

R496 0/J_4

0/J_4

C447

2.2U/6.3V_6_X5R

R427

R427 1K/F_4

1K/F_4

R426 0/J_4R426 0/J_4

R428

R428 1K/F_4

1K/F_4

C385

1U/6.3V_4_X5R

C545

0.1U/16V_4_X7R

VREF_DQ_DDRB

C543

0.1U/16V_4_X7R

C455

0.1U/16V_4_X7R

VREF_CA_DDRB

C431

C388

C381

C381 10U/6.3V_6_X5R

10U/6.3V_6_X5R

maybe can save

0.1U/16V_4_X7R

16

C544

0.1U/16V_4_X7R

C432

0.1U/16V_4_X7R

C382

C382 10U/6.3V_6_X5R

10U/6.3V_6_X5R

SPD SA0

SPD SA1

5

0

1

Quanta Computer Inc.

PCH

Size Document Number Rev

DDR3 CHB DIMM 0

Date: Sheet of

4

3

2

Date: Sheet of

Quanta Computer Inc.

PROJECT :

WJ1

1

16 54Monday, October 18, 2010

B

5

WWW.MANUALS.CLAN.SU

4

3

2

1

CHANNEL B DIMM 3

M_B_A[15:0](10,16)

D D

M_BA_B0(10,16) M_BA_B1(10,16)

M_BA_B2(10,16) M_SCS_B_N2(10) M_SCS_B_N3(10)

CK_M_DDR2_B_DP(10) CK_M_DDR2_B_DN(10) CK_M_DDR3_B_DP(10) CK_M_DDR3_B_DN(10)

M_SCKE_B2(10) M_SCKE_B3(10) M_CAS_B_N(10,16) M_RAS_B_N(10,16) M_WE_B_N(10,16)

C C

B B

+3V

R383

R383 0/J_4

0/J_4

R358

R358 *0/J_4

*0/J_4

A A

R389

R389 0/J_4

0/J_4

R386

R386 *0/J_4

*0/J_4 C411

CLK_SCLK(14,15,16,26,32,37,43)

CLK_SDATA(14,15,16,26,32,37,43)

M_DQS_B_DP0(10,16) M_DQS_B_DP1(10,16) M_DQS_B_DP2(10,16) M_DQS_B_DP3(10,16) M_DQS_B_DP4(10,16) M_DQS_B_DP5(10,16) M_DQS_B_DP6(10,16)

M_DQS_B_DP7(10,16) M_DQS_B_DN0(10,16) M_DQS_B_DN1(10,16) M_DQS_B_DN2(10,16) M_DQS_B_DN3(10,16) M_DQS_B_DN4(10,16) M_DQS_B_DN5(10,16) M_DQS_B_DN6(10,16) M_DQS_B_DN7(10,16)

SA0_B_1

SA1_B_1

SPD SA0

M_ODT_B2(10) M_ODT_B3(10)

1

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_BA_B0 M_BA_B1 M_BA_B2 M_SCS_B_N2 M_SCS_B_N3 CK_M_DDR2_B_DP CK_M_DDR2_B_DN CK_M_DDR3_B_DP CK_M_DDR3_B_DN M_SCKE_B2 M_SCKE_B3 M_CAS_B_N M_RAS_B_N M_WE_B_N SA0_B_1 SA1_B_1

M_ODT_B2 M_ODT_B3

M_DQS_B_DP0 M_DQS_B_DP1 M_DQS_B_DP2 M_DQS_B_DP3 M_DQS_B_DP4 M_DQS_B_DP5 M_DQS_B_DP6 M_DQS_B_DP7 M_DQS_B_DN0 M_DQS_B_DN1 M_DQS_B_DN2 M_DQS_B_DN3 M_DQS_B_DN4 M_DQS_B_DN5 M_DQS_B_DN6 M_DQS_B_DN7

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

M_B_DQ32----JDIM4.130-----JDIM3.130 M_B_DQ36----JDIM4.129-----JDIM3.129

M_B_DQ41----JDIM4.147-----JDIM3.147 M_B_DQ43----JDIM4.149-----JDIM3.149 M_B_DQ42----JDIM4.159-----JDIM3.159 M_B_DQ40----JDIM4.157-----JDIM3.157

SILKSCREEN: DIMM4

XMM3A

PC2100 DDR3 SDRAM SO-DIMM

IC SOCKET DDRIII SO-DIMM(204P_H9.2_RVS)I

(204P)

PCH

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ36 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ32 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ41 M_B_DQ43 M_B_DQ40 M_B_DQ42 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

H:9.5 white

PCB Placement

M_B_DQ[63:0] (10,16)

PM_EXTTS#1(16)

DDR3_DRAMRST_N(10,14,15,16)

VREF_DQ_DDRB(13,16)

VREF_CA_DDRB(16)

+3V

C397

0.1U/10V_4_X7R

1.5V_DDR3

C482

I

C462 1U/6.3V_4_X5RIC462 1U/6.3V_4_X5R

C460 1U/6.3V_4_X5RIC460 1U/6.3V_4_X5R

C489 1U/6.3V_4_X5RIC489 1U/6.3V_4_X5R

I

C398

0.1U/10V_4_X7R

C506

I

10U/6.3V_6_X5R

+3V

C408

I

2.2U/6.3V_6_X5R

1.5V_DDR3

XMM3B

75

VDD1

76

VDD2

100 105 106 111 112 117 118 123 124

199

122 125

198

126

81 82 87 88 93 94 99

77

30

1

2 3 8

9 13 14 19 20 25 26 31 32 37 38 43

VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

VDDSPD NC1

NC2 NCTEST

EVENT# RESET#

VREF_DQ VREF_CA

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15

IC SOCKET DDRIII SO-DIMM(204P_H9.2_RVS)I

PC2100 DDR3 SDRAM SO-DIMM

C500 1U/6.3V_4_X5RIC500 1U/6.3V_4_X5R

I

+3V

PM_EXTTS#1 DDR3_DRAMRST_N

VREF_DQ_DDRB VREF_CA_DDRB

Place these Caps near So-Dimm0.

C443

C504

C516

I

10U/6.3V_6_X5R

C411

I

0.1U/10V_4_X5R

I

10U/6.3V_6_X5R

C451

C468

I

10U/6.3V_6_X5R

SMDDR_VTERM

C471

I

10U/6.3V_6_X5R

0.1U/10V_4_X5R

C390

I

1U/6.3V_4_X5R

C496

C480

I

0.1U/10V_4_X5R

C384

I

1U/6.3V_4_X5R

C443

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

(204P)

C512

I

0.1U/10V_4_X5R

C389

C389 1U/6.3V_4_X5R

1U/6.3V_4_X5R

VTT1 VTT2

GND GND

I

0.1U/10V_4_X5R

I

C533

+

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

I

330U/2V_7343

C383

I

1U/6.3V_4_X5R

SMDDR_VTERM

C546

I

0.1U/10V_4_X7R

C378

I

10U/6.3V_6_X5R

VREF_CA_DDRBVREF_DQ_DDRB

C547

I

0.1U/10V_4_X7R

C387

I

10U/6.3V_6_X5R

C433

I

0.1U/10V_4_X7R

C379

C379 10U/6.3V_6_X5R

10U/6.3V_6_X5R

17

C428

I

0.1U/10V_4_X7R

I

SPD SA1

5

1

CK_M_DDR2_B_DP CK_M_DDR2_B_DN

CK_M_DDR3_B_DP CK_M_DDR3_B_DN

4

R452 *100K/F_4R452 *100K/F_4

R445 *100K/F_4R445 *100K/F_4

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

DDR3 CHB DIMM 1

Date: Sheet of

3

2

Date: Sheet of

PROJECT :

WJ1

1

B

17 54Monday, October 18, 2010

HP TouchSmart 610 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual