1
www.schematic-x.blogspot.com
2
3
4
5
6
7
8
R18D INTEL UMA/DISCRETE SYSTEM DIAGRAM
+3V/+5V
A A
+1.05VTT/+1.8V
CPU Core
VGACore/+1.1V
+1.5VSUS
B B
Charger
Discharger
UMA VGACORE
C C
D D
PG.34
SODIMM1
PG.35
PG.36
PG.37
PG.38
PG.39
PG.40
PG.41
LAN3
Card reader
RTS5219-GR
PG.27
10/100
RTS8165EH
10/100
Max. 4GB
SODIMM2
Max. 4GB
HDD
ODD
3&,([
LAN
BT COMBO
PG.30 PG.33
KBC
EnE KB3930QF D2
KB TP ROM FAN
1
2
PG.15
PG.16
PG.26
PG.26
LAN1 LAN2
WLAN
PG.32
DDR3
Channel A
DDR3
Channel B
SATA0
SATA1
USB 2.0
LPC
3
INTEL
Arrandale
34mm X 28mm
1288pin BGA
TDP 35W
PG.3~9
FDI
DMI
INTEL PCH
Ibex Peak-m
27mm X 25mm
1071pin FCBGA
TDP 5W
PG.10~14
Azalia
AUDIO
CODEC
IDT92HD80B1
PG.28
4
PCI-E x8
DP Port B
CRT
LVDS
USB2.0 Ports
X2
USB 2.0
Speaker
HP/MIC
Analog MIC
5
Nvidia
N12P-GV
PP;PP
7'3
PG.17~21
DDR3 900MHz
VRAM
64Mx16x4,64bit
HDMI
Level
Shifter
PG.24
Webcam
PORT0,1
PG.28
PG.29
PG.28
6
PG.21
PG.23 PG.29
PORT4 PORT10
14.318MHz
CLOCK GEN
HDMI
CRT
LVDS
BT
Softbreeze
PG.29
PORT13
Stackup
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
Date: Sheet
Date: Sheet
Date: Sheet
7
PG.2
TOP
GND
IN1
IN2
VCC
BOT
PG.24
PG.25
PG.23
14 2 Thursday, January 13, 2011
14 2 Thursday, January 13, 2011
14 2 Thursday, January 13, 2011
8
1A
1A
1A
of
of
of
1
2
3
4
5
6
7
8
02
25mA 150mA
+VDDIO_CLK +1.05V +3V
L56
L56
1 2
HCB1608KF-181T15/1.5A_6
HCB1608KF-181T15/1.5A_6
A A
Place each 0.1uF cap close to pin
B B
CLK_ICH_14M <11>
Place R8044 within 0.5" of C/G
C C
+3V
C742 0.1U/10V_4 C742 0.1U/10V_4
C723 0.1U/10V_4 C723 0.1U/10V_4
C747 10U/6.3VS_6 C747 10U/6.3VS_6
C746 *10U/6.3V_8 C746 *10U/6.3V_8
+VDDSE_CLK
+VDDCORE_CLK
C722 *0.047U/10V_4 C722 *0.047U/10V_4
+VDDIO_CLK
C737 *0.047U/10V_4 C737 *0.047U/10V_4
CGDAT_SMB <11,15,16>
CGCLK_SMB <11,15,16>
C708 *10P/50V_4 C708 *10P/50V_4
HCB1608KF-181T15/1.5A_6
HCB1608KF-181T15/1.5A_6
Place each 0.1uF cap close to pin Place each 0.1uF cap close to pin
1 2
1 2
R494 10K_4 R494 10K_4
R478 33_4 R478 33_4
CK_PWRGD_R
XTAL_OUT
XTAL_IN
+VDDSE_CLK +3V
L57
L57
1 2
U29
U29
5
VDD_LCD
29
VDD_REF
1
VDD_USB
17
VDD_SRC
24
VDD_CPU
18
VDD_CPU_IO
15
VDD_SRC_IO
31
SDATA
32
SCLK
16
CPU_STOP#
CPU_SEL CLK_ICH_14M
30
REF_0/CPU_SEL
25
CK_PWRGD/PD#_3.3
27
XOUT
28
XIN
9
VSS_SATA
2
VSS_USB
8
VSS_LCD
RTM890N-632
RTM890N-632
AL000890000
AL000890000
IC OTHER(32P) RTM890N-632-GRT(QFN)
IC OTHER(32P) RTM890N-632-GRT(QFN)
Vender
ICS
Realtek
Silego
C704 4.7U/6.3V_6 C704 4.7U/6.3V_6
C731 0.1U/10V_4 C731 0.1U/10V_4
C705 0.1U/10V_4 C705 0.1U/10V_4
RTM890N-632
RTM890N-632
QFN32
QFN32
Part Part Number
ICS9LVS3197 AL003197001
RTM890N-632 AL000890000
SLG8LV595VTR AL000595000
+3V
1 2
*HCB1608KF-181T15/1.5A_6
*HCB1608KF-181T15/1.5A_6
+1.5V
1 2
HCB1608KF-181T15/1.5A_6
HCB1608KF-181T15/1.5A_6
CLK_BUF_BCLK_P CLK_BUF_BCLK_N
23
CPU-0
22
CPU-0#
20
CPU-1
19
CPU-1#
3
DOT96T_LPR
4
DOT96C_LPR
13
SRC-1
14
SRC-1#
10
SATA
11
SATA#
6
27MHz_nonSS
7
27MHz_SS
33
GND
26
VSS_REF
21
VSS_CPU
12
VSS_SRC
Part Description
IC OTHER(32P) ICS9LVS3197AKLFT(MLF)
IC OTHER(32P) RTM890N-632-GRT(QFN)
IC OTHER(32P)SLG8LV595VTR(QFN)
150mA
+VDDCORE_CLK
L53
L53
L54
L54
0510 add for WiMAX
close to U13
C714 * 3.3P/50 V_4 C71 4 *3.3P/ 50V_4
CLK_BUF_BCLK_P
CLK_BUF_BCLK_N
CLK_BUF_DREFCLK
CLK_BUF_DREFCLK#
CLK_BUF_PCIE_3GPLL
CLK_BUF_PCIE_3GPLL#
CLK_BUF_DREFSSCLK
CLK_BUF_DREFSSCLK#
CLK_VGA_27M_NOSS
CLK_VGA_27M_SS
C733 4.7U/6.3V_6 C733 4.7U/6.3V_6
C729 0.1U/10V_4 C729 0.1U/10V_4
C711 0.1U/10V_4 C711 0.1U/10V_4
C716 0.1U/10V_4 C716 0.1U/10V_4
Y6
XTAL_IN XTAL_OUT
1 2
1 2
C702
C702
33P/50V_4
33P/50V_4
14.318MHZY614.318MHZ
1 2
C703
C703
33P/50V_4
33P/50V_4
R474
R474
*10K_4
*10K_4
CPU_SEL
R476
R476
10K_4
10K_4
01
CPU_SEL
CPU0/1=133MHz
(default)
CLK_BUF_BCLK_P <11>
CLK_BUF_BCLK_N <11>
CLK_BUF_DREFCLK <11>
CLK_BUF_DREFCLK# <11>
CLK_BUF_PCIE_3GPLL < 11>
CLK_BUF_PCIE_3GPLL# < 11>
CLK_BUF_DREFSSCLK <11>
T47T47
T46T46
CLK_BUF_DREFSSCLK# <11>
VR_PWRGD_CLKEN# <35>
CPU0/1=100MHz
+3V
R493
R493
1K_4
1K_4
CK_PWRGD_R
3
Q39
Q39
2N7002E
2N7002E
R495
2
R495
100K_4
100K_4
1
+1.05V <10,11,12,14,41>
+1.5V <6,32>
+3V <3,10,11,12,13,14,15,16,17,19, 22,23,24,25,26,27,29,30,31,32,35,36,38>
D D
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Docume n t Number Rev
Size Docume n t Number Rev
Size Document Number Rev
Custom
Custom
Custom
Clock Gen(9LRS3197)
Clock Gen(9LRS3197)
Clock Gen(9LRS3197)
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
7
1A
1A
1A
of
of
of
24 2 Tuesday, February 15, 2011
24 2 Tuesday, February 15, 2011
24 2 Tuesday, February 15, 2011
8
5
4
3
2
+1.5V_CPU <5,6>
1
+1.05V_VTT <5,6,13,14,31,34,35,36,40> +3VS5 <10,11,12,13,14,17,28,33,34,36,38,40>
+1.5VSUS <6,15,16,36,37,38>
+3V <2,10,11,12,13,14,15,16,17,19,22,23,24,25,26,27,29,30,31,32,35,36,38>
03
U3018B
U3018A
U3018A
F7
D D
C C
B B
A A
DMI_TXN0 <12>
DMI_TXN1 <12>
DMI_TXN2 <12>
DMI_TXN3 <12>
DMI_TXP0 <12>
DMI_TXP1 <12>
DMI_TXP2 <12>
DMI_TXP3 <12>
DMI_RXN0 <12>
DMI_RXN1 <12>
DMI_RXN2 <12>
DMI_RXN3 <12>
DMI_RXP0 <12>
DMI_RXP1 <12>
DMI_RXP2 <12>
DMI_RXP3 <12> H_PROCHOT# <31,35>
2.7GT/s data rate
FDI_TXN[7:0] <12>
FDI_TXP[7:0] <12>
FDI_FSYNC0 <12>
FDI_FSYNC1 <12>
FDI_INT <12>
FDI_LSYNC0 <12>
FDI_LSYNC1 <12>
Discrete Only
R3361 *1K/F_4 R3361 *1K/F_4
R3355 *0_4 R3355 *0_4
R3350 *0_4 R3350 *0_4
R3356 *0_4 R3356 *0_4
R3351 *1K/F_4 R3351 *1K/F_4
FDI_FSYNC can
gang all these
4 signals
together and
tie them with
only one 1K
resistor to GND
( Check list
1.0 ).
J8
K8
J4
F9
J6
K9
J2
H17
K15
J13
F10
G17
M15
G13
J11
FDI_TXN0
L2
FDI_TXN1
N7
FDI_TXN2
M4
FDI_TXN3
P1
FDI_TXN4
N10
FDI_TXN5
R7
FDI_TXN6
U7
FDI_TXN7
W8
FDI_TXP0
K1
FDI_TXP1
N5
FDI_TXP2
N2
FDI_TXP3
R2
FDI_TXP4
N9
FDI_TXP5
R8
FDI_TXP6
U6
FDI_TXP7
W10
AC7
AC9
AB5
AA1
AB2
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
For S3 leakage issue
PCIE_CLK_REQ7# <13>
+3VS5
5
DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]
FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]
FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]
FDI_FSYNC[0]
FDI_FSYNC[1]
FDI_INT
FDI_LSYNC[0]
FDI_LSYNC[1]
IC,ARD_BGA,R1P0
IC,ARD_BGA,R1P0
PCIE_CLK_REQ7#
R3469 10K/F_4 R3469 10K/F_4
1 2
DMI Intel(R) FDI
DMI Intel(R) FDI
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
2
C3037
C3037
0.047U 10V_4
0.047U 10V_4
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
3
Q3006
Q3006
DMN601K-7
DMN601K-7
1
DDR3_DRAMRST#_C
B12
A13
D12
B11
G40
G38
H34
P34
G28
H25
H24
D29
B26
D26
B23
D22
A20
D19
A17
B14
F40
J38
G34
M34
J28
G25
K24
B28
A27
B25
A24
B21
B19
B18
B16
D15
N40
L38
M32
D40
A38
G32
B33
B35
L30
A31
B32
L28
N26
M24
G21
J20
L40
N38
N32
B39
B37
H32
A34
D36
J30
B30
D33
N28
M25
N24
F21
L20
R3047 100K/F_4 R3047 100K/F_4
R3062 49.9/F_4 R3062 49.9/F_4
PEG_COMP
PEG_RBIAS
R3060 750/F_4 R3060 750/F_4
PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7
PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
C_PEG_TX#0
C3751 0.1U/10V_4 C3751 0.1U/10V_4
C3744 0.1U/10V_4 C3744 0.1U/10V_4
C_PEG_TX#1
C_PEG_TX#2
C3740 0.1U/10V_4 C3740 0.1U/10V_4
C3733 0.1U/10V_4 C3733 0.1U/10V_4
C_PEG_TX#3
C_PEG_TX#4
C3728 0.1U/10V_4 C3728 0.1U/10V_4
C_PEG_TX#5
C3724 0.1U/10V_4 C3724 0.1U/10V_4
C3722 0.1U/10V_4 C3722 0.1U/10V_4
C_PEG_TX#6
C_PEG_TX#7
C3717 0.1U/10V_4 C3717 0.1U/10V_4
C_PEG_TX0
C3747 0.1U/10V_4 C3747 0.1U/10V_4
C3741 0.1U/10V_4 C3741 0.1U/10V_4
C_PEG_TX1
C_PEG_TX2
C3735 0.1U/10V_4 C3735 0.1U/10V_4
C_PEG_TX3
C3729 0.1U/10V_4 C3729 0.1U/10V_4
C3725 0.1U/10V_4 C3725 0.1U/10V_4
C_PEG_TX4
C_PEG_TX5
C3723 0.1U/10V_4 C3723 0.1U/10V_4
C3718 0.1U/10V_4 C3718 0.1U/10V_4
C_PEG_TX6
C_PEG_TX7
C3715 0.1U/10V_4 C3715 0.1U/10V_4
DDR3_DRAMRST# <15,16>
4
PEG_RX#[0..7] <17>
PEG_RX[0..7] <17>
PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
PEG_TX#[0..7] <17>
PEG_TX[0..7] <17>
HWPG <20,31,33,34,37,40,41>
PM_DRAM_PWRGD <12>
2
1
For S3 leakage issue
R3206
R3206
R3215
R3215
*10K/F_4
*10K/F_4
*8.25K/F_4
*8.25K/F_4
2
STAT_1.1 <34>
Use a voltage divider with VDDQ (1.5 V) rail
ON in S3) and resistor combination of 1.5K ±1%
(to VDDQ)/750±1% (to GND) to convert to
processor VTT level.
1
3 5
U3012
U3012
*MC74VHC1G08DFT2G
*MC74VHC1G08DFT2G
R3152 20/F_4 R3152 20/F_4
R3151 20/F_4 R3151 20/F_4
R3150 49.9/F_4 R3150 49.9/F_4
R3149 49.9/F_4 R3149 49.9/F_4
H_PECI <13>
PM_THRMTRIP# <13,31>
T3055T3055
H_CPURST#
PM_SYNC <12>
H_PWRGOOD <13>
PM_DRAM_PWRGD
H_VTTPWRGD
PLTRST# <11,17,26,29,31,32>
R3140 1.5K/F_4 R3140 1.5K/F_4
R3144 750/F_4 R3144 750/F_4
+3V
U3010
U3010
MC74VHC1G08DFT2G
MC74VHC1G08DFT2G
HWPG_1
4
3 5
R3212 *0_4 R3212 *0_4 R3213 *0_4/S R3213 *0_4/S
4
3
H_COMP3
H_COMP2
H_COMP1
H_COMP0
H_CATERR#
T3057T3057
CPU_PLTRST#
R3187
R3187
2K/F_4
2K/F_4
+1.5VSUS +3VS5
AD71
AC70
AD69
AE66
M71
N61
N19
N67
N17
N70
M17
AM7
Y67
AM5
H15
Y70
G3
H_VTTPWRGD H_VTTPWRGD
H_VTTPWRGD H_VTTPWRGD
R3180
R3180
1K/F_4
1K/F_4
R3178
R3178
*0_4
*0_4
R3211
R3211
1.5K/F_4
1.5K/F_4
PM_DRAM_PWRGD
R3147
R3147
750/F_4
750/F_4
U3018B
COMP3
COMP2
COMP1
COMP0
PROC_DETECT
CATERR#
PECI
PROCHOT#
THERMTRIP#
RESET_OBS#
PM_SYNC
VCCPWRGOOD_1
VCCPWRGOOD_0
SM_DRAMPWROK
VTTPWRGOOD
TAPPWRGOOD
RSTIN#
IC,ARD_BGA,R1P0
IC,ARD_BGA,R1P0
HWPG_1
Misc
Misc
Thermal Power Management
Thermal Power Management
DDR3
DDR3
R3155 51/J_4 R3155 51/J_4
XDP_TDO_R
H_CATERR#
R3142 49.9/F_4 R3142 49.9/F_4
H_PROCHOT#
R3138 68_4 R3138 68_4
CPU_PLTRST#
R3135 *68/J_4 R3135 *68/J_4
R3146 *51/J_4 R3146 *51/J_4
XDP_TMS
R3162 *51/J_4 R3162 *51/J_4
XDP_TDI_R
XDP_PREQ#
R3153 *51/J_4 R3153 *51/J_4
XDP_TCLK
R3145 *51/J_4 R3145 *51/J_4
2
BCLK#
BCLK_ITP
BCLK_ITP#
PEG_CLK
PEG_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
Clocks
Clocks
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PM_EXT_TS#[0]
PM_EXT_TS#[1]
Misc
Misc
PRDY#
PREQ#
TRST#
TDO_M
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
JTAG & MBP
JTAG & MBP
+1.05V_VTT
TDI_M
DBR#
AK7
BCLK
AK8
K71
J70
L21
J21
Y2
W4
BJ12
BV33
BP39
BV40
AV66
AV64
U71
U69
T67
TCK
N65
TMS
P69
T69
TDI
T71
TDO
P71
T70
W71
J69
J67
J62
K65
K62
J64
K69
M69
DREFSSCLK
DREFSSCLK#
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
PM_EXT_TS#0
PM_EXT_TS#1
XDP_PRDY#
XDP_PREQ#
XDP_TCLK
XDP_TMS
XDP_TRST#
XDP_TDI_R
XDP_TDO_R
XDP_TDI_M
XDP_TDO_M
XDP_TDI_R
XDP_TDO_M
XDP_TDI_M
XDP_TDO_R
XDP_TRST#
CLK_CPU_BCLK <13>
CLK_CPU_BCLK# <13>
CLK_PCIE_3GPLL <11 >
CLK_PCIE_3GPLL# <11>
Ra
Rb
DDR3_DRAMRST#_C
R3393 100/F_4 R3393 100/F_4
R3401 24.9/F_4 R3401 24.9/F_4
R3403 130/F_4 R3403 130/F_4
R3181 10K/F_4 R3181 10K/F_4
R3177 *0_4/S R3177 *0_4/S
R3175 *0_4/S R3175 *0_4/S
R3188 10K/F_4 R3188 10K/F_4
XDP_DBRESET# <12>
JTAG MAPPING
Rc
T3052T3052
T3028T3028
T3027T3027
T3030T3030
T3031T3031
T3029T3029
T3054T3054
T3056T3056
Ra
Rb
Rc
R3176
R3176
*0_4/S
*0_4/S
Rd
Re
R3161 51/J_4 R3161 51/J_4
Scan Chain
(Default)
CPU Only
GMCH Only
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Docum e nt Numb e r Rev
Size Do cument Numbe r Rev
Size Do cument Numbe r Rev
Custom
Custom
Custom
PROCESSER 1/7(HOST&PEX)
PROCESSER 1/7(HOST&PEX)
PROCESSER 1/7(HOST&PEX)
Date: Sheet
Date: Sheet
Date: Sheet
Ra
Rb
Rc 0 ohm NA
+1.05V_VTT
PM_EXTTS#0 <15,16>
PM_EXTTS#1 <16>
+1.05V_VTT
11/6
must add
test point.
STUFF -> Ra, Rc, Re
NO STUFF -> Rb, Rd
STUFF -> Ra, Rb
NO STUFF -> Rc, Rd, Re
STUFF -> Rd, Re
NO STUFF -> Ra, Rb, Rc
1
DIS UMA
NA
0 ohm
0 ohm
DREFSSCLK <11>
DREFSSCLK# <11>
3
3
3
of
of
of
NA
1A
1A
1A
42 Tuesday, Febru a ry 15, 2011
42 Tuesday, Febru a ry 15, 2011
42 Tuesday, Febru a ry 15, 2011
5
4
3
2
1
ARRANDALE/CLARKSFIELD PROCESSOR (DDR3)
U3018D
U3018C
U3018C
BM34
SA_CK[0]
D D
C C
B B
M_A_DQ[63:0] <15>
M_A_DQ0
AT8
BM43
BM53
BF11
BE11
BH13
BN11
BG17
BK15
BG15
BH17
BK17
BN20
BN17
BK25
BH25
BJ20
BH21
BG24
BG25
BJ40
BF47
BF48
BN40
BH43
BN44
BN47
BN48
BN51
BH53
BJ55
BH48
BJ48
BN55
BF55
BN57
BN65
BJ61
BF57
BJ57
BK64
BK61
BJ63
BF64
BB64
BB66
BJ66
BF65
AY64
BC7
BT38
BH38
BF21
BK43
BL38
BF38
SA_DQ[0]
AT6
SA_DQ[1]
BB5
SA_DQ[2]
BB9
SA_DQ[3]
AV7
SA_DQ[4]
AV6
SA_DQ[5]
BE6
SA_DQ[6]
BE8
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
BK5
SA_DQ[10]
SA_DQ[11]
BF9
SA_DQ[12]
BF6
SA_DQ[13]
BK7
SA_DQ[14]
BN8
SA_DQ[15]
SA_DQ[16]
BN9
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
BK9
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_BS#0 <15>
M_A_BS#1 <15>
M_A_BS#2 <15>
M_A_CAS# <15>
M_A_RAS# <15>
M_A_WE# <15>
SA_CK#[0]
SA_CKE[0]
SA_CK[1]
SA_CK#[1]
SA_CKE[1]
SA_CS#[0]
SA_CS#[1]
SA_ODT[0]
SA_ODT[1]
SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
BP35
BF20
BK36
BH36
BK24
BH40
BJ47
BF43
BL47
BB10
BJ10
BM15
BN24
BG44
BG53
BN62
BH59
AY5
BJ7
BN13
BL21
BH44
BK51
BP58
BE62
AY7
BJ5
BL13
BN21
BK44
BH51
BM60
BE64
BT36
BP33
BV36
BG34
BG32
BN32
BK32
BJ30
BN30
BF28
BH34
BH30
BJ28
BF40
BN28
BN25
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_CLK0 <15>
M_A_CLK0# <15>
M_A_CKE0 <15>
M_A_CLK1 <15>
M_A_CLK1# <15>
M_A_CKE1 <15>
M_A_CS#0 <15>
M_A_CS#1 <15>
M_A_ODT0 <15>
M_A_ODT1 <15>
M_A_DM[7:0] <15>
M_A_DQS#[7:0] <15>
M_A_DQS[7:0] <15>
M_A_A[15:0] <15>
M_B_DQ[63:0] <16>
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_BS#0 <16>
M_B_BS#1 <16>
M_B_BS#2 <16>
M_B_CAS# <16>
M_B_RAS# <16>
M_B_WE# <16>
U3018D
BU33
SB_CK[0]
BV34
SB_CK#[0]
BA2
SB_DQ[0]
AW2
SB_DQ[1]
BD1
SB_DQ[2]
BE4
SB_DQ[3]
AY1
SB_DQ[4]
BC2
SB_DQ[5]
BF2
SB_DQ[6]
BH2
SB_DQ[7]
BG4
SB_DQ[8]
BG1
SB_DQ[9]
BR6
SB_DQ[10]
BR8
SB_DQ[11]
BJ4
SB_DQ[12]
BK2
SB_DQ[13]
BU9
SB_DQ[14]
BV10
SB_DQ[15]
BR10
SB_DQ[16]
BT12
SB_DQ[17]
BT15
SB_DQ[18]
BV15
SB_DQ[19]
BV12
SB_DQ[20]
BP12
SB_DQ[21]
BV17
SB_DQ[22]
BU16
SB_DQ[23]
BP15
SB_DQ[24]
BU19
SB_DQ[25]
BV22
SB_DQ[26]
BT22
SB_DQ[27]
BP19
SB_DQ[28]
BV19
SB_DQ[29]
BV20
SB_DQ[30]
BT20
SB_DQ[31]
BT48
SB_DQ[32]
BV48
SB_DQ[33]
BV50
SB_DQ[34]
BP49
SB_DQ[35]
BT47
SB_DQ[36]
BV52
SB_DQ[37]
BV54
SB_DQ[38]
BT54
SB_DQ[39]
BP53
SB_DQ[40]
BU53
SB_DQ[41]
BT59
SB_DQ[42]
BT57
SB_DQ[43]
BP56
SB_DQ[44]
BT55
SB_DQ[45]
BU60
SB_DQ[46]
BV59
SB_DQ[47]
BV61
SB_DQ[48]
BP60
SB_DQ[49]
BR66
SB_DQ[50]
BR64
SB_DQ[51]
BR62
SB_DQ[52]
BT61
SB_DQ[53]
BN68
SB_DQ[54]
BL69
SB_DQ[55]
BJ71
SB_DQ[56]
BF70
SB_DQ[57]
BG71
SB_DQ[58]
BC67
SB_DQ[59]
BK70
SB_DQ[60]
BK67
SB_DQ[61]
BD71
SB_DQ[62]
BD69
SB_DQ[63]
BV43
SB_BS[0]
BV41
SB_BS[1]
BV24
SB_BS[2]
BU46
SB_CAS#
BT40
SB_RAS#
BT41
SB_WE#
DDR SYSTEM MEMORY - B
DDR SYSTEM MEMORY - B
SB_CKE[0]
SB_CK[1]
SB_CK#[1]
SB_CKE[1]
SB_CS#[0]
SB_CS#[1]
SB_ODT[0]
SB_ODT[1]
SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
BT26
BV38
BU39
BT24
BP46
BT43
BV45
BU49
BB4
BL4
BT13
BP22
BV47
BV57
BU65
BF67
BE2
BM3
BU12
BT19
BT52
BV55
BU63
BG69
BD4
BN4
BV13
BT17
BT50
BU56
BV62
BJ69
BT34
BP30
BV29
BU30
BV31
BT33
BT31
BP26
BV27
BT27
BU42
BU26
BT29
BT45
BV26
BU23
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_CLK0 <16>
M_B_CLK0# <16>
M_B_CKE0 <16>
M_B_CLK1 <16>
M_B_CLK1# <16>
M_B_CKE1 <16>
M_B_CS#0 <16>
M_B_CS#1 <16>
M_B_ODT0 <16>
M_B_ODT1 <16>
M_B_DM[7:0] <16>
DM signals are not present on Clarkfield
processor. All DM signal can br left as
NC on Clarkfield and connect directly to
GND on So-DIMM side for Clarkfield
design only
M_B_DQS#[7:0] <16>
M_B_DQS[7:0] <16>
M_B_A[15:0] <16>
04
IC,ARD_BGA,R1P0
A A
5
IC,ARD_BGA,R1P0
IC,ARD_BGA,R1P0
IC,ARD_BGA,R1P0
4
3
2
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Doc ument Number Rev
Size Doc u m ent Number Rev
Size Doc u m ent Number Rev
Custom
Custom
Custom
PROCESSER 2/7(DDR3)
PROCESSER 2/7(DDR3)
PROCESSER 2/7(DDR3)
Date: Sheet
Date: Sheet
Date: Sheet
4
4
4
of
of
of
42 Tuesday, February 15, 2011
42 Tuesday, February 15, 2011
1
42 Tuesday, February 15, 2011
1A
1A
1A
5
4
3
2
+1.5V_CPU <6>
+1.05V_VTT <3,6,13,14,31,34,35,36,40>
+VCORE <7,35>
1
+1.8V <14,34>
05
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32
VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_43
VTT0_44
VTT0_45
VTT0_46
VTT0_47
VTT0_48
VTT0_49
VTT0_50
VTT0_51
VTT0_52
VTT0_53
VTT0_54
VTT0_55
VTT0_56
VTT0_57
VTT0_58
VTT0_59
VTT0_60
VTT0_61
VTT0_62
VTT0_63
VTT0_64
VTT0_65
VTT0_66
VTT0_67
VTT0_68
VTT0_69
VTT0_70
VTT0_71
VTT0_72
VTT0_73
AW14
AW12
AU60
AU59
AU12
AR60
AR59
AR12
AN60
AN59
AN35
AN33
AN17
AN15
AN14
AN12
AM10
AL60
AL59
AL17
AL15
AL14
AL12
AK35
AK33
AF39
AF37
AF35
AF33
AF32
AF30
AD39
BF60
BF59
BD60
BD59
BB60
BB59
AY60
AW60
AW35
AW33
AD37
AD35
AD33
AD32
AD30
W35
W33
W32
W30
W28
W26
W24
W23
U35
U33
U32
U30
U28
U26
U24
U23
R35
R33
R32
R30
R28
R26
R24
R23
AY10
AN9
+1.05V_VTT
$
3ODFHXQGHU&38
C3239
C3239
C3228
C3228
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C3238
C3129
C3129
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C3135
C3135
C3223
C3223
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C3198
C3198
C3171
C3171
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C3202
C3202
C3218
C3218
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C3240
C3240
1U/6.3V_4
1U/6.3V_4
C3136
C3136
1U/6.3V_4
1U/6.3V_4
C3162
C3162
1U/6.3V_4
1U/6.3V_4
C3185
C3185
1U/6.3V_4
1U/6.3V_4
C3242
C3242
1U/6.3V_4
1U/6.3V_4
C3217
C3217
1U/6.3V_4
1U/6.3V_4
C3227
C3227
1U/6.3V_4
1U/6.3V_4
C3149
C3149
1U/6.3V_4
1U/6.3V_4
C3208
C3208
1U/6.3V_4
1U/6.3V_4
C3216
C3216
1U/6.3V_4
1U/6.3V_4
D D
C C
B B
+1.05V_VTT
HFM_VID : Max 1.4V
LFM_VID : Min 0.65V
H_PSI#
R3449 *1K/F_4 R3449 *1K/F_4
R3446 1K/F_4 R3446 1K/F_4
CPU_VID0
R3431 1K/F_4 R3431 1K/F_4
R3422 *1K/F_4 R3422 *1K/F_4
CPU_VID1
R3430 1K/F_4 R3430 1K/F_4
R3421 *1K/F_4 R3421 *1K/F_4
CPU_VID2
R3436 1K/F_4 R3436 1K/F_4
R3438 *1K/F_4 R3438 *1K/F_4
CPU_VID3
R3437 *1K/F_4 R3437 *1K/F_4
R3439 1K/F_4 R3439 1K/F_4
CPU_VID4
R3440 *1K/F_4 R3440 *1K/F_4 C3238
R3442 1K/F_4 R3442 1K/F_4
CPU_VID5
R3448 1K/F_4 R3448 1K/F_4
R3445 *1K/F_4 R3445 *1K/F_4
CPU_VID6
R3441 *1K/F_4 R3441 *1K/F_4
R3443 1K/F_4 R3443 1K/F_4
DPRSLPVR
R3452 1K/F_4 R3452 1K/F_4
R3450 *1K/F_4 R3450 *1K/F_4
VCCSENSE <35>
VSSSENSE <35>
+VCORE
R3129
R3129
100/F_4
100/F_4
R3134
R3134
100/F_4
100/F_4
CPU_VID0 <35>
CPU_VID1 <35>
CPU_VID2 <35>
CPU_VID3 <35>
CPU_VID4 <35>
CPU_VID5 <35>
CPU_VID6 <35>
H_VTTVID1 <34>
DPRSLPVR <35>
Zo=27.4/Space=50mil
Zo=27.4/Space=50mil
VTT_SENSE <34>
VSS_SENSE_VTT <34>
H_PSI# < 35>
I_MON <35>
H_VTTVID1
VTT_SENSE
VSS_SENSE_VTT
$
+1.8V
U3018F
U3018F
F68
PSI#
A61
VID[0]
D61
VID[1]
D62
VID[2]
A62
VID[3]
B63
VID[4]
D64
VID[5]
D66
VID[6]
AN1
VTT_SELECT[1]
F66
PROC_DPRSLPVR
A41
ISENSE
F64
VCC_SENSE
F63
VSS_SENSE
N13
VTT_SENSE
R12
VSS_SENSE_VTT
W39
C3368 10U/6.3V_6 C3368 10U/6.3V_6
C3369 4.7U/6.3V_6 C3369 4.7U/6.3V_6
C3366 2.2U/6.3V_6 C3366 2.2U/6.3V_6
C3271 1U/6.3V_4 C3271 1U/6.3V_4
C3257 1U/6.3V_4 C3257 1U/6.3V_4
VCCPLL1
W37
VCCPLL2
U37
VCCPLL3
R39
VCCPLL4
R37
VCCPLL5
1.8V
1.8V
SENSE LINES CPU VIDS
SENSE LINES CPU VIDS
1.1V RAIL POWER
1.1V RAIL POWER
POWER
POWER
$
MPZ2012S221A_8
MPZ2012S221A_8
L3017
+1.5V_CPU
L3017
C3122
C3122
1U/6.3V_4
1U/6.3V_4
BB14
VDDQ_CK[1]
BB12
VDDQ_CK[2]
IC,ARD_BGA,R1P0
IC,ARD_BGA,R1P0
A A
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Doc ument Number Rev
Size Doc u m ent Number Rev
Size Doc u m ent Number Rev
Custom
Custom
Custom
PROCESSER 3/7(POWER1)
PROCESSER 3/7(POWER1)
PROCESSER 3/7(POWER1)
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
1A
1A
1A
5
5
5
of
of
of
42 Tuesday, February 15, 2011
42 Tuesday, February 15, 2011
42 Tuesday, February 15, 2011
5
Max 22A
D D
C C
B B
A A
VTT Rail Values are
Auburndal VTT=1.05V
Clarksfield VTT=1.1V
+VGACORE_IGPU
Please note that +VCC_GFX_CORE
should be 1.05V in Arrandale
C3191
C3191
C3190
C3190
10U/6.3V_6
10U/6.3V_6
10U/6.3V_6
10U/6.3V_6
C3169
C3169
C3157
C3157
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C3215
C3215
C3201
C3201
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C3123
C3123
C3131
C3131
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C3163
C3163
C3124
C3124
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
+1.05V_VTT
+VCCTTG
C3422
C3422
1U/6.3V_4
1U/6.3V_4
9&$3
9&$3
9&$3
C3424
C3424
1U/6.3V_4
1U/6.3V_4
C3151
C3151
10U/6.3V_6
10U/6.3V_6
C3200
C3200
1U/6.3V_4
1U/6.3V_4
C3138
C3138
1U/6.3V_4
1U/6.3V_4
C3199
C3199
1U/6.3V_4
1U/6.3V_4
C3168
C3168
1U/6.3V_4
1U/6.3V_4
C3130
C3130
1U/6.3V_4
1U/6.3V_4
C3421
C3421
1U/6.3V_4
1U/6.3V_4
4
C3056
C3056
1U/6.3V_4
1U/6.3V_4
C3213
C3213
1U/6.3V_4
1U/6.3V_4
C3049
C3049
1U/6.3V_4
1U/6.3V_4
C3137
C3137
1U/6.3V_4
1U/6.3V_4
C3154
C3154
1U/6.3V_4
1U/6.3V_4
C3420
C3420
1U/6.3V_4
1U/6.3V_4
DISNAUMA
Ra 0 ohm
AN32
AN30
AN28
AN26
AN24
AN23
AN21
AN19
AL32
AL30
AL28
AL26
AL24
AL23
AL21
AL19
AK14
AK12
AJ10
AH14
AH12
AF28
AF26
AF24
AF23
AF21
AF19
AF17
AF15
AF14
AD28
AD26
AD24
AD23
AD21
AD19
AD17
W21
W19
AK62
AK60
AK59
AH60
AH59
AF60
AF59
AD60
AD59
AB60
AB59
AA60
AA59
W60
W59
C3423
C3423
1U/6.3V_4
1U/6.3V_4
Ra
U21
U19
U17
U15
U14
U12
R21
R19
R17
R15
U60
U59
R60
R59
R3032 *0_8 R3032 *0_8
U3018G
U3018G
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VTT1_1
VTT1_2
VTT1_3
VTT1_4
VTT1_5
VTT1_6
VTT1_7
VTT1_8
VTT1_9
VTT1_10
VTT1_11
VTT1_21
VCAP2_1
VCAP2_2
VCAP2_3
VCAP2_4
VCAP2_5
VCAP2_6
VCAP2_7
VCAP2_8
VCAP2_9
VCAP2_10
VCAP2_11
VCAP2_12
VCAP2_13
VCAP2_14
VCAP2_15
VCAP2_16
VCAP2_17
VCAP2_18
VCAP2_19
IC,ARD_BGA,R1P0
IC,ARD_BGA,R1P0
GRAPHICS
GRAPHICS
PEG & DMI
PEG & DMI
POWER
POWER
3
AF12
VAXG_SENSE
GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]
GFX_VR_EN
GFX_IMON
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
VDDQ22
VDDQ23
VDDQ24
VDDQ25
VDDQ26
VDDQ27
VDDQ28
VDDQ29
VDDQ30
VDDQ31
VDDQ32
VDDQ33
VDDQ34
VDDQ35
VDDQ36
VTT0_DDR
VTT0_DDR[1]
VTT0_DDR[2]
VTT0_DDR[3]
VTT0_DDR[4]
VTT0_DDR[5]
VTT0_DDR[6]
VTT0_DDR[7]
VTT0_DDR[8]
VTT0_DDR[9]
VTT1_12
VTT1_13
VTT1_14
VTT1_15
VTT1_16
VTT1_17
VTT1_18
VTT1_19
VTT1_20
AF10
AF71
AG67
AG70
AH71
AN71
AM67
AM70
AH69
AL71
AL69
BU40
BU35
BU28
BN38
BM25
BL30
BJ38
BH32
BH28
BG43
BF16
BF15
BD35
BD33
BD32
BD30
BD28
BD26
BD24
BD23
BD21
BD19
BD17
BD15
BB35
BB33
BB32
BB30
BB28
BB26
BB24
BB23
BB21
BB19
BB17
BB15
AW32
AW30
AW28
AW26
AW24
AW23
AW21
AW19
AW17
AW15
AD15
AD14
AD12
AB12
AA12
W17
W15
W14
W12
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
GFX_DPRSLPVR
GRAPHICS VIDs
GRAPHICS VIDs
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
GFX_VR_EN
Rd
Rf
Rc
Rd
Re
R3182 *1K/J_4 R3182 *1K/J_4
Rf
C3153
C3153
1U/6.3V_4
1U/6.3V_4
C3345
C3345
*10U/6.3V_6
*10U/6.3V_6
$
DISNAUMA
NA
NA
NA
R3451 4.7K_4 R3451 4.7K_4
$
C3127
C3127
1U/6.3V_4
1U/6.3V_4
C3206
C3206
1U/6.3V_4
1U/6.3V_4
C3121
C3121
10U/6.3V_6
10U/6.3V_6
2
4.7K NA Rc
0 ohm
0 ohm Re
VCC_AXG_SENSE <40>
VSS_AXG_SENSE <40>
GFXVR_VID_0 <40>
GFXVR_VID_1 <40>
GFXVR_VID_2 <40>
GFXVR_VID_3 <40>
GFXVR_VID_4 <40>
GFXVR_VID_5 <40>
GFXVR_VID_6 <40>
GFXVR_EN <40>
GFXVR_DPRSLPVR <40>
GFXVR_IMON <40>
C3119
C3119
1U/6.3V_4
1U/6.3V_4
C3186
C3186
C3344
C3344
10U/6.3V_6
10U/6.3V_6
10U/6.3V_6
10U/6.3V_6
C3116 0.1U/10V_4 C3116 0.1U/10V_4
+1.5VSUS
C3113 0.1U/10V_4 C3113 0.1U/10V_4
C3181
C3181
C3212
C3212
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C3141
C3141
C3214
C3214
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C3139
C3139
1U/6.3V_4
1U/6.3V_4
C3172
C3172
1U/6.3V_4
1U/6.3V_4
1 2
C3211
C3211
+
+
*330U/2.5V_3528
*330U/2.5V_3528
+1.05V_VTT
+1.05V_VTT
+1.5V_CPU
1
+VCORE <5,7,35>
+1.05V_VTT <3,5,13,14,31,34,35,36,40>
+1.5VSUS <3,15,16,36,37,38>
+1.8V <5,14,34>
+VGACORE_IGPU <40>
+1.5V_CPU <5>
+VCC TTG
for S3 power reduction
Q3010
Q3010
AON6718L
AON6718L
MAIND <38>
MAINON_G <15,38>
+1.5V_CPU +1.5V
2
1
Q3011 2N7002E Q3011 2N7002E
+1.5V_CPU
R394 *0_8/S R394 *0_8/S
3
R3127 220/F_4 R3127 220/F_4
+1.5VSUS
G
G
4
40mile routing
06
5
D
D
S
S
213
R3097
R3097
*0/F_2512
*0/F_2512
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Doc u m ent Number Rev
Size Doc u m ent Number Rev
Custom
Custom
Custom
PROCESSER 4/7(POWER2)
PROCESSER 4/7(POWER2)
PROCESSER 4/7(POWER2)
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
1A
1A
1A
6
6
6
of
of
of
42 Tuesday, February 15, 2011
42 Tuesday, February 15, 2011
42 Tuesday, February 15, 2011
5
+VCC0
+VCC2
XI
C3339
C3339
1U/6.3V_4
1U/6.3V_4
C3286
C3286
1U/6.3V_4
1U/6.3V_4
C3314
C3314
1U/6.3V_4
1U/6.3V_4
C3313
C3313
1U/6.3V_4
1U/6.3V_4
C3312
C3312
1U/6.3V_4
1U/6.3V_4
C3341
C3341
1U/6.3V_4
1U/6.3V_4
D D
C C
XI
C3273
C3273
C3283
C3283
C3236
C3236
1U/6.3V_4
1U/6.3V_4
C3235
C3235
1U/6.3V_4
1U/6.3V_4
B B
A A
1U/6.3V_4
1U/6.3V_4
C3262
C3262
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C3284
C3284
1U/6.3V_4
1U/6.3V_4
C3338
C3338
1U/6.3V_4
1U/6.3V_4
C3342
C3342
1U/6.3V_4
1U/6.3V_4
C3310
C3310
1U/6.3V_4
1U/6.3V_4
C3261
C3261
1U/6.3V_4
1U/6.3V_4
C3246
C3246
1U/6.3V_4
1U/6.3V_4
C3237
C3237
1U/6.3V_4
1U/6.3V_4
4
C3290
C3290
1U/6.3V_4
1U/6.3V_4
C3315
C3315
1U/6.3V_4
1U/6.3V_4
C3340
C3340
1U/6.3V_4
1U/6.3V_4
C3263
C3263
1U/6.3V_4
1U/6.3V_4
C3247
C3247
1U/6.3V_4
1U/6.3V_4
C3274
C3274
1U/6.3V_4
1U/6.3V_4
+VCC0
+VCC2
AW57
AW53
AW50
AW46
AW42
AW39
BD55
BD51
BD48
BB55
BB51
BB48
AY57
AY53
AY50
AU55
AU51
AU48
AR55
AR51
AR48
AN57
AN53
AN50
AL57
AL53
AL50
AK57
AK53
AK50
BD44
BD41
BD37
BB44
BB41
BB37
AY46
AY42
AY39
AU44
AU41
AU37
AR44
AR41
AR37
AN46
AN42
AN39
AL46
AL42
AL39
AK46
AK42
AK39
U3018H
U3018H
VCAP0_1
VCAP0_2
VCAP0_3
VCAP0_4
VCAP0_5
VCAP0_6
VCAP0_7
VCAP0_8
VCAP0_9
VCAP0_10
VCAP0_11
VCAP0_12
VCAP0_13
VCAP0_14
VCAP0_15
VCAP0_16
VCAP0_17
VCAP0_18
VCAP0_19
VCAP0_20
VCAP0_21
VCAP0_22
VCAP0_23
VCAP0_24
VCAP0_25
VCAP0_26
VCAP0_27
VCAP1_1
VCAP1_2
VCAP1_3
VCAP1_4
VCAP1_5
VCAP1_6
VCAP1_7
VCAP1_8
VCAP1_9
VCAP1_10
VCAP1_11
VCAP1_12
VCAP1_13
VCAP1_14
VCAP1_15
VCAP1_16
VCAP1_17
VCAP1_18
VCAP1_19
VCAP1_20
VCAP1_21
VCAP1_22
VCAP1_23
VCAP1_24
VCAP1_25
VCAP1_26
VCAP1_27
IC,ARD_BGA,R1P0
IC,ARD_BGA,R1P0
3
POWER
POWER
CPU CORE SUPPLY
CPU CORE SUPPLY
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86
VCC_87
VCC_88
VCC_89
AF57
AF55
AF53
AF51
AF50
AF48
AF46
AF44
AF42
AF41
AD55
AD51
AD48
AD44
AD41
AB55
AB51
AB48
AB44
AB41
AA55
AA51
AA48
AA44
AA41
W55
W51
W48
W44
W41
U55
U51
U48
U44
U41
R55
R51
R48
R44
R41
P60
N55
N51
N48
N44
N42
M60
M51
M44
L55
K60
K51
K44
J55
H60
H51
H44
G60
G55
G51
G44
F55
E60
E57
E53
E50
E46
E42
D59
D57
D55
D54
D52
D50
D48
D47
D45
D43
B60
B56
B53
B49
B46
B42
A57
A54
A50
A47
A43
+VCORE
C3267 10U/6.3V _6 C3267 10U/6.3V_6
C3297 10U/6.3V _6 C3297 10U/6.3V_6
C3330 10U/6.3V _6 C3330 10U/6.3V_6
C3296 10U/6.3V _6 C3296 10U/6.3V_6
C3266 10U/6.3V _6 C3266 10U/6.3V_6
C3331 10U/6.3V _6 C3331 10U/6.3V_6
C3268 10U/6.3V _6 C3268 10U/6.3V_6
C3298 10U/6.3V _6 C3298 10U/6.3V_6
C3332 10U/6.3V _6 C3332 10U/6.3V_6
C3333 10U/6.3V _6 C3333 10U/6.3V_6
C3099 10U/6.3V _6 C3099 10U/6.3V_6
C3106 10U/6.3V _6 C3106 10U/6.3V_6
C3336 10U/6.3V _6 C3336 10U/6.3V_6
C3048 10U/6.3V _6 C3048 10U/6.3V_6
C3094 10U/6.3V _6 C3094 10U/6.3V_6
C3104 10U/6.3V _6 C3104 10U/6.3V_6
C3044 10U/6.3V _6 C3044 10U/6.3V_6
C3351 10U/6.3V _6 C3351 10U/6.3V_6
C3334 10U/6.3V _6 C3334 10U/6.3V_6
C3335 10U/6.3V _6 C3335 10U/6.3V_6
C3299 10U/6.3V _6 C3299 10U/6.3V_6
C3301 10U/6.3V _6 C3301 10U/6.3V_6
C3300 10U/6.3V _6 C3300 10U/6.3V_6
C3111 0.1U/10V_4 C3111 0.1U/10V_4
C3108 0.1U/10V_4 C3108 0.1U/10V _4
+VCORE
C3065
C3065
1U/6.3V_4
1U/6.3V_4
C3061
C3061
1U/6.3V_4
1U/6.3V_4
C3270
C3270
1U/6.3V_4
1U/6.3V_4
C3039
C3039
1U/6.3V_4
1U/6.3V_4
C3071
C3071
1U/6.3V_4
1U/6.3V_4
C3068
C3068
1U/6.3V_4
1U/6.3V_4
C3060
C3060
1U/6.3V_4
1U/6.3V_4
C3772
C3772
1U/6.3V_4
1U/6.3V_4
C3035
C3035
1U/6.3V_4
1U/6.3V_4
C3776
C3776
1U/6.3V_4
1U/6.3V_4
2
C3067
C3067
1U/6.3V_4
1U/6.3V_4
C3064
C3064
1U/6.3V_4
1U/6.3V_4
C3063
C3063
1U/6.3V_4
1U/6.3V_4
C3059
C3059
1U/6.3V_4
1U/6.3V_4
C3780
C3780
1U/6.3V_4
1U/6.3V_4
C3774
C3774
1U/6.3V_4
1U/6.3V_4
C3075
C3075
1U/6.3V_4
1U/6.3V_4
C3081
C3081
1U/6.3V_4
1U/6.3V_4
C3078
C3078
1U/6.3V_4
1U/6.3V_4
C3087
C3087
1U/6.3V_4
1U/6.3V_4
C3771
C3771
1U/6.3V_4
1U/6.3V_4
C3036
C3036
1U/6.3V_4
1U/6.3V_4
C3092
C3092
1U/6.3V_4
1U/6.3V_4
C3066
C3066
1U/6.3V_4
1U/6.3V_4
C3750
C3750
1U/6.3V_4
1U/6.3V_4
1
+VCORE <5,35>
+VCC2
+VCC0
07
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Doc ument Number Rev
Size Doc u m ent Number Rev
Size Doc u m ent Number Rev
Custom
Custom
Custom
PROCESSER 5/7(POWER3)
PROCESSER 5/7(POWER3)
PROCESSER 5/7(POWER3)
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
1A
1A
1A
7
7
7
of
of
of
42 Tuesday, February 15, 2011
42 Tuesday, February 15, 2011
42 Tuesday, February 15, 2011
5
4
3
2
1
U3018E
U3018E
D D
CFG0
AL4
CFG[0]
AM2
CFG[1]
AK1
AW70
AK2
AK4
AJ2
AT2
AG7
AF4
AG2
AH1
AC2
AC4
AE2
AD1
AF8
AF6
AB7
AU1
T4
T2
U1
V2
AV71
AY69
BB69
D8
B7
A10
B9
C5
A6
E3
F1
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD_TP[0]
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD26
RSVD27
RSVD_NCTF[7]
RSVD_NCTF[8]
RSVD_NCTF[6]
RSVD_NCTF[5]
IC,ARD_BGA,R1P0
IC,ARD_BGA,R1P0
RSVD_NCTF[3]
RSVD_NCTF[4]
RSVD_NCTF[2]
RSVD_NCTF[1]
RESERVED
RESERVED
DC_TEST_BV71
DC_TEST_BV69
DC_TEST_BV68
DC_TEST_BV5
DC_TEST_BV3
DC_TEST_BV1
DC_TEST_BT71
DC_TEST_BT69
DC_TEST_BT3
DC_TEST_BT1
DC_TEST_BR71
DC_TEST_BR1
DC_TEST_E71
DC_TEST_C71
DC_TEST_C69
DC_TEST_A71
DC_TEST_A69
DC_TEST_A68
CFG3
CFG4
CFG7
C C
TP_RSVD17_R
TP_RSVD18_R
VSS_NCTF7
T3002T3002
VSS_NCTF8
T3003T3003
VSS_NCTF6
T3004T3004
VSS_NCTF5
B B
T3036T3036
VCAP0 Voltage Sense Rails
CPU_RSVD32
W66
RSVD32
CPU_RSVD33
W64
RSVD33
AC69
RSVD34
AC71
RSVD35
AA71
RSVD36
AA69
RSVD37
R66
RSVD38
R64
RSVD39
VSS_NCTF3
BT5
VSS_NCTF4
BR5
VSS_NCTF2
BV6
VSS_NCTF1
BV8
AV69
RSVD45
AK71
RSVD46
AN69
RSVD47
AP66
RSVD48
AH66
RSVD49
AK66
RSVD50
AR71
RSVD51
AM66
RSVD52
AK69
RSVD53
AU71
RSVD54
AT70
RSVD55
AR69
RSVD56
AU69
RSVD57
AT67
RSVD58
RSVD_TP2
AP2
RSVD_TP[2]
AN7
RSVD_TP[1]
AV4
RSVD62
AU2
RSVD63
RSVD64_R
BE69
RSVD64
RSVD65_R
BE71
RSVD65
BV71
BV69
BV68
T3047T3047
BV5
T3042T3042
BV3
BV1
BT71
BT69
BT3
BT1
BR71
T3051T3051
BR1
T3039T3039
E71
T3053T3053
E1
DC_TEST_E1
C71
C69
C3
DC_TEST_C3
DC_TEST_A5
Add for Daisy Chain function support
T3001T3001
A71
A69
A68
T3025T3025
A5
T3005T3005
T3049T3049
T3050T3050
T3041T3041
T3040T3040
T3043T3043
T3044T3044
T3038T3038
CFG0
R3349 3.01K/F_4 R3349 3.01K/F_4
CFG3
CFG4
CFG7
RSVD64_R
RSVD65_R
TP_RSVD17_R
TP_RSVD18_R
R3354 *3.01K/F_4 R3354 *3.01K/F_4
R3346 *3.01K/F_4 R3346 *3.01K/F_4
R3347 *3.01K/F_4 R3347 *3.01K/F_4
R3160 *0_4 R3160 *0_4
R3159 *0_4 R3159 *0_4
R3358 *0_4 R3358 *0_4
R3357 *0_4 R3357 *0_4
CFG[ 1:0 ] - PCI_Epress Configuration Select
* 11= 1 x 16 PEG
* 10= 2 x 8 PEG
10
CFG4
(Display Port Presence)
CFG0
(PCI-Epress Configuration Select)
CFG3
(PCI-Epress Static Lane Reversal)
The Clarkfield processor's PCI Express interface may
not meet PCI Express 2.0 jitter specifications. Intel
recommends placing a 3.01K +/- 5% pull down resistor to
VSS on CFG[7] pin for both rPGA and BGA components.
This pull down resistor should be removed when this
issue is fixed.
Disabled; No Physical Display Port
attached to Embedded Diplay Port
Single PEG
Normal O peration
Enabled; An external Display port device is
connected to the Embedded Display port
Bifurc ation enab l ed
Lane Numbers Reversed
15 -> 0 , 14 -> 1
08
A A
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Doc ument Number Rev
Size Doc u m ent Number Rev
Size Doc u m ent Number Rev
Custom
Custom
Custom
PROCESSER 6/7(CFG)
PROCESSER 6/7(CFG)
PROCESSER 6/7(CFG)
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
1A
1A
1A
8
8
8
of
of
of
42 Friday, January 14, 2011
42 Friday, January 14, 2011
42 Friday, January 14, 2011
5
ARRANDALE PROCESSOR (GND)
D D
C C
B B
A A
5
BU62
BU58
BU55
BU51
BU48
BU44
BU37
BU32
BU25
BU21
BU18
BU14
BU11
BP42
BN64
BM70
BM51
BM44
BM32
BM24
BM17
BL57
BL55
BL48
BL40
BL28
BL20
BK63
BK60
BK53
BK34
BK10
BH70
BH57
BH55
BH47
BH24
BH20
BH15
BG51
BG36
BF62
BF30
BF13
BE70
BE65
BD57
BD53
BD50
BD46
BD42
BD39
BD14
BB71
BB62
BB57
BB53
BB50
BB46
BB42
BB39
BA70
AY71
AY66
AY62
AY59
AY55
AY51
AY48
AR42
AR39
AR35
AR33
AR32
AR30
AR28
AR26
AR24
AR23
AR21
AR19
AR17
AR15
AR14
AP70
AP64
AN62
AN55
AY44
AY41
AY37
AY35
AY33
AY32
AY30
AY28
AY26
BU7
BN6
BJ64
BJ21
BJ9
BJ1
BF8
BE9
BE1
BB7
BB1
AR4
AR1
4
U3018I
U3018I
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
IC,ARD_BGA,R1P0
IC,ARD_BGA,R1P0
4
VSS
VSS
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
AY24
AY23
AY21
AY19
AY17
AY15
AY14
AY12
AY8
AY4
AW67
AW62
AW59
AW55
AW51
AW48
AW44
AW41
AW37
AV9
AV1
AU70
AU62
AU57
AU53
AU50
AU46
AU42
AU39
AU35
AU33
AU32
AU30
AU28
AU26
AU24
AU23
AU21
AU19
AU17
AU15
AU14
AU4
AT64
AT10
AR62
AR57
AR53
AR50
AR46
AN51
AN48
AN44
AN41
AN37
AN5
AN4
AM64
AM8
AL62
AL55
AL51
AL48
AL44
AL41
AL37
AL35
AL33
AL1
AK70
AK64
AK55
AK51
AK48
AK44
AK41
AK37
AK32
AK30
AK28
AK26
AK24
AK23
AK21
AK19
AK17
AK15
AJ70
AH62
AH57
AH55
BV66
BV64
BT68
BR69
BR68
BR3
BN71
BN1
BL71
BL1
R14
H71
F71
E69
E68
A66
A64
E5
C68
3
3
AH53
AH51
AH50
AH48
AH46
AH44
AH42
AH41
AH39
AH37
AH35
AH33
AH32
AH30
AH28
AH26
AH24
AH23
AH21
AH19
AH17
AH15
AG64
AF69
AF62
AE70
AE64
AD62
AD57
AD53
AD50
AD46
AD42
AC67
AC64
AC10
AB70
AB62
AB57
AB53
AB50
AB46
AB42
AB39
AB37
AB35
AB33
AB32
AB30
AB28
AB26
AB24
AB23
AB21
AB19
AB17
AB15
AB14
AA66
AA64
AA62
AA57
AA53
AA50
AA46
AA42
AA39
AA37
AA35
AA33
AA32
AA30
AA28
AA26
AA24
AA23
AA21
AA19
AH4
AG9
AG6
AF1
AD4
AC5
AC1
AB9
F20
F4
E37
E33
E30
E16
E12
D41
D38
D34
D31
D27
D24
D20
D17
D13
D10
D6
B65
B40
U3018J
U3018J
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS374
VSS375
VSS376
VSS377
VSS378
VSS379
VSS380
VSS381
VSS382
VSS383
VSS384
VSS385
VSS386
VSS387
VSS388
VSS389
VSS390
VSS391
VSS392
VSS415
IC,ARD_BGA,R1P0
IC,ARD_BGA,R1P0
VSS
VSS
VSS404
VSS405
VSS406
VSS407
VSS408
VSS409
VSS410
VSS411
VSS412
VSS413
VSS393
VSS394
VSS395
VSS396
VSS397
VSS398
VSS399
VSS400
VSS401
VSS402
VSS403
VSS288
VSS289
VSS290
VSS291
VSS292
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346
VSS347
VSS348
VSS349
VSS350
VSS351
VSS352
VSS353
VSS354
VSS355
VSS356
VSS357
VSS358
VSS359
VSS360
VSS361
VSS362
VSS363
VSS364
VSS365
VSS366
VSS367
VSS368
VSS369
VSS370
VSS371
VSS372
VSS373
2
A40
A36
A33
A29
A26
A22
A19
A15
A12
A8
B62
B58
B55
B51
B48
B44
A59
A55
A52
A48
A45
AA17
AA15
AA14
AA4
W69
W62
W57
W53
W50
W46
W42
W6
W1
V70
U64
U62
U57
U53
U50
U46
U42
U39
U9
U4
T1
R70
R62
R57
R53
R50
R46
R42
R5
P4
N63
N57
N53
N50
N46
N30
N21
N15
M53
M42
M36
M1
L70
L57
L48
L47
L13
K64
K53
K43
K36
K34
K32
K25
K17
K11
K6
K4
J65
J57
J48
J47
J40
J9
H53
H43
H36
H1
G70
G57
G53
G48
G47
G43
G30
G24
G20
G15
F61
F48
F47
F28
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1
09
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
PROCESSER 7/7(GND)
PROCESSER 7/7(GND)
PROCESSER 7/7(GND)
94 2 Thursday, January 13, 2011
94 2 Thursday, January 13, 2011
94 2 Thursday, January 13, 2011
of
of
1
of
1A
1A
1A
1
INTVRMEN - Integrated SUS 1.1V VRM Enable
High - Enable Internal VRs
2
3
4
5
6
7
8
10
C663 18P/50V_4 C663 18P/50V_4
2 3
A A
MV add for connect EC to PCH (GPIO33_E)
B B
+3V
C C
UMA HDMI signals
DPB_CTRL_CLK
DPB_CTRL_DATA
DPB_LANE0_N
DPB_LANE0_P
DPB_LANE1_N
DPB_LANE1_P
DPB_LANE2_N
DPB_LANE2_P
DPB_LANE3_N
DPB_LANE3_P
For AUDIO
D D
Y4
32.768KHZY432.768KHZ
4 1
C665 18P/50V_4 C665 18P/50V_4
R445 330K_6 R445 330K_6
+RTC_CELL
ACZ_SPKR <13,27>
ACZ_SDIN0 <27 >
R249 0_4 R249 0_4
GPIO33_E <13,31>
PCH_JTAG_TCK
TP12TP12
PCH_JTAG_TMS
TP10TP10
PCH_JTAG_TDI
TP9TP9
PCH_JTAG_TDO
TP8TP8
PCH_JTAG_RST#
TP1TP1
must add test point.
TP13TP13
1205 The SATALED# signal is
open-collector and requires a
weak external pull-up (8.2 k
to 10 k ) to +V3.3.
R411 10K_4 R411 10K_4
R223 10K_4 R223 10K_4
R410 10K_4 R410 10K_4
R251 *10K_4 R251 *10K_4
ACZ_RST#_AUDIO <27>
ACZ_SDOUT_AUDIO <27>
ACZ_SYNC_AUDIO <27>
BIT_CLK_AUDIO <27>
R459 *0_4/S R459 *0_4/S
R458 *0_4/S R458 *0_4/S
C474 0.1U/10V_4 C474 0.1U/10V_4
C478 0.1U/10V_4 C478 0.1U/10V_4
C471 0.1U/10V_4 C471 0.1U/10V_4
C472 0.1U/10V_4 C472 0.1U/10V_4
C480 0.1U/10V_4 C480 0.1U/10V_4
C482 0.1U/10V_4 C482 0.1U/10V_4
C465 0.1U/10V_4 C465 0.1U/10V_4
C467 0.1U/10V_4 C467 0.1U/10V_4
SATA_LED#
For MDC
1
IBEX PEAK-M (HDA,JTAG,SATA)
R444
R444
10M_4
10M_4
RTC_RST#
SRTC_RST#
SM_INTRUDER#
PCH_INVRMEN
ACZ_BCLK
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
PCH_GPIO33_R
SPI_CLK_R
SPI_CS0#_R
SPI_CS1#
SPI_SI_R
SPI_SO
SATA_DET0#
SATA_DET1#
GPIO33_E
10/25 PV modify
R452 33_4 R452 33_4
R450 33_4 R450 33_4
C666 *10P/50V_4 C666 *10P/50V_4
R451 33_4 R451 33_4
C667 *10P/50V_4 C667 *10P/50V_4
R453 33_4 R453 33_4
C464 *10P/50V_4 C464 *10P/50V_4
RTC_X1
RTC_X2
SDVO_CLK <2 3>
SDVO_DATA <23 >
IN_D2# <23>
IN_D2 <23>
IN_D1# <23>
IN_D1 <23>
IN_D0# <23>
IN_D0 <23>
IN_CLK# <23>
IN_CLK <23>
U24A
U24A
B13
RTCX1
D13
RTCX2
C14
RTCRST#
D17
SRTCRST#
A16
INTRUDER#
A14
INTVRMEN
A30
HDA_BCLK
D29
HDA_SYNC
P1
SPKR
C30
HDA_RST#
G30
HDA_SDIN0
F30
HDA_SDIN1
E32
HDA_SDIN2
F32
HDA_SDIN3
B29
HDA_SDO
H32
HDA_DOCK_EN# / GPIO33
J30
HDA_DOCK_RST# / GPIO13
M3
JTAG_TCK
K3
JTAG_TMS
K1
JTAG_TDI
J2
JTAG_TDO
J4
TRST#
BA2
SPI_CLK
AV3
SPI_CS0#
AY3
SPI_CS1#
AY1
SPI_MOSI
AV1
SPI_MISO
IbexPeak-M_Rev1_0
IbexPeak-M_Rev1_0
ACZ_RST#
ACZ_SDOUT
ACZ_SYNC
ACZ_BCLK
2
Ibex-M
Ibex-M
1 OF 10
1 OF 10
RTC
RTC
IHDA
IHDA
(+3V)
(+3V)
(+3V_S5)
(+3V_S5)
JTAG
JTAG
SPI
SPI
DPB_HPD_Q
1
R287
R287
R286 *0_4/S R286 *0_4/S
100K_4
100K_4
RTC
+3VPCU
+3VRTC_2 RTC_RST#
LPC
LPC
(+3V)
(+3V)
SATA
SATA
(+3V)
(+3V)
(+3V_S5)
(+3V_S5)
R433 51_4 R433 51_4
+3V
Q18
Q18
2
*2N7002K
*2N7002K
10/25 PV modify
+RTC_CELL
CR1 RB500V-40 CR1 RB500V-40
CR2 RB500V-40 CR2 RB500V-40
R254 1K_4 R254 1K_4
8/25 SI for M/E.
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
FWH4 / LFRAME#
LDRQ0#
LDRQ1# / GPIO23
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATALED#
SATA0GP / GPIO21
SATA1GP / GPIO19
PCH_JTAG_TCK
3
1mA
C438 1U/6.3 V_4 C438 1U/6.3V_4
R242 20K/F_4 R242 20K/F_4
R241 20K/F_4 R241 20K/F_4
R243 1M_4 R243 1M_4
+3VRTC_1
3
D33
B33
C32
A32
C34
A34
R230 10K_4 R230 10K_4
F34
AB9
AK7
AK6
AK11
AK9
AH6
AH5
AH9
AH8
AF11
AF9
AF7
AF6
AH3
AH1
AF3
AF1
AD9
AD8
AD6
AD5
AD3
AD1
AB3
AB1
AF16
SATA_COMP
AF15
SATA_LED#
T3
SATA_DET0#
Y9
SATA_DET1#
V1
HDMI_HPD_CON <23>
C428 1U/6.3V_4 C428 1U/6.3V_4
C429 1U/6.3V_4 C429 1U/6.3V_4
CN24
CN24
1 2
BAT_CONN
BAT_CONN
DFWF02MS022
DFWF02MS022
50273-0027N-001-2P-L
50273-0027N-001-2P-L
LAD0 <31,32>
LAD1 <31,32>
LAD2 <31,32>
LAD3 <31,32>
LFRAME# <31,32>
SATA_RXN0 <25>
SATA_RXP0 <25>
SATA_TXN0 <25>
SATA_TXP0 <2 5>
SATA_RXN4 <25>
SATA_RXP4 <25>
SATA_TXN4 <25>
SATA_TXP4 <2 5>
R237 37.4/F_4 R237 37.4/F_4
SATA_LED# <30>
R409 *0_4 R409 *0_4
SRTC_RST#
SM_INTRUDER#
+3V
SERIRQ <31>
HDD
ODD
+1.05V
ODD_PRSNT# <25>
For ES1 ONLY.NI for ES2.
For ES1 ONLY.NI for ES2.
4
UMA CRT,LVDS&HDMI signals
LVDS_BLON <22>
DISP_ON <22>
DPST_PWM <22>
EDIDCLK <22>
EDIDDATA <22>
R266 10K_4 R266 10K_4
R269 10K_4 R269 10K_4
+3V
R259 2.37K/F_4 R259 2.37K/F_4
TP7TP7
HDD0 (SATA3 6.0Gb/s)
TXLCLKOUT- <22>
TXLCLKOUT+ <22>
TXLOUT0- <22>
TXLOUT1- <22>
TXLOUT2- <22>
TXLOUT0+ <22>
TXLOUT1+ <22>
TXLOUT2+ <22>
TXUCLKOUT- <22>
TXUCLKOUT+ <22>
TXUOUT0- <22>
TXUOUT1- <22>
TXUOUT2- <22>
TXUOUT0+ <22 >
TXUOUT1+ <22 >
HSYNC_COM <24>
VSYNC_COM <24>
R192
R192
20K/F_4
20K/F_4
PCH_JTAG_RST#
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TMS
R197
R197
10K_4
10K_4
Part
Part Number
Part Description
TXUOUT2+ <22 >
R455 150/F_4 R455 150/F_4
R457 150/F_4 R457 150/F_4
R456 150/F_4 R456 150/F_4
R272 1K/F_4 R272 1K/F_4
100_4
100_4
R415
R415
200_4
200_4
R414
R414
+3VS5
200_4
200_4
100_4
100_4
CRT_B <24>
CRT_G <24>
CRT_R <24>
DDCCLK <24>
DDCDATA <24>
R413
R413
R416
R416
200_4
200_4
R412
R412
R436
R436
100_4
100_4
4M byte SPI ROM
U22
U22
1
+3V
R422 10K_4 R422 10K_4
C659 0.1U/10V_4 C659 0.1U/10V_4
SPI_HOLD#
5
8
CE#
VDD
6
SCK
5
SI
2
7
SO
HOLD#
3
4
WP#
VSS
W25Q32BVSSIG
W25Q32BVSSIG
AKE391P0N00
AKE391P0N00
IC FLASH(8P) W25Q32BVSSIG(SO IC)
IC FLASH(8P) W25Q32BVSSIG(SO IC)
IBEX PEAK-M (LVDS,DDI)
U24D
U24D
T48
L_BKLTEN
T47
L_VDD_EN
Y48
L_BKLTCTL
AB48
L_DDC_CLK
Y45
DAC_IREF
SPI_CS0#_R
SPI_CLK_R
SPI_SI_R
SPI_SO
R440 10K_4 R440 10K_4
+3V <2,3,11,12,13,14,15,16,17,19,22,23,24,25,26,27,29,30,31,32,35,36,38>
6
AB46
V48
AP39
AP41
AT43
AT42
AV53
AV51
BB47
BA52
AY48
AV47
BB48
BA50
AY49
AV48
AP48
AP47
AY53
AT49
AU52
AT53
AY51
AT48
AU50
AT51
AA52
AB53
AD53
V51
V53
Y53
Y51
AD48
AB51
IbexPeak-M_Rev1_0
IbexPeak-M_Rev1_0
L_DDC_DATA
L_CTRL_CLK
L_CTRL_DATA
LVD_IBG
LVD_VBG
LVD_VREFH
LVD_VREFL
LVDS--A
LVDS--A
LVDSA_CLK#
LVDSA_CLK
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDS--B
LVDS--B
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN
CRT
CRT
+3V
L_CTRL_CLK
L_CTRL_DATA
LVDS_IBG
LVDS_VBG
SPI_WP#
+1.05V <2,11,12,14,41>
+3VPCU <22,30,31,33,39>
Ibex-M
Ibex-M
4 OF 10
4 OF 10
SDVO
SDVO
DISPLAY PORT B DISPLAY PORT C DISPLAY PORT D
DISPLAY PORT B DISPLAY PORT C DISPLAY PORT D
Digital Display Interface
Digital Display Interface
Vender
Socket
DG008000031
EON - EN25F32-100HIP
AKE39FN0Q00
WINBOND - W25Q32BVSSIG
AKE391P0N00
7
BJ46
SDVO_TVCLK INN
BG46
SDVO_TVCLK INP
BJ48
SDVO_STALLN
BG48
SDVO_STALLP
BF45
SDVO_INTN
BH45
SDVO_INTP
DPB_CTRL_CLK
T51
SDVO_CTRLCLK
SDVO_CTRL DATA
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
T53
BG44
BJ44
AU38
BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38
Y49
AB49
BE44
BD44
AV40
BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36
U50
U52
BC46
BD46
AT38
BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36
DPB_CTRL_DATA
DPB_HPD_Q
DPB_LANE0_N
DPB_LANE0_P
DPB_LANE1_N
DPB_LANE1_P
DPB_LANE2_N
DPB_LANE2_P
DPB_LANE3_N
DPB_LANE3_P
IC FLASH(8P) EN25F32-100HIP (SOIC)
IC FLASH(8P) W25Q32BVSSIG(SOIC)
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
PCH 1/5 (SATA,HDA,LPC)
PCH 1/5 (SATA,HDA,LPC)
PCH 1/5 (SATA,HDA,LPC)
Date: Sheet
Date: Sheet
Date: Sheet
TP16TP16
TP15TP15
1A
1A
1A
of
of
of
10 42 Tuesday, February 15, 2011
10 42 Tuesday, February 15, 2011
10 42 Tuesday, February 15, 2011
8
5
4
3
2
1
IBEX PEAK-M (GND)
U24I
U24I
AY7
VSS[159]
B11
VSS[160]
B15
VSS[161]
B19
VSS[162]
B23
VSS[163]
B31
VSS[164]
B35
VSS[165]
B39
D D
C C
B B
A A
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BC10
BC14
BC18
BC22
BC32
BC36
BC40
BC44
BC52
BD48
BD49
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BF49
BF51
BG18
BG24
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
AF39
B43
B47
B7
BB5
BC2
BH9
BD5
BE6
BE8
BF3
BG4
BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48
E6
E8
F49
F5
G10
G14
G18
G2
G22
G32
G36
G40
G44
G52
H16
H20
H30
H34
H38
H42
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
IbexPeak-M_Rev1_0
IbexPeak-M_Rev1_0
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]
H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14
5
PCIE_CLKREQ_WLAN#
CLK_PCIE_REQ2#
PCIE_CLK_REQ0#
PCIE_CLKREQ_LAN#
PCIE_CLK_REQ4#
PCIE_CLK_REQB#_R
PCIE_CLK_REQ5#
PEG_CLKREQ#
SMB_CLK_ME1
SMB_DATA_ME1
PDAT_SMB
PCLK_SMB
R429 10K_4 R429 10K_4
R198 10K_4 R198 10K_4
R231 10K_4 R231 10K_4
R215 10K_4 R215 10K_4
R193 10K_4 R193 10K_4
R240 10K_4 R240 10K_4
R217 10K_4 R217 10K_4
R417 *10K_4 R417 *10K_4
Ra
R418 *10K_4 R418 *10K_4
Rb
Ra: UMA
Rb: Muxless
Q36 2N7002E Q36 2N7002E
3
2
+3V
2
Q37
Q37
3
Q12 2N7002E Q12 2N7002E
3
2
+3V
2
Q13 2N7002E Q13 2N7002E
3
2N7002E
2N7002E
+3V
+3VS5
1
R446
R446
2.2K_4
2.2K_4
R448
R448
2.2K_4
2.2K_4
1
1
R191
R191
10K_4
10K_4
R190
R190
10K_4
10K_4
1
4
[WLAN]
[LAN]
Cardreader
MiniWLAN
LAN
MBCLK2 <16,31>
MBDATA2 <16,31>
CGDAT_SMB <2,15,16>
CGCLK_SMB <2,15,16>
PCIE_RXN1 <32>
PCIE_RXP1 <32>
PCIE_TXN1 <32>
PCIE_TXP1 <32>
PCIE_RXN2_LAN <29>
PCIE_RXP2_LAN <29>
PCIE_TXN2_LAN <29>
PCIE_TXP2_LAN <29>
PCIE_RXN3_CARD <26>
PCIE_RXP3_CARD <26>
PCIE_TXN3_CARD <26>
PCIE_TXP3_CARD <26>
CLK_PCIE_WLANN <32>
CLK_PCIE_WLANP <32>
PCIE_CLKREQ_WLAN# <32>
CLK_PCIE_CARDN <26>
CLK_PCIE_CARDP <26>
CLK_PCIE_REQ2# <26>
CLK_PCIE_LANN <29>
CLK_PCIE_LANP <29>
PCIE_CLKREQ_LAN# <29>
C450 0.1U/10V_4 C450 0.1U/10V_4
C449 0.1U/10V_4 C449 0.1U/10V_4
C458 0.1U/10V_4 C458 0.1U/10V_4
C459 0.1U/10V_4 C459 0.1U/10V_4
C460 0.1U/10V_4 C460 0.1U/10V_4
C461 0.1U/10V_4 C461 0.1U/10V_4
PLT_R ST-R# <12>
3
PCIE_RXN2_LAN
PCIE_RXP2_LAN
PCIE_TXN3_CARD_C
PCIE_TXP3_CARD_C
PCIE_CLK_REQ0#
PCIE_CLK_REQ4#
PCIE_CLK_REQ5#
PCIE_CLK_REQB#_R
*MC74VHC1G08DFT2G
*MC74VHC1G08DFT2G
PLT_R ST-R#
R439
R439
100K_4
100K_4
IBEX PEAK-M (PCI-E,SMBUS,CLK)
U24B
PCIE_RXN1
PCIE_RXP1
PCIE_TXN1_C
PCIE_TXP1_C
PCIE_TXN2_C
PCIE_TXP2_C
BG30
BJ30
BF29
BH29
AW30
BA30
BC30
BD30
AU30
AT30
AU32
AV32
BA32
BB32
BD32
BE32
BF33
BH33
BG32
BJ32
BA34
AW34
BC34
BD34
AT34
AU34
AU36
AV36
BG34
BJ34
BG36
BJ36
AK48
AK47
P9
AM43
AM45
U4
AM47
AM48
N4
AH42
AH41
A8
AM51
AM53
M9
AJ50
AJ52
H6
AK53
AK51
P13
+3VS5
U21
U21
2
1
3 5
R423 *0_4/S R423 * 0_4/S
10/25 PV modify
U24B
PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5
PERN6
PERP6
PETN6
PETP6
PERN7
PERP7
PETN7
PETP7
PERN8
PERP8
PETN8
PETP8
CLKOUT_PCIE0N
CLKOUT_PCIE0P
PCIECLKRQ0# / GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P
PCIECLKRQ1# / GPIO18
CLKOUT_PCIE2N
CLKOUT_PCIE2P
PCIECLKRQ2# / GPIO20
CLKOUT_PCIE3N
CLKOUT_PCIE3P
PCIECLKRQ3# / GPIO25
CLKOUT_PCIE4N
CLKOUT_PCIE4P
PCIECLKRQ4# / GPIO26
CLKOUT_PCIE5N
CLKOUT_PCIE5P
PCIECLKRQ5# / GPIO44
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
PEG_B_CLKRQ# / GPIO56
IbexPeak-M_Rev1_0
IbexPeak-M_Rev1_0
PCI-E*
PCI-E*
C658
C658
*0.1U/10V_4
*0.1U/10V_4
4
Ibex-M
Ibex-M
2 OF 10
2 OF 10
(+3V_S5)
(+3V_S5)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
PLTRST# <3,17,26,29,31,32>
R421
R421
*100K_4
*100K_4
+1.05V <2,10,12,14,41>
2
SMBus
SMBus
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
Controller
Controller
Link
Link
PEG
PEG
(+3V_S5)
(+3V_S5)
CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
+3V <2,3,10,12,13,14,15,16,17,19,22,23,24,25,26,27,29,30,31,32,35,36,38>
SMBALERT# / GPIO11
SMBCLK
SMBDATA
SML0ALERT# / GPIO60
SML0CLK
SML0DATA
SML1ALERT# / GPIO74
SML1CLK / GPIO58
SML1DATA / GPIO75
CL_CLK1
CL_DATA1
CL_RST1#
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_BCLK_N
CLKIN_BCLK_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P
REFCLK14IN
CLKIN_PCILOOPBACK
From CLK BUFFER
From CLK BUFFER
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
Clock Flex
Clock Flex
UMA only
XTAL25_IN
XTAL25_OUT
SMBALERT#
B9
PCLK_SMB
H14
PDAT_SMB
C8
SMBL0ALERT#
J14
SMB_CLK_ME0
C6
SMB_DATA_ME0
G8
SML1ALERT#
M14
SMB_CLK_ME1
E10
SMB_DATA_ME1
G12
T13
T11
T9
PEG_CLKREQ#
H1
AD43
AD45
AN4
AN2
AT1
AT3
AW24
BA24
AP3
AP1
F18
E18
AH13
AH12
P41
CLK_PCI_FB
J42
XTAL25_IN
AH51
XTAL25_OUT
AH53
XCLK_RCOMP
AF38
CLK_FLEX0
T45
CLK_FLEX1
P43
CLK_FLEX2
T42
CLK_FLEX3 CLK_FLEX3
N50
R454
R454
1M_4
1M_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
DREFSSCLK# <3>
DREFSSCLK <3>
CLK_BUF_PCIE_3GPLL# <2>
CLK_BUF_PCIE_3GPLL <2>
CLK_BUF_BCLK_N <2>
CLK_BUF_BCLK_P <2>
CLK_BUF_DREFCLK# <2>
CLK_BUF_DREFCLK <2>
CLK_BUF_DREFSSCLK# <2>
CLK_BUF_DREFSSCLK <2>
C473 *5.6P/50V_4 C473 *5.6P/50V_4
CLK_PCI_FB <12>
R262 90.9/F_4 R262 90.9/F_4
Y5
25MHZY525MHZ
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
PCH 2/5 (PCIE, SMBUS, CK)
PCH 2/5 (PCIE, SMBUS, CK)
PCH 2/5 (PCIE, SMBUS, CK)
+3VS5
R442 10K_4 R442 10K_4
R189 2.2K_4 R189 2.2K_4
R208 2.2K_4 R208 2.2K_4
R238 10K_4 R238 10K_4
R229 2.2K_4 R229 2.2K_4
R212 2.2K_4 R212 2.2K_4
R239 10K_4 R239 10K_4
R216 4.7K_4 R216 4.7K_4
R227 4.7K_4 R227 4.7K_4
PEG_CLKREQ# <17>
CLK_PCIE_VGA# <17>
CLK_PCIE_VGA <17>
CLK_PCIE_3GPLL# <3>
CLK_PCIE_3GPLL <3>
+1.05V
T36T3 6
T35T3 5
T34T3 4
T37T3 7
C668 27P/50V_4 C668 27P/50V_4
8/25 SI for TXC.
C669 33P/50V_4 C669 33P/50V_4
11 42 Tuesday, February 15, 2011
11 42 Tuesday, February 15, 2011
11 42 Tuesday, February 15, 2011
1
11
CLK_ICH_14M <2>
DIS only
of
of
of
1A
1A
1A
1
2
3
4
5
6
7
8
SLP_M#
AC_PRESENT_R
PCH_SUSCLK_L
SLP_S5#
PM_BATLOW#
+3V
+3VS5
12
TP4TP4
12 42 Tuesday, February 15, 2011
12 42 Tuesday, February 15, 2011
12 42 Tuesday, February 15, 2011
8
FDI_TXN0 <3>
FDI_TXN1 <3>
FDI_TXN2 <3>
FDI_TXN3 <3>
FDI_TXN4 <3>
FDI_TXN5 <3>
FDI_TXN6 <3>
FDI_TXN7 <3>
FDI_TXP0 <3>
FDI_TXP1 <3>
FDI_TXP2 <3>
FDI_TXP3 <3>
FDI_TXP4 <3>
FDI_TXP5 <3>
FDI_TXP6 <3>
FDI_TXP7 <3>
FDI_INT < 3>
FDI_FSYNC0 <3>
FDI_FSYNC1 <3>
FDI_LSYNC0 <3>
FDI_LSYNC1 <3>
SUSB# <31>
SUSC# <31>
SUS_PWR_ACK <31>
CLKRUN# <31>
SLP_S5 <31>
1A
1A
1A
of
of
of
IBEX PEAK-M (DMI,FDI,GPIO)
U24C
U24C
DMI_COMP
PCH_PWROK
PM_RI#
CLKRUN#
XDP_DBRESET#
RSMRST#
RSV_ICH_LAN_RST#
PCH_PWROK
BT_COMBO_EN#
AW20
BC24
BD24
BG22
BA20
BG20
BE22
BD20
BE18
BD22
BH21
BC20
BD18
BH25
BJ22
BJ20
BF21
BF25
T6
M6
B17
K5
A10
D9
C16
P5
F14
J12
BJ10
DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN
DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
DMI_ZCOMP
DMI_IRCOMP
System Power Management
System Power Management
SYS_RESET#
SYS_PWROK
PWROK
MEPWROK
LAN_RST#
DRAMPWROK
RSMRST#
PWRBTN#
RI#
WAKE#
PMSYNCH
IbexPeak-M_Rev1_0
IbexPeak-M_Rev1_0
R425 8.2K_4 R425 8.2K_4
R236 10K_4 R236 10K_4
R443 10K_4 R443 10K_4
R447 10K_4 R447 10K_4
R260 *1K_4 R260 *1K_4
AC_PRESENT_R
+1.05V <2,10,11,14,41>
+3V <2,3,10,11,13,14,15,16,17,19,22,23,24,25,26,27,29,30,31,32,35,36,38>
+3VS5 <3,10,11,13,14,17,28,33,34,36,38,40>
6
DMI_RXN0 <3>
PM_DRAM_PWRGD <3>
XDP_DBRESET# <3>
DNBSWON# <31>
PCIE_WAKE# < 29,32>
5
DMI_RXN1 <3>
DMI_RXN2 <3>
DMI_RXN3 <3>
DMI_RXP0 <3>
DMI_RXP1 <3>
DMI_RXP2 <3>
DMI_RXP3 <3>
DMI_TXN0 <3>
DMI_TXN1 <3>
DMI_TXN2 <3>
DMI_TXN3 <3>
DMI_TXP0 <3>
DMI_TXP1 <3>
DMI_TXP2 <3>
DMI_TXP3 <3>
+1.05V
R247 49.9/F_4 R247 49.9/F_4
R200 *0_4/S R200 *0_4/S
R199 *0_4 R199 *0_4
RSMRST# <31>
PM_SYNC <3>
10/25 PV modify
RSV_ICH_LAN_RST#
R194 *0_4/S R194 * 0_4/S
A A
+3V
RP5
RP5
6
5
PCI_STOP#
PCI_IRDY#
PCI_PIRQA#
PCI_PIRQC#
+3VS5
USB_OC4#
USB_OC5#
USB_OC6# USB_OC3#
USB_OC7#
+3V
PCI_DEVSEL#
PCI_TRDY# PCI_PIRQB#
B B
INTH#
C C
CLK_33M_DEBUG <32>
CLK_33M_KBC <31>
CLK_PCI_FB <11>
D D
4
3
2
1
10P8R-8.2K
10P8R-8.2K
RP2
RP2
5
4
3
2
1
10P8R-8.2K
10P8R-8.2K
RP6
RP6
5
4
3
2
1
10P8R-8.2K
10P8R-8.2K
CLK_33M_KBC
1
BT_COMBO_EN# <32>
8/25 SI for H/W.
C673
C673
*5.6P/50V_4
*5.6P/50V_4
7
8
9
10
6
7
8
9
10
6
7
8
9
10
GNT0# <13>
GNT1# <13>
GNT3# <13>
PCI_SERR# <31>
PLT_RST-R# <11>
R460 33_4 R460 33_4
R462 33_4 R462 33_4
R274 22_4 R274 22_4
IBEX PEAK-M (PCI,USB,NVRAM)
U24E
U24E
H40
Ibex-M
Ibex-M
AD0
N34
5 OF 10
5 OF 10
AD1
C44
PCI_PIRQD#
REQ1#
PCI_SERR#
PCI_FRAME#
USB_OC0#
USB_OC1#
USB_OC2#
PCI_PLOCK#
PCI_PERR# REQ3#
REQ0#
TP2TP2
+3V
+3VS5
+3V
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
REQ0#
REQ1#
REQ2#
REQ3#
PIRQE#
PIRQF#
PIRQG#
INTH#
PCI_SERR#
PCI_PERR#
PCI_IRDY#
PCI_DEVSEL#
PCI_FRAME#
PCI_PLOCK#
PCI_STOP#
PCI_TRDY#
PME#
PLT_R ST-R#
CLK_33M_DEBUG_R
CLK_33M_KBC_R
CLK_PCI_FB_C
A38
C36
J34
A40
D45
E36
H48
E40
C40
M48
M45
F53
M40
M43
J36
K48
F40
C42
K46
M51
J52
K51
L34
F42
J40
G46
F44
M47
H36
J50
G42
H47
G34
G38
H51
B37
A44
F51
A46
B45
M53
F48
K45
F36
H53
B41
K53
A36
A48
K6
E44
E50
A42
H44
F46
C46
D49
D41
C48
M7
D5
N52
P53
P46
P51
P48
2
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE0#
C/BE1#
C/BE2#
C/BE3#
PIRQA#
PIRQB#
PIRQC#
PIRQD#
REQ0#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54
GNT0#
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55
PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5
PCIRST#
SERR#
PERR#
IRDY#
PAR
DEVSEL#
FRAME#
PLOCK#
STOP#
TRDY#
PME#
PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
IbexPeak-M_Rev1_0
IbexPeak-M_Rev1_0
PCI
PCI
(+5V)
(+5V)
(+5V)
(+5V)
(+5V)
(+5V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+5V)
(+5V)
(+5V)
(+5V)
(+5V)
(+5V)
(+5V)
(+5V)
NVRAM
NVRAM
NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15
USB
USB
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3
NV_DQS0
NV_DQS1
NV_ALE
NV_CLE
NV_RCOMP
NV_RB#
NV_WR#0_RE#
NV_WR#1_RE#
NV_WE#_CK0
NV_WE#_CK1
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
3
AY9
BD1
AP15
BD8
AV9
BG8
AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6
BD3
AY6
AU2
AV7
AY8
AY5
AV11
BF5
H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24
B25
D25
N16
J16
F16
L16
E14
G16
F12
T15
USB_BIAS
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#
USBP0- <28>
USBP0+ <28>
USBP1- <28>
USBP1+ <28>
USBP4- <22>
USBP4+ <22>
USBP8- <28>
USBP8+ <28>
USBP10- <32>
USBP10+ <32>
USBP2- <28>
USBP2+ <28>
R449 22.6/F_4 R449 22.6/F_4
>&d^/h^ηϬ
>&d^/h^ηϭ
tĞďĐĂŵ
ydh^ηϯ
Z
ůƵĞƚŽŽƚŚ
4
IMVP_PWRGD <35>
SI Modify
Change Port2 to Port4
Change Port4 to Port12
change Port5 to Port13
t>E
EC_PWROK <31>
Ibex-M
Ibex-M
3 OF 10
3 OF 10
DMI FDI
DMI FDI
(+3V_S5)
(+3V_S5)
SUS_PWR_DN_ACK / GPIO30
(+3V_S5)
(+3V_S5)
(+3V)
(+3V)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
10/25 PV modify
PCH_SUSCLK_L
R438 *0_4/S R438 *0_4/S
+3V
PM_RI#
PM_BATLOW#
PCIE_WAKE#
SUS_PWR_ACK
AC_PRESENT_R
R201 *0_4 R201 *0_4
ACPRESENT / GPIO31
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
BATLOW# / GPIO72
SLP_LAN# / GPIO29
REQ2#
PIRQE#
PIRQF#
PIRQG#
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
7
BA18
FDI_RXN0
BH17
FDI_RXN1
BD16
FDI_RXN2
BJ16
FDI_RXN3
BA16
FDI_RXN4
BE14
FDI_RXN5
BA14
FDI_RXN6
BC12
FDI_RXN7
BB18
FDI_RXP0
BF17
FDI_RXP1
BC16
FDI_RXP2
BG16
FDI_RXP3
AW16
FDI_RXP4
BD14
FDI_RXP5
BB14
FDI_RXP6
BD12
FDI_RXP7
BJ14
FDI_INT
BF13
FDI_FSYNC0
BH13
FDI_FSYNC1
BJ12
FDI_LSYNC0
BG14
FDI_LSYNC1
P12
SLP_S3#
H7
SLP_S4#
K8
SLP_M#
N2
TP23
M1
P7
Y1
P8
F3
E4
A6
F6
PCH_SUSCLK <31>
R268 8.2K_4 R268 8.2K_4
R267 8.2K_4 R267 8.2K_4
R461 8.2K_4 R461 8.2K_4
R257 8.2K_4 R257 8.2K_4 R220 1K_4 R220 1K_4
R233 10K_4 R233 10K_4
R441 10K_4 R441 10K_4
R211 1K_4 R211 1K_4
R209 10K_4 R209 10K_4
R210 10K_4 R210 10K_4
AC_PRESENT <31>
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
PCH 3/5 (PCI,ONFI,USB,DMI)
PCH 3/5 (PCI,ONFI,USB,DMI)
PCH 3/5 (PCI,ONFI,USB,DMI)
1
SIO_EXT_SMI# <31>
SIO_EXT_SCI# <31>
TP3TP3
BT_OFF# <28,32>
A A
DGPU_PWROK <17,19,31>
GPIO27 left NC for
internal VR.
DGPU_PWR_EN <36>
GPIO49 <26>
10/25 PV modify
DGPU_HOLD_RST# <17>
10/25 PV modify
PCIE_CLK_REQ7# <3>
10/25 PV modify
RF_OFF# <32>
R264 0_4 R264 0_4
UMA remove
TP6TP6
R420 *0_4/S R420 *0_4/S
UMA remove
LCD_BK <22>
R434 *0_4/S R434 *0_4/S
R258 *0_4/S R258 *0_4/S
UMA remove
PCIE_CLK_REQ7#
8/25 SI for H/W.
B B
+3VS5
R235 10K_4 R235 10K_4
C C
80$
31R12MB0000 (PIM)
31R12MB0010 (PDT)00
6H\PRXU;7
+\QL[
31R12MB0020 (PIM)
31R12MB0030 (PDT)
6DPVXQJ
31R12MB0040 (PIM)
31R12MB0050 (PDT)
+\QL[*
31R12MB0060 (PIM)
31R12MB0070 (PDT)
6DPVXQJ*
31R12MB0080 (PIM)
31R12MB0090 (PDT)
TP_PCH_GPIO28
1
1
1
10
1
1
1
1
2
IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)
U24F
BMBUSY#
PCH_GPIO7
LAN_DISABLE_R#
PCH_GPIO17
BIOS_REC
GPIO27
TP_PCH_GPIO28
SATA2GP
SATA3GP
LCD_BK
SV_SET_UP
SATA5GP
PCH_GPIO35
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
U24F
Y3
BMBUSY# / GPIO0
C38
TACH1 / GPIO1
D37
TACH2 / GPIO6
J32
TACH3 / GPIO7
F10
(+3V_S5)
(+3V_S5)
GPIO8
K9
LAN_PHY_PWR_CTRL / GPIO12
T7
GPIO15
(+3V_S5)
(+3V_S5)
F38
TACH0 / GPIO17
Y7
SCLOCK / GPIO22
AB12
GPIO27
(+3V_S5)
(+3V_S5)
V13
(+3V_S5)
(+3V_S5)
GPIO28
AB7
SATA2GP / GPIO36
AB13
SATA3GP / GPIO37
P3
SDATAOUT0 / GPIO39
F1
PCIECLKRQ7# / GPIO46
AB6
SDATAOUT1 / GPIO48
AA4
SATA5GP / GPIO49
V6
SATACLKREQ# / GPIO35
H10
GPIO24
H3
PCIECLKRQ6# / GPIO45
F8
GPIO57
M11
STP_PCI# / GPIO34
AA2
SATA4GP / GPIO16
V3
SLOAD / GPIO38
A4
VSS_NCTF_1
A49
VSS_NCTF_2
A5
VSS_NCTF_3
A50
VSS_NCTF_4
A52
VSS_NCTF_5
A53
VSS_NCTF_6
B2
VSS_NCTF_7
B4
VSS_NCTF_8
B52
VSS_NCTF_9
B53
VSS_NCTF_10
BE1
VSS_NCTF_11
BE53
VSS_NCTF_12
BF1
VSS_NCTF_13
BF53
VSS_NCTF_14
BH1
VSS_NCTF_15
IbexPeak-M_Rev1_0
IbexPeak-M_Rev1_0
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
,' ,' ,' ,' 50%31 ,' ,'
000000000
000
0
0
000
0
000
0
0
0
000
0
0
0 0000000
0
000
0
0
0 000
0
0
3
Ibex-M
Ibex-M
6 OF 10
6 OF 10
GPIO
GPIO
MISC
MISC
(+3V_S5)
(+3V_S5)
CLKOUT_BCLK0_N/CLKOUT_PCIE8N
CLKOUT_BCLK0_P/CLKOUT_PCIE8P
(+3V)
(+3V)
(+3V_S5)
(+3V_S5)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
NCTF
NCTF
CPU
CPU
RSVD
RSVD
CLKOUT_PCIE6N
CLKOUT_PCIE6P
CLKOUT_PCIE7N
CLKOUT_PCIE7P
PROCPWRGD
THRMTRIP#
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
BIOS RECOVERY
HIGH : DISABLE
LOW : ENABLE
%RDUG,'
80$
80$',6
'LV
5HVHUYH
5HVHUYH
5HVHUYH
5HVHUYH
BOARD_ID1姕ㆸHIGHẋ堐Rockey 1.1
AH45
AH46
AF48
AF47
U2
A20GATE
AM3
AM1
BG10
PECI
T1
RCIN#
BE10
BD10
BA22
TP1
AW22
TP2
BB22
TP3
AY45
TP4
AY46
TP5
AV43
TP6
AV45
TP7
AF13
TP8
M18
TP9
N18
TP10
AJ24
TP11
AK41
TP12
AK42
TP13
M32
TP14
N32
TP15
M30
TP16
N30
TP17
H12
TP18
AA23
TP19
AB45
NC_1
AB38
NC_2
AB42
NC_3
AB41
NC_4
T39
NC_5
P6
INIT3_3V#
C10
TP24
BH2
BH52
BH53
BJ1
BJ2
BJ4
BJ49
BJ5
BJ50
BJ52
BJ53
D1
D2
D53
E1
E53
R222 10K_4 R222 10K_4
4
EC_A20GATE <31>
CLK_CPU_BCLK# < 3>
EC_RCIN#
EC_A20GATE
SATA2GP
PCH_GPIO35
SATA3GP
SATA5GP
BMBUSY#
SIO_EXT_SMI#
SIO_EXT_SCI#
BT_OFF#
LCD_BK
PCH_GPIO17
RF_OFF# BIOS_REC
LAN_DISABLE_R#
,' ,'
1R
<HV
CLK_CPU_BCLK < 3>
H_PECI <3>
EC_RCIN# <31>
H_PWRGOOD <3>
PM_THRMTRIP# <3,31>
8/25 SI for H/W.
R203 10K_4 R203 10K_4
R426 10K_4 R426 10K_4
R224 *10K_4 R224 *10K_4
R205 10K_4 R205 10K_4
R234 10K_4 R234 10K_4
R435 10K_4 R435 10K_4
R427 10K_4 R427 10K_4
R261 10K_4 R261 10K_4
R263 10K_4 R263 10K_4
R255 10K_4 R255 10K_4
R432 10K_4 R432 10K_4
R265 10K_4 R265 10K_4
R221 1K_4 R221 1K_4
R196 10K_4 R196 10K_4
,' ,' ,' ,'
*3,2 *3,2 *3,2 *3,2 *3,2 *3,2
1R
<HV
PCH_PECI_R
PCH_THRMTRIP#_R
R232 56.2/F_4 R232 56.2/F_4
+1.05V_VTT
R228 56.2/F_4 R228 56.2/F_4
+3V +3VS5
1R
<HV
1R
<HV
5
+3V
+3VS5
58 5'
R207 10K_4 R207 10K_4
58
R419 10K_4 R419 10K_4
58
+3V
58
R202 *10K_4 R202 *10K_4
58
R424 *10K_4 R424 *10K_4
58
R428 *10K_4 R428 *10K_4
8/25 SI for H/W.
6
IBEX PEAK-M (GND)
U24H
AB16
AA19
AA20
AA22
AM19
AA24
AA26
AA28
AA30
AA31
AA32
AB11
AB15
AB23
AB30
AB31
AB32
AB39
AB43
AB47
AB5
AB8
AC2
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AD7
AE2
AE4
AF12
Y13
AH49
AU4
AF35
AP13
AN34
AF45
AF46
AF49
AF5
AF8
AG2
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AH7
AJ19
AJ2
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AT5
AJ4
AK12
AM41
AN19
AK26
AK22
AK23
AK28
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
U24H
VSS[0]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
IbexPeak-M_Rev1_0
IbexPeak-M_Rev1_0
R206 *10K_4 R206 *10K_4
R437 *10K_4 R437 *10K_4
R213 10K_4 R213 10K_4 R214 *10K_4 R214 *10K_4
R218 10K_4 R218 10K_4
R204 10K_4 R204 10K_4
R431 10K_4 R431 10K_4
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
5'
5'
5'
5'
5'
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47
7
GNT3# <12>
A16 swap override Strap/Top-Block
Swap Override jumper
GNT3#
SV_SET_UP
Low = A16 swap
override/Top-Block
Swap Override enabled
High = Default
R464 *10K_4 R464 *10K_4
R219 10K_4 R219 10K_4
8
13
SV_SET_UP 1-X High = Strong (Default)
GNT0#
GNT0# <12>
GNT1# <12>
Boot BIOS Strap
PCI_GNT0# GNT#1
00
0
1
11
Danbury Technology Enabled
NV_ALE
R271 *1K_4 R271 *1K _4
GNT1#
R463 *1K_4 R463 *1K _4
Boot BIOS Location
LPC
Reserved (NAND)
1
PCI
0
SPI
High = Enable
Low = Disable
DMI Termination Voltage
Set to Vcc when LOW
NV_CLE
Set to Vcc/2 when HIGH
No Reboot Strap
ACZ_SPKR <10,27>
GPIO33_E <10,31>
R430 *1K_4 R430 *1K_4
R253 *100K_4 R253 *100K_4
+1.05V_VTT <3,5,6,14,31,34,35,36,40>
+1.8V <5,14,34>
+3V <2,3,10,11,12,14,15,16,17,19,22,23,24,25,26,27,29,30,31,32,35,36,38>
+3VS5 <3,10,11,12,14,17,28,33,34,36,38,40>
+3V
+3V
D D