HP dv4-ICH9-VGA Schematics

A

www.kythuatvitinh.com

1 1

B

C

D

E

Compal confidential

Schematics Document

2 2

Mobile Penryn uFCPGA with Intel
Cantiga_PM+ICH9-M core logic

2008-02-25

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

LA-4102P Blade discrete

D

Date: Sheet of

Cover Sheet

E

153Monday, February 25, 2008

0.4

A

www.kythuatvitinh.com

Digitally signed by dd
DN: cn=dd, o=dd, ou=dd,
email=[e-mail], c=US
Date: 2009.11.12 09:18:54 +07'00'

Compal confidential

B

C

Montevina Consumer Discrete

D

E

CK505

1 1

TV out

Dock connecter

2 2

CRT

P40

VRAM DDR2
128/512MB

page 23,24

64bits

Nvidia
NB9M-GE

P20,21,22

LVDS Panel
Interface

CRT

Support V1.3

HDMI

Discrete

P19

P18

P42

Thermal Sensor
EMC1402

Fan conn

P6

P6

DMI X4

PCI-E BUS*5

Flash Memory Card
Controller

P31

JMB385

7 in1 Slot

P32

P32

Touch Pad CONN.

B

P30

P30

Mini-Card*2

WLAN & Robson

Realtek
811C(Gbe)

RJ45/11 CONN

3 3

LED

P39

RTC CKT.

P26

New Card

P31

FPR Conn

Power On/Off CKT.

4 4

DC/DC Interface CKT.

P41

A

Touch Screen Conn

Mobile Penryn

uFCPGA-478 CPU

P6,7, 8

H_A#(3..35)
H_D#(0..63)

FSB

667/800/1066 MHz 1.05V

DDR2 667MHz 1.8V

Intel Cantiga MCH

FCBGA 1329

P9, 10, 11, 12, 13, 14

C-Link

Azalia

Intel ICH9-M

mBGA-676

P25,26,27,28

LPC BUS

ENE

KB926

P39

SPI

SPI ROM
25LF080A

P37

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

SATA Master-1

SATA Slave
SATA Slave

P38

Int.KBD

P38

2008/02/25 2008/02/25

Clock Generator
SLG8SP553V

Dual Channel

USB2.0 X12

Compal Secret Data

Deciphered Date

72QFN

P17

DDR2 SO-DIMM X2

BANK 0, 1, 2, 3

USB conn x3

BT Conn

USB Camera

Audio CKT AMP & Audio Jack

Codec_IDT9271B7

MDC

SATA HDD Connector

SATA ODD Connector

e-SATA Connector
With 3'th USB

P15, 16

P36

P36

P19

P33 P35

P34

P29

P29

P29

TPA6017A2

Capsense switch Conn

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

LA-4102P Blade discrete

D

Date: Sheet of

Block Diagram

E

Dock

P40

CIR Conn

P39

253Monday, February 25, 2008

P35

0.4

A

www.kythuatvitinh.com

X MEANS

Voltage Rails

State

S0

S1

S3

S5 S4/AC

S5 S4/ Battery only
S5 S4/AC & Battery

don't exist

1 1

power
plane

O MEANS ON

+B

SMBUS Control Table

SOURCE

INVERTER BATT

SMB_EC_CK1
SMB_EC_DA1
SMB_EC_CK2
SMB_EC_DA2
ICH_SMBCLK
ICH_SMBDATA

KB926

KB926

ICH9

X V
XXXXX

OFF

+5VS
+3VS
+1.5VS
+0.9V
+VCCP
+CPU_CORE
+2.5VS
+1.8VS
+NVVDD
+PCIE

O
O

X
X
X
X

MINI CARD

X

X

X

X

X

XX

VVV

Sensor board

V

X

NB9M

Thermal
Sensor

X

V

X

NB9M

X

V

X

G-sensor

X
X

V

Thermal
Sensor

+1.8V

O
O
O

X
X
X

SODIMM CLK CHIP

+5VALW

+3VALW

O
O
O
O
O

O
O
O
O

X
XX

SERIAL
EEPROM

V

V

XXX

Symbol Note :

: means Digital Ground

: means Analog Ground

@ : means just reserve , no build
DEBUG@ : means just reserve for
debug.

USB assignment:

USB-0 Right side
USB-1 Right side
USB-2 Left side(with ESATA)
USB-3 Dock
USB-4 Camera
USB-5 WLAN
USB-6 Bluetooth
USB-7 Finger Printer
USB-8 MiniCard(WWAN/TV)
USB-9 Express card
USB-10 X
USB-11 X

PCIe assignment:

PCIe-1 TV tuner/WWAN/Robeson
PCIe-2 X
PCIe-3 WLAN
PCIe-4 GLAN (Marvell)
PCIe-5 Card reader
PCIe-6 New Card

NB9M SMBUS Control Table

DDC2_DATA
DDC2_CLK
3VDDCDA
3VDDCCL
HDMIDAT_VGA
HDMICLK_VGA

SOURCE LVDS CRT

V

NB9M
NB9M

X

NB9M

X

XX

V

X

HDMI

X

V

I2C / SMBUS ADDRESSING

DEVICE

DDR SO-DIMM 0
DDR SO-DIMM 1
CLOCK GENERATOR (EXT.)

HEX

A0

D2

ADDRESS

1 0 1 0 0 0 0 0
1 0 1 0 0 1 0 0A4
1 1 0 1 0 0 1 0

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

A

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

LA-4102P Blade discrete

Date: Sheet of

Notes List

353Monday, February 25, 2008

0.4

5

www.kythuatvitinh.com

1A

D D

VIN

AC

C C

B+

7A

B B

3.7 X 3=11.1V

+V_BATTERY Dock con

0.3A

INVPWR_B+

2A

B++

DC BATT

B+++

A A

5

CPU_B+ +VCC_CORE

0.27A

+NVVDDP +NVVDD

0.19A

+1.1V_PCIE +PCIE

10mA2A

12.11A1.9A

4

LVDS CON

1.7A

4

+3VALW

+1.5VS

+5VALW

+1.8V

2.2A0.3A

1.3A0.58A

4.7A

34A/1.025V

2.725A

2A/1.1V

177mA

300mA

60mA

20mA

10mA

657mA

1.56A

360mA

3.7A

8 A

50mA

+VCCP

CPU

NB9M (VGA)

NB9M (VGA)

3

2

ICH9

LAN

+3VAUX_BT

+3VALW_EC

550mA

SPI ROM

JMB385

ICH_VCC1_5
ICH9

5.39A5.89A

+3VS

ICH9

+5VS

NB9M (VGA)

MCH

DDR2 800Mhz 4G x2

+0.9V

3

1.17A

1.26A

2.3A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

ICH9

MCH

CPU

2008/02/25 2008/02/25

35mA

10mA

1.8A

700mA

1.8A

Compal Secret Data

Deciphered Date

2

50mA

50mA

25mA

35mA

1A

1A

278mA

1.5A

250mA

390mA

1A

+VDDA
IDT 9271B7

+5VAMP

ODD

SATA

Muti Bay

1

Finger printer

PC Camera

+3VS_DVDD
ALC268

MDC 1.5

New card

Mini card (WLAN)

ICH9

+LCDVDD

LVDS CON

+3VS_CK505

NB9M (VGA)

Mini card (TV tu/WWAN/Robeson)

Compal Electronics, Inc.

Title

Size Document Number Rev

C
Date: Sheet

Power delivery

LA-4102P Blade discrete

of

453Monday, February 25, 2008

1

0.4

A

www.kythuatvitinh.com

1 1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

A

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

LA-4102P Blade discrete

Date: Sheet of

Power sequence

553Monday, February 25, 2008

0.4

5

www.kythuatvitinh.com

4

3

2

1

#PV follow check list ver:1.5 change to 51 ohm

ITP-XDP Connector

JP1

1

D D

H_A#[3..16]9

H_ADSTB#09

H_REQ#09
H_REQ#19
H_REQ#29
H_REQ#39
H_REQ#49

H_A#[17..35]9

C C

H_ADSTB#19

H_A20M#26

H_FERR#26

H_IGNNE#26
H_STPCLK#26

H_INTR26
H_NMI26
H_SMI#26

B B

H_PROCHOT# OCP#

A A

H_IERR#

+VCCP

12

@

R17
56_0402_5%

B

2

E

3 1

C

Q1

@

MMBT3904_NL_SOT23-3

+VCCP

R18
56_0402_5%

1 2

5

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_ADSTB#0

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_ADSTB#1

H_A20M#
H_FERR#
H_IGNNE#

H_STPCLK#
H_INTR
H_NMI
H_SMI#

J4
L5
L4

K5
M3
N2

J1
N3

P5

P2

L2

P4

P1
R1
M1

K3
H2

K2

J3

L1

Y2
U5
R3
W6
U4

Y5
U1
R4

T5

T3
W2
W5

Y4
U2

V4
W3

AA4
AB2
AA3

V1

A6

A5
C4

D5
C6

B4

A3
M4

N5

T2

V3

B2
D2

D22

D3

F6

OCP# 27

JCPU1A

A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#

REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#

A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#

A20M#
FERR#
IGNNE#

STPCLK#
LINT0
LINT1
SMI#

RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]

Penryn

ADDR GROUP_0

ADDR GROUP_1

ICH

ADS#
BNR#
BPRI#

DEFER#

DRDY#
DBSY#

IERR#

LOCK#

CONTROL

RESET#

RS[0]#
RS[1]#
RS[2]#
TRDY#

HITM#

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#

PRDY#
PREQ#

TRST#

DBR#

XDP/ITP SIGNALS

THERMAL

PROCHOT#

THERMDA
THERMDC

THERMTRIP#

H CLK

BCLK[0]
BCLK[1]

RESERVED

H_ADS#

H1

H_BNR#

E2

H_BPRI#

G5

H_DEFER#

H5

H_DRDY#

F21

H_DBSY#

E1

H_BR0#

F1

BR0#

H_IERR#

D20

H_INIT#

B3

INIT#

H_LOCK#

H4

H_RESET#

C1

H_RS#0

F3

H_RS#1

F4

H_RS#2

G3

H_TRDY#

G2

H_HIT#

G6

HIT#

H_HITM#

E4

XDP_BPM#0

AD4

XDP_BPM#1

AD3

XDP_BPM#2

AD1

XDP_BPM#3

AC4

XDP_BPM#4

AC2

XDP_BPM#5

AC1

XDP_TCK

AC5

TCK

XDP_TDI

AA6

TDI

XDP_TDO

AB3

TDO

XDP_TMS

AB5

TMS

XDP_TRST#

AB6

XDP_DBRESET#

C20

H_PROCHOT#

D21
A24

H_THERMDC_R

B25

H_THERMTRIP#

C7

CLK_CPU_BCLK

A22

CLK_CPU_BCLK#

A21

For Merom, R14 and R15 are 0ohm
For Penryn, R14 and R15 are 100ohm.

ZZZ1

PCB

H_ADS# 9
H_BNR# 9

H_BPRI# 9

H_DEFER# 9
H_DRDY# 9
H_DBSY# 9

H_BR0# 9

H_INIT# 26
H_LOCK# 9
H_RESET# 9

H_RS#0 9

H_RS#1 9

H_RS#2 9

H_TRDY# 9

H_HIT# 9
H_HITM# 9

R13 56_0402_1%
R14 100_0402_5%

R15 100_0402_5%

H_THERMTRIP# 9,26

CLK_CPU_BCLK 17
CLK_CPU_BCLK# 17

4

@

T1

Place TP with a
GND 0.1" away

H_PWRGOOD7,26 CLK_CPU_XDP 17

#PV follow check list ver:1.5 change to 56 ohm

XDP_DBRESET# 27

1 2
1 2

1 2

H_THERMDA, H_THERMDC routing together,
Trace width / Spacing = 10 / 10 mil

+VCCP

H_THERMDAH_THERMDA_R
H_THERMDC

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Removed at 5/30.(Follow
Chimay)

3

XDP_BPM#5
XDP_BPM#4

XDP_BPM#3
XDP_BPM#2

XDP_BPM#1
XDP_BPM#0

R9
1K_0402_5%

H_PWRGOOD_R

12

XDP_HOOK1

12

C1 0.1U_0402_16V4Z

XDP_TCK

PWM Fan Control circuit

2008/02/25 2008/02/25

GND0

3

OBSFN_A0

5

OBSFN_A1

7

GND2

9

OBSDATA_A0

11

OBSDATA_A1

13

GND4

15

OBSDATA_A2

17

OBSDATA_A3

19

GND6

21

OBSFN_B0

23

OBSFN_B1

25

GND8

27

OBSDATA_B0

29

OBSDATA_B1

31

GND10

33

OBSDATA_B2

35

OBSDATA_B3

37

GND12

39

PWRGOOD/HOOK0

41

HOOK1

43

VCC_OBS_AB

45

HOOK2

47

HOOK3

49

GND14

51

SDA

53

SCL

55

TCK1

57

TCK0

59

GND16

C3

1 2

+3VS

FAN_PWM38

Compal Secret Data

Deciphered Date

+3VS

1

2

0.1U_0402_16V4Z

2200P_0402_50V7K

R16

1 2

10K_0402_5%

RB751V_SOD323

SAMTE_BSH-030-01-L-D-ACONN@

C2

H_THERMDA
H_THERMDC
THERM#

2

OBSFN_C0
OBSFN_C1

OBSDATA_C0
OBSDATA_C1

OBSDATA_C2
OBSDATA_C3

OBSFN_D0
OBSFN_D1

OBSDATA_D0
OBSDATA_D1

OBSDATA_D2
OBSDATA_D3

ITPCLK/HOOK4

ITPCLK#/HOOK5

VCC_OBS_CD

RESET#/HOOK6

DBR#/HOOK7

+5VS

D1

2

1

G

3

4 5

2

GND1

4
6
8

GND3

10
12
14

GND5

16
18
20

GND7

22
24
26

GND9

28
30
32

GND11

34
36
38

GND13

40
42
44
46
48
50

GND15

52

TD0

54

TRST#

56

TDI

58

TMS

60

GND17

U1

1

VDD

2

DP

3

DN
THERM#4GND

EMC1402-1-ACZL-TR_MSOP8

Address:100_1100

2 1

6

D

Q2

S

SI3456BDV-T1-E3_TSOP6

XDP_DBRESET#_R

XDP_TDI
XDP_TMS
XDP_TDO
XDP_BPM#5
XDP_HOOK1
XDP_TRST#
XDP_TCK

CLK_CPU_XDP
CLK_CPU_XDP#

H_RESET#_R

XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
XDP_PRE

Place R191 within 200ps (~1") to CPU

#PV follow check list ver:1.5 change to 0 ohm

SMCLK

SMDATA

ALERT#

1

C4

4.7U_0805_10V4Z

2

+FAN

Title

Size Document Number Rev

Custom

LA-4102P Blade discrete

Date: Sheet of

R1

@

1 2

Change value in 5/02

R2 51_0402_1%

1 2

R3 51_0402_1%

1 2

R4 51_0402_1%

1 2

R5 51_0402_1%

1 2

R6 54.9_0402_1%@

1 2

R7 51_0402_1%

1 2

R8 51_0402_1%

1 2

This shall place near CPU

+VCCP+VCCP

R10 1K_0402_1%

1 2

R11 0_0402_1%

12

R12
0_0402_5%

1 2

SMB_EC_CK2

8

SMB_EC_DA2

7
6
5

1

C5

0.1U_0402_16V4Z

2

12

D2

@

RLZ5.1B_LL34

Compal Electronics, Inc.

Penryn(1/3)-AGTL+/ITP-XDP

1K_0402_5%

CLK_CPU_XDP# 17

SMB_EC_CK2 21,38
SMB_EC_DA2 21,38

JP2

1
2
3
4

ACES_88231-02001

$SI change lib

1

1
2
G1
G2

+3VS

+VCCP

H_RESET#
XDP_DBRESET#XDP_DBRESET#_R

653Monday, February 25, 2008

0.4

5

www.kythuatvitinh.com

4

3

2

1

H_D#[0..15]9

D D

H_DSTBN#09
H_DSTBP#09
H_DINV#09
H_D#[16..31]9

C C

* Route the TEST3 and TEST5 signals through
a ground referenced Zo = 55-ohm trace that
ends in a via that is near a GND via and is
accessible through an oscilloscope
connection.

B B

H_DSTBN#19
H_DSTBP#19
H_DINV#19

R21 1K_0402_5%@

1 2

R22 1K_0402_5%@

1 2

CPU_BSEL017
CPU_BSEL117
CPU_BSEL217

CPU_BSEL CPU_BSEL2 CPU_BSEL1

166

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DSTBN#0
H_DSTBP#0
H_DINV#0

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_DSTBN#1
H_DSTBP#1
H_DINV#1

+V_CPU_GTLREF

TEST1
TEST2
TEST3

T2

TEST4

@

T3

TEST5

@

T4

TEST6

T5

TEST7

T6

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

01

200

266

A A

0000

JCPU1B

E22

D[0]#

F24

D[1]#

E26

D[2]#

G22

D[3]#

F23

D[4]#

G25

D[5]#

E25

D[6]#

E23

D[7]#

K24

D[8]#

G24

D[9]#

J24

D[10]#

J23

D[11]#

H22

D[12]#

F26

D[13]#

K22

D[14]#

H23

D[15]#

J26

DSTBN[0]#

H26

DSTBP[0]#

H25

DINV[0]#

N22

D[16]#

K25

D[17]#

P26

D[18]#

R23

D[19]#

L23

D[20]#

M24

D[21]#

L22

D[22]#

M23

D[23]#

P25

D[24]#

P23

D[25]#

P22

D[26]#

T24

D[27]#

R24

D[28]#

L25

D[29]#

T25

D[30]#

N25

D[31]#

L26

DSTBN[1]#

M26

DSTBP[1]#

N24

DINV[1]#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

AF26

TEST4

AF1

TEST5

A26

TEST6

C3

TEST7

B22

BSEL[0]

B23

BSEL[1]

C21

BSEL[2]

Penryn

MISC

DATA GRP 0

DATA GRP 1

DATA GRP 2DATA GRP 3

DSTBN[2]#
DSTBP[2]#

DINV[2]#

DSTBN[3]#
DSTBP[3]#

DINV[3]#
COMP[0]

COMP[1]
COMP[2]
COMP[3]

DPRSTP#

DPSLP#
DPWR#

PWRGOOD

D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#

D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#

H_D#32

Y22

H_D#33

AB24

H_D#34

V24

H_D#35

V26

H_D#36

V23

H_D#37

T22

H_D#38

U25

H_D#39

U23

H_D#40

Y25

H_D#41

W22

H_D#42

Y23

H_D#43

W24

H_D#44

W25

H_D#45

AA23

H_D#46

AA24

H_D#47

AB25

H_DSTBN#2

Y26

H_DSTBP#2

AA26

H_DINV#2

U22

H_D#48

AE24

H_D#49

AD24

H_D#50

AA21

H_D#51

AB22

H_D#52

AB21

H_D#53

AC26

H_D#54

AD20

H_D#55

AE22

H_D#56

AF23

H_D#57

AC25

H_D#58

AE21

H_D#59

AD21

H_D#60

AC22

H_D#61

AD23

H_D#62

AF22

H_D#63

AC23

H_DSTBN#3

AE25

H_DSTBP#3

AF24

H_DINV#3

AC20

COMP0

R26

COMP1

U26

COMP2

AA1

COMP3

Y1

H_DPRSTP#

E5

H_DPSLP#

B5

H_DPWR#

D24

H_PWRGOOD

D6

H_CPUSLP#

D7

SLP#

H_PSI#

AE6

PSI#

CPU_BSEL0

1

10

H_D#[32..47] 9

H_DSTBN#2 9
H_DSTBP#2 9
H_DINV#2 9
H_D#[48..63] 9

H_DSTBN#3 9
H_DSTBP#3 9
H_DINV#3 9

H_DPRSTP# 9,26,49
H_DPSLP# 26
H_DPWR# 9
H_PWRGOOD 6,26
H_CPUSLP# 9
H_PSI# 49

R24

R23

R25

12

12

12

27.4_0402_1%

54.9_0402_1%

54.9_0402_1%

Resistor placed within 0.5"
of CPU pin.Trace should be
at least 25 mils away from
any other toggling signal.
COMP[0,2] trace width is 18
mils. COMP[1,3] trace width
is 4 mils.

+VCCP

12

R27
1K_0402_1%

+V_CPU_GTLREF

Close to CPU pin AD26
within 500mils.

12

R29
2K_0402_1%

+VCC_CORE +VCC_CORE

R26

12

27.4_0402_1%

JCPU1C

A7

VCC[001]

A9

VCC[002]

A10

VCC[003]

A12

VCC[004]

A13

VCC[005]

A15

VCC[006]

A17

VCC[007]

A18

VCC[008]

A20

VCC[009]

B7

VCC[010]

B9

VCC[011]

B10

VCC[012]

B12

VCC[013]

B14

VCC[014]

B15

VCC[015]

B17

VCC[016]

B18

VCC[017]

B20

VCC[018]

C9

VCC[019]

C10

VCC[020]

C12

VCC[021]

C13

VCC[022]

C15

VCC[023]

C17

VCC[024]

C18

VCC[025]

D9

VCC[026]

D10

VCC[027]

D12

VCC[028]

D14

VCC[029]

D15

VCC[030]

D17

VCC[031]

D18

VCC[032]

E7

VCC[033]

E9

VCC[034]

E10

VCC[035]

E12

VCC[036]

E13

VCC[037]

E15

VCC[038]

E17

VCC[039]

E18

VCC[040]

E20

VCC[041]

F7

VCC[042]

F9

VCC[043]

F10

VCC[044]

F12

VCC[045]

F14

VCC[046]

F15

VCC[047]

F17

VCC[048]

F18

VCC[049]

F20

VCC[050]

AA7

VCC[051]

AA9

VCC[052]

AA10

VCC[053]

AA12

VCC[054]

AA13

VCC[055]

AA15

VCC[056]

AA17

VCC[057]

AA18

VCC[058]

AA20

VCC[059]

AB9

VCC[060]

AC10

VCC[061]

AB10

VCC[062]

AB12

VCC[063]

AB14

VCC[064]

AB15

VCC[065]

AB17

VCC[066]

AB18

VCC[067]

Penryn

AB20

VCC[068]

AB7

VCC[069]

AC7

VCC[070]

AC9

VCC[071]

AC12

VCC[072]

AC13

VCC[073]

AC15

VCC[074]

AC17

VCC[075]

AC18

VCC[076]

AD7

VCC[077]

AD9

VCC[078]

AD10

VCC[079]

AD12

VCC[080]

AD14

VCC[081]

AD15

VCC[082]

AD17

VCC[083]

AD18

VCC[084]

AE9

VCC[085]

AE10

VCC[086]

AE12

VCC[087]

AE13

VCC[088]

AE15

VCC[089]

AE17

VCC[090]

AE18

VCC[091]

AE20

VCC[092]

AF9

VCC[093]

AF10

VCC[094]

AF12

VCC[095]

AF14

VCC[096]

AF15

VCC[097]

AF17

VCC[098]

AF18

VCC[099]

AF20

VCC[100]

G21

VCCP[01]

V6

VCCP[02]

J6

VCCP[03]

K6

VCCP[04]

M6

VCCP[05]

J21

VCCP[06]

K21

VCCP[07]

M21

VCCP[08]

N21

VCCP[09]

N6

VCCP[10]

R21

VCCP[11]

R6

VCCP[12]

T21

VCCP[13]

T6

VCCP[14]

V21

VCCP[15]

W21

VCCP[16]

B26

VCCA[01]

C26

VCCA[02]

AD6

VID[0]

AF5

VID[1]

AE5

VID[2]

AF4

VID[3]

AE3

VID[4]

AF3

VID[5]

AE2

VID[6]

AF7

VCCSENSE

AE7

VSSSENSE

.

Length match within 25 mils.
The trace width/space/other is 20/7/25.

+VCCPA

1 2

+VCCPB

1 2

VCCSENSE

VSSSENSE

+VCC_CORE

R28 100_0402_1%

1 2

R30 100_0402_1%

1 2

Close to CPU pin within
500mils.

R19

R20

0_0402_5%
0_0402_5%

CPU_VID0 49
CPU_VID1 49
CPU_VID2 49
CPU_VID3 49
CPU_VID4 49
CPU_VID5 49
CPU_VID6 49

VCCSENSE 49

VSSSENSE 49

+VCCP

VCCSENSE

VSSSENSE

1

+

C6
330U_D2E_2.5VM_R7

2

1

C7

2

10U_0805_6.3V6M

1

C8

2

0.01U_0402_16V7K

Near pin B26

+1.5VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Penryn(2/3)-AGTL+/ITP-XDP

Size Document Number Rev

Custom

LA-4102P Blade discrete

2

Date: Sheet of

753Monday, February 25, 2008

1

0.4

5

www.kythuatvitinh.com

4

3

2

1

+VCC_CORE

1

Place these capacitors on
L8 (North side,Secondary
Layer)

D D

C C

B B

JCPU1D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080]
VSS[081]P3VSS[162]

Penryn

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]

VSS[163]

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

.

Place these capacitors on
L8 (North side,Secondary
Layer)

Place these capacitors on
L8 (North side,Secondary
Layer)

Place these capacitors on
L8 (North side,Secondary
Layer)

Mid Frequence Decoupling

Near CPU CORE regulator

+VCC_CORE

C41

330U_D2E_2.5VM_R7

+VCCP

1

C45

0.1U_0402_10V6K

2

C9
10U_0805_6.3V6M

2

+VCC_CORE

1

C17
10U_0805_6.3V6M

2

+VCC_CORE

1

C25
10U_0805_6.3V6M

2

+VCC_CORE

1

C33
10U_0805_6.3V6M

2

1

1

+

C42

<BOM Structure>

2

2

@

330U_D2E_2.5VM_R7

Inside CPU center cavity in 2 rows

1

C46

0.1U_0402_10V6K

2

1

C10
10U_0805_6.3V6M

2

1

C18
10U_0805_6.3V6M

2

1

C26
10U_0805_6.3V6M

2

1

C34
10U_0805_6.3V6M

2

ESR <= 1.5m ohm
Capacitor > 1980uF

1

1

+

+

+

C44

C43

2

330U_D2E_2.5VM_R7

1

C47

0.1U_0402_10V6K

2

2

1

2

1

2

1

2

1

2

330U_D2E_2.5VM_R7

1

C48

0.1U_0402_10V6K

2

C11
10U_0805_6.3V6M

C19
10U_0805_6.3V6M

C27
10U_0805_6.3V6M

C35
10U_0805_6.3V6M

1

C12
10U_0805_6.3V6M

2

1

C20
10U_0805_6.3V6M

2

1

C28
10U_0805_6.3V6M

2

1

C36
10U_0805_6.3V6M

2

#SI change to 7m ohm

5

1

C49

0.1U_0402_10V6K

2

5

1

C13
10U_0805_6.3V6M

2

5

1

C21
10U_0805_6.3V6M

2

5

1

C29
10U_0805_6.3V6M

2

5

1

C37
10U_0805_6.3V6M

2

1

C50

0.1U_0402_10V6K

2

1

C14
10U_0805_6.3V6M

2

1

C22
10U_0805_6.3V6M

2

1

C30
10U_0805_6.3V6M

2

1

C38
10U_0805_6.3V6M

2

1

C15
10U_0805_6.3V6M

2

1

C23
10U_0805_6.3V6M

2

1

C31
10U_0805_6.3V6M

2

1

C39
10U_0805_6.3V6M

2

1

C16
10U_0805_6.3V6M

2

1

C24
10U_0805_6.3V6M

2

1

C32
10U_0805_6.3V6M

2

1

C40
10U_0805_6.3V6M

2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Penryn(3/3)-AGTL+/ITP-XDP

Size Document Number Rev

Custom

LA-4102P Blade discrete

2

Date: Sheet of

853Monday, February 25, 2008

1

0.4

5

www.kythuatvitinh.com

H_D#[0..63]7

D D

C C

+H_SWNG
H_RCOMP

H_RESET#6

H_CPUSLP#7

B B

Layout note:

Route H_SCOMP and H_SCOMP# with trace
width, spacing and impedance (55 ohm) same as
FSB data traces

Layout Note:
H_RCOMP / H_VREF / H_SWNG
trace width and spacing is 10/20

+VCCP

12

R46

1K_0402_1%

12

A A

R52

2K_0402_1%

H_RESET#
H_CPUSLP#

+H_VREF

+H_VREF

1

C58

2

0.1U_0402_16V4Z

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

12

24.9_0402_1%

AD14

AA13
AA11

AD11
AD10
AD13
AE12

AE14

AE11

H_RCOMP

R54

F2

G8

F8

E6
G2
H6
H2

F6
D4
H3
M9

M11

J1

J2

N12

J6

P2

L2
R2
N9

L6
M5

J3
N2
R1
N5
N6

P13

N8

L7

N10

M3

Y3

Y6

Y10
Y12
Y14

Y7
W2

AA8

Y9

AA9

AE9
AA2
AD8
AA3
AD3
AD7

AF3
AC1
AE3
AC3

AE8
AG2
AD6

C5

E3

C12

E11

A11

B11

U2A

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

H_SWING
H_RCOMP

H_CPURST#
H_CPUSLP#

H_AVREF
H_DVREF

CANTIGA ES_FCBGA1329

+VCCP

12

R47

221_0603_1%

12

R55

100_0402_1%

0.1U_0402_16V4Z

+H_SWNG

1

2

HOST

C59

Near B3 pinwithin 100 mils from NB

5

4

H_A#3

A14

H_A#_3

H_A#4

C15

H_A#_4

H_A#5

F16

H_A#_5

H_A#6

H13

H_A#_6

H_A#7

C18

H_A#_7

H_A#8

M16

H_A#_8

H_A#9

J13

H_A#_9

H_A#10

P16

H_A#_10

H_A#11

R16

H_A#_11

H_A#12

N17

H_A#_12

H_A#13

M13

H_A#_13

H_A#14

E17

H_A#_14

H_A#15

P17

H_A#_15

H_A#16

F17

H_A#_16

H_A#17

G20

H_A#_17

H_A#18

B19

H_A#_18

H_A#19

J16

H_A#_19

H_A#20

E20

H_A#_20

H_A#21

H16

H_A#_21

H_A#22

J20

H_A#_22

H_A#23

L17

H_A#_23

H_A#24

A17

H_A#_24

H_A#25

B17

H_A#_25

H_A#26

L16

H_A#_26

H_A#27

C21

H_A#_27

H_A#28

J17

H_A#_28

H_A#29

H20

H_A#_29

H_A#30

B18

H_A#_30

H_A#31

K17

H_A#_31

H_A#32

B20

H_A#_32

H_A#33

F21

H_A#_33

H_A#34

K21

H_A#_34

H_A#35

L20

H_A#_35

H_ADS#

H12

H_ADS#

H_ADSTB#0

B16

H_ADSTB#_0
H_ADSTB#_1

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_LOCK#
H_TRDY#

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

H_ADSTB#1

G17

H_BNR#

A9

H_BNR#

H_BPRI#

F11

H_BPRI#

H_BR0#

G12

H_DEFER#

E9

H_DBSY#

B10

CLK_MCH_BCLK

AH7

CLK_MCH_BCLK#

AH6

H_DPWR#

J11

H_DRDY#

F9

H_HIT#

H9

H_HIT#

H_HITM#

E12

H_HITM#

H_LOCK#

H11

H_TRDY#

C9

H_DINV#0

J8

H_DINV#1

L3

H_DINV#2

Y13

H_DINV#3

Y1

H_DSTBN#0

L10

H_DSTBN#1

M7

H_DSTBN#2

AA5

H_DSTBN#3

AE6

H_DSTBP#0

L9

H_DSTBP#1

M8

H_DSTBP#2

AA6

H_DSTBP#3

AE5

H_REQ#0

B15

H_REQ#1

K13

H_REQ#2

F13

H_REQ#3

B13

H_REQ#4

B14

H_RS#0

B6

H_RS#_0

H_RS#1

F12

H_RS#_1

H_RS#2

C8

H_RS#_2

Layout Note: V_DDR_MCH_REF
trace width and spacing is 20/20.

V_DDR_MCH_REF15,16

H_A#[3..35] 6

H_ADS# 6
H_ADSTB#0 6
H_ADSTB#1 6
H_BNR# 6
H_BPRI# 6
H_BR0# 6
H_DEFER# 6
H_DBSY# 6
CLK_MCH_BCLK 17
CLK_MCH_BCLK# 17
H_DPWR# 7
H_DRDY# 6
H_HIT# 6
H_HITM# 6
H_LOCK# 6
H_TRDY# 6

H_DINV#0 7
H_DINV#1 7
H_DINV#2 7
H_DINV#3 7

H_DSTBN#0 7
H_DSTBN#1 7
H_DSTBN#2 7
H_DSTBN#3 7

H_DSTBP#0 7
H_DSTBP#1 7
H_DSTBP#2 7
H_DSTBP#3 7

H_REQ#0 6
H_REQ#1 6
H_REQ#2 6
H_REQ#3 6
H_REQ#4 6

H_RS#0 6
H_RS#1 6
H_RS#2 6

PLT_RST#20,25,30,31,32

H_THERMTRIP#6,26

DPRSLPVR27,49

V_DDR_MCH_REF

#PV follow check list ver:1.5 change to 10K ohm

4

1

C51

2.2U_0603_6.3V4Z

2

SMRCOMP_VOH

80% of 1.8V VCC_SM

20% of 1.8V VCC_SM

SMRCOMP_VOL

1

C53

2

2.2U_0603_6.3V4Z

PLT_RST#

+1.8V

12

12

1

C57

2

0.1U_0402_16V4Z

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

C52

0.01U_0402_25V7K

2

1

C54

2

0.01U_0402_25V7K

PM_EXTTS#0

PM_EXTTS#1

CLKREQ#_7

R41
R42

R45
10K_0402_1%

R48
10K_0402_1%

Issued Date

3

+1.8V

12

R31
1K_0402_1%

12

R32

3.01K_0402_1%

12

R33
1K_0402_1%

R38 10K_0402_5%

R39 10K_0402_5%

R40 10K_0402_5%

MCH_CLKSEL017
MCH_CLKSEL117
MCH_CLKSEL217

CFG511
CFG611
CFG711
CFG811

CFG911
CFG1011
CFG1111
CFG1211
CFG1311
CFG1411
CFG1511
CFG1611
CFG1711
CFG1811
CFG1911
CFG2011

PM_BMBUSY#27

H_DPRSTP#7,26,49
PM_EXTTS#015
PM_EXTTS#116
PM_PWROK27,38

1 2
1 2

3

U2B

M36

T7
T8
T9
T10
T11
T12
T13
T14
T15
T16
T17
T18
T19
T20

T21
T22
T23

T24

T25
T26
T27
T28

1 2

1 2

1 2

MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2

CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

PM_BMBUSY#
H_DPRSTP#
PM_EXTTS#0
PM_EXTTS#1
PM_PWROK

100_0402_5%

THERMTRIP#
DPRSLPVR

0_0402_5%

@

1

C55

2

0.1U_0402_16V4Z

2008/02/25 2008/02/25

RESERVED

N36

RESERVED

R33

RESERVED

T33

RESERVED

AH9

RESERVED

AH10

RESERVED

AH12

RESERVED

AH13

RESERVED

K12

RESERVED

AL34

RESERVED

AK34

RESERVED

AN35

RESERVED

AM35

RESERVED

T24

RESERVED

B31

RESERVED

B2

RESERVED

M1

RESERVED

AY21

RESERVED

BG23

RESERVED

BF23

RESERVED

BH18

RESERVED

BF18

RESERVED

+3VS

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1

AT40

PWROK

AT11

RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

BG48

NC

BF48

NC

BD48

NC

BC48

NC

BH47

NC

BG47

NC

BE47

NC

BH46

NC

BF46

NC

BG45

NC

BH44

NC

BH43

NC

BH6

NC

BH5

NC

BG4

NC

BH3

NC

BF3

NC

BH2

NC

BG2

NC

BE2

NC

BG1

NC

BF1

NC

BD1

NC

BC1

NC

F1

NC

A47

NC

CANTIGA ES_FCBGA1329

Compal Secret Data

Deciphered Date

RSVD

PM

NC

2

M_CLK_DDR0

AP24

SA_CK_0

M_CLK_DDR1

AT21

SA_CK_1

M_CLK_DDR2

AV24

SB_CK_0

M_CLK_DDR3

AU20

SB_CK_1

M_CLK_DDR#0

AR24

SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1

SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1

SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1

SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH

SM_RCOMP_VOL

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#

DDR CLK/ CONTROL/COMPENSATION

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK#

CLK

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

CFG

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

DMI

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4

GFX_VR_EN

GRAPHICS VID

CL_PWROK

MEHDA

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

ICH_SYNC#

MISC

HDA_BCLK
HDA_RST#

HDA_SDO

HDA_SYNC

2

M_CLK_DDR#1

AR21

M_CLK_DDR#2

AU24

M_CLK_DDR#3

AV20

DDR_CKE0_DIMMA

BC28

DDR_CKE1_DIMMA

AY28

DDR_CKE2_DIMMB

AY36

DDR_CKE3_DIMMB

BB36

DDR_CS0_DIMMA#

BA17

DDR_CS1_DIMMA#

AY16

DDR_CS2_DIMMB#

AV16

DDR_CS3_DIMMB#

AR13

M_ODT0

BD17

M_ODT1

AY17

M_ODT2

BF15

M_ODT3

AY13

SMRCOMP

BG22

SMRCOMP#

BH21

SMRCOMP_VOH

BF28

SMRCOMP_VOL

BH28

V_DDR_MCH_REF

AV42

SM_PWROK

AR36

SM_REXT

BF17

TP_SM_DRAMRST#

BC36
B38

A38
E41
F41

F43

PEG_CLK

E43

AE41
AE37
AE47
AH39

AE40
AE38
AE48
AH40

AE35
AE43
AE46
AH42

AD35
AE44
AF46
AH43

B33
B32
G33
F33
E33

C34

AH37

CL_CLK

AH36

CL_DATA

AN36
AJ35

CL_RST#

AH34

CL_VREF

0621 add CLK and DAT for DVI

N28
M28
G36
E36
K36

CLKREQ#

H36

B12

TSATN#

B28
B30
B29

HDA_SDI

C29
A28

@

CLK_MCH_3GPLL
CLK_MCH_3GPLL#

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

T30
T31
T32
T33
T34

T35

CL_CLK0
CL_DATA0
M_PWROK
CL_RST#
+CL_VREF

T36
T37

CLKREQ#_7
MCH_ICH_SYNC#

TSATN#

56_0402_5%

1 2

R49

Compal Electronics, Inc.

Title

Cantiga(1/6)-AGTL/DMI/DDR

Size Document Number Rev

Custom

LA-4102P Blade discrete

Date: Sheet of

R34 80.6_0402_1%
R35 80.6_0402_1%

Follow Design Guide
For Cantiga: 80.6ohm

R36 0_0402_5%
R37 499_0402_1%

T29 PAD

+VCCP

1

M_CLK_DDR0 15
M_CLK_DDR1 15
M_CLK_DDR2 16
M_CLK_DDR3 16

M_CLK_DDR#0 15
M_CLK_DDR#1 15
M_CLK_DDR#2 16
M_CLK_DDR#3 16

DDR_CKE0_DIMMA 15
DDR_CKE1_DIMMA 15
DDR_CKE2_DIMMB 16
DDR_CKE3_DIMMB 16

DDR_CS0_DIMMA# 15
DDR_CS1_DIMMA# 15
DDR_CS2_DIMMB# 16
DDR_CS3_DIMMB# 16

M_ODT0 15
M_ODT1 15
M_ODT2 16
M_ODT3 16

1 2
1 2

1 2
1 2

CLK_MCH_3GPLL 17
CLK_MCH_3GPLL# 17

DMI_TXN0 27
DMI_TXN1 27
DMI_TXN2 27
DMI_TXN3 27

DMI_TXP0 27
DMI_TXP1 27
DMI_TXP2 27
DMI_TXP3 27

DMI_RXN0 27
DMI_RXN1 27
DMI_RXN2 27
DMI_RXN3 27

DMI_RXP0 27
DMI_RXP1 27
DMI_RXP2 27
DMI_RXP3 27

CL_CLK0 27
CL_DATA0 27
M_PWROK 27,38
CL_RST# 27

C56

0.1U_0402_16V4Z

CLKREQ#_7 17
MCH_ICH_SYNC# 27

TSATN# 38

1

+1.8V

+VCCP

12

R43
1K_0402_1%

12

1

R44
499_0402_1%

2

953Monday, February 25, 2008

0.4

5

www.kythuatvitinh.com

D D

DDR_A_D[0..63]15

C C

B B

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

U2D

AJ38

SA_DQ_0

AJ41

SA_DQ_1

AN38

SA_DQ_2

AM38

SA_DQ_3

AJ36

SA_DQ_4

AJ40

SA_DQ_5

AM44

SA_DQ_6

AM42

SA_DQ_7

AN43

SA_DQ_8

AN44

SA_DQ_9

AU40

SA_DQ_10

AT38

SA_DQ_11

AN41

SA_DQ_12

AN39

SA_DQ_13

AU44

SA_DQ_14

AU42

SA_DQ_15

AV39

SA_DQ_16

AY44

SA_DQ_17

BA40

SA_DQ_18

BD43

SA_DQ_19

AV41

SA_DQ_20

AY43

SA_DQ_21

BB41

SA_DQ_22

BC40

SA_DQ_23

AY37

SA_DQ_24

BD38

SA_DQ_25

AV37

SA_DQ_26

AT36

SA_DQ_27

AY38

SA_DQ_28

BB38

SA_DQ_29

AV36

SA_DQ_30

AW36

SA_DQ_31

BD13

SA_DQ_32

AU11

SA_DQ_33

BC11

SA_DQ_34

BA12

SA_DQ_35

AU13

SA_DQ_36

AV13

SA_DQ_37

BD12

SA_DQ_38

BC12

SA_DQ_39

BB9

SA_DQ_40

BA9

SA_DQ_41

AU10

SA_DQ_42

AV9

SA_DQ_43

BA11

SA_DQ_44

BD9

SA_DQ_45

AY8

SA_DQ_46

BA6

SA_DQ_47

AV5

SA_DQ_48

AV7

SA_DQ_49

AT9

SA_DQ_50

AN8

SA_DQ_51

AU5

SA_DQ_52

AU6

SA_DQ_53

AT5

SA_DQ_54

AN10

SA_DQ_55

AM11

SA_DQ_56

AM5

SA_DQ_57

AJ9

SA_DQ_58

AJ8

SA_DQ_59

AN12

SA_DQ_60

AM13

SA_DQ_61

AJ11

SA_DQ_62

AJ12

SA_DQ_63

CANTIGA ES_FCBGA1329

4

DDR_A_BS0

BD21

SA_BS_0
SA_BS_1
SA_BS_2

SA_RAS#
SA_CAS#

SA_WE#

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6

SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8

SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14

DDR SYSTEM MEMORY A

BG18
AT25

BB20
BD20
AY20

AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5

AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8

BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25

DDR_A_BS1
DDR_A_BS2

DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14

DDR_A_BS0 15
DDR_A_BS1 15
DDR_A_BS2 15

DDR_A_RAS# 15
DDR_A_CAS# 15
DDR_A_WE# 15

DDR_A_DM[0..7] 15

DDR_A_DQS[0..7] 15

DDR_A_DQS#[0..7] 15

DDR_A_MA[0..14] 15

3

DDR_B_D[0..63]16

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

AK47
AH46
AP47
AP46
AJ46
AJ48

AM48

AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44

BG43

BF43
BE45
BC41
BF40
BF41

BG38

BF38
BH35

BG35

BH40
BG39
BG34

BH34

BH14
BG12

BH11

BG8
BH12
BF11

BF8

BG7

BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AL1
AL2
AJ1

AH1
AM2
AM3

AH3

AJ3

2

U2E

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

CANTIGA ES_FCBGA1329

1

DDR_B_BS0

BC16

SB_BS_0
SB_BS_1
SB_BS_2

SB_RAS#
SB_CAS#

SB_WE#

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6

SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8

SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14

DDR SYSTEM MEMORY B

BB17
BB33

AU17
BG16
BF14

AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2

AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5

AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33

DDR_B_BS1
DDR_B_BS2

DDR_B_RAS#
DDR_B_CAS#
DDR_B_WE#

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14

DDR_B_BS0 16
DDR_B_BS1 16
DDR_B_BS2 16

DDR_B_RAS# 16
DDR_B_CAS# 16
DDR_B_WE# 16

DDR_B_DM[0..7] 16

DDR_B_DQS[0..7] 16

DDR_B_DQS#[0..7] 16

DDR_B_MA[0..14] 16

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Cantiga(2/6)-DDR2 A/B CH

Size Document Number Rev

Custom

LA-4102P Blade discrete

2

Date: Sheet of

10 53Monday, February 25, 2008

1

0.4

5

www.kythuatvitinh.com

D D

C C

#PV follow check list ver:1.5

R148

B B

A A

@

0_0402_5%

1 2

4

U2C

L32

L_BKLT_CTRL

G32

L_BKLT_EN

M32

L_CTRL_CLK

M33

L_CTRL_DATA

K33

L_DDC_CLK

J33

L_DDC_DATA

M29

L_VDD_EN

C44

LVDS_IBG

B43

LVDS_VBG

E37

LVDS_VREFH

E38

LVDS_VREFL

C41

LVDSA_CLK#

C40

LVDSA_CLK

B37

LVDSB_CLK#

A37

LVDSB_CLK

H47

LVDSA_DATA#_0

E46

LVDSA_DATA#_1

G40

LVDSA_DATA#_2

A40

LVDSA_DATA#_3

H48

LVDSA_DATA_0

D45

LVDSA_DATA_1

F40

LVDSA_DATA_2

B40

LVDSA_DATA_3

A41

LVDSB_DATA#_0

H38

LVDSB_DATA#_1

G37

LVDSB_DATA#_2

J37

LVDSB_DATA#_3

B42

LVDSB_DATA_0

G38

LVDSB_DATA_1

F37

LVDSB_DATA_2

K37

LVDSB_DATA_3

F25

TVA_DAC

H25

TVB_DAC

K25

TVC_DAC

H24

TV_RTN

C31

TV_DCONSEL_0

E32

TV_DCONSEL_1

E28

CRT_BLUE

G28

CRT_GREEN

J28

CRT_RED

G29

CRT_IRTN

H32

CRT_DDC_CLK

J32

CRT_DDC_DATA

J29

CRT_HSYNC

E29

CRT_TVO_IREF

L29

CRT_VSYNC

CANTIGA ES_FCBGA1329

3

T37

PEG_COMPI

T36

PEG_COMPO

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7

LVDS

PEG_RX#_8

PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8

PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15

PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3

TV VGA

PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9

PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13

PCI-EXPRESS GRAPHICS

PEG_TX#_14
PEG_TX#_15

PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8

PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15

PEG_RXN0

H44

PEG_RXN1

J46

PEG_RXN2

L44

PEG_RXN3

L40

PEG_RXN4

N41

PEG_RXN5

P48

PEG_RXN6

N44

PEG_RXN7

T43

PEG_RXN8

U43

PEG_RXN9

Y43

PEG_RXN10

Y48

PEG_RXN11

Y36

PEG_RXN12

AA43

PEG_RXN13

AD37

PEG_RXN14

AC47

PEG_RXN15

AD39

PEG_RXP0

H43

PEG_RXP1

J44

PEG_RXP2

L43

PEG_RXP3

L41

PEG_RXP4

N40

PEG_RXP5

P47

PEG_RXP6

N43

PEG_RXP7

T42

PEG_RXP8

U42

PEG_RXP9

Y42

PEG_RXP10

W47

PEG_RXP11

Y37

PEG_RXP12

AA42

PEG_RXP13

AD36

PEG_RXP14

AC48

PEG_RXP15

AD40

PEG_TXN0

J41

PEG_TXN1

M46

PEG_TXN2

M47

PEG_TXN3

M40

PEG_TXN4

M42

PEG_TXN5

R48

PEG_TXN6

N38

PEG_TXN7

T40

PEG_TXN8

U37

PEG_TXN9

U40

PEG_TXN10

Y40

PEG_TXN11

AA46

PEG_TXN12

AA37

PEG_TXN13

AA40

PEG_TXN14

AD43

PEG_TXN15

AC46

PEG_TXP0

J42

PEG_TXP1

L46

PEG_TXP2

M48

PEG_TXP3

M39

PEG_TXP4

M43

PEG_TXP5

R47

PEG_TXP6

N37

PEG_TXP7

T39

PEG_TXP8

U36

PEG_TXP9

U39

PEG_TXP10

Y39

PEG_TXP11

Y46

PEG_TXP12

AA36

PEG_TXP13

AA39

PEG_TXP14

AD42

PEG_TXP15

AD46

R57

1 2

49.9_0402_1%

C1289 0.1U_0402_16V4Z

1 2

C1290 0.1U_0402_16V4Z

1 2

C1291 0.1U_0402_16V4Z

1 2

C1292 0.1U_0402_16V4Z

1 2

C1293 0.1U_0402_16V4Z

1 2

C1294 0.1U_0402_16V4Z

1 2

C1295 0.1U_0402_16V4Z

1 2

C1296 0.1U_0402_16V4Z

1 2

C1297 0.1U_0402_16V4Z

1 2

C1298 0.1U_0402_16V4Z

1 2

C1299 0.1U_0402_16V4Z

1 2

C1300 0.1U_0402_16V4Z

1 2

C1301 0.1U_0402_16V4Z

1 2

C1302 0.1U_0402_16V4Z

1 2

C1303 0.1U_0402_16V4Z

1 2

C1304 0.1U_0402_16V4Z

1 2

C1305 0.1U_0402_16V4Z

1 2

C1306 0.1U_0402_16V4Z

1 2

C1307 0.1U_0402_16V4Z

1 2

C1308 0.1U_0402_16V4Z

1 2

C1309 0.1U_0402_16V4Z

1 2

C1310 0.1U_0402_16V4Z

1 2

C1311 0.1U_0402_16V4Z

1 2

C1312 0.1U_0402_16V4Z

1 2

C1313 0.1U_0402_16V4Z

1 2

C1314 0.1U_0402_16V4Z

1 2

C1315 0.1U_0402_16V4Z

1 2

C1316 0.1U_0402_16V4Z

1 2

C1317 0.1U_0402_16V4Z

1 2

C1318 0.1U_0402_16V4Z

1 2

C1319 0.1U_0402_16V4Z

1 2

C1320 0.1U_0402_16V4Z

1 2

+VCC_PEG

PEG_RXN0 20
PEG_RXN1 20
PEG_RXN2 20
PEG_RXN3 20
PEG_RXN4 20
PEG_RXN5 20
PEG_RXN6 20
PEG_RXN7 20
PEG_RXN8 20
PEG_RXN9 20
PEG_RXN10 20
PEG_RXN11 20
PEG_RXN12 20
PEG_RXN13 20
PEG_RXN14 20
PEG_RXN15 20

PEG_RXP0 20
PEG_RXP1 20
PEG_RXP2 20
PEG_RXP3 20
PEG_RXP4 20
PEG_RXP5 20
PEG_RXP6 20
PEG_RXP7 20
PEG_RXP8 20
PEG_RXP9 20
PEG_RXP10 20
PEG_RXP11 20
PEG_RXP12 20
PEG_RXP13 20
PEG_RXP14 20
PEG_RXP15 20

2

PEGCOMP trace width
and spacing is 20/25 mils.

PEG_M_TXN0 20
PEG_M_TXN1 20
PEG_M_TXN2 20
PEG_M_TXN3 20
PEG_M_TXN4 20
PEG_M_TXN5 20
PEG_M_TXN6 20
PEG_M_TXN7 20
PEG_M_TXN8 20
PEG_M_TXN9 20
PEG_M_TXN10 20
PEG_M_TXN11 20
PEG_M_TXN12 20
PEG_M_TXN13 20
PEG_M_TXN14 20
PEG_M_TXN15 20

PEG_M_TXP0 20
PEG_M_TXP1 20
PEG_M_TXP2 20
PEG_M_TXP3 20
PEG_M_TXP4 20
PEG_M_TXP5 20
PEG_M_TXP6 20
PEG_M_TXP7 20
PEG_M_TXP8 20
PEG_M_TXP9 20
PEG_M_TXP10 20
PEG_M_TXP11 20
PEG_M_TXP12 20
PEG_M_TXP13 20
PEG_M_TXP14 20
PEG_M_TXP15 20

Strap Pin Table

CFG[2:0] FSB Freq
select

CFG[4:3]
CFG5 (DMI select)
CFG6

(Intel Management

CFG7

Engine Crypto strap)

CFG8
CFG9 (PCIE Graphics

Lane Reversal)

(PCIE

CFG10

Lookback
enable)

CFG11
CFG[13:12] (XOR/ALLZ)

CFG[15:14]
CFG16 (FSB Dynamic ODT)

CFG[18:17]
CFG19 (DMI Lane Reversal)

(PCIE/SDVO

CFG20

concurrent)

CFG59

R79

@

CFG69

CFG79

CFG89

CFG99

CFG109

R81

R83

@

R84

@

R86

@

R71

4.02K_0402_1%

CFG5

@

R74

2.21K_0402_1%

1 2

2.21K_0402_1%

1 2

2.21K_0402_1%

1 2

2.21K_0402_1%

1 2

2.21K_0402_1%

1 2

2.21K_0402_1%

1

000 = FSB 1066MHz
010 = FSB 800MHz
011 = FSB 667MHz
Others = Reserved

Reserved
0 = DMI x 2

1 = DMI x 4

*

0 = The iTPM Host Interface is enable
1 = The iTPM Host Interface is disable
0 =(TLS)chiper suite with no confidentiality
1 =(TLS)chiper suite with confidentiality

Reserved

0 = Reverse Lane,15->0, 14->1
1 = Normal Operation,Lane Number in

order
0 = Enable

1 = Disable

*

Reserved
00 = Reserved

01 = XOR Mode Enabled
10 = All Z Mode Enabled

Reserved

0 = Disabled
1 = Enabled

*

Reserved

0 = Normal Operation

(Lane number in Order)

1 = Reverse Lane

0 = Only PCIE or SDVO is operational.
1 = PCIE/SDVO are operating simu.

+3VS

12

12

CFG169

CFG199

CFG209

CFG119

CFG129

CFG139

CFG149

CFG159

CFG179

CFG189

*

*

*

(Default)11 = Normal Operation

*

*

*

+3VS

R72

1 2

4.02K_0402_1%

R73

@

1 2

4.02K_0402_1%

R75

@

1 2

4.02K_0402_1%

R76

@

1 2

2.21K_0402_1%

R77

1 2

2.21K_0402_1%

R78

1 2

2.21K_0402_1%

R80

@

1 2

2.21K_0402_1%

R82

@

1 2

2.21K_0402_1%

R85

@

1 2

2.21K_0402_1%

R87

@

1 2

2.21K_0402_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Cantiga(3/6)-VGA/LVDS/TV

Size Document Number Rev

Custom

LA-4102P Blade discrete

2

Date: Sheet of

11 53Monday, February 25, 2008

1

0.4

5

www.kythuatvitinh.com

4

3

2

1

VCC_HV
VCC_HV
VCC_HV

VTTLF
VTTLF
VTTLF

+VCCP

U13

VTT

T13

VTT

U12

VTT

T12

VTT

U11

VTT

T11

VTT

U10

VTT

T10

VTT

U9

VTT

T9

VTT

U8

VTT

T8

VTT

U7

VTT

T7

VTT

U6

VTT

T6

VTT

U5

VTT

T5

VTT

V3

VTT

U3

VTT

V2

VTT

U2

VTT

T2

VTT

V1

VTT

U1

VTT

B22
B21
A21

BF21
BH20
BG20
BF20

K47
C35

B35
A35

V48
U48
V47
U47
U46

AH48
AF48
AH47
AG47

A8
L1
AB2

C110

220U_D2_4VM

4.7U_0805_10V4Z

1

C71

C72

1

+

2

2

<BOM Structure>

0.47U_0603_10V7K

4.7U_0805_10V4Z

1

2

1

C81

2

+3VS_HV

C107

2.2U_0805_16V4Z

1

C82

2

+1.05VS_HPLL

10U_0805_10V4Z

0.1U_0402_16V4Z
C91

C90

1

1

2

2

+1.05VS_MPLL

1

1

C99

0.1U_0402_16V4Z

+1.05VS_PEGPLL

0.1U_0402_16V4Z

1

2

C100
10U_0805_10V4Z

2

2

10U_0805_10V4Z

0.1U_0402_16V4Z
C108

C106

1

1

2

2

R98

1 2

MBK2012121YZF_0805

R101

1 2

MBK2012121YZF_0805

L1

1 2

BLM18PG121SN1D_0603

D3

2 1

+VCCP

CH751H-40PT_SOD323-2

+3VS

+VCCP

+VCCP

+VCCP

+VCCP_D

1

C80

2

+V1.05VS_AXF

+1.8V_SM_CK

+VCC_PEG

+1.05VS_DMI

0.47U_0603_10V7K

0.47U_0603_10V7K

0.47U_0603_10V7K
C112

C111

1

1

2

2

U2H

73mA

B27

VCCA_CRT_DAC

A26

VCCA_CRT_DAC

2.68mA

A25

VCCA_DAC_BG

B25

D D

+1.05VS_HPLL
+1.05VS_MPLL

R96

@

1 2

+3VS

0_0603_5%
R97

1 2

+1.5VS

0_0603_5%

+VCCP

C C

B B

220U_D2_4VM

R103

1 2

0_0603_5%

1U_0603_10V4Z

1

C94

+

2

C102

R100

1 2

0_0805_5%

<BOM Structure>

1

2

1

C89

0.1U_0402_16V4Z

2

C95

1

2

+1.05VS_A_SM_CK

C103

1

2

1 2

+1.5VS_PEG_BG

10U_0805_10V4Z

C96

4.7U_0805_10V4Z

10U_0805_10V4Z

C104

1

2

R107
0_0402_5%

+1.05VS_PEGPLL

+1.05VS_A_SM

1

2

1U_0603_10V4Z

C105

1

2

+1.5VS_TVDAC

+1.5VS_QDAC
+1.05VS_HPLL
+1.05VS_PEGPLL

1

2

1U_0603_10V4Z

0.1U_0402_16V4Z

C97

VSSA_DAC_BG

F47

VCCA_DPLLA

L48

VCCA_DPLLB

AD1

VCCA_HPLL

AE1

VCCA_MPLL

13.2mA

J48

VCCA_LVDS

J47

VSSA_LVDS

414uA

AD48

VCCA_PEG_BG

50mA

AA48

VCCA_PEG_PLL

AR20

VCCA_SM

AP20

VCCA_SM

AN20

VCCA_SM

AR17

VCCA_SM

AP17

VCCA_SM

AN17

VCCA_SM

AT16

VCCA_SM

AR16

VCCA_SM

AP16

VCCA_SM

AP28

VCCA_SM_CK

AN28

VCCA_SM_CK

AP25

VCCA_SM_CK

AN25

VCCA_SM_CK

AN24

VCCA_SM_CK

AM28

VCCA_SM_CK_NCTF

AM26

VCCA_SM_CK_NCTF

AM25

VCCA_SM_CK_NCTF

AL25

VCCA_SM_CK_NCTF

AM24

VCCA_SM_CK_NCTF

AL24

VCCA_SM_CK_NCTF

AM23

VCCA_SM_CK_NCTF

AL23

VCCA_SM_CK_NCTF

B24

VCCA_TV_DAC

A24

VCCA_TV_DAC

A32

VCC_HDA

M25

VCCD_TVDAC

L28

VCCD_QDAC

AF1

VCCD_HPLL

AA47

VCCD_PEG_PLL

M38

VCCD_LVDS

L37

VCCD_LVDS

60.31mA

CANTIGA ES_FCBGA1329

64.8mA

64.8mA
24mA

139.2mA

720mA

TVA 24.15mA
TVB 39.48mA
TVX 24.15mA

50mA

58.67mA

48.363mA

157.2mA
50mA

CRTPLLA PEGA SMTV

A LVDS

POWER

26mA
26mA

HDA

LVDS

852mA

A CK

105.3mA

1732mA

D TV/CRT

DMI

321.35mA

AXF

124mA

VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK

SM CK

118.8mA

VCC_TX_LVDS

HV

VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG

PEG

456mA

VTTLF

VTT

VCC_AXF
VCC_AXF
VCC_AXF

VCC_DMI
VCC_DMI
VCC_DMI
VCC_DMI

#SI discrete don't use HDA #SI VCCD_QDAC connect to 1.5VS

@

C83

R105

1 2

10_0402_5%

+V1.05VS_AXF

+1.8V_SM_CK

10U_0805_10V4Z

1

2

+1.5VS_TVDAC

+VCC_PEG

C98

+1.05VS_DMI

10U_0805_10V4Z

C84

C92

R106

1 2

0_0402_5%

1U_0603_10V4Z

C78

1

1

2

2

0.1U_0402_16V4Z

10U_0805_10V4Z

1

1

2

2

0.1U_0402_16V4Z

0.022U_0402_16V7K

1

1

C93

2

2

10U_0805_10V4Z

220U_D2_4VM

1

C101

1

+

2

2

R104

1 2

0_0603_5%

0.1U_0402_16V4Z

C109

1

2

C79

C85

R99

1 2

0_0805_5%

R102

1 2

0_0805_5%

+VCCP

+3VS_HV

R93

1 2

0_0603_5%

R95

1 2

0_0805_5%

+VCCP

+1.8V

+1.5VS

+VCCP

+1.5VS_QDAC

0.01U_0402_16V7K

0.1U_0402_16V4Z

C120

C119

1

1

2

A A

2

5

R112

1 2

100_0603_1%

+1.5VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Cantiga(4/6)-PWR

Size Document Number Rev

Custom

LA-4102P Blade discrete

2

Date: Sheet of

12 53Monday, February 25, 2008

1

0.4

5

www.kythuatvitinh.com

Extnal Graphic: 1210.34mA
integrated Graphic: 1930.4mA

U2F

+VCCP

D D

0.1U_0402_16V4Z

0.22U_0402_10V4Z

0.22U_0402_10V4Z

220U_D2_4VM

10U_0805_10V4Z

1

C131

1

+

2

2

C C

B B

C133

C132

C124

1

1

2

2

AG34

VCC

AC34

VCC

AB34

VCC

AA34

VCC

Y34

VCC

V34

VCC

U34

VCC

AM33

VCC

AK33

VCC

AJ33

VCC

AG33

VCC

AF33

C125

1

2

VCC

AE33

VCC

AC33

VCC

AA33

VCC

Y33

VCC

W33

VCC

V33

VCC

U33

VCC

AH28

VCC

AF28

VCC

AC28

VCC

AA28

VCC

AJ26

VCC

AG26

VCC

AE26

VCC

AC26

VCC

AH25

VCC

AG25

VCC

AF25

VCC

AG24

VCC

AJ23

VCC

AH23

VCC

AF23

VCC

T32

VCC

CANTIGA ES_FCBGA1329

4

VCC CORE

POWER

VCC NCTF

VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF

3

AP33
AN33

+1.8V

330U_D2E_2.5VM_R7

10U_0805_10V4Z

10U_0805_10V4Z

1

C126

C122

C130

1

1

+

2

2

2

0317 change value

+VCCP

AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23

T42PAD
T43PAD

BH32
BG32

0.01U_0402_16V7K

BF32
BD32
BC32

C123

2

BB32
BA32
AY32

1

AW32

AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29

AW29

AV29
AU29
AT29
AR29
AP29

BA36
BB24
BD16

BB21
AW16
AW13

AT13

Y26
AE25
AB25
AA25
AE24
AC24
AA24

Y24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21

Y21
AH20
AF20
AE20
AC20
AB20
AA20

T17

T16
AM15
AL15
AE15
AJ15
AH15
AG15
AF15
AB15
AA15

Y15

V15

U15
AN14
AM14

U14

T14

AJ14

@

AH14

@

U2G

3000mA

VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM

VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC

6326.84mA

VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG

VCC_AXG_SENSE
VSS_AXG_SENSE

2

VCC SMVCC GFX

VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF

POWER

VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF

VCC GFX NCTF

VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF

VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF

VCC SM LF

W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16

AV44
BA37
AM40
AV21
AY5
AM10
BB13

VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7

1

C143 0.47U_0402_6.3V6K

C140 0.1U_0402_16V4Z

C141 0.22U_0603_10V7K

C139 0.1U_0402_16V4Z

1

2

C142 0.22U_0603_10V7K

1

1

1

2

2

2

C145 1U_0603_10V4Z

C144 1U_0603_10V4Z

1

1

1

2

2

2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

3

Compal Secret Data

CANTIGA ES_FCBGA1329

Deciphered Date

Compal Electronics, Inc.

Title

Cantiga(5/6)-PWR/GND

Size Document Number Rev

Custom

LA-4102P Blade discrete

2

Date: Sheet of

13 53Monday, February 25, 2008

1

0.4

5

www.kythuatvitinh.com

4

3

2

1

U2I

AU48

VSS

AR48

VSS

AL48

VSS

BB47

VSS

AW47

VSS

AN47

VSS

AJ47

VSS

AF47

D D

C C

B B

A A

VSS

AD47

VSS

AB47

VSS

Y47

VSS

T47

VSS

N47

VSS

L47

VSS

G47

VSS

BD46

VSS

BA46

VSS

AY46

VSS

AV46

VSS

AR46

VSS

AM46

VSS

V46

VSS

R46

VSS

P46

VSS

H46

VSS

F46

VSS

BF44

VSS

AH44

VSS

AD44

VSS

AA44

VSS

Y44

VSS

U44

VSS

T44

VSS

M44

VSS

F44

VSS

BC43

VSS

AV43

VSS

AU43

VSS

AM43

VSS

J43

VSS

C43

VSS

BG42

VSS

AY42

VSS

AT42

VSS

AN42

VSS

AJ42

VSS

AE42

VSS

N42

VSS

L42

VSS

BD41

VSS

AU41

VSS

AM41

VSS

AH41

VSS

AD41

VSS

AA41

VSS

Y41

VSS

U41

VSS

T41

VSS

M41

VSS

G41

VSS

B41

VSS

BG40

VSS

BB40

VSS

AV40

VSS

AN40

VSS

H40

VSS

E40

VSS

AT39

VSS

AM39

VSS

AJ39

VSS

AE39

VSS

N39

VSS

L39

VSS

B39

VSS

BH38

VSS

BC38

VSS

BA38

VSS

AU38

VSS

AH38

VSS

AD38

VSS

AA38

VSS

Y38

VSS

U38

VSS

T38

VSS

J38

VSS

F38

VSS

C38

VSS

BF37

VSS

BB37

VSS

AW37

VSS

AT37

VSS

AN37

VSS

AJ37

VSS

H37

VSS

C37

VSS

BG36

VSS

BD36

VSS

AK15

VSS

AU36

VSS

CANTIGA ES_FCBGA1329

VSS

AM36

VSS

AE36

VSS

P36

VSS

L36

VSS

J36

VSS

F36

VSS

B36

VSS

AH35

VSS

AA35

VSS

Y35

VSS

U35

VSS

T35

VSS

BF34

VSS

AM34

VSS

AJ34

VSS

AF34

VSS

AE34

VSS

W34

VSS

B34

VSS

A34

VSS

BG33

VSS

BC33

VSS

BA33

VSS

AV33

VSS

AR33

VSS

AL33

VSS

AH33

VSS

AB33

VSS

P33

VSS

L33

VSS

H33

VSS

N32

VSS

K32

VSS

F32

VSS

C32

VSS

A31

VSS

AN29

VSS

T29

VSS

N29

VSS

K29

VSS

H29

VSS

F29

VSS

A29

VSS

BG28

VSS

BD28

VSS

BA28

VSS

AV28

VSS

AT28

VSS

AR28

VSS

AJ28

VSS

AG28

VSS

AE28

VSS

AB28

VSS

Y28

VSS

P28

VSS

K28

VSS

H28

VSS

F28

VSS

C28

VSS

BF26

VSS

AH26

VSS

AF26

VSS

AB26

VSS

AA26

VSS

C26

VSS

B26

VSS

BH25

VSS

BD25

VSS

BB25

VSS

AV25

VSS

AR25

VSS

AJ25

VSS

AC25

VSS

Y25

VSS

N25

VSS

L25

VSS

J25

VSS

G25

VSS

E25

VSS

BF24

VSS

AD12

VSS

AY24

VSS

AT24

VSS

AJ24

VSS

AH24

VSS

AF24

VSS

AB24

VSS

R24

VSS

L24

VSS

K24

VSS

J24

VSS

G24

VSS

F24

VSS

E24

VSS

BH23

VSS

AG23

VSS

Y23

VSS

B23

VSS

A23

VSS

AJ6

VSS

U2J

BG21

VSS

L12

VSS

AW21

VSS

AU21

VSS

AP21

VSS

AN21

VSS

AH21

VSS

AF21

VSS

AB21

VSS

R21

VSS

M21

VSS

J21

VSS

G21

VSS

BC20

VSS

BA20

VSS

AW20

VSS

AT20

VSS

AJ20

VSS

AG20

VSS

Y20

VSS

N20

VSS

K20

VSS

F20

VSS

C20

VSS

A20

VSS

BG19

VSS

A18

VSS

BG17

VSS

BC17

VSS

AW17

VSS

AT17

VSS

R17

VSS

M17

VSS

H17

VSS

C17

VSS

BA16

VSS

AU16

VSS

AN16

VSS

N16

VSS

K16

VSS

G16

VSS

E16

VSS

BG15

VSS

AC15

VSS

W15

VSS

A15

VSS

BG14

VSS

AA14

VSS

C14

VSS

BG13

VSS

BC13

VSS

BA13

VSS

AN13

VSS

AJ13

VSS

AE13

VSS

N13

VSS

L13

VSS

G13

VSS

E13

VSS

BF12

VSS

AV12

VSS

AT12

VSS

AM12

VSS

AA12

VSS

J12

VSS

A12

VSS

BD11

VSS

BB11

VSS

AY11

VSS

AN11

VSS

AH11

VSS

Y11

VSS

N11

VSS

G11

VSS

C11

VSS

BG10

VSS

AV10

VSS

AT10

VSS

AJ10

VSS

AE10

VSS

AA10

VSS

M10

VSS

BF9

VSS

BC9

VSS

AN9

VSS

AM9

VSS

AD9

VSS

G9

VSS

B9

VSS

BH8

VSS

BB8

VSS

AV8

VSS

AT8

VSS

CANTIGA ES_FCBGA1329

VSS

VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF

VSS NCTF

VSS_NCTF
VSS_NCTF

VSS SCB

NC

VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB

AH8

VSS

Y8

VSS

L8

VSS

E8

VSS

B8

VSS

AY7

VSS

AU7

VSS

AN7

VSS

AJ7

VSS

AE7

VSS

AA7

VSS

N7

VSS

J7

VSS

BG6

VSS

BD6

VSS

AV6

VSS

AT6

VSS

AM6

VSS

M6

VSS

C6

VSS

BA5

VSS

AH5

VSS

AD5

VSS

Y5

VSS

L5

VSS

J5

VSS

H5

VSS

F5

VSS

BE4

VSS

BC3

VSS

AV3

VSS

AL3

VSS

R3

VSS

P3

VSS

F3

VSS

BA2

VSS

AW2

VSS

AU2

VSS

AR2

VSS

AP2

VSS

AJ2

VSS

AH2

VSS

AF2

VSS

AE2

VSS

AD2

VSS

AC2

VSS

Y2

VSS

M2

VSS

K2

VSS

AM1

VSS

AA1

VSS

P1

VSS

H1

VSS

U24

VSS

U28

VSS

U25

VSS

U29

VSS

AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17

BH48
BH1
A48
C1
A3

E1

NC

D2

NC

C3

NC

B4

NC

A5

NC

A6

NC

A43

NC

A44

NC

B45

NC

C46

NC

D47

NC

B47

NC

A46

NC

F48

NC

E48

NC

C48

NC

B48

NC

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Cantiga(6/6)-PWR/GND

Size Document Number Rev

Custom

LA-4102P Blade discrete

2

Date: Sheet of

14 53Monday, February 25, 2008

1

0.4

5

www.kythuatvitinh.com

DDR_A_DQS#[0..7]10
DDR_A_D[0..63]10
DDR_A_DM[0..7]10
DDR_A_DQS[0..7]10
DDR_A_MA[0..14]10

D D

C C

B B

A A

Layout Note:
Place near
JP3

+1.8V

1

2

1

2

C158

2.2U_0805_16V4Z

C152

0.1U_0402_16V4Z

5

2.2U_0805_16V4Z

C147

1

2

0.1U_0402_16V4Z

1

1

2

2

C160

C159

RP156_0404_4P2R_5%

1 4
2 3

RP356_0404_4P2R_5%

1 4
2 3

RP556_0404_4P2R_5%

1 4
2 3

RP756_0404_4P2R_5%

1 4
2 3

RP956_0404_4P2R_5%

1 4
2 3

RP1156_0404_4P2R_5%

2 3
1 4

1 2

R117 56_0402_5%

C153

1

2

0.1U_0402_16V4Z

1

2

C161

2.2U_0805_16V4Z

Layout Note:
Place one cap close to every 2
pullup
resistors terminated to +0.9VS

+0.9V

0.1U_0402_16V4Z

DDR_A_MA5
DDR_A_MA8

DDR_A_MA3
DDR_A_MA1

DDR_A_BS1
DDR_CS0_DIMMA#

DDR_A_BS0
DDR_A_MA10

DDR_A_CAS#
DDR_A_WE#

DDR_CS1_DIMMA#
M_ODT1

DDR_A_MA7

2.2U_0805_16V4Z

2.2U_0805_16V4Z
C154

1

2

510

0.1U_0402_16V4Z

1

2

C162

+0.9V

RP2 56_0404_4P2R_5%

RP4 56_0404_4P2R_5%

RP6 56_0404_4P2R_5%

RP8 56_0404_4P2R_5%

RP10 56_0404_4P2R_5%

RP12 56_0404_4P2R_5%

RP13 56_0404_4P2R_5%

1

2

0.1U_0402_16V4Z

1

2

C163

14
23

14
23

14
23

14
23

14
23

14
23

14
23

0.1U_0402_16V4Z

C155

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C164

DDR_A_BS2
DDR_CKE0_DIMMA

DDR_A_MA11
DDR_A_MA6

DDR_A_MA12
DDR_A_MA9

DDR_A_MA4
DDR_A_MA2

DDR_A_RAS#
DDR_A_MA0

M_ODT0
DDR_A_MA13

DDR_CKE1_DIMMA
DDR_A_MA14

1

2

1

2

C165

4

0.1U_0402_16V4Z

C149

1

1

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C168

Layout Note:
Place these resistor
closely JP3,all
trace length Max=1.5"

330U_D2E_2.5VM_R7

1

C150

C157

+

2

0.1U_0402_16V4Z

1

1

2

2

C170

C169

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C156

C148

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C166

C167

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DDR_CKE0_DIMMA9

DDR_A_BS210

DDR_A_BS010

DDR_A_WE#10

DDR_A_CAS#10
DDR_CS1_DIMMA#9

M_ODT19

Issued Date

3

CLK_SMBDATA16,17
CLK_SMBCLK16,17

+3VS

2008/02/25 2008/02/25

3

+1.8V

V_DDR_MCH_REF

JDIMM1

1

1

C172

2

0.1U_0402_16V4Z

Compal Secret Data

Deciphered Date

3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99

101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

FOX_ASOA426-M4R-TR

SO-DIMM A

DDR_A_D4
DDR_A_D1

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D2
DDR_A_D3

DDR_A_D8
DDR_A_D9

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D11 DDR_A_D15
DDR_A_D10 DDR_A_D14

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_DM3

DDR_A_D26
DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2
DDR_A_MA12

DDR_A_MA9 DDR_A_MA7
DDR_A_MA8

DDR_A_MA5
DDR_A_MA3
DDR_A_MA1

DDR_A_MA10
DDR_A_BS0
DDR_A_WE#

DDR_A_CAS#
DDR_CS1_DIMMA#

M_ODT1
DDR_A_D37

DDR_A_D36
DDR_A_DQS#4

DDR_A_DQS4
DDR_A_D39

DDR_A_D38
DDR_A_D45

DDR_A_D44
DDR_A_DM5
DDR_A_D47 DDR_A_D43

DDR_A_D46
DDR_A_D49

DDR_A_D48

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D61 DDR_A_D57

DDR_A_D60
DDR_A_DM7
DDR_A_D59

DDR_A_D58
CLK_SMBDATA

CLK_SMBCLK

1

C171

2

2.2U_0603_6.3V4Z

VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS

VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD

DQ12
DQ13

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQS3#

DQS3
DQ30

DQ31

NC/CKE1

NC/A15
NC/A14

RAS#

ODT0

NC/A13

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQS5#

DQS5
DQ46

DQ47
DQ52

DQ53

DQ54
DQ55

DQ60
DQ61

DQS7#

DQS7
DQ62

DQ63

2

+1.8V

2

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS

VSS
DM1
VSS
CK0

CK0#

VSS

VSS

VSS

VSS

NC
DM2
VSS

VSS

VSS

VSS

VSS
VDD

VDD

A11

VDD

VDD
BA1

S0#
VDD

VDD

NC
VSS

VSS
DM4
VSS

VSS

VSS

VSS

VSS

VSS
CK1

CK1#

VSS
DM6
VSS

VSS

VSS

VSS

VSS
SAO
SA1

2

DDR_A_D5

4

DDR_A_D0

6
8

DDR_A_DM0

10
12

DDR_A_D6

14

DDR_A_D7

16
18

DDR_A_D13

20

DDR_A_D12

22
24

DDR_A_DM1

26
28

M_CLK_DDR0

30

M_CLK_DDR#0

32
34
36
38
40

42

DDR_A_D20

44

DDR_A_D21

46
48
50

DDR_A_DM2

52
54

DDR_A_D23

56

DDR_A_D22

58
60

DDR_A_D28DDR_A_D29

62

DDR_A_D25DDR_A_D24

64
66

DDR_A_DQS#3

68

DDR_A_DQS3

70
72

DDR_A_D31

74

DDR_A_D30

76
78

DDR_CKE1_DIMMA

80
82
84

DDR_A_MA14

86
88

DDR_A_MA11

90
92

A7

DDR_A_MA6

94

A6

96

DDR_A_MA4

98

A4

DDR_A_MA2

100

A2

DDR_A_MA0

102

A0

104

DDR_A_BS1

106

DDR_A_RAS#

108

DDR_CS0_DIMMA#

110
112

M_ODT0

114

DDR_A_MA13

116
118
120
122

DDR_A_D32

124

DDR_A_D33

126
128

DDR_A_DM4

130
132

DDR_A_D34

134

DDR_A_D35

136
138

DDR_A_D40

140

DDR_A_D41

142
144

DDR_A_DQS#5

146

DDR_A_DQS5

148
150
152

DDR_A_D42

154
156

DDR_A_D52

158

DDR_A_D53

160
162

M_CLK_DDR1

164

M_CLK_DDR#1

166
168

DDR_A_DM6

170
172

DDR_A_D51DDR_A_D54

174

DDR_A_D55

176
178
180

DDR_A_D56

182
184

DDR_A_DQS#7

186

DDR_A_DQS7

188
190

DDR_A_D62

192

DDR_A_D63

194
196
198
200

12

R115

R116

10K_0402_5%

10K_0402_5%

2.2U_0805_16V4Z
C146

1

2

M_CLK_DDR0 9
M_CLK_DDR#0 9

PM_EXTTS#0 9

DDR_CKE1_DIMMA 9

DDR_A_BS1 10
DDR_A_RAS# 10
DDR_CS0_DIMMA# 9

M_ODT0 9

M_CLK_DDR1 9
M_CLK_DDR#1 9

12

Compal Electronics, Inc.

Title

DDRII-SODIMM SLOT1

Size Document Number Rev

Custom

LA-4102P Blade discrete

Date: Sheet of

1

V_DDR_MCH_REF 9,16

0.1U_0402_16V4Z
C151

1

2

15 53Monday, February 25, 2008

1

0.4

5

www.kythuatvitinh.com

DDR_B_DQS#[0..7]10
DDR_B_D[0..63]10
DDR_B_DM[0..7]10
DDR_B_DQS[0..7]10
DDR_B_MA[0..14]10

D D

Layout Note:
Place near
JP10

+1.8V

2.2U_0805_16V4Z

2.2U_0805_16V4Z

2.2U_0805_16V4Z
C175

C174

1

1

1

2

2

2

Layout Note:

C C

Place one cap close to every 2
pullup
resistors terminated to +0.9VS

+0.9V

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

1

2

2

2

C185

C184

C186

B B

DDR_B_MA5
DDR_B_MA3

DDR_B_BS0
DDR_B_WE#

DDR_B_MA0
DDR_B_BS1

DDR_B_RAS#
DDR_CS2_DIMMB#

DDR_B_MA10
DDR_B_CAS#

A A

M_ODT3
DDR_CS3_DIMMB#

DDR_CKE3_DIMMB

RP1456_0404_4P2R_5%

1 4
2 3

RP1656_0404_4P2R_5%

1 4
2 3

RP1856_0404_4P2R_5%

1 4
2 3

RP2056_0404_4P2R_5%

1 4
2 3

RP2256_0404_4P2R_5%

1 4
2 3

RP2456_0404_4P2R_5%

2 3
1 4

1 2

R120 56_0402_5%

5

5

C177

1

2

0.1U_0402_16V4Z

1

2

C189

14
23

14
23

14
23

14
23

14
23

14
23

14
23

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C191

C190

DDR_B_MA9
DDR_CKE2_DIMMB

DDR_B_MA11
DDR_B_MA14

DDR_B_MA1
DDR_B_MA8

DDR_B_MA7
DDR_B_MA6

DDR_B_MA4
DDR_B_MA2

M_ODT2
DDR_B_MA13

DDR_B_BS2
DDR_B_MA12

C178

1

2

0.1U_0402_16V4Z

1

2

2.2U_0805_16V4Z

2.2U_0805_16V4Z

C176

C183

1

2

510

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C188

C187

+0.9V

RP15 56_0404_4P2R_5%

RP17 56_0404_4P2R_5%

RP19 56_0404_4P2R_5%

RP21 56_0404_4P2R_5%

RP23 56_0404_4P2R_5%

RP25 56_0404_4P2R_5%

RP26 56_0404_4P2R_5%

0.1U_0402_16V4Z
C179

1

2

0.1U_0402_16V4Z

1

2

C193

C192

4

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C181

C180

1

1

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

1

2

2

2

C194

C195

C196

Layout Note:
Place these resistor
closely JP3,all
trace length Max=1.5"

4

3

DDR_B_D0
DDR_B_D1

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D2
DDR_B_D3

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D20
DDR_B_DQS#2

DDR_B_DQS2
DDR_B_D19

DDR_B_D18
DDR_B_D28

DDR_B_DM3

DDR_B_D30
DDR_B_D31

DDR_CKE2_DIMMB9

DDR_B_BS210

DDR_B_BS010

DDR_B_WE#10

DDR_B_CAS#10

DDR_CS3_DIMMB#9

M_ODT39

CLK_SMBDATA15,17
CLK_SMBCLK15,17

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DDR_CKE2_DIMMB

DDR_B_BS2
DDR_B_MA12

DDR_B_MA9
DDR_B_MA8

DDR_B_MA5
DDR_B_MA3
DDR_B_MA1

DDR_B_MA10
DDR_B_BS0
DDR_B_WE#

DDR_B_CAS#
DDR_CS3_DIMMB#

M_ODT3
DDR_B_D32

DDR_B_D37
DDR_B_DQS#4

DDR_B_DQS4
DDR_B_D34

DDR_B_D35
DDR_B_D40

DDR_B_D41
DDR_B_DM5
DDR_B_D42

DDR_B_D43
DDR_B_D55

DDR_B_D50

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D52
DDR_B_D53

DDR_B_D60
DDR_B_D61 DDR_B_D57

DDR_B_DM7
DDR_B_D63

DDR_B_D58
CLK_SMBDATA

CLK_SMBCLK

+3VS

2.2U_0603_6.3V4Z

2008/02/25 2008/02/25

3

1

C197

2

+1.8V

1

C198

2

0.1U_0402_16V4Z

Compal Secret Data

V_DDR_MCH_REF

JDIMM2

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

FOX_AS0A426-N8RN-7F

SO-DIMM B

Deciphered Date

DQ12
DQ13

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQS3#

DQS3
DQ30

DQ31

NC/CKE1

NC/A15
NC/A14

RAS#

ODT0

NC/A13

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQS5#

DQS5
DQ46

DQ47
DQ52

DQ53

DQ54
DQ55

DQ60
DQ61

DQS7#

DQS7
DQ62

DQ63

2

+1.8V

2

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS

VSS
DM1
VSS
CK0

CK0#

VSS

VSS

VSS

VSS

NC
DM2
VSS

VSS

VSS

VSS

VSS
VDD

VDD

A11

VDD

VDD
BA1

S0#
VDD

VDD

NC
VSS

VSS
DM4
VSS

VSS

VSS

VSS

VSS

VSS
CK1

CK1#

VSS
DM6
VSS

VSS

VSS

VSS

VSS
SA0
SA1

DDR_B_D5

4

DDR_B_D4

6
8

DDR_B_DM0

10
12

DDR_B_D6

14

DDR_B_D7

16
18

DDR_B_D12

20

DDR_B_D13

22
24

DDR_B_DM1

26
28

M_CLK_DDR2

30

M_CLK_DDR#2

32
34

DDR_B_D14

36

DDR_B_D15

38
40

42

DDR_B_D16DDR_B_D21

44

DDR_B_D17

46
48
50

DDR_B_DM2

52
54

DDR_B_D22

56

DDR_B_D23

58
60

DDR_B_D29

62

DDR_B_D24DDR_B_D25

64
66

DDR_B_DQS#3

68

DDR_B_DQS3

70
72

DDR_B_D26

74

DDR_B_D27

76
78

DDR_CKE3_DIMMB

80
82
84

DDR_B_MA14

86
88

DDR_B_MA11

90

DDR_B_MA7

92

A7

DDR_B_MA6

94

A6

96

DDR_B_MA4

98

A4

DDR_B_MA2

100

A2

DDR_B_MA0

102

A0

104

DDR_B_BS1

106

DDR_B_RAS#

108

DDR_CS2_DIMMB#

110
112

M_ODT2

114

DDR_B_MA13

116
118
120
122

DDR_B_D36

124

DDR_B_D33

126
128

DDR_B_DM4

130
132

DDR_B_D39

134

DDR_B_D38

136
138

DDR_B_D44

140

DDR_B_D45

142
144

DDR_B_DQS#5

146

DDR_B_DQS5

148
150

DDR_B_D46

152

DDR_B_D47

154
156

DDR_B_D51

158

DDR_B_D54

160
162

M_CLK_DDR3

164

M_CLK_DDR#3

166
168

DDR_B_DM6

170
172

DDR_B_D49

174

DDR_B_D48

176
178

DDR_B_D56

180
182
184

DDR_B_DQS#7

186

DDR_B_DQS7

188
190

DDR_B_D59

192

DDR_B_D62

194
196
198
200

2

1

V_DDR_MCH_REF 9,15

0.1U_0402_16V4Z

2.2U_0805_16V4Z

1

1

C182

C173

2

2

M_CLK_DDR2 9
M_CLK_DDR#2 9

PM_EXTTS#1 9

DDR_CKE3_DIMMB 9

0612 add

DDR_B_BS1 10
DDR_B_RAS# 10
DDR_CS2_DIMMB# 9

M_ODT2 9

M_CLK_DDR3 9
M_CLK_DDR#3 9

R118

1 2

10K_0402_5%

12

10K_0402_5%

R119

Date: Sheet of

+3VS

Compal Electronics, Inc.

Title

DDRII-SODIMM SLOT2

Size Document Number Rev

LA-4102P Blade discrete

1

16 53Monday, February 25, 2008

0.4

5

www.kythuatvitinh.com

PCI

SRC

FSC

FSB

CLKSEL2

CLKSEL1

00
00

0

D D

C C

B B

1

0

1
0

1

011

1

1

1

1

1

FSA

CPU_BSEL07

FSB

CPU_BSEL17

FSC

CPU_BSEL27

ITP_EN

PCI_CLK3

+3VS +3VS

A A

CPU

FSA

CLKSEL0

0
1
0

0

0

MHz

266

133

200

166

333

100

400

MHz

100

100

100

100

100

100

100

1

12

CLRP1
NO SHORT PADS

R128

1 2

1 2

2.2K_0402_5%

R129

R138

1K_0402_5%

1 2

0_0402_5%

R154

1 2

0_0402_5%

R164

1 2

10K_0402_5%
R171

1 2

0_0402_5%

0 = SRC8/SRC8#
1 = ITP/ITP#
0 = Enable DOT96 & SRC1(UMA)
1 = Enable SRC0 & 27MHz(DIS)

12

R180
10K_0402_5%

12

@

R182
10K_0402_5%

12

@

R139
1K_0402_5%

+VCCP

@

R143
1K_0402_5%

1 2

1 2

R150
1K_0402_5%

Mini card debug port

12

24pin debug port

@

R157
0_0402_5%

+VCCP

12

@

R163
1K_0402_5%

1 2

R165
1K_0402_5%

12

@

R174
0_0402_5%

ITP_EN PCI_CLK3

5

R123

1 2

56_0402_5%

MHz

33.3

33.3

33.3

33.3

33.3

33.3

33.3

Reserved

MCH_CLKSEL0 9

MCH_CLKSEL1 9

MCH_CLKSEL2 9

12

R181
10K_0402_5%

12

R183
10K_0402_5%

REF

DOT_96

MHz

MHz

14.318 96.0 48.0

96.0

14.318

96.0

14.318

96.0

14.318

96.0

14.318

96.0

14.318

96.0

14.318

+VCCP

CLK_DEBUG_PORT_131
CLK_DEBUG_PORT_037

CLK_PCI_EC38
CLK_PCI_ICH25

V
V

@

USB
MHz

48.0

48.0

48.0

48.0

48.0

48.0

NB
CPU

VGATE27,49

CLK_ENABLE#49

CK_PWRGD27

No Debug port anymore

CLK_14M_ICH27

CLK_SMBDATA15,16
CLK_SMBCLK15,16

#SI change to 39 ohm

VGA

4

Routing the trace at least 10mil

18P_0402_50V8J

CLKREQ#_79

CLK_MCH_BCLK9
CLK_CPU_BCLK#6
CLK_CPU_BCLK6

R141 0_0402_5%@

1 2

R142 0_0402_5%@

1 2

R140 0_0402_5%

1 2

R147 33_0402_1%

1 2

R169 39_0402_1%

1 2

R155 39_0402_1%

1 2

R158 33_0402_1%

1 2

R161 33_0402_1%

1 2

CLK_48M_ICH27

CLK_PCIE_VGA20
CLK_PCIE_VGA#20

SB, MINI PCI

4

+3VS

Y1

12

2

C213

2

1

1

Vendor suggests 22pF

R126 475_0402_1%

1 2

R130 0_0402_5%

1 2

R132 0_0402_5%

1 2

R134 0_0402_5%

1 2

R136 0_0402_5%

1 2

R_CKPWRGD
FSB

CLK_XTAL_OUT
CLK_XTAL_IN

FSC
REF1

T44 @

CLK_SMBDATA
CLK_SMBCLK

PCI2_1
PCI2_2
27_SEL
PCI_CLK3
ITP_EN

R167 39_0402_1%

1 2

R173 0_0402_5%

1 2

R175 0_0402_5%

1 2

ICH_SMBDATA21,27,31,37

ICH_SMBCLK21,27,31,37

Q3B 2N7002DW-7-F_SOT363-6

3

+3VS_CK505

R121

1 2

0_0805_5%

CLK_XTAL_OUT
CLK_XTAL_IN

14.31818MHZ_16P

C214
18P_0402_50V8J

1

C199
10U_0805_10V4Z

2

R_CLKREQ#_7
R_MCH_BCLK#
R_MCH_BCLK
R_CPU_BCLK#
R_CPU_BCLK

U3

+3VS_CK505

1

CKPWRGD/PD#

2

FS_B/TEST_MODE

3

VSS_REF

4

XTAL_OUT

5

XTAL_IN

6

VDD_REF

7

REF_0/FS_C/TEST_

8

REF_1

9

SDA

10

SCL

11

NC

12

VDD_PCI

13

PCI_1

14

PCI_2

15

PCI_3

16

PCI_4/SEL_LCDCL

17

PCIF_5/ITP_EN

18

VSS_PCI

+3VS_CK505

FSA

+1.05VS_CK505

R_CLK_PCIE_VGA
R_CLK_PCIE_VGA# SSCDREFCLK#

+3VS

6 1

Q3A 2N7002DW-7-F_SOT363-6

354

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

+VCCP

+3VS_CK505

70

69

71

72

CPU_0

CPU_0#

VSS_CPU

VDD_CPU

VDD_4819USB_0/FS_A20USB_1/CLKREQ_A#21VSS_4822VDD_IO23SRC_0/DOT_9624SRC_0#/DOT_96#25VSS_IO26VDD_PLL327LCDCLK/27M28LCDCLK#/27M_SS29VSS_PLL330VDD_PLL3_IO31SRC_232SRC_2#33VSS_SRC34SRC_335SRC_3#

+3VS

2.2K_0402_5%

2

3

C200

0.1U_0402_16V4Z

68

R178

2008/02/25 2008/02/25

67

CPU_1

66

CPU_1#

VDD_CPU_IO

+3VS

R122

1 2

0_0805_5%

+1.05VS_CK505

62

64

65

63

CLKREQ_7#

SRC_8/CPU_ITP

SRC_8#/CPU_ITP#

1

C201

0.1U_0402_16V4Z

2

10U_0805_10V4Z

60

59

61

58

SRC_7

SRC_7#

VSS_SRC

VDD_SRC_IO

R179

2.2K_0402_5%

CLK_SMBDATA

CLK_SMBCLK

Compal Secret Data

Place close to U51

0.1U_0402_16V4Z

1

C206

2

R_CPU_XDP
R_CPU_XDP#
R_MCH_3GPLL
R_MCH_3GPLL#
R_CLKREQ#_6
R_CLK_PCIE_MCARD2
R_CLK_PCIE_MCARD2#

+3VS_CK505

56

57

55

SRC_6

SRC_6#

VDD_SRC

CLKREQ_6#

PCI_STOP#

CPU_STOP#

VDD_SRC_IO

CLKREQ_10#

CLKREQ_11#

CLKREQ_9#

VSS_SRC

CLKREQ_4#

VDD_SRC_IO

CLKREQ_3#

SLG8SP553VTR_QFN72_10x10

36

R_PCIE_SATA#
R_PCIE_SATA

R_PCIE_ICH#
R_PCIE_ICH

+1.05VS_CK505

SSCDREFCLK

Deciphered Date

1

2

1

C207

2

0.1U_0402_16V4Z

SRC_10#

SRC_10
SRC_11

SRC_11#

SRC_9#

SRC_9

SRC_4#

SRC_4

C202

0.1U_0402_16V4Z

1

C208

2

+1.05VS_CK505

54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37

2

1

C203

0.1U_0402_16V4Z

2

10U_0805_10V4Z

1

C209

2

R124 0_0402_5%
R125 0_0402_5%
R127 0_0402_5%
R131 0_0402_5%
R133 475_0402_1%
R135 0_0402_5%
R137 0_0402_5%

H_STP_PCI#
H_STP_CPU#

R_CLK_PCIE_MCARD0#
R_CLK_PCIE_MCARD0
R_CLKREQ#_10
R_CLK_SRC11
R_CLK_SRC11#

R_CLK_PCIE_LAN#
R_CLK_PCIE_LAN
R_CLKREQ#_9

R_CLKREQ#_4
R_CLK_PCIE_NCARD#
R_CLK_PCIE_NCARD

R_CLKREQ#_C

R166 0_0402_5%
R168 0_0402_5%

R170 0_0402_5%
R172 0_0402_5%

R176 33_0402_5%
R177 33_0402_5%

0.1U_0402_16V4Z

1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1

2

1

C204

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

C210

2

R144 0_0402_5%
R145 0_0402_5%
R146 475_0402_1%
R725 0_0402_5%
R726 0_0402_5%

R152 0_0402_5%
R153 0_0402_5%
R738 475_0402_1%

R156 475_0402_1%
R159 0_0402_5%
R160 0_0402_5%

R162 475_0402_1%

#SI change to 33 ohm

2

1

1

C205

0.1U_0402_16V4Z

2

+1.05VS_CK505

1

C212

C211

2

0.1U_0402_16V4Z

XDP/ITP

3G_PLL

MiniCard_WLAN

CLK_PCIE_MCARD0# 31
CLK_PCIE_MCARD0 31

CLKREQ#_10 31

CLK_SRC11 32
CLK_SRC11# 32

CLK_PCIE_LAN# 30
CLK_PCIE_LAN 30

CLKREQ#_9 30
CLKREQ#_4 31

CLK_PCIE_NCARD# 31
CLK_PCIE_NCARD 31

CLKREQ#_C 27

SATA

ICH

VGA

MiniCard_WWAN

Card reader

GLAN

New Card

H_STP_PCI# 27
H_STP_CPU# 27

1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2

1 2
1 2
1 2

1 2

CLK_CPU_XDP 6
CLK_CPU_XDP# 6
CLK_MCH_3GPLL 9
CLK_MCH_3GPLL# 9CLK_MCH_BCLK#9
CLKREQ#_6 31
CLK_PCIE_MCARD2 31
CLK_PCIE_MCARD2# 31

CLK_PCIE_SATA# 26
CLK_PCIE_SATA 26

CLK_PCIE_ICH# 27
CLK_PCIE_ICH 27

27M_SSC 21
27M_CLK 21

#PV for WWAN noise add 12P

C215

@

5P_0402_50V8C

C216

12P_0402_50V8J

C217

@

4.7P_0402_50V8C
C218

@

4.7P_0402_50V8C

Compal Electronics, Inc.

Title

Clock Generator CK505

Size Document Number Rev

Date: Sheet of

LA-4102P Blade discrete

12
12
12
12

1

CLK_48M_ICH
CLK_14M_ICH
CLK_PCI_ICH
CLK_PCI_EC

17 53Monday, February 25, 2008

0.4

A

www.kythuatvitinh.com

CRT
Connector

1 1

+5VS +5VS

C221

0.1U_0402_16V4Z

1 2

5

1

U4
SN74AHCT1G125GW_SOT353-5

CRT_HSYNC20

CRT_VSYNC20

2 2

RED_L40

GREEN_L40

3 3

BLUE_L40

M_RED20

M_GREEN20

M_BLUE20

CRT_HSYNC

CRT_VSYNC

#SI Remove pull low resistor

A2Y

3

P

OE#

G

4

A2Y

B

C222

0.1U_0402_16V4Z

1 2

12

R237

R184

1 2

R189

1 2

L2

1 2

HLC0603CSCCR11JT_0603

L3

1 2

HLC0603CSCCR11JT_0603

L4

1 2

HLC0603CSCCR11JT_0603

HSYNC_G_A

1

5

P

VSYNC_G_A D_VSYNC

4

OE#

G

U5
SN74AHCT1G125GW_SOT353-5

3

12

12

150_0402_1%

150_0402_1%

150_0402_1%

R239

R238

D_HSYNC40

D_VSYNC40

0_0603_5%

0_0603_5%

10P_0402_50V8J

RED_L

GREEN_L

BLUE_L

D_HSYNC

@

1

C223
5P_0402_50V8C

2

1

1

C228

2

2

10P_0402_50V8J

C229

C

D4

2 1

RB491D_SC59-3

1

2

GREEN_L

BLUE_L

1

C230
10P_0402_50V8J

2

@

C224
5P_0402_50V8C

RED_L

F1

1.1A_6VDC_FUSE

2.2K_0402_5%

D_DDCDATA

D_DDCCLK

21

W=40mils

0.1U_0402_16V4Z

JCRT1

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

+CRTVDD +CRTVDD

12

R185

2.2K_0402_5%

D_DDCDATA 40
D_DDCCLK 40

D

+CRTVDD+RCRT_VCC+5VS

1

2

C220

CONN@

SUYIN_070546FR015S263ZR

16
17

12

R186

6 1

2N7002DW-7-F_SOT363-6

+3VS

2

Q5A

<BOM Structure>

BLUE_L
GREEN_L
RED_L

354

2N7002DW-7-F_SOT363-6

1

D5

@

2

3

R187

2.2K_0402_5%

Q5B

E

Place close to
JCRT

1

1

2

DAN217T146_SC59-3

+3VS

12

12

R188

2.2K_0402_5%

@

3

D6

DAN217T146_SC59-3

3VDDCDA

3VDDCCL

D7

@

+5VS

2

3

DAN217T146_SC59-3

3VDDCDA 21

3VDDCCL 21

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

CRT Connector

Size Document Number Rev

D

Date: Sheet of

LA-4102P Blade discrete

E

18 53Monday, February 25, 2008

0.4

5

www.kythuatvitinh.com

INVPWR_B++LCDVDD+3VS

D D

C C

C235

C236

C237

1

12

12

2

680P_0402_50V7K

680P_0402_50V7K

USB20_P427
USB20_N427

LVDS CONN WITH Camera and Digi MIC

680P_0402_50V7K

USB20_P4
USB20_N4

JLVDS1

1
3
5
7

9
11
13
15
17

+3VS

19
21
23
25
27
29
31
33
35
37
39

ACES_88242-4001

1108 EMI request

DMIC_CLK
DMIC_DAT

220P_0402_25V8J

2

1

2

4

3

4

6

5

6

8

7

8

10

9

10

12

11

12

14

13

14

16

15

16

18

17

18

20

19

20

22

21

22

24

23

24

26

25

26

28

27

28

30

29

30

32

31

32

34

33

34

36

35

36

38

37

38

40

39

40

42

GND41GND

@

4

C2110

1

2

LVDS_A2­LVDS_A2+
LVDS_A1­LVDS_A1+
LVDS_A0­LVDS_A0+
LVDS_ACLK­LVDS_ACLK+

DMIC_DAT
DMIC_CLK
+5V_LOGO
INV_PWM
BKOFF#
DAC_BRIG

DDC2_CLK
DDC2_DATA

680P_0402_50V7K

1

C2111

@

220P_0402_25V8J

2

R727
100_0805_5%

USB_CAM

BKOFF#

1 2

C435

@

1

1

2

2

12

R717

10K_0402_5%

LVDS_A2- 20
LVDS_A2+ 20
LVDS_A1- 20
LVDS_A1+ 20
LVDS_A0- 20
LVDS_A0+ 20
LVDS_ACLK- 20
LVDS_ACLK+ 20

DMIC_DAT 33
DMIC_CLK 33

INV_PWM 38
BKOFF# 38
DAC_BRIG 38

DDC2_CLK 21
DDC2_DATA 21

C434
680P_0402_50V7K

+5VS

680P_0402_50V7K

#SI2 for EMI

R202

2.2K_0402_5%

DDC2_CLK
DDC2_DATA

DMIC_DAT
DMIC_CLK

@

3

0.1U_0402_16V4Z

+3VS

1 2

1

C496

2

R203

2.2K_0402_5%

1 2

1

2

+LCDVDD

1

1

C232

C231

0.1U_0402_16V4Z

2

2

Limited Current < 1A

ENAVDD21

Avoid Panel display garbage after power
on.

@

C498
680P_0402_50V7K

12

R198

470_0402_5%

61

Q8A

2

2N7002DW-7-F_SOT363-6

12

R201

2.2K_0402_5%

@

L5 0_0805_5%

1 2

L6

1 2

FBMA-L11-201209-221LMA30T_0805

0308_Reserve L10 and install
L11.

2

+5VALW+LCDVDD

R199

1M_0402_5%

1 2

3

Q8B2N7002DW-7-F_SOT363-6

5

0.22U_0603_10V7K

C239

1

4

@

2

INVPWR_B+B+

4.7U_0805_10V4Z

R200

100K_0402_5%

C233

12

SI2301BDS-T1-E3_SOT23-3

1

2

C238

0.047U_0402_16V7K

1

Q7

1 3

D

2

+3VS+LCDVDD

S

G

1

C234

2

4.7U_0805_10V4Z

1

C1391
10U_0805_6.3V6M

2

#PV reserve pull low 10K

B B

A A

USB Camera Power

1106 Add SB control pin

PJP604

PAD-OPEN 2x2m

10U_0805_6.3V6M

GPIO2027

PAD-OPEN 2x2m

2 1
1

C1392

2

@

R2073 0_0402_5%

1 2

PJP4

0_0402_5%

+5VS+5VALW

2 1

R2072

1 2

USB_VCCA is +3.9V
USB_VCCA =1.25X(1+R1091/R1093)

U42

1

IN

OUT

2

GND

3

SHDN

BYP

G916-390T1UF_SOT23-5

USB_CAM

215K_0603_1%

12

R1091

5

4

12

R1093

100K_0402_1%

#SI change lib

#SI Add GPIO20 control and reserve +5VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

2

Date: Sheet of

LCD CONN.

LA-4102P Blade discrete

1

19 53Monday, February 25, 2008

0.4

A

www.kythuatvitinh.com

LVDS & DAC Interface

U17F

NB9M-GS_BGA_533P
COMMON

IFPAB_PLLVDD
IFPAB_RSET

12

R205
1K_0402_1%

2

1

C280

R206

10K_0402_5%

DACA_VDD

DACA_VREF

1

C321

2

DACB_VDD

@

IFPA_IOVDD
IFPB_IOVDD

12

124_0402_1%

6/13 IFPAB

AD5

IFPAB_PLLVDD

AB6

IFPAB_RSET

V3

IFPA_IOVDD

V2

IFPB_IOVDD

U17D

NB9M-GS_BGA_533P
COMMON

5/13 DACC

W5

DACC_VDD

R6

DACC_VREF

V6

DACC_RSET

DAC C

U17C

NB9M-GS_BGA_533P

CRT

COMMON

3/13 DACA

AG2

DACA_VDD

AF1

DACA_VREF

AE1

DACA_RSET

D7
G6
F8

U17E

NB9M-GS_BGA_533P
COMMON

4/13 DACB

DACB_VDD

DACB_VREF

DACB_RSET

DAC A

TV-OUT

R207

DAC B

#SI Change to +VDDMEM18

+VDD_MEM18

100mA

4.7U_0603_6.3V6K

4700P_0402_25V7K

BLM18PG181SN1D_0603

1

4.7U_0603_6.3V6K

2

+VDD_MEM18

BLM18PG181SN1D_0603

C257

+3VS

12

L7

1

C246

2

#SI Change to +VDDMEM18

100 mA

12

L8

1

C251

2

4.7U_0603_6.3V6K

BLM18PG181SN1D_0603

150 mA

12

L9

1

C317

1U_0402_6.3V4Z

2

4700P_0402_25V7K

1

2

4700P_0402_25V7K

1

2

1

C319

2

A

C247

C266

4700P_0402_25V7K

1

2

470P_0402_50V7K

1 2

2

C248

1

470P_0402_50V7K

470P_0402_50V7K

2

1

C267

470P_0402_50V7K

C279

1 2

1

C320

2

0.1U_0402_16V4Z

R210

10K_0402_5%

#SI Remove TV out

1 1

2 2

3 3

4 4

DATA

CLOCK

B

C

D

E

PEG Interface

V4

IFPA_TXD0

V5

IFPA_TXD0

AA4

IFPA_TXD1

AA5

IFPA_TXD1

A

Y4

IFPA_TXD2

W4

IFPA_TXD2

AB5

IFPA_TXD3

AB4

IFPA_TXD3

V1

IFPB_TXD4

W1

IFPB_TXD4

W2

IFPB_TXD5

W3

IFPB_TXD5

B

AA3

IFPB_TXD6

AA2

IFPB_TXD6

AA1

IFPB_TXD7

AB1

IFPB_TXD7

AD4

IFPA_TXC

AC4

IFPA_TXC

A

AB2

IFPB_TXC

B

AB3

IFPB_TXC

U6

DACC_HSYNC

U4

DACC_VSYNC

T5

DACC_RED

T4

DACC_GREEN

R4

DACC_BLUE

AD2

DACA_HSYNC

AD1

DACA_VSYNC

AE2

DACA_RED

AE3

DACA_GREEN

AD3

DACA_BLUE

D6

DACB_CSYNC

F7

DACB_RED

E7

DACB_GREEN

E6

DACB_BLUE

B

12

12

150_0402_1%

150_0402_1%

150_0402_1%

R195

R196

#SI Remove TV out

LVDS_A0- 19
LVDS_A0+ 19

LVDS_A1- 19
LVDS_A1+ 19

LVDS_A2- 19
LVDS_A2+ 19

R204
0_0402_5%

PLT_RST#9,25,30,31,32

PEG_RXP011

LVDS_ACLK- 19
LVDS_ACLK+ 19

CRT_HSYNC 18
CRT_VSYNC 18

M_RED 18
M_GREEN 18
M_BLUE 18

12

R197

PEG_RXN011

PEG_M_TXP011
PEG_M_TXN011

PEG_RXP111
PEG_RXN111

PEG_M_TXP111
PEG_M_TXN111

PEG_RXP211
PEG_RXN211

PEG_M_TXP211
PEG_M_TXN211

PEG_RXP311

PEG_RXN311
PEG_M_TXP311

PEG_M_TXN311

PEG_RXP411
PEG_RXN411

PEG_M_TXP411
PEG_M_TXN411

PEG_RXP511
PEG_RXN511

PEG_M_TXP511
PEG_M_TXN511

PEG_RXP611
PEG_RXN611

PEG_M_TXP611
PEG_M_TXN611

PEG_RXP711
PEG_RXN711

PEG_M_TXP711
PEG_M_TXN711

PEG_RXP811
PEG_RXN811

PEG_M_TXP811
PEG_M_TXN811

PEG_RXP911
PEG_RXN911

PEG_M_TXP911
PEG_M_TXN911

PEG_RXP1011
PEG_RXN1011

PEG_M_TXP1011
PEG_M_TXN1011

PEG_RXP1111
PEG_RXN1111

PEG_M_TXP1111
PEG_M_TXN1111

PEG_RXP1211
PEG_RXN1211

PEG_M_TXP1211
PEG_M_TXN1211

PEG_RXP1311
PEG_RXN1311

PEG_M_TXP1311
PEG_M_TXN1311

PEG_RXP1411
PEG_RXN1411

PEG_M_TXP1411
PEG_M_TXN1411

PEG_RXP1511
PEG_RXN1511

PEG_M_TXP1511
PEG_M_TXN1511

1 2

CLK_PCIE_VGA17

CLK_PCIE_VGA#17

C265 0.1U_0402_16V4Z

1 2

C268 0.1U_0402_16V4Z

1 2

C270 0.1U_0402_16V4Z

1 2

C271 0.1U_0402_16V4Z

1 2

C281 0.1U_0402_16V4Z

1 2

C282 0.1U_0402_16V4Z

1 2

C283 0.1U_0402_16V4Z

1 2

C284 0.1U_0402_16V4Z

1 2

C291 0.1U_0402_16V4Z

1 2

C292 0.1U_0402_16V4Z

1 2

C293 0.1U_0402_16V4Z

1 2

C294 0.1U_0402_16V4Z

1 2

C301 0.1U_0402_16V4Z

1 2

C302 0.1U_0402_16V4Z

1 2

C303 0.1U_0402_16V4Z

1 2

C304 0.1U_0402_16V4Z

1 2

C305 0.1U_0402_16V4Z

1 2

C306 0.1U_0402_16V4Z

1 2

C307 0.1U_0402_16V4Z

1 2

C308 0.1U_0402_16V4Z

1 2

C309 0.1U_0402_16V4Z

1 2

C310 0.1U_0402_16V4Z

1 2

C315 0.1U_0402_16V4Z

1 2

C316 0.1U_0402_16V4Z

1 2

C322 0.1U_0402_16V4Z

1 2

C323 0.1U_0402_16V4Z

1 2

C324 0.1U_0402_16V4Z

1 2

C326 0.1U_0402_16V4Z

1 2

C328 0.1U_0402_16V4Z

1 2

C329 0.1U_0402_16V4Z

1 2

C330 0.1U_0402_16V4Z

1 2

C331 0.1U_0402_16V4Z

1 2

C

PEX_REFCLKP

PEX_REFCLKN

PEX_RST#

PEX_TXP0
PEX_TXN0

PEX_TXP1
PEX_TXN1

PEX_TXP2
PEX_TXN2

PEX_TXP3
PEX_TXN3

PEX_TXP4
PEX_TXN4

PEX_TXP5
PEX_TXN5

PEX_TXP6
PEX_TXN6

PEX_TXP7
PEX_TXN7

PEX_TXP8
PEX_TXN8

PEX_TX9
PEX_TX9*

PEX_TX10
PEX_TX10*

PEX_TX11
PEX_TX11*

PEX_TX12
PEX_TX12*

PEX_TX13
PEX_TX13*

PEX_TX14
PEX_TX14*

PEX_TXP15
PEX_TXN15

U17A

NB9M-GS_BGA_533P
COMMON

1/13 PCI_EXPRESS

AE9

RFU

AD9

PEX_RST

AB10

PEX_REFCLK

AC10

PEX_REFCLK

AD10

PEX_TX0

AD11

PEX_TX0

AE12

PEX_RX0

AF12

PEX_RX0

AD12

PEX_TX1

AC12

PEX_TX1

AG12

PEX_RX1

AG13

PEX_RX1

AB11

PEX_TX2

AB12

PEX_TX2

AF13

PEX_RX2

AE13

PEX_RX2

AD13

PEX_TX3

AD14

PEX_TX3

AE15

PEX_RX3

AF15

PEX_RX3

AD15

PEX_TX4

AC15

PEX_TX4

AG15

PEX_RX4

AG16

PEX_RX4

AB14

PEX_TX5

AB15

PEX_TX5

AF16

PEX_RX5

AE16

PEX_RX5

AC16

PEX_TX6

AD16

PEX_TX6

AE18

PEX_RX6

AF18

PEX_RX6

AD17

PEX_TX7

AD18

PEX_TX7

AG18

PEX_RX7

AG19

PEX_RX7

AC18

PEX_TX8

AB18

PEX_TX8

AF19

PEX_RX8

AE19

PEX_RX8

AB19

PEX_TX9

AB20

PEX_TX9

AE21

PEX_RX9

AF21

PEX_RX9

AD19

PEX_TX10

AD20

PEX_TX10

AG21

PEX_RX10

AG22

PEX_RX10

AD21

PEX_TX11

AC21

PEX_TX11

AF22

PEX_RX11

AE22

PEX_RX11

AB21

PEX_TX12

AB22

PEX_TX12

AE24

PEX_RX12

AF24

PEX_RX12

AC22

PEX_TX13

AD22

PEX_TX13

AG24

PEX_RX13

AF25

PEX_RX13

AD23

PEX_TX14

AD24

PEX_TX14

AG25

PEX_RX14

AG26

PEX_RX14

AE25

PEX_TX15

AE26

PEX_TX15

AF27

PEX_RX15

AE27

PEX_RX15

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AC9

PEX_IOVDD

AD7

PEX_IOVDD

AD8

PEX_IOVDD

AE7

PEX_IOVDD

AF7

PEX_IOVDD

AG7

PEX_IOVDD

AB13

PEX_IOVDDQ

AB16

PEX_IOVDDQ

AB17

PEX_IOVDDQ

AB7

PEX_IOVDDQ

AB8

PEX_IOVDDQ

AB9

PEX_IOVDDQ

AC13

PEX_IOVDDQ

AC7

PEX_IOVDDQ

AD6

PEX_IOVDDQ

AE6

PEX_IOVDDQ

AF6

PEX_IOVDDQ

AG6

PEX_IOVDDQ

J10

VDD

J12

VDD

J13

VDD

J9

VDD

L9

VDD

M11

VDD

M17

VDD

M9

VDD

N11

VDD

N12

VDD

N13

VDD

N14

VDD

0.1U_0402_16V4Z

N15

VDD

N16

VDD

N17

VDD

N19

VDD

N9

VDD

P11

VDD

P12

VDD

P13

VDD

P14

VDD

P15

VDD

P16

VDD

P17

VDD

R11

VDD

R12

VDD

R13

VDD

R14

VDD

R15

VDD

R16

VDD

R17

VDD

R9

VDD

T11

VDD

T17

VDD

T9

VDD

U19

VDD

U9

VDD

W10

VDD

W12

VDD

W13

VDD

W18

VDD

W19

VDD

W9

VDD

W15

VDD_SENSE

W16

GND_SENSE

A12

VDD33

B12

VDD33

C12

VDD33

D12

VDD33

E12

VDD33

F12

VDD33

120mA

PEX_PLLDVDD

AF9

PEX_PLLVDD

0.1U_0402_16V4Z

AF10

PEX_TERMP

D

AE10

AG9

RFU

AG10

Compal Secret Data

1 2

R209

2.49K_0402_1%

Deciphered Date

1 2

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT

2008/02/25 2008/02/25

1

C244

2

0.1U_0402_16V4Z

1

C258

2

0.1U_0402_16V4Z

2

1

1U_0603_10V4Z

0.1U_0402_16V4Z

1

C273

2

1

C285

2

470P_0402_50V7K

1

C295

2

R392 0_0402_5%

1 2

110 mA

1

C327

2

R208 200_0402_1%

0.1U_0402_16V4Z

470P_0402_50V7K

4.7U_0603_6.3V6K

C262

0.1U_0402_16V4Z

470P_0402_50V7K

470P_0402_50V7K

+NVVDD_SENSE

1

C1476

2

0.1U_0402_16V4Z

4.7U_0603_6.3V6M

1

C325

2

0.01U_0402_25V7K

1

2

C252

C253

2

1

1U_0603_10V4Z

1

2

C249

C259

2

1

1U_0603_10V4Z

1

1

C264

C263

2

2

10U_0805_6.3V6M

0.1U_0402_16V4Z

1

1

C275

C274

2

2

0.1U_0402_16V4Z

22U_0805_6.3VAM

1

1

C287

C286

2

2

22U_0805_6.3VAM

470P_0402_50V7K

1

1

C297

C296

2

2

470P_0402_50V7K

+3VS

VDD33

1

1

C311

C314

2

2

1U_0603_10V4Z

0.1U_0402_16V4Z

1

1

C447

C446

2

2

1U_0402_6.3V4Z

+PCIE

600 mA

10U_0805_6.3V6M

1

1

C255

C254

2

2

0.1U_0402_16V4Z

1

C277

2

0.1U_0402_16V4Z

22U_0805_6.3VAM

1

C289

2

470P_0402_50V7K

1

C299

2

470P_0402_50V7K

12

L10

Compal Electronics, Inc.

LA-4102P Blade discrete

E

+NVVDD

1

C278

2

22u X 3

0.47u X 7

0.1u X 7

1

C300

2

+PCIE

PEG & LVDS & DAC

20 53Monday, February 25, 2008

4.7U_0603_6.3V6K

+PCIE

1.920 Amps

1

C276

2

1

C288

2

1

C298

2

BLM18PG181SN1D_0603

Title

Size Document Number Rev

Custom
Date: Sheet

of

0.4

5

www.kythuatvitinh.com

U17L

NB9M-GS_BGA_533P
COMMON

11/13 MISC

STRAP0

C7

STRAP0

STRAP1

B9

STRAP1

STRAP2

A9

STRAP2

C349

1 2

1

2

+3VS

12

12

0.1U_0402_16V4Z

C353

1U_0402_6.3V4Z

10K_0402_5%
R217

SPDIF_IN

10K_0402_5%
R220

AT88SC0808

1

C354

2

27M_SSC17

R214

40.2K_0402_1%

F11

1 2

STRAP_REF_3V3

F10

1 2

STRAP_REF_MIOB

40.2K_0402_1%
R216

F9

SPDIF

@

C15

RFU

D15

RFU

@

+3VS +3VS

2

1
2
3
4

HDCP
ROM

U7

A0
A1
A2
GND

1

2

0.1U_0402_16V4Z

10K_0402_5%

36 mA

0.1U_0402_16V4Z
C351

1

HDCP_WP

8

VCC

HDCP_WP

7

WP

HDCP_SCL

6

SCL

HDCP_SDA

5

SDA

U17K

NB9M-GS_BGA_533P
COMMON

12/13 XTAL_PLL

GPU_PLLVDD

K5

PLLVDD

K6

VID_PLLVDD

1

C355

L6

SP_PLLVDD

2

D11

XTAL_SSIN

12

XTALIN XTALOUT

R228

D10

XTAL_IN

1

@

C356

@

2

18P_0402_50V8J

R233 0_0402_5%

1 2

27M_CLK17

@

10K_0402_5%

R235

D D

SPDIF

SPDIF_OUT033

0.01U_0402_25V7K

C C

BLM18PG181SN1D_0603

12

+PCIE

L14

1

C352

C497

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

B B

XTALIN

12

12

10K_0402_5%
R221

12

10K_0402_5%
R223

ROM_SCLK

I2CH_SCL
I2CH_SDA

TESTMODE

RFU_GND

#SI2 change to pull hi

@

HDCP_SCL

Straps

MULTI LEVEL STRAPS

STRAP0
STRAP1
STRAP2
ROM_SI
ROM_SO
ROM_SCLK

R242

@

1 2

A A

@

@

5.1K_0402_5%
R244

1 2

10K_0402_1%

R246

1 2

5.1K_0402_5%

R248

1

45.3K_0402_1%
R250

1 2

5.1K_0402_5%
R252

1 2

15K_0402_5%

@

@

5

R243

1 2

45.3K_0402_1%
R245

1 2

5.1K_0402_5%
R247

1 2

5.1K_0402_5%
R249

1 2

5.1K_0402_5%
R251

1 2

5.1K_0402_5%
R253

1 2

5.1K_0402_5%

16MX16 Hynix
16MX16 Samsung
32MX16 Hynix
32MX16 Samsung

+3VS

@

Resistor
R248Locating

20 Kohms
10 Kohms
45 Kohms
30 Kohms

ValueDDR2

4

+3VS

12

R211

10K_0402_5%

ROM_CS#

B10

ROM_CS

ROM_SI

A10

ROM_SI

ROM_SO

C10

ROM_SO

ROM_SCLK

C9

R21310K_0402_5%

1 2

+3VS

HDCP_SCL

A3

HDCP_SDA

A4

12

+3VS

R21510K_0402_5%

N5

BUFRST

J5

RFU

F6

RFU

AD25

12

AC6

10K_0402_5%

12

10K_0402_5%
R224

@

XTAL_OUTBUFF

XTAL_OUT

E9

E10

C357

@

18P_0402_50V8J

4

R218

1

2

#SI2 add 2N7002 to GND

12

R229
10K_0402_5%

+3VS

@

VGA Thermal Sensor
ADM1032ARMZ

+3VS

Closed to VGA

2

C348

@

0.1U_0402_16V4Z

1

1

VGA_THERMDA

R222

HDMI_CLK­HDMI_CLK+
HDMI_TX0­HDMI_TX0+
HDMI_TX1­HDMI_TX1+
HDMI_TX2­HDMI_TX2+

VGA_THERMDC

THERM#_VGA

499_0402_1%

2

G

IN

IN
OUT
OUT
OUT
OUT

OUT
OUT
IN
OUT
OUT

OUT
IN
OUT
OUT

R960

<BOM Structure>

13

D

S

2
3

ADM1032ARMZ REEL_MSOP8@

12

R961

499_0402_1%

2N7002_SOT23-3

C350

@

1 2

2200P_0402_50V7K

1 2

10K_0402_5%@

GPIO I/O ACTIVE USAGE
GPIO0

GPIO1
GPIO2
GPIO3
GPIO4
GPIO5

GPIO6
GPIO7
GPIO8
GPIO9
GPIO10

GPIO11
GPIO12
GPIO13
GPIO14

+3VS

U6

VDD
D+
D­THERM#4GND

N/A

N/A
H
H
H
N/A

N/A
N/A
L
L
N/A

N/A
N/A
L
H

12

R962

499_0402_1%

Q74

3

#SI Change to +VDDMEM18

4.7U_0603_6.3V6K
C337

VGA_SM_CLK

8

SCLK

VGA_SM_DA

7

SDATA

THERM_SCI#

6

ALERT#

5

Primary DVI Hot-plug

2nd DVI Hot-plug
Panel Back-Light PWM
Panel Power Enable
Panel Back-Light Enable
NVVDD VID0

NVVDD VID1
FBVDD VID0
Thermal Alert
FAN PWM
FBVref Select

SLI SYNCO
AC Detect
PS Control or HDMI_CEC
PS Control

12

12

12

R965

R964

R963

499_0402_1%

499_0402_1%

499_0402_1%

3

+VDD_MEM18

12

1

2

VGA_SM_CLK
VGA_SM_DA

R966

499_0402_1%

BLM18PG181SN1D_0603

L12

4.7U_0603_6.3V6K

@

R219
10K_0402_5%

1 2

R1129 0_0402_5%

12

12

R967

499_0402_1%

160 mA

12

1

C338

2

4700P_0402_25V7K

4.7U_0603_6.3V6K

+PCIE

BLM18PG181SN1D_0603

12

L13

1

1

C342

THERM_SCI# 27,38

R1130 0_0402_5%

9/21 follow 17"

C343

2

2

4.7U_0603_6.3V6K

12

SMB_EC_CK2 6,38

12

SMB_EC_DA2 6,38

ICH_SMBCLK17,27,31,37

ICH_SMBDATA17,27,31,37

GPU_VID1 GPU_VID0 +NVVDD

0
0
1

2

U17H

NB9M-GS_BGA_533P
COMMON

7/13 IFPC

IFPC_PLLVDD

470P_0402_50V7K

IFPC_RSET

12

1

1

R212

C340

385 mA

4700P_0402_25V7K

0
1
0

U17I

NB9M-GS_BGA_533P
COMMON

10/13 HDAUDIO

Issued Date

1K_0402_1%

2

C341

IFPC_IOVDD

1

1

2

2

C347

C346

470P_0402_50V7K

12

R234
10K_0402_5%

12

R236
10K_0402_5%

T47
T48
T49
T50
T51

R2250_0402_5% @

12
12

R2260_0402_5%

@

0.9V

1.09V

unused

HD AUDIO

A7

HDA_BCLK

B7

HDA_SYNC

A6

HDA_SDI

B6

HDA_SDO

C6

HDA_RST

2008/02/25 2008/02/25

2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MXM DVI DP

P6

IFPC_PLLVDD

R5

IFPC_RSET

TXD0
TXD0

C

TXD1
TXD1

TXD2

J6

IFPC_IOVDD

TXD2

TXC
TXC

U17G

NB9M-GS_BGA_533P
COMMON

8/13 IFPE

N6

IFPE_PLLVDD

M6

IFPE_RSET

TXD0
TXD0

E

TXD1
TXD1

TXD2

H6

IFPE_IOVDD

TXD2

TXC
TXC

U17M

NB9M-GS_BGA_533P
COMMON

9/13 I2C_GPIO_THERM_JTAG

VGA_THERMDC

D8

THERMDN

VGA_THERMDA

D9

THERMDP

JTAG_TCK

AF3

JTAG_TCK

JTAG_TMS

@

AF4

JTAG_TMS

JTAG_TDI

@

AG4

JTAG_TDI

JTAG_TDO

@

AE4

JTAG_TDO

JTAG_TRST

@

AG3

JTAG_TRST

@

VGA_SM_CLK

T1

I2CS_SCL

VGA_SM_DA

T2

I2CS_SDA

HDA_SDIN2_R

R399 33_0402_5%

9/21 R329 near GPU

9/21 R237, R238, R240, R241 near ICH

Compal Secret Data

Deciphered Date

2

TXD0
TXD0

TXD2
TXD2

TXD1
TXD1

TXC
TXC

TXD0
TXD0

TXD2
TXD2

TXD1
TXD1

TXC
TXC

DVIMXM

1 2

IFPC_AUX
IFPC_AUX

IFPC_L3
IFPC_L3

IFPC_L2
IFPC_L2

IFPC_L1
IFPC_L1

IFPC_L0
IFPC_L0

DP

IFPE_AUX
IFPE_AUX

IFPE_L3
IFPE_L3

IFPE_L2
IFPE_L2

IFPE_L1
IFPE_L1

IFPE_L0
IFPE_L0

1

G5
G4

HDMI_C_CLK-

C1474 0.1U_0402_16V4Z

J4
H4

K4
L4

M4
M5

N4
P4

D4
D3

B4
B3

C4
C3

D5
E4

F4
F5

HDA_BITCLK_VGA 26

HDA_SYNC_VGA 26
HDA_SDIN2 26
HDA_SDOUT_VGA 26

HDA_RST#_VGA 26

1 2

HDMI_C_CLK+

C1475 0.1U_0402_16V4Z

1 2

HDMI_C_TX0-

C1468 0.1U_0402_16V4Z

1 2

HDMI_C_TX0+

C1469 0.1U_0402_16V4Z

1 2

HDMI_C_TX1-

C1470 0.1U_0402_16V4Z

1 2

HDMI_C_TX1+

C1471 0.1U_0402_16V4Z

1 2

HDMI_C_TX2-

C1472 0.1U_0402_16V4Z

1 2

HDMI_C_TX2+

C1473 0.1U_0402_16V4Z

1 2

I2CE_SCL
I2CE_SDA

I2CB_SCL
I2CB_SDA

R1

I2CA_SCL

T3

I2CA_SDA

I2CB_SCL

R2

I2CB_SCL

I2CB_SDA

R3

I2CB_SDA

DDC2_CLK

A2

I2CC_SCL

DDC2_DATA

B1

I2CC_SDA

N2

I2CD_SCL

N3

I2CD_SDA

I2CE_SCL

Y6

I2CE_SCL

I2CE_SDA

W6

I2CE_SDA

N1

GPIO0

G1

GPIO1

C1

GPIO2

ENVDD

M2

GPIO3

M3

GPIO4

K3

GPIO5

K2

GPIO6

J2

GPIO7

THERMAL ALERT

C2

GPIO8

SINN_GPIO9

M1

GPIO9

D2

GPIO10

D1

GPIO11

J3

GPIO12

J1

GPIO13

K1

GPIO14

F3

GPIO15

G3

GPIO16

G2

GPIO17

F1

GPIO18

F2

GPIO19

Compal Electronics, Inc.

Title

Straps & HDMI

Size Document Number Rev

Custom

LA-4102P Blade discrete

Date: Sheet

1

3VDDCDA 18

1 2
1 2

3VDDCCL 18

DDC2_CLK 19

HDMICLK_VGA 42

HDMI_DETECT 42
ENAVDD 19

ENBKL 38
GPU_VID0 47
GPU_VID1 47

1 2
1 2

1 2
1 2

DDC2_DATA 19

HDMIDAT_VGA 42

THERM#_VGA

THERM_SCI#

R3960_0402_5%
R3950_0402_5%

#SI Add GPU_VID1

HDMI_CLK- 42
HDMI_CLK+ 42

HDMI_TX0- 42
HDMI_TX0+ 42

HDMI_TX1- 42
HDMI_TX1+ 42

HDMI_TX2- 42
HDMI_TX2+ 42

+3VS

R2272K_0402_5%
R2302K_0402_5%

R2312K_0402_5%
R2322K_0402_5%

21 53Monday, February 25, 2008

CRT

LVDS
HDMI

of

0.4

A

www.kythuatvitinh.com

PJP605

1 2

FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1

A13

FBVDDQ

B13

FBVDDQ

C13

FBVDDQ

D13

FBVDDQ

D14

FBVDDQ

E13

FBVDDQ

F13

FBVDDQ

F14

FBVDDQ

F15

FBVDDQ

F16

FBVDDQ

F17

FBVDDQ

F19

FBVDDQ

F22

FBVDDQ

H23

FBVDDQ

H26

FBVDDQ

J15

FBVDDQ

J16

FBVDDQ

J18

FBVDDQ

J19

FBVDDQ

L19

FBVDDQ

L23

FBVDDQ

L26

FBVDDQ

M19

FBVDDQ

N22

FBVDDQ

U22

FBVDDQ

Y22

FBVDDQ

F26
J24
F25
M23
N27
M27
K26
J25
J27
G23
G26
J23
M25
K27
G25
L24
K23
K24
G22
K25
H22
M26
H24
F27
J26
G24
G27
M24
K22
J22

RFU

L22

RFU

F24
F23
N24
N23

B15
A15
B16

M22

R19
T19

0.1U_0402_16V4Z

+VDD_MEM18 +1.8VS

PAD-OPEN 3x3m

0.022U_0402_16V7K

1

1

C366

C358

2

2

0.022U_0402_16V7K

0.022U_0402_16V7K

4700P_0402_25V7K

1

1

C369

C361

2

2

4700P_0402_25V7K

4700P_0402_25V7K

4700P_0402_25V7K

1

1

C371

C370

2

2

4700P_0402_25V7K

0.1U_0402_16V4Z

CMDA[30..0] 23,24

CMDA0
CMDA1
CMDA2
CMDA3
CMDA4
CMDA5
CMDA6
CMDA7
CMDA8
CMDA9
CMDA10
CMDA11
CMDA12
CMDA13
CMDA14
CMDA15
CMDA16
CMDA17
CMDA18
CMDA19
CMDA20
CMDA21
CMDA22
CMDA23
CMDA24
CMDA25
CMDA26
CMDA27
CMDA28
CMDA29
CMDA30

CLKA0 23
CLKA0# 23
CLKA1 24
CLKA1# 24

R254 30_0402_1%

1 2

+VDD_MEM18

R255 30_0402_1%

1 2

R256 40.2_0402_1%@

1 2

R257

1 2

+VDD_MEM18

10K_0402_5% @

FB_PLLAVDD

0.01U_0402_25V7K

1

1

1

C376

C379

C377

2

2

2

1U_0402_6.3V4Z

1

C359

2

1

C362

2

1

2

C372

1

2

<BOM Structure>

C380
1U_0402_6.3V4Z

0.1U_0402_16V4Z

0.022U_0402_16V7K

1U_0402_6.3V4Z

#SI2 change to short pad

1

1

C360

C367

2

2

4.7U_0603_6.3V6K

1

1

C364

C363

2

2

0.1U_0402_16V4Z

C373

1

1

2

2

C374

1U_0402_6.3V4Z

9/18 add R for nvidia

R1131 10K_0402_5%

CMDA12

1 2

R394 10K_0402_5%

CMDA11

1 2

12

L15

BLM18PG181SN1D_0603

+VDD_MEM18

4.7U_0603_6.3V6K

1

2

0.1U_0402_16V4Z

1

2

0.022U_0402_16V7K

1

2

+PCIE

U17J

NB9M-GS_BGA_533P
COMMON

13/13 GND_NC

AC11

GND

AC14

GND

AC17

GND

AC2

C368

C365

C375

GND

AC20

GND

AC23

GND

AC26

GND

AC5

GND

AC8

GND

AF11

GND

AF14

GND

AF17

GND

AF2

GND

AF20

GND

AF23

GND

AF26

GND

AF5

GND

AF8

GND

B11

GND

B14

GND

B17

GND

B2

GND

B20

GND

B23

GND

B26

GND

B5

GND

B8

GND

E11

GND

E14

GND

E17

GND

E2

GND

E20

GND

E23

GND

E26

GND

E5

GND

E8

GND

H2

GND

H5

GND

J11

GND

J14

GND

J17

GND

K19

GND

K9

GND

L11

GND

L12

GND

L13

GND

L14

GND

L15

GND

L16

GND

L17

GND

L2

GND

L5

GND

M12

GND

M13

GND

M14

GND

M15

GND

M16

GND

P19

GND

P2

GND

P23

GND

P26

GND

P5

GND

P9

GND

T12

GND

T13

GND

T14

GND

T15

GND

T16

GND

U11

GND

U12

GND

U13

GND

U14

GND

U15

GND

U16

GND

U17

GND

U2

GND

U23

GND

U26

GND

U5

GND

V19

GND

V9

GND

W11

GND

W14

GND

W17

GND

Y2

GND

Y23

GND

Y26

GND

Y5

GND

AA6

NC

AC19

NC

E15

NC

T6

NC

VRAM Interface

MDA[15..0]

MDA[15..0]23

MDA[31..16]

MDA[31..16]23

MDA[47..32]

MDA[47..32]24

MDA[63..48]

MDA[63..48]24

1 1

DQMA[3..0]23

DQMA[7..4]24

QSA[3..0]23

QSA[7..4]24

QSA#[3..0]23

QSA#[7..4]24

+VDD_MEM18

R258

@

1K_0402_1%

R259

@

1K_0402_1%

12

Rt

12

Rb

MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

DQMA0
DQMA1
DQMA2
DQMA3
DQMA4
DQMA5
DQMA6
DQMA7

QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7

QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7

0.1U_0402_16V4Z

U17B

NB9M-GS_BGA_533P
COMMON

2/13 FRAME_BUFFER

D21

FBA_D0

C22

FBA_D1

B22

FBA_D2

A22

FBA_D3

C24

FBA_D4

B25

FBA_D5

A25

FBA_D6

A26

FBA_D7

D22

FBA_D8

E22

FBA_D9

E24

FBA_D10

D24

FBA_D11

D26

FBA_D12

D27

FBA_D13

C27

FBA_D14

B27

FBA_D15

D16

FBA_D16

E16

FBA_D17

D17

FBA_D18

F18

FBA_D19

D20

FBA_D20

F20

FBA_D21

E21

FBA_D22

F21

FBA_D23

C16

FBA_D24

B18

FBA_D25

C18

FBA_D26

D18

FBA_D27

C19

FBA_D28

C21

FBA_D29

B21

FBA_D30

A21

FBA_D31

P22

FBA_D32

P24

FBA_D33

R23

FBA_D34

R24

FBA_D35

T23

FBA_D36

U24

FBA_D37

V23

FBA_D38

V24

FBA_D39

N25

FBA_D40

N26

FBA_D41

R25

FBA_D42

R26

FBA_D43

T25

FBA_D44

V26

FBA_D45

V25

FBA_D46

V27

FBA_D47

V22

FBA_D48

W22

FBA_D49

W23

FBA_D50

W24

FBA_D51

AA22

FBA_D52

AB23

FBA_D53

AB24

FBA_D54

AC24

FBA_D55

W25

FBA_D56

W26

FBA_D57

W27

FBA_D58

AA25

FBA_D59

AB25

FBA_D60

AB26

FBA_D61

AD26

FBA_D62

AD27

FBA_D63

D23

FBA_DQM0

C26

FBA_DQM1

D19

FBA_DQM2

B19

FBA_DQM3

T24

FBA_DQM4

T26

FBA_DQM5

AA23

FBA_DQM6

AB27

FBA_DQM7

A24

FBA_DQS_WP0

C25

FBA_DQS_WP1

E19

FBA_DQS_WP2

A19

FBA_DQS_WP3

T22

FBA_DQS_WP4

T27

FBA_DQS_WP5

AA24

FBA_DQS_WP6

AA26

FBA_DQS_WP7

B24

FBA_DQS_RN0

D25

FBA_DQS_RN1

E18

FBA_DQS_RN2

A18

FBA_DQS_RN3

R22

FBA_DQS_RN4

R27

FBA_DQS_RN5

Y24

FBA_DQS_RN6

AA27

FBA_DQS_RN7

A16

FB_VREF

1

C378

2

@

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

FB_CAL_TERM_GND

FBA_DEBUG

FB_PLLAVDD

FB_DLLAVDD

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

2008/02/25 2008/02/25

Deciphered Date

Compal Electronics, Inc.

Title

VRAM / GND

Size Document Number Rev

Custom

LA-4102P Blade discrete

Date: Sheet

22 53Monday, February 25, 2008

of

0.4

5

www.kythuatvitinh.com

VRAM DDR2 chips (256MB & 512MB)

32Mx16 DDR2 400MHz *4==>256MB
64Mx16 DDR2 400MHz*4==>512MB

+VDD_MEM18

R260

12

(SSTL-1.8) VREF = .5*VDDQ

QSA[7..0]
QSA#[7..0]

DQMA[7..0]

MDA[63..0]

CMDA[30..0]

12

1

C385

2

0.1U_0402_16V4Z

U8

CMDA10

L2

BA0

CMDA18

L3

BA1

CMDA14

R2

A12

CMDA16

P7

A11

CMDA17

M2

A10/AP

CMDA20

P3

A9

CMDA19

P8

A8

CMDA23

P2

A7

CMDA21

N7

A6

CMDA22 MDA20

N3

A5

CMDA24

N8

A4

CMDA0

N2

A3

CMDA2

M7

A2

CMDA3

M3

A1

CMDA1

M8

CLKA0#
CLKA0

DQMA2
DQMA0

CMDA12

QSA2
QSA#2

QSA0
QSA#0

MEM_VREF0

A0

K8

CK

J8

CK

CMDA11

K2

CKE

CMDA8

L8

CS

CMDA9

WEK3VDDQ10

CMDA15

K7

RAS

CMDA25

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

CMDA27 CMDA27

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25

QSA[7..0]22,24

D D

QSA#[7..0]22,24

DQMA[7..0]22,24

MDA[63..0]22,24

CMDA[30..0]22,24

C C

B B

1K_0402_1%

R262

1K_0402_1%

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

4

MDA7

B9

DQ15

MDA0

B1

DQ14

MDA5

D9

DQ13

MDA2

D1

DQ12

MDA3

D3

DQ11

MDA4

D7

DQ10

MDA1

C2

DQ9

MDA6

C8

DQ8

MDA23

F9

DQ7

MDA18

F1

DQ6

H9

DQ5

MDA16

H1

DQ4

MDA17

H3

DQ3

MDA21

H7

DQ2

MDA19

G2

DQ1

MDA22

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1

VDD1

E1

VDD2

J9

VDD3

M9

VDD4

R1

VDD5

0.1U_0402_16V4Z

J1

VDDL

J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3

VSS1

E3

VSS2

J3

VSS3

N1

VSS4

P9

VSS5

1

1

C384

C383

4.7U_0805_6.3V6K

2

2

#PV reserve CMD27 to suport 64M x 16

3

U9

CMDA10

L2

BA0

CMDA18
CMDA14

CMDA16
CMDA17
CMDA20
CMDA19
CMDA23
CMDA21
CMDA22
CMDA24
CMDA0
CMDA2
CMDA3
CMDA1

CLKA0#
CLKA0

CMDA11

CMDA8
CMDA9
CMDA15
CMDA25

DQMA1
DQMA3

CMDA12

QSA1
QSA#1

QSA3
QSA#3

MEM_VREF0

L3
R2

P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8

K8
J8

K2

L8

K7
L7
F3

B3

K9

F7
E8

B7
A8

J2
A2

E2
L1
R3
R7
R8

BA1
A12

A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

CK
CK

CKE

CS
WEK3VDDQ10
RAS
CAS
LDM

UDM

ODT

LDQS
LDQS

UDQS
UDQS

VREF

VSSQ10
NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8

HY5PS561621F-25

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSS1
VSS2
VSS3
VSS4
VSS5

2

MDA27

B9

MDA28

B1

MDA24

D9

MDA31

D1

MDA30

D3

MDA25

D7

MDA29

C2

DQ9

MDA26

C8

DQ8

MDA15

F9

DQ7

MDA9

F1

DQ6

MDA12

H9

DQ5

MDA8

H1

DQ4

MDA11

H3

DQ3

MDA13

H7

DQ2

MDA10

G2

DQ1

MDA14

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

0.1U_0402_16V4Z

+VDD_MEM18+VDD_MEM18

1

1

C381

C382

4.7U_0805_6.3V6K

2

2

CLKA022

CLKA0#22

1

Address

CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7

CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD15
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23 A7
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
CMD30

R261

475_0402_1%

0..31
A3
A0
A2
A1

CS#
WE#
BA0
CKE
ODT

A12
RAS#
A11
A10
BA1
A8
A9
A6
A5

A4
CAS#
A13
BA2

12

DATA Bus

CLKA0

CLKA0#

32..63

A0

A1
A3
A4
A5

CS#CMD8
WE#
BA0
CKE
ODT

A12
RAS#
A11
A10
BA1
A8
A9
A6

A7

CAS#
A13
BA2

DDR2 BGA MEMORY

+VDD_MEM18

A A

C395

1000P_0402_50V7K

1

C396

2

0.01U_0402_16V7K

5

0.01U_0402_16V7K

1

C397

2

1

C398

2

0.1U_0402_16V4Z

4.7U_0805_6.3V6K

1

C399

2

1

C400

2

1

C401

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C402

2

4

1

2

0.01U_0402_16V7K

DDR BGA MEMORY

+VDD_MEM18

C386

1000P_0402_50V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

0.01U_0402_16V7K

1

1

C388

C387

2

2

0.01U_0402_16V7K

2008/02/25 2008/02/25

1

C389

2

1

2

0.1U_0402_16V4Z

Compal Secret Data

4.7U_0805_6.3V6K

C390

1

C391

2

0.1U_0402_16V4Z

Deciphered Date

0.01U_0402_16V7K

1

C392

2

2

1

C393

2

0.01U_0402_16V7K

1

2

Compal Electronics, Inc.

Title

LS-2821 ATI_M56-P VGA Board

Size Document Number Rev

CHANNEL A EXT. 256M_1

Date: Sheet of

Monday, February 25, 2008

1

0.1

7

16

5

www.kythuatvitinh.com

VRAM DDR2 chips (256MB & 512MB)

32Mx16 DDR2 400MHz *4==>256MB
64Mx16 DDR2 400MHz*4==>512MB

D D

DQMA[7..0]22,23
CMDA[30..0]22,23

QSA#[7..0]22,23
QSA[7..0]22,23

MDA[63..0]22,23

C C

B B

R268

1K_0402_1%

A A

1K_0402_1%

12

+VDD_MEM18

R266

DQMA[7..0]
CMDA[30..0]
QSA#[7..0]

QSA[7..0]
MDA[63..0]

12

1

C407

2

0.1U_0402_16V4Z

1000P_0402_50V7K

U10

CMDA10

L2

BA0

CMDA18

L3

BA1

CMDA14

R2

A12

CMDA16

P7

A11

CMDA17

M2

A10/AP

CMDA20

P3

A9

CMDA19

P8

A8

CMDA23

P2

A7

CMDA21

N7

A6

CMDA6

N3

A5

CMDA5

N8

A4

CMDA4

N2

A3

CMDA13

M7

A2

CMDA3

M3

A1

CMDA1

M8

CLKA1#
CLKA1

CMDA12

QSA5
QSA#5

QSA#4

MEM_VREF1 MEM_VREF1

1

C417

C418

2

0.01U_0402_16V7K

5

A0

K8

CK

J8

CK

CMDA11

K2

CKE

CMDA8

L8

CS

CMDA9

WEK3VDDQ10

CMDA15

K7

RAS

CMDA25

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

CMDA27 CMDA27

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25

0.01U_0402_16V7K

1

1

2

1

C420

2

0.1U_0402_16V4Z

C419

2

4

MDA39

B9

DQ15

MDA32

B1

DQ14

MDA38

D9

DQ13

MDA34

D1

DQ12

MDA33

D3

DQ11

MDA37

D7

DQ10

MDA35

C2

DQ9

MDA36

C8

DQ8

MDA44

F9

DQ7

MDA43

F1

DQ6

MDA47

H9

DQ5

MDA40

H1

DQ4

MDA41 MDA52

H3

DQ3

MDA46

H7

DQ2

MDA42 MDA54

G2

DQ1

MDA45

G8

DQ0

A9

VDDQ1

C1

VDDQ2

C3

VDDQ3

C7

VDDQ4

C9

VDDQ5

E9

VDDQ6

G1

VDDQ7

G3

VDDQ8

G7

VDDQ9

G9
A1

VDD1

E1

VDD2

J9

VDD3

M9

VDD4

R1

VDD5

J1

VDDL

J7

VSSDL

A7

VSSQ1

B2

VSSQ2

B8

VSSQ3

D2

VSSQ4

D8

VSSQ5

E7

VSSQ6

F2

VSSQ7

F8

VSSQ8

H2

VSSQ9

H8

VSSQ10

A3

VSS1

E3

VSS2

J3

VSS3

N1

VSS4

P9

VSS5

4.7U_0805_6.3V6K

1

C421

2

0.1U_0402_16V4Z

C422

0.1U_0402_16V4Z

4

+VDD_MEM18 +VDD_MEM18

1

1

C406

C405

2

2

4.7U_0805_6.3V6K

#PV reserve CMD27 to suport 64M x 16

0.1U_0402_16V4Z

1

1

1

C424

C423

2

2

2

0.01U_0402_16V7K

1000P_0402_50V7K

3

CMDA10

L2

CMDA18

L3

CMDA14

R2

CMDA16

P7

CMDA17

M2

CMDA20

P3

CMDA19

P8

CMDA23

P2

CMDA21

N7

CMDA6

N3

CMDA5

N8

CMDA4

N2

CMDA13

M7

CMDA3

M3

CMDA1

M8

CLKA1#

K8

CLKA1

J8

CMDA11

K2

CMDA8

L8

CMDA9
CMDA15

K7

CMDA25

L7

DQMA6DQMA5

F3

DQMA7DQMA4

B3

CMDA12

K9

QSA6

F7

QSA#6

E8

QSA7QSA4

B7

QSA#7

A8

J2

A2
E2

L1
R3
R7
R8

+VDD_MEM18+VDD_MEM18

C408

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

C409

2

0.01U_0402_16V7K

3

0.01U_0402_16V7K

1

1

C410

2

2

2008/02/25 2008/02/25

U11

BA0
BA1

A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

CK
CK

CKE

CS
WEK3VDDQ10
RAS
CAS
LDM

UDM

ODT

LDQS
LDQS

UDQS
UDQS

VREF
NC#A2

NC#E2
NC#L1
NC#R3
NC#R7
NC#R8

HY5PS561621F-25

DDR BGA MEMORYDDR2 BGA MEMORY

1

C411

C412

2

0.1U_0402_16V4Z

B9

DQ15

B1

DQ14

D9

DQ13

D1

DQ12

D3

DQ11

D7

DQ10

C2

DQ9

C8

DQ8

F9

DQ7

F1

DQ6

H9

DQ5

H1

DQ4

H3

DQ3

H7

DQ2

G2

DQ1

G8

DQ0

A9

VDDQ1

C1

VDDQ2

C3

VDDQ3

C7

VDDQ4

C9

VDDQ5

E9

VDDQ6

G1

VDDQ7

G3

VDDQ8

G7

VDDQ9

G9
A1

VDD1

E1

VDD2

J9

VDD3

M9

VDD4

R1

VDD5

0.1U_0402_16V4Z

J1

VDDL

J7

VSSDL

A7

VSSQ1

B2

VSSQ2

B8

VSSQ3

D2

VSSQ4

D8

VSSQ5

E7

VSSQ6

F2

VSSQ7

F8

VSSQ8

H2

VSSQ9

H8

VSSQ10

A3

VSS1

E3

VSS2

J3

VSS3

N1

VSS4

P9

VSS5

4.7U_0805_6.3V6K

1

1

C413

2

2

0.1U_0402_16V4Z

Compal Secret Data

Deciphered Date

MDA59
MDA60
MDA58
MDA62
MDA63
MDA56
MDA61
MDA57
MDA51
MDA53
MDA48
MDA55

MDA49
MDA50

1

C403

2

0.01U_0402_16V7K

1

C414

2

2

1

2

C415

0.01U_0402_16V7K

2

C404

4.7U_0805_6.3V6K

1

2

1

DATA Bus

Address

0..31
CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7

CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD15
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23 A7
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
CMD30

CLKA122

475_0402_1%

CLKA1#22

Compal Electronics, Inc.

Title

LS-2821 ATI_M56-P VGA Board

Size Document Number Rev

CHANNEL A EXT. 256M_2

Date: Sheet

Monday, February 25, 2008

32..63

A3

A0

A0
A2
A1

A1
A3
A4
A5

CS#

CS#CMD8
WE#

WE#

BA0

BA0

CKE

CKE

ODT

ODT

A12

A12
RAS#

RAS#

A11

A11
A10

A10

BA1

BA1

A8

A8

A9

A9

A6

A6

A5

A7

A4

CAS#

CAS#

A13

A13

BA2

BA2

CLKA1

12

R267

CLKA1#

of

16

8

1

0.1

5

F

www.kythuatvitinh.com

+3VS

R272 8.2K_0402_5%

1 2

R273 8.2K_0402_5%

1 2

R274 8.2K_0402_5%

1 2

R275 8.2K_0402_5%

1 2

R276 8.2K_0402_5%

D D

C C

1 2

R277 8.2K_0402_5%

1 2

R278 8.2K_0402_5%

1 2

R279 8.2K_0402_5%

1 2

+3VS

R281 8.2K_0402_5%

1 2

R282 8.2K_0402_5%

1 2

R283 8.2K_0402_5%

1 2

R284 8.2K_0402_5%

1 2

R285 8.2K_0402_5%

1 2

R286 8.2K_0402_5%

1 2

R287 8.2K_0402_5%

1 2

R288 8.2K_0402_5%

R289 8.2K_0402_5%

1 2

R290 8.2K_0402_5%

1 2

R292 8.2K_0402_5%

1 2

R293 8.2K_0402_5%

1 2

12

PCI_DEVSEL#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
PCI_PLOCK#
PCI_IRDY#
PCI_SERR#
PCI_PERR#

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

PCI_REQ0#
PCI_REQ1#
PCI_REQ2#
PCI_REQ3#

4

U12B

D11

AD0

C8

AD1

D9

PCI

AD2

E12

AD3

E9

AD4

C9

AD5

E10

AD6

B7

AD7

C7

AD8

C5

AD9

G11

AD10

F8

AD11

F11

AD12

E7

AD13

A3

AD14

D2

AD15

F10

AD16

D5

AD17

D10

AD18

B3

AD19

F7

AD20

C3

AD21

F3

AD22

F4

AD23

C1

AD24

G7

AD25

H7

AD26

D1

AD27

G5

AD28

H6

AD29

G1

AD30

H3

AD31

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

Interrupt I/F

J5

PIRQA#

E1

PIRQB#

J6

PIRQC#

C4

PIRQD#

ICH9-M ES_FCBGA676

REQ0#

GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

C/BE0#

C/BE1#

C/BE2#

C/BE3#

IRDY#

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#

STOP#

TRDY#

FRAME#

PLTRST#

PCICLK

PME#

PIRQE#/GPIO2

PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

3

PCI_REQ0#

F1

PCI_GNT0#

G4

PCI_REQ1#

B6
A7

PCI_REQ2#

F13
F12

PCI_REQ3#

E6

PCI_GNT3#

F6
D8

B4
D6
A5

PCI_IRDY#

D3
E3

PAR

PCI_RST#

R1

PCI_DEVSEL#

C6

PCI_PERR#

E4

PCI_PLOCK#

C2

PCI_SERR#

J4

PCI_STOP#

A4

PCI_TRDY#

F5

PCI_FRAME#

D7

PLT_RST#

C14

CLK_PCI_ICH

D4

PCI_PME#

R2

3/28 PCI_PME# Remvoe 8.2k pull high +3VALW resistance.

PCI_PIRQE#

H4

PCI_PIRQF#

K6

PCI_PIRQG#

F2

PCI_PIRQH#

G2

PCI_RST# 37,38

PCI_SERR# 38

PLT_RST# 9,20,30,31,32
CLK_PCI_ICH 17
PCI_PME# 38

1 2

R291 0_0402_5%

08/25 Follow Abita

ACCEL_INT 37

2

Place closely pin
D4

CLK_PCI_ICH

12

@

R280
10_0402_5%

1

@

C425

8.2P_0402_50V

2

1

A16 swap override Strap

B B

PCI_GNT3#

A A

Low= A16 swap override Enble
High= Default

R294

@

PCI_GNT3#

1 2

5

*

1K_0402_5%

Boot BIOS Strap

PCI_GNT0# SPI_CS#1

0

1

SPI_CS1#_R27

4

1

01

1

SPI_CS1#_R

PCI_GNT0#

Boot BIOS
Location

SPI

PCI

LPC

*

R295

@

1 2

R296

@

1 2

1K_0402_5%

1K_0402_5%

+3VALW

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

2

Date: Sheet of

ICH9(1/4)-PCI/INT

LA-4102P Blade discrete

1

25 53Monday, February 25, 2008

0.4

DELL CON

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

www.kythuatvitinh.com

4

3

2

1

+RTCVCC

ICH9-MVGA

HDD

Multi bay

HDA_SDOUT_CODEC

ICH_RSVD

0
1
0

5

SM_INTRUDER#
LAN100_SLP
ICH_INTVRMEN
ICH_SRTCRST#

0.1U_0402_16V4Z

+RTCVCC

R312 33_0402_5%
R313 33_0402_5%
R324 33_0402_5%

R314 33_0402_5%
R316 33_0402_5%
R397 33_0402_5%

R317 33_0402_5%
R318 33_0402_5%
R398 33_0402_5%

C426

HDA_SDIN033
HDA_SDIN134
HDA_SDIN221

HDA_SDOUT_MDC34
HDA_SDOUT_CODEC33
HDA_SDOUT_VGA21

1

2

R307

1 2

20K_0402_5%

SATA_LED#39

SATA_RXN0_C29

SATA_RXP0_C29
SATA_TXN029
SATA_TXP029

SATA_RXP1_C29
SATA_TXN129
SATA_TXP129

ICH_RSVD 27

12

@

R303

0_0402_5%

C427

1U_0603_10V4Z

0_0402_5%

1 2
1 2
1 2

1 2
1 2
1 2

1 2
1 2
1 2

12

@

R304

1

2

R320 33_0402_5%
R321 33_0402_5%
R323 33_0402_5%

SATA_TXN0
SATA_TXP0

SATA_TXN1
SATA_TXP1

12

CLRP2
SHORT PADS

HDA_BITCLKHDA_BITCLK

HDA_SYNCHDA_SYNC

HDARST#

ICH_RTCX1
ICH_RTCX2

ICH_RTCRST#
ICH_SRTCRST#
SM_INTRUDER#

ICH_INTVRMEN
LAN100_SLP

+1.5VS

R311

GLAN_COMP

1 2

24.9_0402_1%

HDA_BITCLK
HDA_SYNC

HDARST#
HDA_SDIN0

HDA_SDIN1
HDA_SDIN2

1 2

HDA_SDOUT

1 2
1 2

T55PAD
T56PAD

SATA_LED#

0.01U_0402_50V7K
C431
C433

0.01U_0402_50V7K

0.01U_0402_50V7K
C820
C821

0.01U_0402_50V7K

1 2
1 2

1 2
1 2

HDA_SDOUT_MDC
HDA_SDOUT_CODEC
HDA_SDOUT_VGA

SATA_TXN0_C
SATA_TXP0_C

SATA_TXN1_C
SATA_TXP1_C

0821 Change C528 and C516 to 15PF

R328

1 2

10M_0402_5%

1

C436

15P_0402_50V8J

2

Y2

1 4
2 3

32.768KHZ_12.5P_MC-146

4

@
@

U12A

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD_0

D12

LAN_TXD_1

E13

LAN_TXD_2

B10

GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK_EN#/GPIO33

AE8

HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9-M ES_FCBGA676

C502 12P_0402_50V8J@

1 2

C499 12P_0402_50V8J@

1 2

C2130 12P_0402_50V8J@

1 2

ICH_RTCX1

ICH_RTCX2

1

C437
15P_0402_50V8J

2

LPC_AD[0..3] 31,37,38

LPC_FRAME# 31,37,38

T54 PAD

GATEA20 38
H_A20M# 6

R309

1 2

R310

1 2

H_PWRGOOD 6,7
H_IGNNE# 6
H_INIT# 6

H_INTR 6
KB_RST# 38

H_NMI 6
H_SMI# 6

H_STPCLK# 6

R319 54.9_0402_1%

1 2

0.01U_0402_50V7K

12
12

0.01U_0402_50V7K

0.01U_0402_50V7K

12
12

0.01U_0402_50V7K

1 2

24.9_0402_1%

C428
C429

C430
C432

0_0402_5%

56_0402_5%

RTC

LPCCPU

LAN / GLAN

IHDA

SATA

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

FWH4/LFRAME#

LDRQ0#

LDRQ1#/GPIO23

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD

IGNNE#

RCIN#

STPCLK#

THRMTRIP#

SATA4RXN
SATA4RXP
SATA4TXN

SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN

SATA5TXP

SATA_CLKN
SATA_CLKP

SATARBIAS#

SATARBIAS

LPC_AD0

K5

LPC_AD1

K4

LPC_AD2

L6

LPC_AD3

K2

LPC_FRAME#

K3
J3

J1

GATEA20

N7

H_A20M#

AJ27
AJ25

H_DPSLP#

AE23

R_H_FERR#

AJ26

H_PWRGOOD

AD22

H_IGNNE#

AF25

H_INIT#

AE22

INIT#

H_INTR

AG25

INTR

KB_RST#

L3

H_NMI

AF23

NMI

H_SMI#

AF24

SMI#

H_STPCLK#

AH27

THRMTRIP_ICH#

AG26
AG27

TP12

AH11
AJ11

SATA_TXN4_C

AG12

SATA_TXP4_C

AF12

AH9
AJ9

SATA_TXN5_C

AE10

SATA_TXP5_C

AF10

CLK_PCIE_SATA#

AH18

CLK_PCIE_SATA

AJ18
AJ7

R322

AH7

Within 500 mils

#PV reserve for WWAN noise

HDA_BITCLK_CODEC
HDA_BITCLK_MDC
HDA_BITCLK_VGA

HDA_BITCLK

12

@

R327
10_0402_5%

1

@

C439
10P_0402_25V8K

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

C2128 56P_0402_50V9J

1 2

C2129 56P_0402_50V9J

1 2

C2131 56P_0402_50V9J

1 2

R329

1 2

W=20mils

0_0402_5%

1

C438

2.2U_0603_6.3V4Z

2

Place near ICH9

2008/02/25 2008/02/25

Compal Secret Data

Deciphered Date

2

H_DPRSTP#H_DPRSTP_R#

H_FERR#

SATA_TXN4
SATA_TXP4

SATA_TXN5
SATA_TXP5

W=20mils

DAN202U_SC70

GATEA20

KB_RST#

H_DPRSTP#

H_DPSLP#

H_DPRSTP# 7,9,49
H_DPSLP# 7

3/28 add 56ohm

+VCCP

12

R315
56_0402_5%

placed within 2"
from ICH9M

SATA_RXN4_C 29
SATA_RXP4_C 29

SATA_TXN4 29
SATA_TXP4 29

SATA_RXN5_C 36
SATA_RXP5_C 36

SATA_TXN5 36
SATA_TXP5 36

CLK_PCIE_SATA# 17
CLK_PCIE_SATA 17SATA_RXN1_C29

+3VL+RTCVCC

D8

2

1

3

W=20mils

Title

Size Document Number Rev

Custom

Date: Sheet of

1 2

R297 1M_0402_5%

1 2

R299 330K_0402_5%

1 2

R300 330K_0402_5%

1 2

R302 180K_0402_5%

D D

HDA_BITCLK_CODEC33
HDA_BITCLK_MDC34
HDA_BITCLK_VGA21

HDA_SYNC_MDC34
HDA_SYNC_CODEC33
HDA_SYNC_VGA21

C C

HDA_RST#_CODEC33,38
HDA_RST#_MDC34
HDA_RST#_VGA21

MDC

CODEC

B B

XOR CHAIN ENTRANCE STRAP:RSVD

+3VS

R325

@

1 2

1K_0402_5%

R326

@

1 2

1K_0402_5%

ICH_RSVD HDA_SDOUT_CODEC

0

A A

0
1
11

+3VS

R298

1 2

8.2K_0402_5%
R301

1 2

10K_0402_5%

+VCCP

R305

@

1 2

56_0402_5%
R306

@

1 2

56_0402_5%

+VCCP

R308
56_0402_5%

1 2

H_FERR# 6

within 2" from R379

H_THERMTRIP# 6,9

ODD

e-SATA

De-feature disable

BATT1

@

W=20mils

CR2032 RTC BATTERY

JBATT1

1

1

2

2

3

GND

4

GND

ACES_85205-02001

CONN@

R330

1 2

1K_0402_5%

BATT1.1

Compal Electronics, Inc.

ICH9(2/4)_LAN,HD,IDE,LPC

LA-4102P Blade discrete

1

26 53Monday, February 25, 2008

0.4

5

www.kythuatvitinh.com

R331 2.2K_0402_5%

+3VS

SIRQ

1 2

R333 10K_0402_5%
R334 8.2K_0402_5%
R335 10K_0402_5%
R336 8.2K_0402_5%@
R337 10K_0402_5%@

D D

R338 8.2K_0402_5%@
R341 8.2K_0402_5%

R344 8.2K_0402_5%

R350 8.2K_0402_5%
R351 8.2K_0402_5%
R352 8.2K_0402_5%
R356 8.2K_0402_5%
R357 8.2K_0402_5%
R358 8.2K_0402_5%
R359 10K_0402_5%
R361 8.2K_0402_5%
R362 8.2K_0402_5%

C C

R365 10K_0402_5%

+3VALW

R369 10K_0402_5%
R371 8.2K_0402_5%
R372 1K_0402_5%
R374 10K_0402_5%
R375 10K_0402_5%
R376 10K_0402_5%
R377 10K_0402_5%
R378 10K_0402_5%
R379 10K_0402_5%
R373 10K_0402_5%
R380 8.2K_0402_5%

B B

R381 8.2K_0402_5%

+3VS +3VS

1 2
1 2
1 2
1 2
1 2
1 2

1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2

@

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

PM_CLKRUN#
OCP#
THERM_SCI#
CLKREQ#_C
PM_BMBUSY#
EC_SCI#

CR_CPPE#

HDDHALT_LED#
GPIO20
GPIO21
CR_WAKE#
GPIO36
GPIO37
GPIO39
GPIO48
GPIO57

GPIO49

LINKALERT#
ICH_LOW_BAT#
ICH_PCIE_WAKE#
ICH_RI#
XDP_DBRESET#
S4_STATE#
ME_EC_CLK1
ME_EC_DATA1
GPIO10
EC_LID_OUT#
EC_SMI#
GPIO14

#SI LAN DSM

Board ID

R745
10K_0402_5%

1 2

DIS/UMA 17/14

R746
10K_0402_5%

1 2

USB_OC#6
USB_OC#1
USB_OC#2
USB_OC#4

USB_OC#7

A A

USB_OC#8
USB_OC#9
USB_OC#0

WXMIT_OFF#
USB_OC#5
USB_OC#10
USB_OC#11

@

RP27

4 5
3 6
2 7
1 8

10K_1206_8P4R_5%

RP28

4 5
3 6
2 7
1 8

10K_1206_8P4R_5%

RP29

4 5
3 6
2 7
1 8

10K_1206_8P4R_5%

5

R747
10K_0402_5%

1 2

R748
10K_0402_5%

1 2

@

+3VALW

+3VALW

@

R339

10K_0402_5%

H_STP_PCI#17
H_STP_CPU#17

VGATE17,49

CR_CPPE#32

EC_SCI#38
EC_SMI#38

LAN_DSM#_SB30

GPIO2019

CR_WAKE#32

+3VS

EXP_CPPE#31

R424
Low -->default
High -->No boot

TV Tuner/WWAN/Robeson

WLAN

GLAN

Card reader

New Card

17" High
14" Low
Dis" High
UMA" Low

#SI new card & LAN swap

R332 2.2K_0402_5%

+3VS

12

12

R353

EC_SCI#
EC_SMI#

R364

SB_SPKR33

4

1 2
1 2

ICH_SMBCLK17,21,31,37

ICH_SMBDATA17,21,31,37

XDP_DBRESET#6

@

R340

PM_BMBUSY#9

10K_0402_5%

EC_LID_OUT#38

R345 0_0402_5%

1 2

ICH_PCIE_WAKE#30,31
SIRQ38
THERM_SCI#21,38

1 2

100K_0402_5%

R347 0_0402_5%

1 2

R349 0_0402_5%

1 2

ISOLATEB30

8.2K_0402_5%

1 2

CLKREQ#_C17

R393 0_0402_5%

1 2

@

R366 1K_0402_5%

1 2

+3VS

MCH_ICH_SYNC#9

ICH_RSVD26

PCIE_RXN131

PCIE_RXP131
PCIE_TXN131
PCIE_TXP131

PCIE_RXN331

PCIE_RXP331
PCIE_TXN331
PCIE_TXP331

GLAN_RXN30

GLAN_RXP30
GLAN_TXN30
GLAN_TXP30

PCIE_RXN532

PCIE_RXP532
PCIE_TXN532
PCIE_TXP532

PCIE_RXN431

PCIE_RXP431
PCIE_TXN431
PCIE_TXP431

SPI_CS1#_R25

BT_OFF36
WXMIT_OFF#31

4

ICH_SMBCLK
ICH_SMBDATA
LINKALERT#
ME_EC_CLK1
ME_EC_DATA1

ICH_RI#
SUS_STAT#

T57PAD

XDP_DBRESET#

@

PM_BMBUSY#
EC_LID_OUT#
H_STP_PCI#

R_STP_CPU#
PM_CLKRUN#
ICH_PCIE_WAKE#

SIRQ
THERM_SCI#

VGATE

T59PAD

@

OCP#

OCP#6

CR_CPPE#
GPIO7

GPIO12
LAN_DSM#_SB

@

17/14
GPIO20

CR_WAKE#
DIS/UMA

CLKREQ#_C
GPIO38
GPIO39
GPIO48
GPIO49
GPIO57

SB_SPKR
MCH_ICH_SYNC#
ICH_RSVD

C445 0.1U_0402_16V4Z

1 2

C444 0.1U_0402_16V4Z

1 2

C448 0.1U_0402_16V4Z

1 2

C449 0.1U_0402_16V4Z

1 2

C452 0.1U_0402_16V4Z

1 2

C453 0.1U_0402_16V4Z

1 2

C501 0.1U_0402_16V4Z

1 2

C500 0.1U_0402_16V4Z

1 2

C450 0.1U_0402_16V4Z

1 2

C451 0.1U_0402_16V4Z

1 2

T61PAD

@

T62PAD

@

T63PAD

@

T64PAD

1 2

@

12

Within 500 mils

R384

22.6_0402_1%

R383 0_0402_5%

3

U12C

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GPIO60/CLGPIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD#

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#

E19

STP_CPU#

L4

CLKRUN#

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPWRGD

A20

TP11

AG19

GPIO1

AH21

GPIO6

AG21

GPIO7

A21

GPIO8

C12

GPIO12

C21

GPIO13

AE18

GPIO17

K1

GPIO18

AF8

GPIO20

AJ22

SCLOCK/GPIO22

A9

GPIO27

D19

GPIO28

L1

SATACLKREQ#/GPIO35

AE19

SLOAD/GPIO38

AG22

SDATAOUT0/GPIO39

AF21

SDATAOUT1/GPIO48

AH24

GPIO49

A8

GPIO57/CLGPIO5

M7

SPKR

AJ24

MCH_SYNC#

B21

TP3

AH20

TP8

AJ20

TP9

AJ21

TP10

ICH9-M ES_FCBGA676

PCIE_RXN1
PCIE_RXP1
PCIE_C_TXN1
PCIE_C_TXP1

PCIE_RXN3
PCIE_RXP3
PCIE_C_TXN3
PCIE_C_TXP3

GLAN_RXN
GLAN_RXP
GLAN_TXN_C
GLAN_TXP_C

PCIE_RXN5
PCIE_RXP5
PCIE_C_TXN5
PCIE_C_TXP5

PCIE_RXN4
PCIE_RXP4
PCIE_C_TXN4
PCIE_C_TXP4

SPI_CS1#_R

USB_OC#0
USB_OC#1
USB_OC#2
WXMIT_OFF#
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
USB_OC#8
USB_OC#9
USB_OC#10
USB_OC#11

USBRBIAS

SMB

U12D

N29

PERN1

N28

PERP1

P27

PETN1

P26

PETP1

L29

PERN2

L28

PERP2

M27

PETN2

M26

PETP2

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GLAN_RXN

C28

PERP6/GLAN_RXP

D27

PETN6/GLAN_TXN

D26

PETP6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#GPIO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9-M ES_FCBGA676

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37

SATA

GPIO

clocks

S4_STATE#/GPIO26

DPRSLPVR/GPIO16

BATLOW#

SYS / GPIOGPIOMISC

PWRBTN#
LAN_RST#
RSMRST#

Power MGT

CK_PWRGD

CLPWROK

CL_DATA0
CL_DATA1

CL_VREF0
CL_VREF1

CL_RST0#
CL_RST1#

MEM_LED/GPIO24

GPIO10/SUS_PWR_ACK

GPIO14/AC_PRESENT

WOL_EN/GPIO9

Controller Link

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP

DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP

DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP

DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

DMI_CLKN
DMI_CLKP

PCI - Express

DMI_ZCOMP

Direct Media Interface

DMI_IRCOMP

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P

SPI

USBP4N
USBP4P
USBP5N
USBP5P
USBP6N

USB

USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N

USBP9P
USBP10N
USBP10P
USBP11N
USBP11P

2008/02/25 2008/02/25

3

CLK14

CLK48
SUSCLK
SLP_S3#

SLP_S4#
SLP_S5#

PWROK

SLP_M#

CL_CLK0
CL_CLK1

GPIO21

AH23

HDDHALT_LED#

AF19

GPIO36

AE21

GPIO37

AD20

CLK_14M_ICH

H1

CLK_48M_ICH

AF3

ICH_SUSCLK

P1

SLP_S3#

C16

SLP_S4#

E16

SLP_S5#

G17

S4_STATE#

C10

PM_PWROK

G20

R348 0_0402_5%

M2

ICH_LOW_BAT#

B13

PWRBTN_OUT#

R3
D20

R_EC_RSMRST#

D22

CK_PWRGD

R5

M_PWROK

R6
B16

CL_CLK0

F24
B19

CL_DATA0

F22
C19

CL_VREF0_ICH

C25

CL_VREF1_ICH

A19

CL_RST#

F21
D18

XMIT_OFF

A16

GPIO10

C18

GPIO14

C11

LAN_WOL_EN

C20

DMI_RXN0

V27

DMI_RXP0

V26

DMI_TXN0

U29

DMI_TXP0

U28

DMI_RXN1

Y27

DMI_RXP1

Y26

DMI_TXN1

W29

DMI_TXP1

W28

DMI_RXN2

AB27

DMI_RXP2

AB26

DMI_TXN2

AA29

DMI_TXP2

AA28

DMI_RXN3

AD27

DMI_RXP3

AD26

DMI_TXN3

AC29

DMI_TXP3

AC28

CLK_PCIE_ICH#

T26

CLK_PCIE_ICH

T25
AF29

DMI_IRCOMP

AF28

USB20_N0

AC5

USB20_P0

AC4

USB20_N1

AD3

USB20_P1

AD2

USB20_N2

AC1

USB20_P2

AC2

USB20_N3

AA5

USB20_P3

AA4

USB20_N4

AB2

USB20_P4

AB3

USB20_N5

AA1

USB20_P5

AA2

USB20_N6

W5

USB20_P6

W4

USB20_N7

Y3

USB20_P7

Y2

USB20_N8

W1

USB20_P8

W2

USB20_N9

V2

USB20_P9

V3
U5
U4
U1
U2

Compal Secret Data

@

1 2

R370

100K_0402_5%

R382 24.9_0402_1%

Deciphered Date

T58 PAD

R354 100_0402_5%
R355 10K_0402_5%

DMI_RXN0 9
DMI_RXP0 9
DMI_TXN0 9
DMI_TXP0 9

DMI_RXN1 9
DMI_RXP1 9
DMI_TXN1 9
DMI_TXP1 9

DMI_RXN2 9
DMI_RXP2 9
DMI_TXN2 9
DMI_TXP2 9

DMI_RXN3 9
DMI_RXP3 9
DMI_TXN3 9
DMI_TXP3 9

CLK_PCIE_ICH# 17
CLK_PCIE_ICH 17

1 2

USB20_N0 36
USB20_P0 36
USB20_N1 36
USB20_P1 36
USB20_N2 36
USB20_P2 36
USB20_N3 40
USB20_P3 40
USB20_N4 19
USB20_P4 19
USB20_N5 31
USB20_P5 31
USB20_N6 36
USB20_P6 36
USB20_N7 36
USB20_P7 36
USB20_N8 31
USB20_P8 31
USB20_N9 31
USB20_P9 31

2

HDDHALT_LED# 39

CLK_14M_ICH 17
CLK_48M_ICH 17

SLP_S3# 38
SLP_S4# 38
SLP_S5# 38

PM_PWROK 9,38

PWRBTN_OUT# 38

1 2
1 2

CK_PWRGD 17
M_PWROK 9,38

CL_CLK0 9

CL_DATA0 9

CL_RST# 9

XMIT_OFF 31

12

+3VALW

2

#SI connect to EC

R346 10K_0402_5%

1 2

DPRSLPVR 9,49

EC_RSMRST# 38

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Within 500 mils

+1.5VS

USB-0 Right side
USB-1 Right side
USB-2 Left side(with ESATA)
USB-3 Dock
USB-4 Camera
USB-5 WLAN
USB-6 Bluetooth
USB-7 Finger Printer
USB-8 MiniCard(WWAN/TV)
USB-9 Express card

1

Place closely pin
AF3

CLK_48M_ICH

12

@

R342
10_0402_5%

@

1

C440

4.7P_0402_50V8C

2

Place closely pin
H1

CLK_14M_ICH

12

@

R343
10_0402_5%

@

1

C441

4.7P_0402_50V8C

2

#SI connect to 3VALW POWER_OK

R_EC_RSMRST# 45

+3VS

R360

1 2

3.24K_0402_1%

12

1

R363

C442

453_0402_1%

2

NA lead free

1 2

12

1

C443

R368
453_0402_1%

2

PM_PWROK

2 1

CH751H-40PT_SOD323-2

R367

3.24K_0402_1%

D18

+3VALW

R_EC_RSMRST# 45

#PV PWROK sequence issue

Compal Electronics, Inc.

Title

ICH9(3/4)_DMI,USB,GPIO,PCIE

Size Document Number Rev

Custom

LA-4102P Blade discrete

Date: Sheet of

27 53Monday, February 25, 2008

1

0.4

5

www.kythuatvitinh.com

+RTCVCC

1

C462

C454

2

0.1U_0402_16V4Z

R387

1 2

+5VS +3VS

R386

100_0402_5%

R388

10_0402_5%

+1.5VS

0316 change design

+1.5VS

12

+3VALW+5VALW

12

+3VS

C485

0.1U_0402_16V4Z

CHB1608U301_0603

21

D9
CH751H-40_SC76

ICH_V5REF_RUN

1

C465

0.1U_0402_10V6K

2

21

D10
CH751H-40_SC76

ICH_V5REF_SUS

1

C472

0.1U_0402_10V6K

2

R389

1 2

CHB1608U301_0603

+1.5VS

0.1U_0402_16V4Z

1

R390 CHB1608U301_0603

1 2

+1.5VS

2

5

D D

C C

B B

A A

20 mils

20 mils

C476

40 mils

C458

10U_0805_10V4Z

220U_D2_4VM

1

2

1U_0603_10V4Z

C483

10U_0805_10V4Z

1

+

C459

2

1

C477

2

1

2

1

C487

2

2.2U_0603_6.3V4Z

1

2

0.1U_0402_16V4Z

10U_0805_10V4Z

1

C460

2

+1.5VS

1U_0603_10V4Z

10U_0805_10V4Z

+1.5VS

1U_0603_10V4Z

+1.5VS

0.1U_0402_16V4Z

T69
T70

+1.5VS

1

C488

2

0316 change design

20 mils

ICH_V5REF_RUN

ICH_V5REF_SUS

1

1

C456

2

2

2.2U_0603_6.3V4Z

C478

C481

C484

VCC_LAN1_05_INT_ICH_1
VCC_LAN1_05_INT_ICH_2

@
@

R391

1 2

CHB1608U301_0603

1

2

1

2

1

2

4.7U_0805_10V4Z

1

C489

2

+3VS

4

U12F

A23

VCCRTC

A6

V5REF

AE1

V5REF_SUS

AA24

VCC1_5_B[01]

AA25

VCC1_5_B[02]

AB24

VCC1_5_B[03]

AB25

VCC1_5_B[04]

AC24

VCC1_5_B[05]

AC25

VCC1_5_B[06]

AD24

VCC1_5_B[07]

AD25

VCC1_5_B[08]

AE25

VCC1_5_B[09]

AE26

VCC1_5_B[10]

AE27

VCC1_5_B[11]

AE28

VCC1_5_B[12]

AE29

VCC1_5_B[13]

F25

VCC1_5_B[14]

G25

VCC1_5_B[15]

H24

VCC1_5_B[16]

H25

VCC1_5_B[17]

J24

VCC1_5_B[18]

J25

VCC1_5_B[19]

K24

VCC1_5_B[20]

K25

VCC1_5_B[21]

L23

VCC1_5_B[22]

L24

VCC1_5_B[23]

L25

VCC1_5_B[24]

M24

VCC1_5_B[25]

M25

VCC1_5_B[26]

N23

VCC1_5_B[27]

N24

VCC1_5_B[28]

N25

VCC1_5_B[29]

P24

VCC1_5_B[30]

P25

VCC1_5_B[31]

R24

VCC1_5_B[32]

R25

VCC1_5_B[33]

R26

VCC1_5_B[34]

R27

VCC1_5_B[35]

T24

VCC1_5_B[36]

T27

VCC1_5_B[37]

T28

VCC1_5_B[38]

T29

VCC1_5_B[39]

U24

VCC1_5_B[40]

U25

VCC1_5_B[41]

V24

VCC1_5_B[42]

V25

VCC1_5_B[43]

U23

VCC1_5_B[44]

W24

VCC1_5_B[45]

W25

VCC1_5_B[46]

K23

VCC1_5_B[47]

Y24

VCC1_5_B[48]

Y25

VCC1_5_B[49]

AJ19

VCCSATAPLL

AC16

VCC1_5_A[01]

AD15

VCC1_5_A[02]

AD16

VCC1_5_A[03]

AE15

VCC1_5_A[04]

AF15

VCC1_5_A[05]

AG15

VCC1_5_A[06]

AH15

VCC1_5_A[07]

AJ15

VCC1_5_A[08]

AC11

VCC1_5_A[09]

AD11

VCC1_5_A[10]

AE11

VCC1_5_A[11]

AF11

VCC1_5_A[12]

AG10

VCC1_5_A[13]

AG11

VCC1_5_A[14]

AH10

VCC1_5_A[15]

AJ10

VCC1_5_A[16]

AC9

VCC1_5_A[17]

AC18

VCC1_5_A[18]

AC19

VCC1_5_A[19]

AC21

VCC1_5_A[20]

G10

VCC1_5_A[21]

G9

VCC1_5_A[22]

11mA

AC12

VCC1_5_A[23]

AC13

VCC1_5_A[24]

AC14

VCC1_5_A[25]

AJ5

VCCUSBPLL

AA7

VCC1_5_A[26]

AB6

VCC1_5_A[27]

AB7

VCC1_5_A[28]

AC6

VCC1_5_A[29]

AC7

VCC1_5_A[30]

A10

VCCLAN1_05[1]

A11

VCCLAN1_05[2]

A12

VCCLAN3_3[1]

B12

VCCLAN3_3[2]

23mA

A27

VCCGLANPLL

80mA

D28

VCCGLAN1_5[1]

D29

VCCGLAN1_5[2]

E26

VCCGLAN1_5[3]

E27

VCCGLAN1_5[4]

1mA

A26

VCCGLAN3_3

ICH9-M ES_FCBGA676

4

11mA

G3: 6uA
2mA

2mA
646mA

47mA

1342mA

1634mA

VCCA3GP

11mA

ARX

212mA

ATX

USB CORE

GLAN POWER

CORE

23mA

48mA

2mA

VCCP_CORE

PCI

11mA

VCCSUS1_05[1]
VCCSUS1_05[2]

VCCSUS1_5[1]
VCCSUS1_5[2]

VCCSUS3_3[01]
VCCSUS3_3[02]
VCCSUS3_3[03]
VCCSUS3_3[04]

VCCPSUS

VCCSUS3_3[05]

VCCSUS3_3[06]
VCCSUS3_3[07]
VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]

VCCPUSB

VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]

19/73/73mA19/78/78mA

3

+VCCP

A15

VCC1_05[01]

B15

VCC1_05[02]

C15

VCC1_05[03]

D15

VCC1_05[04]

E15

VCC1_05[05]

F15

VCC1_05[06]

L11

VCC1_05[07]

L12

VCC1_05[08]

L14

VCC1_05[09]

L16

VCC1_05[10]

L17

VCC1_05[11]

L18

VCC1_05[12]

M11

VCC1_05[13]

M18

VCC1_05[14]

P11

VCC1_05[15]

P18

VCC1_05[16]

T11

VCC1_05[17]

T18

VCC1_05[18]

U11

VCC1_05[19]

U18

VCC1_05[20]

V11

VCC1_05[21]

V12

VCC1_05[22]

V14

VCC1_05[23]

V16

VCC1_05[24]

V17

VCC1_05[25]

V18

VCC1_05[26]

R29

VCCDMIPLL

W23

VCC_DMI[1]

Y23

VCC_DMI[2]

AB23

V_CPU_IO[1]

AC23

V_CPU_IO[2]

AG29

VCC3_3[01]

AJ6

VCC3_3[02]

AC10

VCC3_3[07]

AD19

VCC3_3[03]

AF20

VCC3_3[04]

AG24

VCC3_3[05]

AC20

VCC3_3[06]

308mA

VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]

VCCHDA

VCCSUSHDA

VCCCL1_05

VCCCL1_5

VCCCL3_3[1]
VCCCL3_3[2]

0.1U_0402_16V4Z

B9
F9
G3
G6
J2
J7
K7

AJ4
AJ3

AC8
F17

VCCSUS1_5_ICH_1

AD8

VCCSUS1_5_ICH_2

F18

0.1U_0402_16V4Z

A18
D16
D17
E22

AF1

T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7

VCCCL1_05_ICH

G22
G23

A24

+3VS

B24

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C455

C457

2

2

C461

22U_0805_6.3VAM

1

C464

2

+3VS

0.1U_0402_16V4Z

1

C469

2

1

C475

2

0.1U_0402_16V4Z

1

C480

2

1

C482

4.7U_0603_6.3V6M

2

R385

1 2

CHB1608U301_0603

1

C463
10U_0805_10V4Z

2

+VCCP

0.1U_0402_16V4Z

1

C470

2

1 2
1 2

Compal Secret Data

C471

R741
0_0402_5%
R740
0_0402_5%

Deciphered Date

0.01U_0402_16V7K

1

2

0.1U_0402_16V4Z

1

2

+3VS

1

C473

2

0.1U_0402_16V4Z

T65

@

T66

@

T67

@

T68

+3VALW

@

1

C479

2

+3VALW

T71

@

@

1

C486
1U_0603_10V4Z

2

2008/02/25 2008/02/25

3

+1.5VS

+VCCP

4.7U_0603_6.3V6M
C466

1

2

0.1U_0402_16V4Z

+3VALW

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C467

C468

1

1

2

2

(DMI)

+3VS

1

C474

2

Custom

2

Date: Sheet of

U12E

AA26

VSS[001]

AA27

VSS[002]

AA3

VSS[003]

AA6

VSS[004]

AB1

VSS[005]

AA23

VSS[006]

AB28

VSS[007]

AB29

VSS[008]

AB4

VSS[009]

AB5

VSS[010]

AC17

VSS[011]

AC26

VSS[012]

AC27

VSS[013]

AC3

VSS[014]

AD1

VSS[015]

AD10

VSS[016]

AD12

VSS[017]

AD13

VSS[018]

AD14

VSS[019]

AD17

VSS[020]

AD18

VSS[021]

AD21

VSS[022]

AD28

VSS[023]

AD29

VSS[024]

AD4

VSS[025]

AD5

VSS[026]

AD6

VSS[027]

AD7

VSS[028]

AD9

VSS[029]

AE12

VSS[030]

AE13

VSS[031]

AE14

VSS[032]

AE16

VSS[033]

AE17

VSS[034]

AE2

VSS[035]

AE20

VSS[036]

AE24

VSS[037]

AE3

VSS[038]

AE4

VSS[039]

AE6

VSS[040]

AE9

VSS[041]

AF13

VSS[042]

AF16

VSS[043]

AF18

VSS[044]

AF22

VSS[045]

AH26

VSS[046]

AF26

VSS[047]

AF27

VSS[048]

AF5

VSS[049]

AF7

VSS[050]

AF9

VSS[051]

AG13

VSS[052]

AG16

VSS[053]

AG18

VSS[054]

AG20

VSS[055]

AG23

VSS[056]

AG3

VSS[057]

AG6

VSS[058]

AG9

VSS[059]

AH12

VSS[060]

AH14

VSS[061]

AH17

VSS[062]

AH19

VSS[063]

AH2

VSS[064]

AH22

VSS[065]

AH25

VSS[066]

AH28

VSS[067]

AH5

VSS[068]

AH8

VSS[069]

AJ12

VSS[070]

AJ14

VSS[071]

AJ17

VSS[072]

AJ8

VSS[073]

B11

VSS[074]

B14

VSS[075]

B17

VSS[076]

B2

VSS[077]

B20

VSS[078]

B23

VSS[079]

B5

VSS[080]

B8

VSS[081]

C26

VSS[082]

C27

VSS[083]

E11

VSS[084]

E14

VSS[085]

E18

VSS[086]

E2

VSS[087]

E21

VSS[088]

E24

VSS[089]

E5

VSS[090]

E8

VSS[091]

F16

VSS[092]

F28

VSS[093]

F29

VSS[094]

G12

VSS[095]

G14

VSS[096]

G18

VSS[097]

G21

VSS[098]

G24

VSS[099]

G26

VSS[100]

G27

VSS[101]

G8

VSS[102]

H2

VSS[103]

H23

VSS[104]

H28

VSS[105]

H29

VSS[106]

ICH9-M ES_FCBGA676

Compal Electronics, Inc.

Title

ICH9(4/4)_POWER&GND

Size Document Number Rev

LA-4102P Blade discrete

1

VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]

VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]

1

H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25

A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

28 53Monday, February 25, 2008

0.4

5

www.kythuatvitinh.com

D D

C C

4

+5VS

1

C490

2

0.1U_0402_16V4Z

10U_0805_10V4Z

+5VS

Placea caps. near ODD
CONN.

0.1U_0402_16V4Z

C512

1

1

C513

2

2

PR@

PR@

Pleace near HD CONN

1

1

C492

C491

2

2

0.1U_0402_16V4Z

1U_0603_10V4Z

10U_0805_10V4Z

1

1

C514

C515
10U_0805_10V4Z

2

2

PR@

PR@

3

HDD Connector

JP3

1

GND

2

A+

3

A-

0.01U_0402_16V7K

Reserved

JP5

GND

GND

GND

MD
GND
GND

4

GND

GND

V33
V33

V33
GND
GND
GND

GND
GND

V12

V12

V12

A+

A­B-

B+

DP
V5
V5

SATA_RXN0

5

B-

SATA_RXP0 SATA_RXP0_C

6

B+

0.01U_0402_16V7K

7

8
9
10
11
12
13
14

V5

15

V5

16

V5

17
18
19
20
21
22

13
12
11

0.01U_0402_16V7K

10

SATA_RXN4 SATA_RXN4_C

9
8

0.01U_0402_16V7K

7

6
5
4
3
2
1

+3VS

+5VS

+5VS

1

C493

2

0.1U_0402_16V4Z

SUYIN_127072FR022G523_RV

CONN@

CD-ROM Connector

SUYIN_127382FR013GX09ZR

CONN@

SATA_TXP0
SATA_TXN0

SATA_RXN0_C

C494

12

C495

12

Near CONN side.

SATA_TXP4
SATA_TXN4

C510

12

SATA_RXP4_CSATA_RXP4

C511

12

Near CONN side.

2

SATA_TXP0 26
SATA_TXN0 26

SATA_RXN0_C 26
SATA_RXP0_C 26

SATA_TXP4 26
SATA_TXN4 26

SATA_RXN4_C 26

SATA_RXP4_C 26

1

Multi Bay Connector

B B

SATA_RXN1_C26
SATA_RXP1_C26

SATA_TXP126
SATA_TXN126

1 2
1 2

SATA_TXP1
SATA_TXN1

SATA_RXN1SATA_RXN1_C

C8220.01U_0402_16V7K

SATA_RXP1SATA_RXP1_C

C8230.01U_0402_16V7K

Near CONN side.

JP12

1

GND

3

TX+

5

TX­GND7VCC3
RX-9VCC3
RX+11VCC3
GND13GND
GND15GND

GND17GND

TYCO_2023087-3

VCC5
VCC5
VCC5

2
4
6
8
10
12
14
16

18

#SI Change lib

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+5VS

2008/02/25 2008/02/25

Compal Secret Data

Deciphered Date

2

+5VS

Placea caps. near Multi bay CONN.

1U_0603_10V4Z

0.1U_0402_16V4Z

C517

1

2

PA@

10U_0805_10V4Z

1

1

C518

C519

2

2

PA@

PA@

PA@

Title

HDD & CDROM

Size Document Number Rev

Custom

LA-4102P Blade discrete

Date: Sheet of

1

C516
10U_0805_10V4Z

2

Compal Electronics, Inc.

29 53Monday, February 25, 2008

1

0.4

5

www.kythuatvitinh.com

1025 add to meet HP request

@

R1106

1 2

0_1206_5%

1 3

D D

LAN_POWER_OFF38

D

Place Close to Chip

0.1U_0402_16V4Z

1 2
1 2

0.1U_0402_16V4Z

1 2

R446

1 2

R454

1 2

0_0402_5%

1

C663

2

PCIE_RXP2_LAN
PCIE_RXN2_LAN

GLAN_REQ#

+CTRL_18

R2016

2.49K_0402_1%

GLAN_WAKE#

LAN_X1
LAN_X2

1
2
3
4
5
6
7
8

9
10
11
12

1

C664

0.01U_0402_16V7K

2

0.01U_0402_16V7K

U19

TCT1
TD1+
TD1­TCT2
TD2+
TD2­TCT3
TD3+
TD3­TCT4
TD4+
TD4-

NS692405

0_0603_5%

MCT1
MX1+

MCT2
MX2+

MCT3
MX3+

MCT4
MX4+

MX1-

MX2-

MX3-

MX4-

GLAN_RXP27
GLAN_RXN27
GLAN_TXP27

GLAN_TXN27

CLKREQ#_917

CLK_PCIE_LAN17

C C

B B

A A

CLK_PCIE_LAN#17

PLT_RST#9,20,25,31,32

ICH_PCIE_WAKE#27,31
ISOLATEB27

LAN_MDI3­LAN_MDI3+

LAN_MDI2­LAN_MDI2+

LAN_MDI1­LAN_MDI1+

LAN_MDI0­LAN_MDI0+

0.01U_0402_16V7K

0.01U_0402_16V7K

Place these components
colsed to LAN chip

C653
C654

R456 0_0402_5%

+LAN_VDD12

+3V_LAN

ISOLATEB

+3VS

12

R445
1K_0402_1%@

ISOLATEB

R443
15K_0402_5% C656

1

1

C660

C659

2

2

5

+3VALW+3V_LAN

S

Q106
AP2305GN

G

2

U18

29

HSOP

30

HSON

23

HSIP

24

HSIN

33

CLKREQB

26

REFCLK_P

27

REFCLK_N

20

PERSTB

1

SROUT12

5

FB12

62

ENSR

64

RSET

19

LANWAKEB

36

ISOLATEB

60

CKTAL1

61

CKTAL2

65

EXPOSE_PAD

25

EGND

31

EGND

15

NC

17

NC

18

NC

34

NC

35

NC

39

NC

40

NC

41

NC

42

NC

RTL8111C-GR_QFN64_9X9

24

RJ45_MIDI3-

23

RJ45_MIDI3+

22
21

RJ45_MIDI2-

20

RJ45_MIDI2+

19
18

RJ45_MIDI1-

17

RJ45_MIDI1+

16
15

RJ45_MIDI0-

14

RJ45_MIDI0+

13

#SI2 change vendor

4

LAN_DO

45

EEDO

LAN_DI

47

EEDI/AUX

DVDD12
DVDD12
DVDD12
DVDD12
DVDD12
DVDD12

EVDD12
EVDD12

AVDD33
AVDD33

AVDD12
AVDD12
AVDD12
AVDD12

EESK
EECS

MDIP0
MDIN0
MDIP1
MDIN1
MDIP2
MDIN2
MDIP3
MDIN3

VDD33
VDD33
VDD33
VDD33

VDDSR

IGPIO

OGPIO

LAN_SK

48

LAN_CS

44

54

LED3

55

LED2

LAN_LINK#

56

LED1

LAN_ACTIVITY#

57

LED0

LAN_MDI0+

3

LAN_MDI0-

4

LAN_MDI1+

6

LAN_MDI1-

7

LAN_MDI2+

9

LAN_MDI2-

10

LAN_MDI3+

12

LAN_MDI3-

13

21

+LAN_VDD12

32
38
43
49
52

22

+LAN_EVDD12

28

16
37
46

+3V_LAN

53

63

+AVDD33

2
59

8
11
14
58

50

LAN_DSM#

51

C1121

1 2

C2103

1 2

C2104

1 2

C2105

1 2

22U_0805_6.3VAM

+LAN_VDD12

0.01U_0402_16V7K

0.01U_0402_16V7K

0.01U_0402_16V7K

0.01U_0402_16V7K

C634

HP PoE solution

Security Classification

4

3

+AVDD33

0.1U_0402_16V4Z

R2017

2

2

C650

C651

0.1U_0402_16V4Z

1

1

0_0805_5%

+3V_LAN

2

Close to Pin16,37,46,53

Close to Pin2 & pin59

4.7uHc
hok

e

L83

+CTRL_18

1 2

4.7UH_1008HC-472EJFS-A_5%_1008

Close to Pin1

LAN_DO
LAN_DI
LAN_SK
LAN_CS

C260

27P_0402_50V8J

L85

0_0805_5%

1

1

C635

0.1U_0402_16V4Z

2

2

1 2

R2074 10K_0402_5%@

1 2

R2086 0_0402_5%

1108 Add LAN DSM function

R450

1 2

75_0402_1%
R447

1 2

75_0402_1%
R448

1 2

75_0402_1%
R449

1 2

75_0402_1%

RJ45_GND

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

22U_0805_6.3VAM

R453

1 2

3.6K_0402_5%

U15

4

DO

GND

3

DI

NC

2

SK

NC

1

CS

VCC

AT93C46-10SI-2.7_SO8

Y3

LAN_X2LAN_X1

12

25MHZ_20P

1

2

+3V_LAN

+3VALW

LAN_DSM#_SB 27

C658

1 2

1000P_1808_3KV7K

2008/02/25 2008/02/25

+LAN_VDD12

2

2

C629

C630

0.1U_0402_16V4Z

1

1

+3V_LAN

5

2

C652

6
7
8

0.1U_0402_16V4Z

1

C256
27P_0402_50V8J

2

2

3

D89

PACDN042_SOT23~D@

1

LAN_LINK# LAN_LINK_R#

1

LAN_ACTIVITY_R#

LAN_LINK_R#

#PV for ESD

300_0402_5%

0.1U_0402_25V4K

C657

0.1U_0402_25V4K

300_0402_5%

+3VALW

0.1U_0402_16V4Z

+3V_LAN

R452

1

RJ45_MIDI3-40
RJ45_MIDI3+40

2

RJ45_MIDI1-40
RJ45_MIDI2-40
RJ45_MIDI2+40
RJ45_MIDI1+40
RJ45_MIDI0-40

2

RJ45_MIDI0+40

1

R451

#PV for EMI

Compal Secret Data

Deciphered Date

2

2

1

+LAN_VDD12

LAN_ACTIVITY_R#LAN_ACTIVITY#

12

0.1U_0402_16V4Z

2

2

C631

C649

1

1

0.1U_0402_16V4Z

2

2

C638

C637

1

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2

C645

C644

1

1

0.1U_0402_16V4Z

Beadfor8111

00m

A

L84

0.1U_0402_16V4Z

LAN Conn.

CONN@

JRJ45

13

Yellow LED+

14

Yellow LED-

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

11

Green LED+

12

Green LED-

FOX_JM36113-P1122-7F

1

C661

0.1U_0402_16V4Z

2

Title

LAN-8111C

Size Document Number Rev

Date: Sheet of

0.1U_0402_16V4Z

C636

0.1U_0402_16V4Z

+3V_LAN

12

0.1U_0402_16V4Z

+3V_LAN

2

C642

1

0.1U_0402_16V4Z

2

2

C639

1

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2

C646

1

1

0.1U_0402_16V4Z

C3

0_0603_5%

2

1

0.1U_0402_16V4Z

16

SHLD1

9

DETECT PIN1

10

DETCET PIN2

15

SHLD1

LANGND

1

C662

4.7U_0805_10V4Z

2

Compal Electronics, Inc.

LA-4102P Blade discrete

1

2

C643

0.1U_0402_16V4Z

1

+LAN_VDD12

0.1U_0402_16V4Z

C640

C647

+LAN_EVDD12

2

C632

1

1

2

C641

1

2

C648

1

C633

30 53Monday, February 25, 2008

0.4

A

www.kythuatvitinh.com

Mini Card 0--TV tuner/WWAN/Robson

+3VALW

1 1

2 2

1

2

0.1U_0402_16V4Z

CLK_PCIE_MCARD0#17
CLK_PCIE_MCARD017

PCIE_RXN127
PCIE_RXP127

0821 Change +3VS to +3VS_WWAN
0811 Pins 37 and 43 connect to GND and remove +1.5VS

WXMIT_OFF#27

0.01U_0402_16V7K

1

+3VS_WWAN

2

R419

1 2

R421

1 2

D11

CH751H-40_SC76

C573

0.1U_0402_16V4Z

ICH_PCIE_WAKE#
CH_DATA
CH_CLK
CLKREQ#_10

0_0402_5%

0_0402_5%

PCIE_TXN1
PCIE_TXP1

C572

CLKREQ#_1017

PCIE_TXN127
PCIE_TXP127

4.7U_0805_10V4Z

1

C574

2

PCIE_C_RXN1
PCIE_C_RXP1

R427 0_0603_5%

1 2
1 2

R428 0_0603_5%

M_WXMIT_OFF#

21

+3VS_WWAN

1

C575

2

CONN@

JP6

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

GND1

FOX_AS0B226-S40N-7F

WWAN_POWER_OFF38

GND2

2
4
6

8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

+3VS_WWAN

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

54

B

SIM card Connector

+3VS_WWAN

UIM_PWR
UIM_DATA
UIM_CLK
UIM_RST

D

UIM_VPP

UIM_PWR
UIM_DATA
UIM_CLK
UIM_RST
UIM_VPP

1 2
1 2

+1.5VS_WLAN

USB20_N8 27
USB20_P8 27

@

R441

#SI UIM DATA pull up UIM_PWR

+3VALW+3VS_WWAN

@

18P_0402_50V8J

Q115AP2305GN

S

G

2

+1.5VS_WLAN

M_WXMIT_OFF#
PLT_RST#

R420 0_0805_5%
R422 0_0805_5%

ICH_SMBCLK
ICH_SMBDATA

+1.5VS_WLAN
+3VS_WWAN

R418

1 2

0_1206_5%

1 3

JP4

1

1

2

2

3

3

4

4

5

5

6

6

7

7

ACES_88266-07001

+3VALW
+3VS_WWAN

WW_LED# 39

47K_0402_5%

1 2

1

2

@

C

Mini Card 2---WLAN

8

G1

9

G2

CH_DATA36

CH_CLK36

CLKREQ#_617

CLK_PCIE_MCARD2#17
CLK_PCIE_MCARD217

CLK_DEBUG_PORT_117

PCIE_RXN327
PCIE_RXP327

UIM_DATAUIM_PWR

UIM_CLK

C585

R423
R425

PCIE_TXN327
PCIE_TXP327

R431 0_1206_5%

1 2

+1.5VS

R432 0_1206_5%

1 2

+3VS +3VS_WLAN

+3VS_WLAN

0.1U_0402_16V4Z

1

C566

2

4.7U_0805_10V4Z

ICH_PCIE_WAKE#
CH_DATA
CH_CLK
CLKREQ#_6

CLK_PCIE_MCARD2#
CLK_PCIE_MCARD2

R704 0_0402_5% DEBUG@

1 2

0_0402_5%

PCIE_C_RXN3

1 2

PCIE_C_RXP3

1 2

0_0402_5%

PCIE_TXN3
PCIE_TXP3

+3VS_WLAN

D

1

C567

2

PLT_RST#

+1.5VS_WLAN

XMIT_OFF27

#SI2 leakage issue

CONN@

JP7

1

1

3

3

5

5

7

7

9

9

10

11

11

12

13

13

14

15

15

16

17

17

18

19

19

20

21

21

22

23

23

24

25

25

26

27

27

28

29

29

30

31

31

32

33

33

34

35

35

36

37

37

38

39

39

40

41

41

42

43

43

44

45

45

46

47

47

48

49

49

50

51

51

52

53

GND1

GND2

FOX_AS0B226-S40N-7F

D88

CH751H-40PT_SOD323-2

+3VALW

2
4
6
8

0.01U_0402_16V7K

1

C568

2

0.1U_0402_16V4Z

2

+3VS_WLAN

4
6

+1.5VS_WLAN

R699 0_0402_5% DEBUG@

8

1 2

R700 0_0402_5% DEBUG@

10

1 2

R701 0_0402_5% DEBUG@

12

1 2

R702 0_0402_5% DEBUG@

14

1 2

R703 0_0402_5% DEBUG@

16

1 2

18

XMIT_OFF#

20

PLT_RST#

22

R424 0_0805_5%

24

R426 0_0805_5%

26
28

ICH_SMBCLK

30

ICH_SMBDATA

32
34
36
38
40
42
44
46
48
50
52

54

12

R433

@

10K_0402_5%

2

21

G

R435

1 2

0_0402_5%

E

+1.5VS_WLAN

4.7U_0805_10V4Z

1

C569

2

0.1U_0402_16V4Z

1

1

C571

C570

2

2

#PV Pin 24 change to +3VS_WLAN

@

1 2
1 2

+3VALW

12

13

D

S

@

R434
100K_0402_5%

@

Q10
2N7002_SOT23-3

USB20_N5 27
USB20_P5 27

XMIT_OFF#

+3VALW
+3VS_WLAN
+1.5VS_WLAN

+1.5VS_WLAN
+3VS_WLAN

LPC_FRAME# 26,37,38
LPC_AD3 26,37,38
LPC_AD2 26,37,38
LPC_AD1 26,37,38
LPC_AD0 26,37,38

WL_LED# 39

Near to Express Card slot.

CONN@

JEXP1

1

GND

2

USB_D-

3

USB_D+

4

CPUSB#

5

RSV

6

RSV

7

SMB_CLK

8

SMB_DATA

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V

15

+3.3V

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND

21

PERn0

22

PERp0

23

GND

24

PETn0

25

PETp0

26

GND

27

GND

28

GND

SANTA_131851-A_LT

+3VS_PEC

1

C577

2

+1.5VS_PEC

1

C581

2

+3V_PEC

C583

1

29

GND

30

GND

2

Compal Electronics, Inc.

WLAN, WWAN, New Card

LA-4102P Blade discrete

E

4.7U_0805_10V4Z

1

C578

2

0.1U_0402_16V4Z

4.7U_0805_10V4Z

1

C582

2

0.1U_0402_16V4Z

4.7U_0805_10V4Z

1

C584

2

0.1U_0402_16V4Z

31 53Monday, February 25, 2008

0.4

0.1U_0402_16V4Z

1 2

New Card

Express Card Power Switch

+1.5VS

U16

12

1.5Vin

+3VS

14

1.5Vin

2

3.3Vin

4

3.3Vin
AUX_IN17AUX_OUT

6

SYSRST#

20

SHDN#

1

STBY#

10

CPPE#

9

CPUSB#

18

RCLKEN

R5538D001-TR-F_QFN20_4X4~D

Close to
JEXP

R436 0_0402_5%

11

1.5Vout

1.5Vout

3.3Vout

3.3Vout

OC#

PERST#

NC

GND

B

+1.5VS_PEC

13

3

+3VS_PEC

5
15

+3V_PEC

19

PERST#

8
16
7

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

C

USB20_N927

USB20_P927

ICH_SMBCLK17,21,27,37

ICH_SMBDATA17,21,27,37

ICH_PCIE_WAKE#27,30

CLK_PCIE_NCARD#17
CLK_PCIE_NCARD17

Compal Secret Data

R437 0_0402_5%

R438

1 2

0_0402_5%

CLKREQ#_417

PCIE_RXN427
PCIE_RXP427

PCIE_TXN427
PCIE_TXP427

Deciphered Date

1 2
1 2

+1.5VS_PEC
+1.5VS_PEC

+3V_PEC
+3VS_PEC

D

USB10­USB10+
EXP_CPPE#

ICH_SMBCLK
ICH_SMBDATA

PCIE_PME#_R
PERST#

CLKREQ#_4
EXP_CPPE#

Title

Size Document Number Rev

Date: Sheet of

3 3

C576

1 2

C579 0.1U_0402_16V4Z

1 2

C580 0.1U_0402_16V4Z

1 2

+3VALW

PLT_RST#9,20,25,30,32

+3VALW

EXP_CPPE#27

internal pull high to 3.3Vaux-in

4 4

EC need setting at Hi-Z & output Low

A

PLT_RST#
SYSON

SYSON38,39,41,50

SUSP#

SUSP#33,38,41,44,46,47,48

R439 100K_0402_5%

EXP_CPPE#

5

www.kythuatvitinh.com

4

3

2

1

APVDD
APV18

TAV33

DV33
DV33
DV33
DV18
DV18

MDIO0
MDIO1
MDIO2
MDIO3
MDIO4
MDIO5
MDIO6
MDIO7
MDIO8

MDIO9
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14

APGND

GND
GND
GND
GND

SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-DAT4
SD-DAT5
SD-DAT6
SD-DAT7

SD-CD-SW

SD-WP-SW

MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3

NC
NC
NC

SD-VCC
MS-VCC

SD_CLK

SD-CMD

MS-INS

MS-BS

+1.8VS_CR

10U_0805_10V4Z

5
10
30

19
20
44
18
37

XD_SD_MS_D0

48

XD_SD_MS_D1

47

XD_SD_MS_D2

46

XD_SD_MS_D3

45

SDCMD_MSBS_XDWE#

43

SDCLK_MSCLK_XDCE#

42

XDWP#_SDWP#

41

XD_CLE

40

XD_D4

29

XD_D5

28

XD_D6

27

XD_D7

26

XD_RE#

25

XD_RB#

23

XD_ALE

22
34

35
36

6
24

31
32
33

21
28

20
14
12
30
29
27
23
18
16
25
1

2

26
17
15
19
24
22
13

1

C1326

2

+3VS

1

C1336

2

SDCLK
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
XD_D4
XD_D5
XD_D6
XD_D7
SDCMD_MSBS_XDWE#
XDCD0#_SDCD#

XDWP#_SDWP#

MSCLK
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
XDCD1#_MSCD#
SDCMD_MSBS_XDWE#

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C1327

0.1U_0402_16V4Z

C1332

+3VS

+1.8VS_CR

1

2

1

2

C1328
1000P_0402_50V7K

1

C1334

2

1

C1329

0.1U_0402_16V4Z

2

1

C1333

0.1U_0402_16V4Z

2

1

C1335

0.1U_0402_16V4Z

2

#SI stuff

R1128
0_0603_5%

1 2

1

12

C1324

10U_0805_10V4Z

2

Use 0603 type and over 20
mils trace width on both side

+VCC_OUT

#SI no stuff

+3VS

U37

3

VIN

VOUT

4

VIN/CE

VOUT

1

2

2

GND

RT9701-PB_SOT23-5

@

1U_0603_10V4Z

0.1U_0402_16V4Z

C1330

reserved power circuit

+1.8VS_CR +1.8VS

R705

1 2

0_0805_5%

@

#SI no stuff

+VCC_4IN1+VCC_OUT

C1325

0.1U_0805_50V7M

1
5

C1331

+VCC_4IN1

1

2

40mil

12

R1050

@

150K_0402_5%

+3VS

R1042 4.7K_0402_5%

1 2

R1041 4.7K_0402_5%

1 2

+VCC_4IN1

D D

+3VS

R709

1 2

R1048
R1049

XD_RE#

R1046 200K_0402_5%

XDCE#

SDCLK

C C

B B

2N7002_SOT23-3

A A

MSCLK

XDCD1#_MSCD#
XDCD0#_SDCD#

+5VS

12

21

13

D

Q54

@

S

1 2

1 2

R719
56_0402_5%

D15
HT-F196BP5_WHITE

R51 0_0402_5%

1 2

2

G

R1044 10K_0402_5%
R1043 10K_0402_5%

10K_0603_5%

XD_ALE

10K_0402_5% @

12

10K_0402_5%

12

1 2

12

12

R706

@

C788

@

100_0402_5%

100P_0402_25V8K

1 2

C789

@

R707

@

100P_0402_25V8K

100_0402_5%

1 2

C790

@

R708

@

100P_0402_25V8K

100_0402_5%

R710 22_0402_5%

1 2

R711 22_0402_5%

1 2

R712 22_0402_5%

1 2

D42

2

1

3

DAN202U_SC70

CR_LED#

R2098

4.7K_0402_5%

@

1 2

XDCD0#_SDCD#
XDCD1#_MSCD#

XDWP#_SDWP#

12
12

XD_RB#

#SI2 Change PH +3VS

CR_CPPE#27

SDCLKSDCLK_MSCLK_XDCE#

#SI Add D86 for card reader wake up

MSCLK
XDCE#

#PV stuff D86

XD_CD#

1

C1047
270P_0402_50V7K

2

#SI2 Change to Mos control
#PV remove Mos

U36

CLK_SRC11#17
CLK_SRC1117

PCIE_TXN527
PCIE_TXP527

C1321 0.1U_0402_16V4Z

PCIE_RXN527
PCIE_RXP527

D86

CR_WAKE#27

CH751H-40PT_SOD323-2

12

C1322 0.1U_0402_16V4Z

12

R1047 8.2K_0402_5%

R972 10K_0402_5%

1 2

+3VS

PLT_RST#9,20,25,30,31

R50 0_0402_5%

1 2

21

use for PWR_EN#

12

@

T39

+VCC_OUT

8mA sink current

Layout must add a thermal pad pin49

+VCC_4IN1 +VCC_4IN1

XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
XD_D4
XD_D5
XD_D6
XD_D7

SDCMD_MSBS_XDWE#
XDWP#_SDWP#
XD_ALE
XD_CD#
XD_RB#
XD_RE#
XDCE#
XD_CLE

3

APCLKN

4

APCLKP

9

APRXN

8

PCIE_C_RXN5
PCIE_C_RXP5XD_CLE

XDCD1#_MSCD#
XDCD0#_SDCD#

CR_LED#

APRXP

11

APTXN

12

APTXP

PREXT

7

APREXT

XIN

38

PCIES_EN

39

PCIES

1

XRSTN

2

XTEST

13

SEEDAT

14

SEECLK

@

15

CR1_CD1N

16

CR1_CD0N

17

CR1_PCTLN

21

CR1_LEDN

JMB385-LGEZ0A_LQFP48_7X7

Card Reader Connector

JREAD1

3

XD-VCC

32

XD-D0

10

XD-D1

9

XD-D2

8

XD-D3

7

XD-D4

6

XD-D5

5

XD-D6

4

XD-D7

34

XD-WE

33

XD-WP

35

XD-ALE

40

XD-CD

39

XD-R/B

38

XD-RE

37

XD-CE

36

XD-CLE

11

7IN1 GND

31

7IN1 GND

41

7IN1 GND

42

7IN1 GND

TAITW_R015-B10-LM

CONN@

JMB385

7 IN 1 CONN

#SI Change Lib

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

2008/02/25 2008/02/25

Deciphered Date

2

Compal Electronics, Inc.

Title

USB CardReader&CONN

Size Document Number Rev

Custom

LA-4102P Blade discrete

Date: Sheet

1

of

32 53Monday, February 25, 2008

0.4

A

www.kythuatvitinh.com

B

C

D

E

+3VS_HDA

R1051

1 2

BLM18BD601SN1D_0603

0.1U_0402_16V4Z

C1342

HDA_BITCLK_CODEC26
HDA_SDOUT_CODEC26
HDA_SDIN026
HDA_SYNC_CODEC26
HDA_RST#_CODEC26,38

+VDDA_CODEC_R

SENSE_B#40

1

2

1 1

HDA_BITCLK_CODEC

12

@

R1054

47_0402_5%

1

@

2 2

C1345

33P_0402_50V8K

2

#SI connect to EC

R1070 47K_0402_5%

EC_BEEP38
SB_SPKR27

C1358

@

1 2

0.1U_0402_16V4Z

C1359

@

1 2

0.1U_0402_16V4Z

C1360

@

1 2

@

1 2

C1361

R1067

1 2

R1065

1 2

R1066

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0_1206_5%

0_1206_5%

0_1206_5%

3 3

1 2

R1060 47K_0402_5%

1 2

R1061 10K_0402_5%

1 2

C1349 0.1U_0402_16V4Z

1 2

GNDA 35,40

GNDAGND

SENSE A SENSE B

Port Resistor Port Resistor

A 39.2K

4 4

B 20K

C 10K

D 5.11K

E

F

G

H

A

39.2K

20K

10K

5.11K

+3VS

+3VS +VDDA_CODEC

+3VDD_CODEC

+VDDA_CODEC_R

+3VS_HDA

HDA_BITCLK_CODEC
HDA_SDOUT_CODEC

R1055 33_0402_5%

1 2

HDA_SYNC_CODEC
HDA_RST#_CODEC

DMIC_CLK19

R1062 5.1K_0402_1%

1 2

R1063 39.2K_0402_1%

1 2

B

R1058 22_0402_5%

C1347

1 2

C1348 0.1U_0402_16V4Z

C1353

0.1U_0402_16V4Z

C1355
10U_0805_10V4Z

1 2

R1052

1 2

BLM18BD601SN1D_0603

1 2

1U_0603_10V4Z

MONO_INR

SENSEB#

1

2

VC_REFA

+3VDD_CODEC +5VALW

C1337

U38

9

DVDD_CORE*

1

DVDD_CORE

25

AVDD1*

38

AVDD2**

3

DVDD_IO

32

MONO_OUT

6

BITCLK

5

SDO

8

SDI_CODEC

10

SYNC

11

RESET#

46

DMIC_CLK

33

12

CAP2

12

PCBEEP

40

NC / OTP

34

SENSE_B / NC

37

NC

18

NC

19

NC

20

NC

27

VREFFILT

26

AVSS1*

42

AVSS2**

7

DVSS**

92HD71B7X5NLGXA1X8_QFN48_7X7

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

1U_0603_10V4Z

Issued Date

C1338

+VDDA_CODEC_R

1

1

2

2

C1339

0.1U_0402_16V4Z

0.1U_0402_16V4Z

EAPD/ SPDIF OUT 0 or 1 / GPIO 0

VOL_UP/DMIC_0/GPIO 1
VOL_DN/DMIC_1/GPIO 2

VREFOUT-E / GPIO 4

SPDIF OUT1 / GPIO 7

C

R1053

1 2

0_0603_5%

1

2

1U_0603_10V4Z

C1340

EAPD_CODEC

47
2
4
30

GPIO 3

31
43

GPIO 5

44

GPIO 6

SPDIF_OUT1

45

SPDIF_OUT0

48

SPDIF OUT0

VREFOUT_B

28

VREFOUT-B

29

VREFOUT-C

SENSE

13

SENSE_A

PORTA_R
PORTA_L

PORTB_R
PORTB_L

PORTC_R

PORTC_L

PORTD_R

PORTD_L

PORTE_R
PORTE_L

PORTF_R
PORTF_L

2008/02/25 2008/02/25

HP_OUTR

41

HP_OUTL

39

MIC_EXTR

22

MIC_EXTL

21

MIC_INR

24

MIC_INL

23

LINE_OUT_R

36

LINE_OUT_L

35

DOCK_MICR

15

DOCK_MICL

14

17
16

Compal Secret Data

Deciphered Date

EAPD_CODEC 38
DMIC_DAT 19

SPDIF_OUT1 40
SPDIF_OUT0 21

VREFOUT_B 35

R1056 5.1K_0402_1%

1 2

R1057 20K_0402_1%

1 2

R1059 39.2K_0402_1%

1 2

R683 10K_0402_1%

1 2

C1346 0.1U_0402_16V4Z

1 2

HP_OUTR 35
HP_OUTL 35

1 2

C1350 1U_0603_10V6K

1 2

C1351 1U_0603_10V6K

LINE_OUT_R 35

LINE_OUT_L 35

C746 1U_0603_10V6K

DOCK_MICR_C

1 2

DOCK_MICL_C

1 2

C753 1U_0603_10V6K

1.21K_0402_1%

D

W=40Mil

C1341

R910

1 2

SUSP#31,38,41,44,46,47,48

+VDDA_CODEC_R

12

+VDDA_CODEC

5

OUT

4

1

C1344

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

G9191-475T1U_SOT23-5

SPDIF1-->Docking

#SI SPDIF0-->VGA

EXTMIC_DET# 35
JACK_DET# 35,40
INTMIC_DET# 35

U39

1

VIN

2

GND
SHDN#3BP

HP Jack & Dock

MIC_EXT_R 35

1 2

12

C1352 0.022U_0603_25V7K

R1064

@

0_0603_5%
C1354 0.022U_0603_25V7K

1 2

Internal SPKR.

1 2

R943 10K_0402_5%

1 2

R944 10K_0402_5%

12

R911

1.21K_0402_1%

1/10*Vin
need close to Codec

MIC_EXT_L 35
MIC_IN_R 35

MIC_IN_L 35

DOCK_MIC_R 40
DOCK_MIC_L 40

#SI -3db test fail

Title

Size Document Number Rev

Custom

Date: Sheet of

Codec_IDT9271B7

LA-4102P Blade discrete

1

2

C1343

E

2.2U_0805_16V4Z

Jack MIC

Internal MIC

DOCK MIC

33 53Monday, February 25, 2008

(4.75V)
300mA

0.4

CODEC POWER

5

www.kythuatvitinh.com

4

3

2

1

D D

C C

B B

MDC 1.5 Conn.

HDA_SDOUT_MDC26
HDA_SYNC_MDC26

HDA_SDIN126
HDA_RST#_MDC26

1 2

R477 33_0402_5%

HDA_SDOUT_MDC
HDA_SYNC_MDC

HDA_SDIN1_MDC

JP8

1

GND1

3

IAC_SDATA_OUT

5

GND2

7

IAC_SYNC

9

IAC_SDATA_IN

11

IAC_RESET#

Connector for MDC Rev1.5

IAC_BITCLK

GND13GND14GND15GND16GND17GND

RES0
RES1

GND3
GND4

18

2
4
6

3.3V

8
10
12

ACES_88018-124G

R475 0_0603_5%
R476 0_0603_5%

+3VS

R478

@

10_0402_5%

1 2

@

1 2

12

C618

@

10P_0402_25V8K

1 2

+1.5VS
+3VS

HDA_BITCLK_MDC 26

+3VS

1

1

1

C619

C620

C621

@

2

2

2

0.1U_0402_16V4Z

4.7U_0805_10V4Z

1000P_0402_50V7K

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

MDC 1.5 & Robson

Size Document Number Rev

2

Date: Sheet of

LA-4102P Blade discrete

1

34 53Monday, February 25, 2008

0.4

A

www.kythuatvitinh.com

B

C

D

E

3

D55

10
11
12
13
14

C1379

1U_0603_10V4Z

1 2

12

R1079

4.7K_0402_5%

61

3

2

1

1

JP49

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9
10
11
12
13
14

ACES_87213-1400G

CONN@

+VDDA_CODEC

2

SPEAKER

E&T_3806-F04N-02R

6
5

4
3
2
1

JP60

2

D56

@

PSOT24C_SOT23-3

INTMIC IN

R951
10K_0402_5%

1 2

JP51

1

1

2

2

3

3

4

4

5

GND1

6

GND2

ACES_88231-04001

CONN@

GND2
GND1

4
3
2
1

+5VS+5VAMP

1

C1479

2

100K_0402_5%

SPKR+

SPKR-

SPKL+

SPKL-

Keep 10 mil width

1

2

R968

R969

R1133

1 2

0_1206_5%

1

2

+5VS

15.6 dB

12

12

@

R1134

R1137

100K_0402_5%

100K_0402_5%

12

12

@

R1138
100K_0402_5%

#SI change to 15.6 dB

#SI2 change to 1U for depop issue

VREFOUT_B33

MIC_EXT_R33
MIC_EXT_L33

DOCK_LOUT_R 40

DOCK_LOUT_L 40

R1135

R684

12

0_0402_5%

R685

4.7K_0402_5%

MIC_EXT_R
MIC_EXT_L

HP OUT For Docking

C787

12

12

R686

4.7K_0402_5%

EXTMIC IN

SPKL+
SPKL­SPKR+
SPKR-

C1375

1 2

1U_0603_10V4Z

R1102 0_0603_5%

1 2

R1103 0_0603_5%

1 2

R1104 0_0603_5%

1 2

R1105 0_0603_5%

1

1

C1376

2

100P_0402_50V8J

1

C1377

2

2

100P_0402_50V8J

100P_0402_50V8J

C1378

1 2

1

2

100P_0402_50V8J

@

PSOT24C_SOT23-3

Audio/B & CIR

MIC_EXT_R
MIC_EXT_L

HP_OUT_R
HP_OUT_L

MIC_IN_L33
MIC_IN_R33

Q109B

CIR_IN38,40

+3VS

3

4

EXTMIC_DET#
HP_DET#

CIR_IN

+5VL

R1077

0_0402_5%

12

12

R1078

4.7K_0402_5%

12

R681 10K_0402_5%

Q109A

5

2N7002DW-7-F_SOT363-6

EXTMIC_DET#33

+VDDA_CODEC

ANA_MIC_DET38

INTMIC_DET#33

2N7002DW-7-F_SOT363-6

0.1U_0402_16V4Z

1

C1478

C1477

10U_0805_10V4Z

2

0.1U_0402_16V4Z

15

6

16

VDD

PVDD1

GND41GND311GND213GND1

PVDD2

GAIN0
GAIN1

ROUT+

ROUT-

LOUT+

LOUT-

NC

BYPASS

THERMAL PAD

21

TPA6017A2_TSSOP20

2
3

18

14

4

8

12
10

C1488 1U_0805_16V7K

1 1

LINE_OUT_R33

LINE_OUT_L33

2 2

EC_MUTE#38

#SI change to 0.022U
#SI remove serial resistor

C1480 0.022U_0603_25V7K

1 2
1 2

C1481 0.022U_0402_16V7K
C1482 0.022U_0603_25V7K

1 2
1 2

C1483 0.022U_0402_16V7K

C1484 0.022U_0603_25V7K

1 2
1 2

C1485 0.022U_0402_16V7K
C1486 0.022U_0603_25V7K

1 2
1 2

C1487 0.022U_0402_16V7K

EC_MUTE#

7

17

9

5

19

U40

RIN+

RIN-

LIN+

LIN-

SHUTDOWN

20

#SI pull high +3VALW

JACK_DET#33,40

R750

1 2

R676

10K_0402_5%

2

G

1 2

13

D

Q37

2N7002_SOT23-3

S

3 3

10K_0402_5%

HP_DET#

HP_OUTR33

HP_OUTL33

4 4

2N7002DW-7-F_SOT363-6

3

Q49B

5

4

61

2N7002DW-7-F_SOT363-6

Q49A

2

C785

C786

354

2

6 1

Q47A
2N7002DW-7-F_SOT363-6

+

1 2

150U_B_6.3VM_R40M

+

1 2

150U_B_6.3VM_R40M

B++3VALW

12

R678
330K_0402_5%

1

2

Q47B

2N7002DW-7-F_SOT363-6

DOCK_R

DOCK_L

0.01U_0402_25V7K
C854

C795

C796

HP_OUT_R

HP_OUT_L

HP OUT

+

1 2

150U_B_6.3VM_R40M

+

1 2

150U_B_6.3VM_R40M

HP OUT For M/B

#SI change to 40.2 ohm

1 2

47_0402_5%

1 2

47_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

C

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

D

Date: Sheet of

AMP & Audio Jack

LA-4102P Blade discrete

E

35 53Monday, February 25, 2008

0.4

5

www.kythuatvitinh.com

4

3

2

1

+5VALW

U41

1

D D

C C

B B

C1381

4.7U_0805_10V4Z

2
3
4

1

2

USB_EN#

USB cable connector for Right side

+5VALW

USB_EN#

USB20_N027
USB20_P027

USB20_N127
USB20_P127

GND

OUT

IN

OUT
OUT

IN

OC#

EN#

TPS2061IDGNR_MSOP8

8

W=60mils

7
6
5

C1380

R1083 10K_0402_5%

JP55

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

GND1

12

GND2

ACES_87213-1000G

Finger printer

@

R627 0_0603_5%

1 2

Q31 SI2301BDS_SOT23@

S

D

+3VALW

USB_EN#38

USB20_N727
USB20_P727

A A

5

13

G

2

R634 0_0402_5%

1 2

R635 0_0402_5%

1 2

2

3

D30

@

PACDN042_SOT23-3~D

1

4

Left side ESATA/USB combination Connector

USB_VCCC

1

+

2

150U_D_6.3VM

1

1

C1383

C1382

2

2

0.1U_0402_16V4Z
1000P_0402_50V7K

1 2

20070209 Add for FPR

1

C756

0.1U_0402_16V4Z

2

USB20_N7_R
USB20_P7_R

R652

0_0402_5%

1 2

@

USB20_N227
USB20_P227

SATA_TXP526
SATA_TXN526

SATA_RXN5_C26

+5VALW

R628

1 2

JP24

1

1

2

2

3

3

4

4

5

5

6

6

7

GND

8

GND

ACES_85201-06051

CONN@

#SI change lib

0_0603_5%

SATA_RXP5_C26

+3VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

C1385 0.01U_0402_16V7K

12

C1384 0.01U_0402_16V7K

12

#SI2 change to +3VS

+3VS

+3VALW

@

2008/02/25 2008/02/25

USB_VCCC

SATA_TXP5
SATA_TXN5

SATA_RXN5
SATA_RXP5

BT Connector

ACES_87213-0800G

8

10

8

GND

7

7

6

6

5

5

4

4

3

3

2

2

1

9

1

GND

CONN@

JP57

R2112 0_0603_5%

1 2

R2113 0_0603_5%

1 2

1

C1386
1U_0603_10V4Z

2

BT_OFF27

Compal Secret Data

Deciphered Date

JP53

USB

1

VBUS

2

D-

3

D+

4

GND

5

GND

6

A+

ESATA

7

A-

8

GND

9

B-

10

B+

11

GND

12

GND

13

GND

14

GND

15

GND

TYCO_1759576-1

CONN@

USB20_P6_R

R1084 0_0402_5%

USB20_N6_R

R1085 0_0402_5%

R1086 1K_0402_5%@

1 2

R1087 1K_0402_5%@

1 2

0612 no install

+3VS_BT

Q105 SI2301BDS_SOT23

S

G

12

R1090
100K_0402_5%

R1092

1 2

10K_0402_5%

#PV R1092 change to 10K

2

4

+5VALW

SATA_TXN5

3

PRTR5V0U2X_SOT143-4@

Need change to New version

+3VAUX_BT

2

12
12

+5VALW

USB20_N6_R

D

0.1U_0402_16V4Z

13

1

C1387

2

0.01U_0402_16V7K
C1390

1 2

0.1U_0402_16V4Z

Title

Size Document Number Rev

Date: Sheet of

USB20_P6 27
USB20_N6 27

BT_LED 39

CH_DATA 31
CH_CLK 31

D47

2

4

IO1

VIN

1

3

GND

IO2

PRTR5V0U2X_SOT143-4@

+3VAUX_BT

1

1

C1388

C1389

2

2

4.7U_0805_10V4Z

Compal Electronics, Inc.

USB, BT, eSATA

LA-4102P Blade discrete

D46

VIN
IO2

IO1

GND

USB20_P6_R

2
1

1

SATA_TXP5

36 53Monday, February 25, 2008

0.4

5

www.kythuatvitinh.com

#SI change to +3VALW

+3VL+3VL

1

C711

0.1U_0402_16V4Z

SMB_EC_CK138,43

D D

SMB_EC_DA138,43

2

@

U28

8

VCC

7

WP

6

SCL

5

SDA

AT24C16AN-10SI-2.7_SO8

12

R552
100K_0402_5%

1

A0

2

A1

3

A2

4

GND

12

R557
100K_0402_5%

FSEL#38
SPI_CLK38

SPI_FSEL#

SPI_CLK_R

SPI_FWR#

4

R2118

33_0402_5%

R2119

33_0402_5%

R2120

33_0402_5%

0.1U_0402_16V4Z

+3VL

20mils

1

C712

2

1 2

R553 10_0402_5%

1 2

R554 10_0402_5%

1 2

R556 10_0402_5%

C2125

12

12

22P_0402_50V8J

C2126

12

12

22P_0402_50V8J

C2127

12

12

22P_0402_50V8J

8
3
7

SPI_FSEL#

1

SPI_CLK_R

6
5

#PV for EMI change 10 ohm

@

3

SPI ROM

U27

4

VCC

VSS
W
HOLD
S
C
D

WIESON G6179 8P SPI

SST25LF080B_SO8-200mil

SPI_SOSPI_FWR#

2

Q

&U1

FRD#

1 2

R555 0_0402_5%

2

1

LPC Debug
Port

FRD# 38FWR#38

CLK_DEBUG_PORT_017

Connect pin3 & 23
together and pin 24
to GND in 6/29.

LPC_FRAME#26,31,38

PCI_RST#25,38

LPC_AD026,31,38
LPC_AD126,31,38
LPC_AD226,31,38
LPC_AD326,31,38

Change from +3VL to +3VS. 6/9
Removed +3VS. 6/13

B+

ON/OFFBTNLED#

VCC1PWRGD
SPI_CLK_JP52
SPI_CS#_JP52
SPI_SI_JP52
SPI_SO_JP52
SPI_HOLD#_0

CONN@

JP18

1

Ground

2

LPC_PCI_CLK

3

Ground

4

LPC_FRAME#

5

+V3S

6

LPC_RESET#

7

+V3S

8

LPC_AD0

9

LPC_AD1

10

LPC_AD2

11

LPC_AD3

12

VCC_3VA

13

PWR_LED#

14

CAPS_LED#

15

NUM_LED#

16

VCC1_PWRGD

17

SPI_CLK

18

SPI_CS#

19

SPI_SI

20

SPI_SO

21

SPI_HOLD#

22

Reserved

23

Reserved

24

Reserved

ACES_87216-2404_24P

#SI2 for EMI#PV stuff

C C

Acceleromter-1

+3VS +3VS_ACL

D23

2 1

CH751H-40PT_SOD323-2

U29

LIS302DL

+3VS_ACL_IO

+3VS_ACL

ACCEL_INT25

CLK_SMBDATA17,21,27,31

B B

+3VS_ACL

CLK_SMBCLK17,21,27,31

R1538

1

VDD_IO

6

VDD

8

INT 1
INT 29GND

12

SDO

13

SDA / SDI / SDO

14

SCL / SPC

G_CS#

7

12

CS

10K_0402_5%

LIS302DLTR_LGA14_3X5~D

<BOM Structure>

Must be placed in the center of the system.

R564

1 2

GND
GND
GND

RSVD
RSVD

2
4
5
10

3
11

0_0603_5%

+3VS_ACL_IO

R1539

1 2

0.1U_0402_16V4Z

0_0603_5%

1

C713

2

+3VS_ACL

+3VS_ACL_IO

1

C714
10U_0805_6.3V6M

2

+3VALW

R561

ON/OFFBTN_LED#38,39

VCC1_PWRGD38

1 2

SPI_CLK

FSEL#

FWR#

HOLD#

3.3K_0402_5%

FRD#

ON/OFFBTN_LED#

VCC1_PWRGD

R558 0_0402_5%DEBUG@

R559 0_0402_5%DEBUG@

R560 0_0402_5%DEBUG@

R562 0_0402_5%DEBUG@

R563 0_0402_5%DEBUG@

R565 0_0402_5%DEBUG@

R566 0_0402_5%DEBUG@

1 2

1 2

1 2

1 2

1 2

1 2

1 2

SPI_CLK_JP52

SPI_CS#_JP52

SPI_SI_JP52

SPI_HOLD#_0

SPI_SO_JP52

ON/OFFBTNLED#

VCC1PWRGD

Acceleromter-2

A A

5

CLK_SMBCLK

CLK_SMBDATA

U29 & U14 must be close

ACCEL_INT

4

G_CS#

5
6
7
8

U14

BMA150

INT

CSB
SCK
SDO
SDI

BMA150_LGA12

@

VDDIO

RSVD
RSVD

RSVD
RSVD

9

+3VS_ACL_IO

2

VDD

GND

+3VS_ACL

3
1

10

11
12

4

#SI co-lay MMA150

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

BIOS ROM

Size Document Number Rev

2

Date: Sheet of

LA-4102P Blade discrete

1

37 53Monday, February 25, 2008

0.4

+3VL_EC

www.kythuatvitinh.com

0.1U_0402_16V4Z

1

C715

2

0.1U_0402_16V4Z

SMB_EC_DA1
SMB_EC_CK1
SMB_EC_DA2
SMB_EC_CK2

+3VL

#SI pull low 8.2K

SUSP#

12

R581

8.2K_0402_5%

SYSON

12

R584

8.2K_0402_5%

PCI_PME#25

DOCK_SLP_BTN#40

UTX

1 2

0_1206_5%

@

LAN_POWER_OFF30

SMB_EC_CK1_R39

SMB_EC_DA1_R39

ESB_CLK39

ESB_DAT39

1

2

0.1U_0402_16V4Z

1

C717

2

1000P_0402_50V7K

1 2
1 2
1 2
1 2

@

C722

1 2

15P_0402_50V8J

CLK_PCI_EC17

R578

1 2

12

PCI_RST#

12

R713
100K_0402_5%

1

C718

2

@

R576

1 2

47K_0402_5%

0.1U_0402_16V4Z

C716

R573 4.7K_0402_5%
R577 4.7K_0402_5%
R574 4.7K_0402_5%
R575 4.7K_0402_5%

C721

#SI2 changhe to +3VALW

#SI no stuff

R589

@

1 2

0_0402_5%

R592

1 2

R735

0_0402_5%

#SI2 reserve for EC debug

R733 0_0402_5%

R729 0_0402_5%

1 2

R730 0_0402_5%

1 2

R731 0_0402_5%

1 2

R732 0_0402_5%

1 2

2

C727
15P_0402_50V8J

1

@

1000P_0402_50V7K

1

C719

2

+5VL +3VS

33_0402_5%

12

J1
JOPEN

+3VALW

12

R583
10K_0402_5%

LID_SW#

+3VALW

R585
10K_0402_5%

1 2

EC_PME#

WWAN_POWER_OFF31

ON/OFFBTN

<BOM Structure>

Y5

2
3

32.768KHZ_12.5P_1TJS125DJ2A073

1 2

SMB_EC_CK1
SMB_EC_DA1

ESB_CLK_R
ESB_DAT_R

#PV reserve C727 for EMI

HDA_RST#_CODEC26,33

+3VS

R721
10K_0402_5%

1 2

TP_BTN#

TSATN#9

ON/OFFBTN39

NC

OUT

NC

LAN_POWER_OFF_R

EC_SCI#27

+3VL

C723
15P_0402_50V8J

1 2

1

IN

4

1 2

C725
15P_0402_50V8J

GATEA2026
KB_RST#26
SIRQ27

LPC_FRAME#26,31,37

LPC_AD326,31,37
LPC_AD226,31,37
LPC_AD126,31,37
LPC_AD026,31,37

PCI_RST#25,37

SMB_EC_CK137,43
SMB_EC_DA137,43
SMB_EC_CK26,21
SMB_EC_DA26,21

SLP_S3#27
SLP_S5#27
EC_SMI#27
LID_SW#39

1 2

CONA#40

R593 4.7K_0402_5%

1 2

DIM_LED41
NUM_LED#39

Cypress

ESB_CLK_R

ENE

ESB_DAT_R

GATEA20
KB_RST#
SIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

CLK_PCI_EC

PCI_RST#
ECRST#

R2067 0_0402_5%

1 2

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

SMB_EC_CK1
SMB_EC_DA1
SMB_EC_CK2
SMB_EC_DA2

SLP_S3#
SLP_S5#
EC_SMI#
LID_SW#
ESB_CLK_R
ESB_DAT_R
EC_PME#

R591 0_0603_5%@

CONA#
UTX

LAN_POWER_OFF_R

ON/OFFBTN
DIM_LED
NUM_LED#

CRY2

12

@

R595
20M_0402_5%

CRY1

R1100 4.7K_0402_5%

1 2

R1099 4.7K_0402_5%

1 2

+3VL +3VL_EC

R572

1 2

0_0805_5%

U30

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LPC & MISC

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

Int. K/B

KSO5/GPIO25

45

KSO6/GPIO26

Matrix

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79
80

6
14
15
16
17
18
19
25
28
29
30
31
32
34
36

122
123

+EC_AVCC

SM Bus

SCL2/GPIO46
SDA2/GPIO47

PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A

XCLK1
XCLK0

+3VL_EC

12

L30
0_0603_5%

1 2

C726 0.1U_0402_16V4Z

+3VL

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+EC_AVCC

9

22

33

96

111

125

VCC

VCC

VCC

VCC

VCC

VCC

PWM Output

AD Input

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPIO

GPO

GPIO

GPI

GND

GND

GND

GND

GND

11

24

35

94

113

Issued Date

67

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD3/GPIO3B

AD4/GPIO42

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00
SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

AGND

KB926QFB0_LQFP128_14X14

69

ECAGND

L31

1 2

INV_PWM

21

FAN_PWM

23

EC_BEEP

26

ACOFF

27

BATT_TEMP

63

BATT_OVP

64

ADP_I

65

ADP_ID

66

TP_BTN#

75

ANA_MIC_DET

76

DAC_BRIG

68

VCTRL

70

IREF

71

AC_SET

72

EC_MUTE#

83

USB_EN#

84

I2C_INT

85

MUTE_LED

86

TP_CLK

87

TP_DATA

88

97

DOCK_VOL_UP#

98

DOCK_VOL_DWN#

99
109

FRD#

119

R190 33_0402_5%

120
126
128

SPICS#

73
74
89
90
91
92
93
95
121
127

100
101
102
103
104
105
106
107

GPXO10

108

GPXO11

110
112
114

GPXID3

115

GPXID4

116

GPXID5

117

GPXID6

118

GPXID7

124

V18R

For C
Revision

0_0603_5%

2008/02/25 2008/02/25

1 2

R191 33_0402_5%

1 2

R192 33_0402_5%

1 2

R720 10K_0402_5%

CIR_IN
VCC1_PWRGD
FSTCHG
STD_ADP
CAPS_LED#
BAT_LED#
ON/OFFBTN_LED#
SYSON
VR_ON
AC_IN

R586 10K_0402_5%

EC_RSMRST#

R588

1 2

EC_ON

0_0402_5%

WL_BLUE_LED#

R408

1 2

BKOFF#

100_0402_5%

M_PWROK
TP_LED#

SLP_S4#
ENBKL
EAPD_CODEC
THERM_SCI#
SUSP#
PWRBTN_OUT#
NMI_DBG#

1

C724

4.7U_0603_6.3V6K

2

AC_IN ACIN

1 2

C791 100P_0402_50V8J

Compal Secret Data

Deciphered Date

INV_PWM 19
FAN_PWM 6
EC_BEEP 33
ACOFF 44,45

C720

BATT_TEMP 43
BATT_OVP 43
ADP_I 44
ADP_ID 43
TP_BTN# 39
ANA_MIC_DET 35

DAC_BRIG 19

VCTRL 44
IREF 44
AC_SET 44

EC_MUTE# 35

USB_EN# 36
I2C_INT 39
MUTE_LED 40

AC_LED# 37
DOCK_VOL_UP# 40
DOCK_VOL_DWN# 40

FRD# 37

1 2

CIR_IN 35,40

VCC1_PWRGD 37

FSTCHG 44

STD_ADP 44

CAPS_LED# 39

BAT_LED# 39

ON/OFFBTN_LED# 37,39
SYSON 31,39,41,50

VR_ON 49

12

EC_RSMRST# 27

EC_LID_OUT# 27

EC_ON 45

WL_BLUE_LED# 39
BKOFF# 19

M_PWROK 9,27
TP_LED# 39

SLP_S4# 27
ENBKL 21
EAPD_CODEC 33

THERM_SCI# 21,27
SUSP# 31,33,41,44,46,47,48
PWRBTN_OUT# 27

+3VL

12

R715
10K_0402_5%

2 1

CH751H-40PT_SOD323-2

EC request 10/23

BATT_OVP

1 2

C794 100P_0402_50V8J

0.01U_0402_16V7K

ECAGND

1 2

R579 10K_0402_5%

1 2

R580 10K_0402_5%

1 2

TP_CLK 39
TP_DATA 39

Select SPI ROM or LPC ROM

#SI2 For EMI

FWR#

SPI_CLK

FSEL#

+5VL

9/21 add R for nvidia

ENBKL

R1132 10K_0402_5%

PM_PWROK

#PV PWROK sequence issue

+3VL

+3VL

12

R714

10K_0402_5%

NMI_DBG# PCI_SERR#

D13

D14

CH751H-40PT_SOD323-2

ACIN 44

For EMI

KSI7
KSI0

KSO13
KSO14
KSO15

KSO9
KSO10
KSO11
KSO12

+5V

#PV use for AC LED

FWR# 37
SPI_CLK 37
FSEL# 37

12

PM_PWROK 9,27

D16

ADP_ID

21

CH751H-40PT_SOD323-2

21

Compal Electronics, Inc.

Title

EC KB926/KB Conn.

Size Document Number Rev

Date: Sheet of

KSO6
KSO3
KSO7
KSO8

KSO4
KSO0

KSO5

KSI3
KSI2
KSO1
KSO2

KSI5
KSI1
KSI4
KSI6

PCI_SERR# 25

LA-4102P Blade discrete

1 2
1 2

1 2
1 2
1 2

1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2

1 2
1 2

1 2

1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2

14" INT_KBD
CONN.( TYPE "D"
KB)

KSO15
KSO10
KSO11
KSO14
KSO13
KSO12
KSO3
KSO6
KSO8
KSO7
KSO4
KSO2
KSI0
KSO1
KSO5
KSI3
KSI2

KSO0
KSI5
KSI4
KSO9
KSI6
KSI7
KSI1

38 53Monday, February 25, 2008

C1442100P_0402_50V8J @
C1443100P_0402_50V8J @

C1444100P_0402_50V8J @
C1445100P_0402_50V8J @
C1446100P_0402_50V8J @

C1448100P_0402_50V8J @
C1449100P_0402_50V8J @
C1450100P_0402_50V8J @
C1451100P_0402_50V8J @

C1452100P_0402_50V8J @
C1453100P_0402_50V8J @
C1454100P_0402_50V8J @
C1455100P_0402_50V8J @

C1456100P_0402_50V8J @
C1459100P_0402_50V8J @

C1458100P_0402_50V8J @

C1460100P_0402_50V8J @
C1461100P_0402_50V8J @
C1462100P_0402_50V8J @
C1463100P_0402_50V8J @

C1464100P_0402_50V8J @
C1465100P_0402_50V8J @
C1466100P_0402_50V8J @
C1467100P_0402_50V8J @

JP19

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

ACES_85201-2405

CONN@

0.4

A

www.kythuatvitinh.com

System LED

CAPS_LED#38

1 1

BAT_LED#38

SATA_LED#26

HDDHALT_LED#27

ON/OFFBTN_LED#

Capacitor Sensor Conn

2 2

3 3

ON/OFF Button Connector

4 4

10P_0402_50V8J

ESB_CLK

ESB_DAT

1

C240

2

ON/OFFBTN
ON/OFFBTN_LED#

+3VALW

ON/OFFBTN38

ON/OFFBTN_LED#37,38

LID_SW#38

R2116

@

33_0402_5%

R2117

@

33_0402_5%

SMB_EC_CK1_R38

SMB_EC_DA1_R38

White

AMBER

1

2

1
2
3
4

White

D50

HT-F196BP5_WHITE

White

D52

HT-F196BP5_WHITE

QSMF-C16E_AMBER-WHITE

D53

White

D17

HT-F196BP5_WHITE

@

C2123

12

@

C2124

12

ESB_CLK38
ESB_DAT38
I2C_INT38

NUM_LED#38

+5VALW_LED

C219

0.1U_0402_16V4Z

JP11

1
2

5

3

G1

6

4

G2

ACES_85201-04051

CONN@

White

Amber

12

15P_0402_50V8J

12

15P_0402_50V8J

1

1

2

2

3

3

4

4

ACES_85201-04051

CONN@

21

21

21

43

21

1

2

JP10

G1
G2

R1095

1 2

200_0402_5%

R1097

1 2

200_0402_5%

R1098
200_0402_5%

1 2

1 2

R728
200_0402_5%

R980

1 2

200_0402_5%

#SI2 for EMI

C2134
15P_0402_50V8J

@

5
6

+5VS_LED

+5VALW_LED

+5VS_LED

+3VS

+5VALW_LED

+5VS_LED

Lid Switch Connector

A

B

Cap lock

Battery
Charge LED

HDD LED

System
Power LED

+3VL_CAP

1

4.7U_0603_6.3V6K
C261

2

JP59

1

1

2

2

3

#SI2 add by pass cap

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

GND

12

GND

ACES_85201-1005N

CONN@

#PV reserve LDO for capacitor sensor board

PJP703

@

+5VL

1

C2132
1U_0603_10V4Z

2

B

R2121

1 2

10K_0603_1%

APL5151-33BC-TRL SOT23 5P 3.3V

PAD-OPEN 2x2m

2
1

Keyboard backlight Conn

JP9

1
2

5

3

G1

6

4

G2

ACES_85201-04051

+3VL

1

+

C60
22U_A_4VM

2

21

+3VL_CAP+3VL

U43

SHDN#3BP
GND
VIN

VOUT

+3VL_CAP

4

5

C2133

1 2

0.33U_0603_10V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

+5VS_LED

+5VS_KBL

12

R614

1
2
3
4

0_0805_5%

WL_LED#31

WW_LED#31

D

Mini card LED

R193

0_0402_5%

1 2

R194

0_0402_5%

1 2

BT_LED36

2N7002_SOT23-3

12

R1126

100K_0402_5%

D19

21

CH751H-40PT_SOD323-2

Q112

2

G

WL_LED

E

+3VS

#SI2 add PH +3VS

12

R716
10K_0402_5%

13

D

S

WL_BLUE_LED# 38

#PV change to doide

+5VS_LED

12

R609

200_0402_5%

43

AMBER White

+5VS

D54

Amber

12

R613
10K_0402_5%

@

13

D

2

G

Q153

S

2N7002_SOT23-3

T/P Board

+5V

JP23

1

1

2

2

3

5

3

G1

4

6

4

G2

ACES_85201-04051

CONN@

100P_0402_50V8J

TP_DATA
TP_CLK

2008/02/25 2008/02/25

C

Compal Secret Data

Deciphered Date

12

21

1

C729

0.1U_0402_16V4Z

2

@

C730

TouchPAD ON/OFF LED

R610
200_0402_5%

PA PR

TP_LED#

3

1

#PV TP LED separate between PA and PR

White

QSMF-C16E_AMBER-WHITE

PA@

TP_LED# 38

TP ON/OFF

SW1
TJG-533-V-T/R_6P

3
4

5

6

TP_CLK 38
TP_DATA 38

1

1

@

C731
100P_0402_50V8J

2

2

2

D28
PSOT24C_SOT23-3

#PV for EMI stuff

D

21

43

AMBER White

D58

Amber

+5V

12

R611
10K_0402_5%@

TP_BTN#

1
2

SYSON31,38,41,50

Title

Size Document Number Rev

Date: Sheet of

White

QSMF-C16E_AMBER-WHITE

PR@

TP_BTN# 38

T/P Power

+5VALW +5V

R615 0_0805_5%

1 2

Q23

SI2301BDS-T1-E3_SOT23-3

S

D

13

G

12

@

2

R612

10K_0402_5%

@

13

D

SYSON

Compal Electronics, Inc.

LED, TP,KBL,Cab sensor boar

Q24

2

G

2N7002_SOT23-3

S

@

LA-4102P Blade discrete

E

39 53Monday, February 25, 2008

0.4

DOCK_PWR_ON Spec

www.kythuatvitinh.com

0V = Notebook S4/S5, Dock off

2.5V = Notebook S3, Dock on
4V = Notebook S0, Dock on

R751 1K_0402_5%

1 2

+5VS

R752 1K_0402_5%

1 2

+3VALW

13

D

2N7002_SOT23-3

R754

1 2

22_0402_5%

Q13

12

R623
2K_0402_5%

2

G

S

SYSON#41,48

CONA#38

DOCK_PRESENT

#SI2 change to 22 ohm

#SI2 Add pull up

DOCK_VOL_UP#
DOCK_VOL_DWN#

R594 10K_0402_5%
R596 10K_0402_5%

2

G

12

+3VL

D57

2
3

DAN202U_SC70

R753
10K_0402_5%

R621
10K_0402_5%

1 2

13

D

Q27
2N7002_SOT23-3

S

12
12

1

+3VS

DOCK_PWRON

Atlas/ Saturn Dock

+DOCKVIN

JDOCK1

43

43

44

GREEN_L18

RED_L18

D_DDCDATA18

BLUE_L18
D_HSYNC18
D_DDCCLK18
USB20_N327
D_VSYNC18

USB20_P327
RJ45_MIDI3+30
RJ45_MIDI3-30
RJ45_MIDI2+30
RJ45_MIDI2-30
RJ45_MIDI1+30
RJ45_MIDI1-30
RJ45_MIDI0+30
RJ45_MIDI0-30

PJP3

B+

PAD-OPEN 2x2m

GREEN
RED
D_DDCDATA
BLUE
D_HSYNC
D_DDCCLK
USB20_N3
D_VSYNC

USB20_P3
RJ45_MIDI3+
RJ45_MIDI3­RJ45_MIDI2+
RJ45_MIDI2­RJ45_MIDI1+
RJ45_MIDI1­RJ45_MIDI0+
RJ45_MIDI0-

+V_BATTERY

21

44

40

40

38

38

36

36

34

34

32

32

30

30

28

28

26

26

24

24

22

22

20

20

18

18

16

16

14

14

12

12

10

10

8

8

6

6

4

4

2

2

41

41

42

42

CONN@

FOX_QL1122L-H212AR-7F

39

39

37

37

35

35

33

33

31

31

CIR_IN

29

29

DOCK_PWRON

27

27

MUTE_LED_R

25

25

23

23

JACK_DET#

21

21

R_VOL_UP#

19

19

R_VOL_DWN#

17

17

SPDIFO_L

15

15

AUDIO_OGND

13

13

DOCK_LOUT_R

11

11

DOCK_LOUT_L

9

9

DOCK_MIC_R_C

7

7

DOCK_MIC_L_C

5

5

AUDIO_IGND

3

3

DOCK_PRESENT

1

1

45

45

46

46

need change to reverse type connector

11/17 update

DOCK_LOUT_R

DOCK_LOUT_L

1

1

C740

C741

2

2

0.01U_0402_16V7K

0.01U_0402_16V7K

GNDAGNDA

1

C744
1000P_0402_50V7K

2

R_VOL_DWN#R_VOL_UP#

1

C745
1000P_0402_50V7K

2

+DOCKVIN

1

C734
1000P_0402_50V7K

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

#SI2 change ping 31,39,22 connect to GND

#PV reserve resistor

CIR_IN 35,38

R619

MUTE_LED

33_0402_5%

1 2
1 2

R617 200_0402_5%
R618 200_0402_5%

DOCK_LOUT_R 35
DOCK_LOUT_L 35

12

R620
2K_0402_5%

MMBT3904_NL_SOT23-3

33_0402_5%

1 2
1 2

GNDA

GNDA

SPDIFO_L

R622

DOCK_SLP_BTN#DOCK_SLP_BTN_R#

+3VS_HDA

@

Q114

R1140
33_0402_5%@

1 2

C

2

B

E

3 1

1 2

R1142

0_0603_5%

JACK_DET# 33,35

DOCK_VOL_UP# 38
DOCK_VOL_DWN# 38

#SI connect to GNDA

220P_0402_25V8J

MIC_Dock

DOCK_MIC_R33
DOCK_MIC_L33

DOCK_MIC_L_C

2008/02/25 2008/02/25

Compal Secret Data

Deciphered Date

R632

1 2

10K_0402_5%

#SI connect to EC

MUTE_LED 38

DOCK_SLP_BTN# 38

12

1

C1489

2

R626
10K_0402_5%

MMBT3904_NL_SOT23-3

R633
47K_0402_5%

1 2

@

C748

1000P_0402_50V7K

12

C747

@

12

1000P_0402_50V7K

#SI2 add a cap

C894

R1141

1 2

0.1U_0402_16V7K

R1143
110_0402_5%

1 2

220_0402_5%

SPDIF_OUT1 33

Need 600 Ohm 500 mA

L36
FBM-11-160808-601-T_0603

1 2
1 2

L37

FBM-11-160808-601-T_0603

+3VS

10K_0402_5%

R625

1 2

2

B

C

E

Q32

2

B

E

2

3 1

C757

1

1U_0603_10V6K

Compal Electronics, Inc.

Title

DOCK CONN.

Size Document Number Rev

Custom

LA-4102P Blade discrete

Date: Sheet of

C754

220P_0402_50V7K

GNDAGNDA

13

D

1 2

2

G

C

S

Q30

3 1

MMBT3904_NL_SOT23-3

DOCK_MIC_R_C
DOCK_MIC_L_C

1

1

C755

2

2

220P_0402_50V7K

SENSE_B# 33

Q29
2N7002_SOT23-3

40 53Monday, February 25, 2008

0.4

5

www.kythuatvitinh.com

4

3

2

1

SUSP#SYSON

DIM LED

SUSPSUSP

2

2N7002DW-7-F_SOT363-6

DIM_LED38

+1.8VS

12

R647
470_0402_5%

61

Q44A

+5VALW +5VALW_LED

12

R637

10K_0402_5%

DIM_LED#

13

D

DIM_LED

Q35

2

G

2N7002_SOT23-3

S

DIM_LED#

H1
HOLEA

1

1

Q33

SI2301BDS-T1-E3_SOT23-3

S

D

13

G

2

Q11

SI2301BDS-T1-E3_SOT23-3

S

D

13

G

2

H2

H3

H4

HOLEA

HOLEA

HOLEA

1

1

1

H12

H14

H11

HOLEA

HOLEA

HOLEA

1

1

1

FM2

FM1

FM3

1

1

+5VS_LED+5VS

1

1

C758

0.1U_0402_16V4Z

2

1

C792

0.1U_0402_16V4Z

2

H5
HOLEA

1

H15
HOLEA

1

FM4

H6
HOLEA

H16
HOLEA

H7

H8

H9

HOLEA

H18
HOLEA

H10

HOLEA

HOLEA

1

1

1

H20

H19

HOLEC

HOLEC

1

1

1

HOLEA

1

1

H17
HOLEA

1

1

+5VALW to +5VS Transfer +3VALW to +3VS Transfer

B+

12

D D

R636

330K_0402_5%

RUNON

61

SUSP

2

Q34A

2N7002DW-7-F_SOT363-6

1

C760
10U_0805_10V4Z

2

8
7
6
5

@

+5VS+5VALW +3VS+3VALW

U32

D
D
D
D

AO4466_SO8

12

R638
470_0402_5%

1

C765

0.01U_0402_25V7K@

2

S
S
S
G

1
2
3
4

0.1U_0402_16V4Z

1

2

C761

10U_0805_10V4Z

1

2

C762

B+

12

R649
330K_0402_5%

SUSP

5

Q34B

2N7002DW-7-F_SOT363-6

RUNON_3VS

3

4

1

C759
10U_0805_10V4Z

2

U33

8

D

7

D

6

D

5

D

AO4466_SO8

S
S
S

G

12

R648
470_0402_5%

1

C769

0.01U_0402_25V7K

2

1
2
3
4

0.1U_0402_16V4Z

10U_0805_10V4Z

1

C763

2

1

C764

2

+1.8V to +1.8VS Transfer

B+

C C

12

R651

330K_0402_5%

RUNON_1.8VS

3

SUSP

5

4

Q44B

2N7002DW-7-F_SOT363-6

1

C766
10U_0805_10V4Z

2

8
7
6
5

U34

S

D

S

D

S

D

G

D

AO4466_SO8

12

R650
1K_0402_5%

1

C770

0.1U_0402_25V4K

2

1
2
3
4

0.1U_0402_16V4Z

+1.8VS+1.8V

10U_0805_10V4Z

1

1

C767

2

C768

2

SYSON#40,48 SUSP 48

SYSON31,38,39,50 SUSP# 31,33,38,44,46,47,48

100K_0402_5%

SYSON# SUSP

2N7002DW-7-F_SOT363-6

+3VL+3VL

12

12

R640

R639

100K_0402_5%

61

3

2

Q36A

5

Q36B

4

2N7002DW-7-F_SOT363-6

Discharge circuit

R643

470_0402_5%

2

+1.8V

12

61

Q40A

B B

2N7002DW-7-F_SOT363-6

+5VS +3VS

12

R641

470_0402_5%

61

SUSP SYSON# SUSP

2

Q38A

2N7002DW-7-F_SOT363-6

470_0402_5%

SUSP

Q38B

R642

5

12

3

4

2N7002DW-7-F_SOT363-6

R644

470_0402_5%

2

G

+1.5VS

12

13

D

S

Q41

2N7002_SOT23-3

+VCCP +0.9V

12

R645

470_0402_5%

13

D

Q42

2

G

S

2N7002_SOT23-3

SUSP

5

12

R646
470_0402_5%

3

2N7002DW-7-F_SOT363-6

Q40B

4

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

2

Date: Sheet of

DC/DC Interface

LA-4102P Blade discrete

1

41 53Monday, February 25, 2008

0.4

5

www.kythuatvitinh.com

4

3

2

1

R1034

6.8K_0402_5%

61

Q101A

3

Q101B

+5VS_HDMI

@

@

R1040

6.8K_0402_5%

HDMIDAT

HDMICLK

+3VS

@

D D

HDMIDAT_VGA21

HDMICLK_VGA21

C C

R1039

2.2K_0402_5%

@

12

R1033

2.2K_0402_5%

1 2

+3VS

2

2N7002DW-7-F_SOT363-6

1 2

R10230_0402_5%

@
+3VS

5

4

2N7002DW-7-F_SOT363-6

1 2

R10240_0402_5%

@

#PV reserve C1250,C1249 for EMI

21

+5VS_HDMI

+5VS_HDMI+5VS

1

C1250

2

@

22N_0402_16V7K

1

1

C1249

2

2

@

22N_0402_16V7K

JHDMI1

18

+5V

16

SDA

15

SCL

19

HP_DET

12

CK-

10

CK+

9

D0-

7

D0+

6

D1-

4

D1+

3

D2-

1

D2+

DDC/CEC_GND

SUYIN_100042MR019S153ZL

CONN@

#SI Change lib

C1247

Reserved

0.1U_0402_16V4Z

@

13

CEC

14
2

GND

5

GND

8

GND

11

GND

20

GND

21

GND

22

GND

23

GND

17

WCM-2012-900T_0805

HDMI_CLK-21

HDMI_CLK+21

B B

A A

HDMI_TX0-21

HDMI_TX0+21

HDMI_TX1-21

HDMI_TX1+21

HDMI_TX2-21

HDMI_TX2+21

4

4

HDMI_CLK+ HDMI_R_CLK+

1

1

L70

WCM-2012-900T_0805

4

4

HDMI_TX0+ HDMI_R_TX0+

1

1

L71

WCM-2012-900T_0805

4

4

HDMI_TX1+ HDMI_R_TX1+

1

1

L72

WCM-2012-900T_0805

HDMI_TX2-

4

4

HDMI_TX2+

1

1

L73

HDMI_R_CLK-HDMI_CLK-

3

3

2

2

@

L74

1 2

330P_0402_50V7K

9/21 change R1036 and
R1035 from 10K to 2.2K
for nvidia

1

C1248

2

HDMI Connector

HDMI_R_TX0-HDMI_TX0-

3

3

2

2

@

HDMI_R_TX1-HDMI_TX1-

3

3

2

2

@

HDMI_R_TX2-

3

3

HDMI_R_TX2+

2

2

@

HDMI_DETECT21

HDMI_DETECT

D40

SKS10-04AT_TSMA

R1037

1 2

1K_0402_1%

12

R1038
10K_0402_1%

2 1

FBML10160808121LMT_0603

RB411D T146 _SOT23-3

R1036

2.2K_0402_5%

1 2

HDMIDAT
HDMICLK

HDMI_R_CLK­HDMI_R_CLK+
HDMI_R_TX0­HDMI_R_TX0+
HDMI_R_TX1­HDMI_R_TX1+
HDMI_R_TX2­HDMI_R_TX2+

D41

R1035

2.2K_0402_5%

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

HDMI LS & Conn.

Size Document Number Rev

Custom

LA-4102P Blade discrete

2

Date: Sheet of

42 53Monday, February 25, 2008

1

0.4

A

www.kythuatvitinh.com

B

C

D

+3VALW

PQ3
TP0610K-T1-E3_SOT23-3

1 1

ACES_88334-057N

2 2

5

5

4

4

3

3

2

2

1

1

PJP1

1 3

PR8
100_0402_5%

1 2

ADP_SIGNAL

2

ADPINADPIN

PD1

@PJSOT24C_SOT23-3

2

3

1

1 2

PR3
10K_0402_5%

connect to KBC pin97

AC_LED# 47

12

PR2
10K_0402_5%

1 2

12

12

PC3
1000P_0402_50V7K

100P_0402_50V8J

PC2

12

PD4

RLZ3.6B_LL34

PL1

SMB3025500YA_2P

PC4

PC12

12

@1000P_0402_50V7K

VIN +DOCKVIN

SMB3025500YA_2P

12

12

PC5

1000P_0402_50V7K

100P_0402_50V8J

ADP_ID 41

BATT

12

+5VALW

PR1

340K_0402_1%

PL2

12

PC6

0.01U_0402_25V7K

499K_0402_1%

12

105K_0402_1%

12

PR4

12

PR6

12

PC1

0.01U_0402_25V7K

3
2

PU1A

LM358ADT_SO8

8

P

+

1

0

-

G

4

PR5

10K_0402_5%

12

BATT_OVP <40>

VMB

PJP2

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

9

GND

10

GND

3 3

SUYIN_200275MR008GXOLZR

12

PR17
1K_0402_5%

4 4

PR16

6.49K_0402_1%

1 2

EC_SMD
EC_SMC

12

PR13

100_0402_5%

BAT_ID <46>

+3VL

A

12

PR14
100_0402_5%

BATT_TEMP

PD2
@SM05_SOT23

3
2

1

2

3

1

PD3
@SM24.TC_SOT23-3

SMB_EC_DA1

SMB_EC_CK1

PL3

HCB2012KF-121T50_0805

1 2

PL4

HCB2012KF-121T50_0805

1 2

12

PC8
1000P_0402_50V7K

B

BATT

PH1 under CPU botten side :

12

PC9

0.01U_0402_50V4Z

SMB_EC_DA1 <39,40>

SMB_EC_CK1 <39,40>

0.22U_0603_10V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CPU thermal protection at 90 +-3 degree C
Recovery at 47 +-3 degree C

+5VS

CPU

12

PH1

10K_TH11-3H103FT_0603_1%

PR10
15K_0402_1%

1 2
1 2

+5VALW

PR11

12

12

PC10

2008/02/25 2008/02/25

150K_0402_1%

PR12

2.55K_0402_1%
150K_0402_1%

Compal Secret Data

Deciphered Date

PR15

C

12

5
6

12

PC11
1000P_0402_50V7K

PR7
47K_0402_1%

1 2

8

P

+

-

G

4

7

0

PU1B

LM358ADT_SO8

EN0_TRIP <47>

13

D

PQ1

2

G

SSM3K7002FU_SC70-3

S

ENTRIP2 <47>

13

D

PQ2

2

@SSM3K7002FU_SC70-3

G

S

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

DC Connector/CPU_OTP

LA-4102P Blade discrete

D

43 52Monday, February 25, 2008

of

0.4

A

www.kythuatvitinh.com

VIN

1 1

PR101

47K_0402_5%

1 2

12

PC101

47P_0402_50V8J

PQ107

13

2

PQ105
DTC115EUA_SC70-3

13

D

2

G

S

PR111

3K_0402_1%

PACIN

1 2

PD101

ACOFF#

1 2

1SS355_SOD323-2

PR107
47K_0402_1%

1 2

SSM3K7002FU_SC70-3

2 2

PQ101
AM4835EP-T1-PF_SO8

8
7

5

2

PQ104

DTA144EUA_SC70-3

1 3

PACIN_1

PQ109

13

D

2

G

S

VCTRL

Charge Detector

VIN

PD104
1SS355_SOD323-2

PR123

1 2

1.24VREF

1M_0402_5%

1 2

VIN_1

12

PR125
47_1206_5%

12

PC125

0.1U_0603_25V7K

8

3

P

+

1

O

2

-

G

PU102A
LM393DG_SO8

4

A

3 3

VIN

12

PR131

133K_0402_1%

12

PR135

10K_0603_0.1%

4 4

1
2
36

4

PC106

SSM3K7002FU_SC70-3

1 2

1U_0603_10V6K

+3VL

12

PR129

10K_0402_1%

STD_ADP <40>

12

0.22U_0603_16V7K

PR114
@0_0402_5%

PC117

PR128

2

G

P2

12

PR109
150K_0402_5%

+3VL

12

10K_0402_5%

13

D

S

FSTCHG<40>

12

12

AM4835EP-T1-PF_SO8

1
2
3 6

4

PR106

200K_0402_5%

PR113

143K_0402_1%

CHGEN#

PQ112
SSM3K7002FU_SC70-3

FSTCHG#

PQ103

AC_SET<40>

12

12

PR115
100K_0402_1%

ADP_I<40>

1 2

PR137
20K_0402_1%

8
7

5

SUSP#<32,34,40,43,48,49,50>

PC128

1 2

@180P_0402_50V8J

1U_0603_6.3V6M

2

PR104
0_0402_5%

1 2

PC107

@0.01U_0402_16V7K

PR110
0_0402_5%

1 2

PC112

1 2

PR116

39K_0402_5%

12

PC120

0.22U_0603_10V7K

+3VL

12

PR132

100K_0402_5%

13

D

PQ113

G

SSM3K7002FU_SC70-3

S

ACDET

12

PR138

100K_0402_1%

B

12

BQ24740VREF

+3VL

12

PR118

10K_0402_5%

1 2

B

470P_0402_50V7K

ACSET

ACSET

12

PR140
100K_0402_5%

8

IADSLP

9

AGND

10

VREF

11

VDAC

12

VADJ

13

EXTPWR

14

ISYNSET

PC121

PC123

0.1U_0402_10V7K

ACDET

7

LPREF

IADAPT

15

IADAPT

12

100P_0402_50V8J

P4

1 2

12

PC133

1U_0603_6.3V6M

12

PC108

0.1U_0603_25V7K

6

4

5

LPMD

ACSET

ACDET

PU101
BQ24740RHDR_QFN28_5X5

SRSET

SRN

17

16

18

BATT

12

12

PR102

0.012_2512_1%

1 2

PC102

3

ACP

SRP19BAT

PR120

133K_0402_1%

PR121
200K_0402_1%

C

B+

PL101
HCB2012KF-121T50_0805

1 2

12

12

PC103

PC110
1U_0805_25V6K

1 2

12

PC119
1U_0603_10V6K

D

S

Issued Date

4.7U_0805_25V6-K

PR108
10_1206_5%

1 2

PD102

RLS4148_LL34-2

PR117
100K_0402_5%

1 2

13

2

G

PC104

PC134
PC111

0.1U_0402_10V7K

12

12

PC109
@0.1U_0603_25V7K

CHGEN#

1

2

29

ACN

TP

CHGEN

28

PVCC

BST_CHG

27

BTST

DH_CHG

26

HIDRV

LX_CHG

25

PH

REGNVADJ

24

REGN

DL_CHG

23

LODRV

22

PGND

DPMDET

CELLS

20

21

PQ111

SSM3K7002FU_SC70-3

12

IREF <40>

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CHG_B+

12

PC105

4.7U_0805_25V6-K

4.7U_0805_25V6-K

CHG_B+

PC130

270P_0402_50V7K

PC129

12

12

12

578

470P_0402_50V7K

1000P_0402_50V7K

PQ108

1 2

FDS6900AS_SO8

BQ24740VREF

12

PC124

AO4466_SO8

PL102

3 6

241

10U_LF919AS-100M-P3_4.5A_20%

1 2

12

578

PR141

4.7_1206_5%

12

3 6

C

PC135
470P_0603_50V8J

1 2

241

BAT_ID <45>

12

PC122

@0.1U_0603_25V7K

0.047U_0402_16V7K

Compal Secret Data

100K_0402_1%

PC126

Deciphered Date

PQ110

47K_0402_5%
PR119

0.1U_0603_25V7K

2008/02/25 2008/02/25

PR126

12

12

PC113

VIN

12

12

PR133
10K_0603_0.1%

22P_0402_50V8J

12

PC114

4.7U_0805_25V6-K

PR130

2.15K_0402_1%

1 2

PC127

PR112

0.015_1206_1%

1 2

1 2

4.7U_0805_25V6-K
PC118

0.1U_0402_10V7K

PQ102
FDS6675BZ_SO8

1
2
3 6

4

PR122
681K_0402_1%

1 2

5

+

6

-

12

ACOFF#

BATT

12

8

PU102B

P

O

G

LM393DG_SO8

4

60.4K_0402_1%

4

5

D

BATT

8
7

12

5

12

12

PC115

PC116

4.7U_0805_25V6-K

4.7U_0805_25V6-K

7

PD103

RLZ4.3B_LL34

PR136

VIN_1

1 2

PU104

REF

CATHODE

NC
NC

ANODE

LMV431ACM5X_SOT23-5

Title

Size Document Number Rev

Date: Sheet

PR103

47K_0402_5%

PC132

1 2

VIN

12

@1000P_0402_50V7K

PR105
10K_0402_5%

13

2

PQ106
DTC115EUA_SC70-3

PC131

@1000P_0402_50V7K

PR124

VIN

1K_0402_5%

1 2

12

PR127

10K_0402_1%

PACIN

12

12

PR134
10K_0402_5%

3

1.24VREF
2
1

Compal Electronics, Inc.

Charger

LA-4102P Blade discrete

D

44 52Monday, February 25, 2008

ACOFF <40>

ACIN <40,47>

of

0.4

A

www.kythuatvitinh.com

B

C

D

E

2VREF_51125

1 1

PR301

13.7K_0402_1%

1 2

PR303

20K_0402_1%

1 2

PR305

140K_0402_1%

1 2

25

7
8

BST_3V BST_5V

9

UG_3V

10
11
12

12

PR311

@620K_0402_5%

2VREF_51125

PJP302

1 2

PAD-OPEN 4x4m
PJP303

1 2

PAD-OPEN 4x4m

12

PC316

PC301

@0.1U_0402_25V4K

+3VALWP

SSM3K7002FU_SC70-3

A

B++

12

12

PC303

2200P_0402_50V7K

PQ305

SSM3K7002FU_SC70-3

1 2

PR317

604K_0402_1%

4.7U_0805_25V6-K

PL302

3.3UH_SIQB74B-4R7PF_5.9A_20%

12

1

+

PC309

2

220U_6.3VM_R15

ENTRIP2<45>

ENTRIP1

13

D

2

G

S

PQ308

13

D

2

G

S

12

PC318

0.022U_0402_16V7K

PQ301

1

D1

2

D1

3

G2

4

S2

SP8K10S-FD5_SO8

2

G

13

D

PQ307

2

G

SSM3K7002FU_SC70-3

S

8

1G

7

1S/2D

6

1S/2D

5

1S/2D

13

D

S

1 2

PR313

100K_0402_5%

B

PR315

@4.7_1206_5%

PQ306
SSM3K7002FU_SC70-3

VL

12

100K_0402_5%
PR314

+3VLP

12

PC306

10U_0805_6.3V6M

PR307

1 2

1 2

0_0402_5%

PC307

0.1U_0402_10V7K

LX_3V

LG_3V

12

12

EN0_TRIP<40>

PC314

@680P_0603_50V7K

+5VALWP

+3VALWP

EC_ON <40>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B+

PL301

HCB2012KF-121T50_0805

1 2

2 2

3 3

PACIN_138

4 4

12

PC302

0.22U_0603_10V7K

PR302

30.9K_0402_1%

1 2

PR304

20K_0402_1%

1 2

PR306

PU301

P PAD

VO2
VREG3
VBST2
DRVH2
LL2
DRVL2

ENTRIP2

6

ENTRIP2

EN0

13

4

5

VFB2

TONSEL

GND

15

14

3

1

2

VFB1

VREF

VREG5

VIN16SKIPSEL

17

18

133K_0402_1%

ENTRIP1

1 2

ENTRIP1

24

VO1

23

PGOOD

22

VBST1

21

DRVH1

20

LL1

19

DRVL1

TPS51125RGER_QFN24_4X4

VCLK

UG_5V
LX_5V
LG_5V

PR308

2.2_0402_5%

1 2

VL

12

PC311

12

B++

+5VALW

+3VALW

2008/02/25 2008/02/25

C

10U_0805_10V6K

PC312

0.1U_0603_25V7K

(4.5A,180mils ,Via NO.= 9)

(3A,120mils ,Via NO.= 6)

Compal Secret Data

Deciphered Date

PR318

1 2

0_0805_5%

B++

12

PC304

2200P_0402_50V7K

PC308

0.1U_0402_10V7K

1 2

R_EC_RSMRST#

VL

+3VLP

D

12

12

PC305

10U_1206_25V6M

PJP304

2 1

PAD-OPEN 2x2m

PJP301

2 1

PAD-OPEN 2x2m

PC317

578

@0.1U_0402_25V4K

12

4.7_1206_5%

PR316

12

PC315

680P_0603_50V7K

PQ302

AO4466_SO8

3 6

241

PL303

4.7UH_PCMC063T-4R7MN_5.5A_20%

1 2

578

3 6

241

PQ304

FDS6690AS_NL_SO8

+5VL

+3VL

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

3.3VALWP/5VALWP

LA-4102P Blade discrete

1

+

2

E

12

PC310

150U_D_6.3VM

45 52Monday, February 25, 2008

+5VALWP

PC313
@22U_0805_6.3V6M

of

0.4

A

www.kythuatvitinh.com

1 1

PR401

0_0402_5%

SUSP#

2 2

3 3

12

PR410
@10K_0402_5%

+1.05V_VCCP

1 2

12

PC401
@1000P_0402_50V7K

PR405

0_0402_5%

PR403

316_0402_1%

12

+5VALW

12

12

PC409
1U_0603_10V6K

+1.05V_VCCP

PR408

1 2

10.5K_0402_1%

1 2

PC413
@10P_0402_50V8J

PR409

25.5K_0402_1%

PR404
255K_0402_1%

1 2

12

2
3
4
5
6

PU401

TON
VOUT
V5FILT
VFB
PGOOD

1

EN_PSV

GND7PGND

B

15

TP

8

BST1_1.05VBST_1.05V

1 2

PR402

0_0402_5%

14

DH_1.05V

VBST

13

DRVH

LX_1.05V

12

LL

11

TRIP

V5DRV

DRVL

TPS51117RGYR_QFN14_3.5x3.5

+5VALW

10
9

1 2

PC402

0.1U_0402_10V7K

1 2

PR406
11K_0402_1%

PC415

12

4.7U_0805_10V6K

PR411

1 2

0_0402_5%

DL_1.05V

578

3 6

578

3 6

241

241

C

PQ401
AO4466_SO8

PQ402
AO4468_SO8

1.05V_B+

12

12

12

PC414

PC403

4.7U_0805_25V6-K

@0.1U_0402_25V4K

2.2UH_PCMC063T-2R2MN_8A_20%

12

PR407

4.7_1206_5%

PC412
220P_0603_50V8J

1 2

HCB1608KF-121T30_0603

12

PC404

2200P_0402_50V7K

@4.7U_0805_25V6-K

PL402

1 2

PL401

1 2

PC405

1

+

PC408

2

12

220U_6.3VM_R15

B+

PC406
@680P_0402_50V7K

+1.05V_VCCP

D

PJP401

+1.05V_VCCP

4 4

A

1 2

PAD-OPEN 4x4m

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

(6A,240mils ,Via NO.=12)

+VCCP

2008/02/25 2008/02/25

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

1.05V_VCCP

LA-4102P Blade discrete

D

of

46 52Monday, February 25, 2008

0.4

5

www.kythuatvitinh.com

D D

B+++

12

PC501

4.7U_0805_25V6-K

C C

12

PC502

2200P_0402_50V7K

@0.1U_0402_25V4K

PC520

12

PQ502

1G

D1
D1

1S/2D

G2

1S/2D
1S/2D

S2

SP8K10S-FD5_SO8

8
7
6
5

1
2
3
4

+1.5VSP

PL503

3.3UH_PCMC063T-3R3MN_6A_20%

1

12

+

2

220U_B2_2.5VM

1 2

1 2

1 2

5

PC509

4.7U_0805_6.3V6K

PJP501

PAD-OPEN 4x4m
PJP502

PAD-OPEN 4x4m
PJP503

PAD-OPEN 4x4m

PC517

B B

+1.5VSP

A A

+NVVDDP

12

(4A,160mils ,Via NO.=8)

+1.5VS

(12A,480mils ,Via NO.= 24)

+NVVDD

SUSP#<32,34,40,43,46,48,50>

4

PR501

PR506
0_0402_5%

12

12

PR515
@4.7_1206_5%

12

PC518

@680P_0603_50V7K

PR513

0_0402_5%

12

73.2K_0402_1%

1 2

12

12

PR5080_0402_5%

BST_1.5V
UG_1.5VUG1_1.5V

LG_1.5V

12

PC513
@0.1U_0402_16V7K

+1.5VSP +NVVDDP1

PC506

0.1U_0402_10V7K

4

75K_0402_1%

1 2

PU501

25

P PAD

7

PGOOD2

8

EN2

9

VBST2

10

DR VH2

LX_1.5V

11

LL2

12

DR VL2

PR510

16.5K_0402_1%

1 2

12

PC514

1U_0603_10V6K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

@SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

PR502

PR505

@0_0402_5%

1 2

5

6

4

VO2

VFB2

TONSEL

V5FILT

TRIP2

PGND2

15

14

13

1 2

PR514

3.3_0402_5%

3

@200K_0402_1%

G

2

@105K_0402_1%

1 2

13

D

S

G

2

61.9K_0402_1%

13

1 2

D

S

PR503

75K_0402_1%

1 2

2

1

VO1

VFB1

PGOOD1

EN1

VBST1

DR VH1

LL1

DR VL1

TRIP1

PGND1

TPS51124RGER_QFN24_4x4

17

18

PR511

9.76K_0402_1%

1 2

+5VALW

PC515

4.7U_0805_10V6K

24
23
22
21
20
19

PR522

PR520

PQ505

PQ504

3

GND

V5IN

16

12

2008/02/25 2008/02/25

3

1 2

12

PC523

@0.01U_0402_16V7K

10K_0402_1%

1 2

12

PC522

0.022U_0402_16V7K

PR504

15.4K_0402_1%

1 2

PC516

@0.1U_0402_10V7K

1 2

+NVVDDP

BST_VGA
UG_VGA

LX_VGA

LG_VGA

12

Compal Secret Data

Deciphered Date

PR523

PR521

PR518
0_0402_5%

+NVVDD_SENSE

PR507

0_0402_5%

PR509

0_0402_5%

PR512
47K_0402_5%

1 2

PC512

0.1U_0402_16V7K

12

+NVVDD_SENSE

12

12

2

12

PR524
10K_0402_5%

12

PR525
10K_0402_5%

12

PR519
10_0402_5%

+NVVDDP

PC507

0.1U_0402_10V7K

1 2

UG1_VGA

12

PR516
@4.7_1206_5%

12

PC519

@680P_0603_50V7K

12

PR517

@100K_0402_5%

2

GPU_VID1<32,40,41,43,52>

GPU_VID0<32,40,41,43,52>

GPU_VID1 GPU_VID0 +NVVDD

0
0
1

578

PQ501

AO4466_SO8

578

SUSP# <32,40,41,43,52>

Title

Size Document Number Rev

Date: Sheet

0
1
0

B+++

3 6

3 6

PL502

HCB2012KF-121T50_0805

12

PC504

4.7U_0805_25V6-K

241

PL501

1UH_PCMC063T-1R0MN_11A_20%

1 2

PC510

22U_0805_6.3V6M

PQ503

FDS6670AS_NL_SO8

241

Compal Electronics, Inc.

1.5VSP/VGA_CORE

LA-4102P Blade discrete

12

12

1 2

1

0.9V

1.09V

unused

B+

12

PC505

PC511

4.7U_0805_25V6-K

2200P_0402_50V7K

1

+

PC508

PC524

1 2

2

330U_X_2VM_R6M

1

12

+NVVDDP

PC525

PC526

1 2

22U_0805_6.3V6M

22U_0805_6.3V6M

of

47 52Monday, February 25, 2008

PC521

@0.1U_0402_25V4K

1 2

22U_0805_6.3V6M

0.4

5

www.kythuatvitinh.com

D D

C C

PJP601

1 2

+0.9VP

PAD-OPEN 3x3m

B B

+1.1V_PCIE

PJP603

1 2

PAD-OPEN 3x3m

(2A,80mils ,Via NO.= 4)

+0.9V

(2A,80mils ,Via NO.= 4)

+PCIE

4

+1.8V

12

12

PC602

PQ601

2

G

12

PC606
@0.1U_0402_16V7K

12

PR601
1K_0402_1%

@10U_0805_10V4Z

12

PR603

13

D

1K_0402_1%

S

PC601

10U_0805_10V4Z

SYSON#<42,43>

SUSP<43>

1 2

PR602

@0_0402_5%

SSM3K7002FU_SC70-3

1 2

PR604

0_0402_5%

3

PU601

6

VIN1VCNTL

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

5

NC

7

NC

8

NC

9

TP

12

PC603
1U_0603_16V6K

+5VALW

2

1

+0.9VP

12

12

PC605
10U_0805_6.3V6M

0.1U_0402_16V7K

PC604

+5VALWP

12

PC609
1U_0603_6.3V6M

6

PU603

5

VIN

7

POK

9

VIN

VCNTL

3

VOUT

8

EN

VOUT

FB

GND

1

APL5913-KAC-TRL_SO8

4
2

40.2K_0402_1%

105K_0402_1%

PR607

PR608

SUSP#<32,34,40,43,46,48,49>

1 2

PR606

0_0402_5%

PC611

@0.01U_0402_16V7K

12

12

12

12

PC613
47P_0402_50V8J

+1.5VS

12

12

PC612
22U_0805_6.3V6M

PC610
10U_0805_10V6K

+1.1V_PCIE

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

2008/02/25 2008/02/25

Deciphered Date

2

Compal Electronics, Inc.

Title

0.9VP/1.1V_PCIE

Size Document Number Rev

Date: Sheet

LA-4102P Blade discrete

1

of

48 52Monday, February 25, 2008

0.4

5

www.kythuatvitinh.com

4

3

2

1

PC202

2.2_0603_5%
PR214

1 2

1 2

0_0603_5%

PR225

1 2

0_0603_5%

1 2

PC217

0.22U_0603_10V7K

+5VS

1 2

12

12

PC203

2.2U_0603_6.3V6K

0.22U_0603_10V7K
PC209

1 2

PR217

PQ202

FDS6676AS_SO8

FDS6676AS_SO8

PR202
1_0603_5%

PQ205

RQW130N03_PSO8

UGATE_CPU1-2

578

3 6

241

RQW130N03_PSO8

UGATE_CPU2-2

578

3 6

241

PQ201

PQ204

3 5

578

3 6

578

241

241

3 5

3 6

PC204

68U_25V_M_R0.44

PQ203

FDS6676AS_SO8

241

PQ206

241

FDS6676AS_SO8

1

+

2

PR218

4.7_1206_5%

PC239

68U_25V_M_R0.44

12

12

PR245

4.7_1206_5%

12

PC210

1500P_0603_50V7K

12

PR229

4.7_1206_5%

12

1

12

12

+

PC233

PC234

2

4.7U_0805_25V6-K

4.7U_0805_25V6-K

0.36UH_PCMC104T-R36MN1R17_30A_20%

12

PR219

3.65K_0805_1%

VSUM

12

12

PC213

PC212

4.7U_0805_25V6-K

4.7U_0805_25V6-K

0.36UH_PCMC104T-R36MN1R17_30A_20%

12

12

PR246

4.7_1206_5%

PR230

3.65K_0805_1%

PC219

VSUM

1500P_0603_50V7K

12

PC205

PC206

4.7U_0805_25V6-K

12

PR220

@0_0603_5%

10K_0402_1%

1 2

ISEN1

0.22U_0603_10V7K

12

PC235

PC214

2200P_0402_50V7K

12

PR231

10K_0402_1%

PR233 @0_0603_5%

0.22U_0603_10V7K

ISEN2

CPU_B+

12

4.7U_0805_25V6-K

PL202

PR224

PC211

1 2

12

4.7U_0805_25V6-K

PL203

1 2

PC223

1 2

12

PC207

2200P_0402_50V7K

12

12

1_0402_5%

VCC_PRM

12

PC236

4.7U_0805_25V6-K

12

12

VCC_PRM

12

PC237

PR223

12

PC238

PR232

1_0402_5%

PL201

SMB3025500YA_2P

12

PC242

470P_0402_50V7K

470P_0402_50V7K

PC243

CPU_B+

47P_0402_50V8J

PC244

12

47P_0402_50V8J

12

47P_0402_50V8J

12

12

PC241

5

5

CPU_VID6

PR208

12

0_0402_5%

43

12

CPU_VID55CPU_VID35CPU_VID4

PR209

12

0_0402_5%

PR211

PR210

12

12

0_0402_5%

12

PC225

0.1U_0603_25V7K

12

PR242

5

PR213

PR212

PR205

12

12

12

0_0402_5%

0_0402_5%

0_0402_5%

BOOT1
UGATE1
PHASE1

PGND1

LGATE1

PVCC

LGATE2

PGND2
PHASE2
UGATE2

BOOT2

24

1 2

12

PR234 1_0603_5%
PC221
1U_0402_6.3V6K

PR239

10_0603_5%

1 2

VSUM

12

PR241

2.61K_0402_1%
10KB_0603_5%_ERTJ1VR103J

PH201

11K_0402_1%

1 2

CPU_VID05CPU_VID15CPU_VID2

0_0402_5%

VID037VID138VID239VID340VID441VID542VID6

NC

PU201

ISEN1
ISEN2

36
35
34
33
32
31
30
29
28
27
26
25

0.022U_0402_16V7K

BOOT_CPU1

UGATE_CPU1-1
PHASE_CPU1

LGATE_CPU2

PHASE_CPU2
UGATE_CPU2-1
BOOT_CPU2

1 2

PR227

2.2_0603_5%

+5VS

CPU_B+

LGATE_CPU1

32

D D

PR215

@499_0402_1%

VGATE15,20

H_PSI#5

PR221

1 2

PR222 147K_0402_1%

@0_0402_5%

C C

PR226 13K_0402_1%

PC218 1000P_0402_50V7K

PR235 97.6K_0402_1%

1 2

1 2

PC222 220P_0402_50V7K
255_0402_1%

B B

VCCSENSE5

1 2

PR238

PR240 1K_0402_1%

VSSSENSE5

CLK_ENABLE#

+3VS

+3VS

1 2

1 2

VR_TT#

PC2150.022U_0603_25V7K

1 2

1 2
1 2

PC2161000P_0402_50V7K

PR228 6.81K_0402_1%

1 2

1 2

PC220

470P_0402_50V7K

PC224 1000P_0402_50V7K

1 2

VCC_PRM

DPRSLPVR7,20

H_DPRSTP#5,7,19

12

1 2

PR201 499_0402_1%

PR204 0_0402_5%

PR206 0_0402_5%

1 2

12

PC201

PR216

1U_0603_6.3V6M

1.91K_0402_1%

PR236

1 2

@0_0402_5%

PC226 820P_0603_50V7K

1 2

12

PC227
@0.022U_0603_50V7K

PC229 180P_0402_50V8J

1 2

PR243 1K_0402_1%

PC231

0.22U_0603_10V7K

1 2

PR203 0_0402_5%

1 2

1 2

12

49

GND

1

PGOOD

2

PSI#

3

PMON

4

RBIAS

5

VR_TT#

6

NTC

7

SOFT

8

OCSET

9

VW

10

COMP

11

FB

12

FB2

12

PR237

1K_0402_1%

1 2

1 2

PR244 3.57K_0402_1%

VR_ON

PR207

12

0_0402_5%

47

45

44

48

46

3V3

VR_ON

CLK_EN#

DPRSTP#

DPRSLPVR

ISL6262ACRZ-T_QFN48_7X7

VDIFF13VSEN14RTN15DROOP16DFB17VO18VSUM19VIN20GND21VDD22ISEN223ISEN1

12

PC228

0.01U_0603_50V7K

PC230 0.1U_0402_16V7K

1 2

PC232 0.22U_0402_6.3V6K

12

12

PC240

47P_0402_50V8J

+VCC_CORE

B+

12

PC208

2200P_0402_50V7K

1000P_0402_50V7K

A A

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

+CPU_CORE

Size Document Number Rev

Custom

Date: Sheet

49 52Monday, February 25, 2008

1

of

0.4

A

www.kythuatvitinh.com

1 1

PR701

0_0402_5%

SYSON

2 2

3 3

1 2

+1.8VP

12

PC702

@1000P_0402_50V7K

316_0402_1%

PR705

12

0_0402_5%

PR703

+5VALW

12

12

PC710
1U_0603_10V6K

+1.8VP

PR708

1 2

28K_0603_0.1%

PR709

19.6K_0603_0.1%

PR704
255K_0402_1%

1 2

12

B

BST1_1.8VBST_1.8V

DH_1.8V
LX_1.8V

+5VALW

DL_1.8V

1 2

PC703

0.1U_0402_10V7K

1 2

PR706

17.8K_0402_1%

12

PC716

4.7U_0805_10V6K

PR711

1 2

0_0402_5%

1 2

PR702

0_0402_5%

15

14

1

PU701

TP

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

VBST

EN_PSV

V5DRV

GND7PGND

TPS51117RGYR_QFN14_3.5x3.5

8

DRVH

DRVL

13
12

LL

11

TRIP

10
9

578

3 6

578

3 6

241

241

C

12

@0.1U_0402_25V4K

PQ701
AO4466_SO8

PQ702
FDS6690AS_NL_SO8

1.8V_B+

12

12

12

PC701

PC705

PC704

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PL702

2.2UH_PCMC063T-2R2MN_8A_20%

1 2

12

PR707

@4.7_1206_5%

PC717

4.7U_0805_6.3V6K

PC713
@680P_0603_50V7K

1 2

PL701

HCB1608KF-121T30_0603

1 2

PC706

2200P_0402_50V7K

1

+

1 2

2

12

12

PC709

PC711

330U_D2_2VY_R15M

B+

PC707
@680P_0402_50V7K

+1.8VP

12

PC712

@0.1U_0402_10V7K

@0.1U_0402_10V7K

D

PJP701

+1.8VP

4 4

A

1 2

PAD-OPEN 4x4m
PJP702

1 2

PAD-OPEN 4x4m

B

(7A,280mils ,Via NO.= 14)

+1.8V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

1.8VP

LA-4102P Blade discrete

D

of

50 52Monday, February 25, 2008

0.4

A

www.kythuatvitinh.com

B

Version Change List ( P. I. R. List ) for Power Circuit

C

D

E

Page#

1 1

1

43

2

3

4449Charger 11/06

4

5

47 1.5VSP/VGA_CORE 11/06 Compal

6

45 3.3VALWP/5VALWP 12/31 Compal PWR request Add PU302, control signal changed to ACOFF

2 2

44

7

49

8

9

10

11

12

43 ACLED# connect to EC pin 97

3 3

43 DC Connector

13

14

49 +CPU_CORE 02/19 Compal WWAM issue

Title

DC Connector
/CPU_OTP

3.3VALWP/5VALWP Compal

Charger

+CPU_CORE 12/31 Compal EMI solution

+1.5VSP/VGA COREP Change PR513 to 0_ohm47

Charger Compal01/02 Add PC135 and PR141EMI solution44

+CPU_CORE49 02/15 Compal Change high-side MOS for WWAN Change PQ201 and PQ204 to powerpak

DC Connector
/CPU_OTP

/CPU_OTP

Request

Date

Owner

11/06

Compal

11/0645 Change PQ301, cancel PQ303.

Compal

11/06CPU_CORE

Compal

Compal EMI solution Add PC129, PC130, PC131, PC132, PC133

12/31

01/02 Compal HW request

02/15

02/19

Compal WWAM issue

Add PD4 & PC12

for Layout

EMI solution

EMI solution

for VGA voltage steps

AC LED change to KBC controlCompal

Solution Description

Add PD4 & PC12

Add PC128

Add PC240

Add PQ505, PR523, PR524, PR525

Add PC242

add PC241 47pF

add PC243 PC244 47pF

Rev.Issue DescriptionItem

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Power Changed-List History-1

Size Document Number Rev

Custom

D

Date: Sheet of

LA-4102P Blade discrete

E

51 52Monday, February 25, 2008

0.4

5

www.kythuatvitinh.com

Item (Reason for change)Fixed Issue PAGE Modify List Date

1

2

3

D D

C C

B B

Update Connetor Library

4

Delete LVDS B channel 19,20 Schematic Delete

5

USB camera Footprint error 19 Change U42 to G916-390T1UF SOT23, it adjustable mode, R1091=215K，R1093=100K,Add GPIO 20 to turn off power 11/07

Reserve Card reader D3E function 27,32 GPIO6= CR_CPPE#，GPIO22=CR_WAKE#

6

Swap PCIE LAN and New card 27 Swap PCIE4 and PICE6

7

Change GPU 1.8VS power 20、21 Change 1.8VS to +VDD_MEM18

8

Change G sensor control from SB、LED drive by +5VS 27、39 Change G sensor control from SB

9

10

Avoid Battery mode can't boot issue 38、45 Add +3VALW GD to EC_RSMRST# to fix Battery mode can't boot issue 11/17

11

Add G sensor ST and Bosch 37 Add G sensor ST and Bosch

12

Change LAN solution (Marvell to Realtek) 30

13

LAN transformer interfere 30 U19 Change to correct transformer type

14

Cardreader schematic review,add D3E function 32 R709-->10K、R1047-->8.2K、R1128-->Stuff、R705-->@、U37-->@、Cardreader LED-->+5VS、add D3E function 11/17

15

Jack can't detect normal 33 R1059 change from 39.2 to 39.2K 11/17

16

Docking can not power on 40 Add power on circuit D57,Q13R751,R752,R753

17

HP audio team recommend 33、35 C1480~C1487、C1352、C1354 change to 0.022U、Amp output setup to 15.6 dB、Reserve C747、C748 for GNDA and GND

18

Audio jack can't detect normal 35 Add Pull up resistor R750 to +3VALW

19

Docking HP audio test fail 35 Add C795、C796 to avoid DC level, and add R968、R969 to reduce HP out level

20

Leakage problem 38 Correct direction pretect leakage 11/07

21

EC pin define update 38

22

Can't Hibernation(SLP_S4#) 38 Connect SLP_S4# to SB

23

EC can't receive docking present CONA# change +3VL40

24

Reserve capacitor on digital MIC for EMI request 19 Add C496,C498

25

26

27

A A

HDCP ROM fail. HDCP_SCL need pull high. 22 R224 no stuff. R213 stuff.

28

Reserve capacitor on digital MIC for SED. WWAN noise 26 Add C499,C502

5

4

3

2

1

Phase

C41、C42、C43、C44 Change ESR=7m ohmTransation Fail 08

CRT(JCRT1)、HDMI(JHDMI1)、ESATA(JP53)、Finger print(JJP24)、FAN(JP2)、Speaker(JP60)、Multi
bay(JP12)、Dual LED(D53、D54

11/21

11/07

11/17

11/17

DB

DBDisable TV out function from Docking 20 TV signal unconnected,DACB_VDD pull low 10K (R948).

DB

DB

DB

11/17

DB

11/17

DB

11/17

DB

11/17

DB

DB

DB

11/17

11/17

DB

DB

Change LAN solution (Marvell to Realtek) 11/17

DB

DB

DB

11/17

DB

11/17

DB

11/17

DB

11/17

DB

Delete EC_PME#、SYSON PU、SUSP# PU、LID_SW# change to +3VALW、Delete CLKRUN#、R582->@ for C0 chip、CIR
PU+5VL、add 100P to BATT_OVP(EC recommend)

11/07

11/17

11/12

11/07

DB

DB

DB

DB

01/04 SIAdd 2N7002 to GND on HDMI to avoid leakage. Add Q7421

01/04 SI+VDD_MEM18 to +1.8VS, change to jummper 22 Delete R1124,R1125 add PJP605

01/04

01/04SISI

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

HW PIR

Size Document Number Rev

2

Date: Sheet of

LA-4102P Blade discrete

1

52 53Monday, February 25, 2008

0.4

5

www.kythuatvitinh.com

4

3

2

1

PhaseItem (Reason for change)Fixed Issue PAGE Modify List Date

1

Change transformer vendor 30 change U19 library 01/04 SI

2

XMIT_OFF add a diode to avoid leakage. 31 Add D88

3

D D

C C

B B

A A

Card reader recommend XD_ALE need pull +3VS not pull low.32

4

change Q54 from transistor to MOS for cardreader LED. 32 Change Q54

5

speaker pop issue 35 Change C1488 to 1U

6

7

Change EC_PME pull high from +3VL to +3VALW 38 R585 stuff

8

Reserve damping resistor on SPI_CLK for EMI request 38 Add R191

9

WLAN LED issue,WL_BLUE_LED# pull +3VS 39 Add R716

10

Add bypass capacitance on sensor bottom 39 Add C261(4.7U)

11

EC can't detect DOCK_PRESENT. 40 change R754 to 22 Ohm,R623 to 2K

12

Add DOCK_VOL_UP#,DOCK_VOL_Down# pull +3VS 40 Add R594,R596

13

SPDIF issue 40 follow Vader

14

Docking CRT blurred 40 Change ping 31,39,22 connect to GND

Change R650 and C770 to modify the power sequence 41 change R650 to 1K, C770 to 0.1u

15

Add 12P on CLK_14M_ICH for WWAN noise 17 Add 12P on CLK_14M_ICH

16

BKOFF# reserve pull low 10K 19 reserve R717 02/15 PV

17

Reserve CMD27 to support 64M X16 7,8 Reserve CMD27 to support 64M X16 02/15 PV

18

Reserve cap on HDA_BITCLK for WWAN noise issue 26 Reserve cap on HDA_BITCLK 02/15 PV

19

Reserve to prevent ESD issue 30 Reserve ESD diode on LAN LED pin 02/15 PV

20

Change WLAN and WWAN 0402 resistor to 0805 31 Change WLAN and WWAN 0402 resistor to 0805, and WLAN change to +3VS power plane 02/15PV

21

Direct drive LED, and add D3E function diode 32 Direct drive LED and XD_ALE Pull L, and add D86 for D3E function 02/15 PV

22

Change R1092 value on BT power switch Gate 36 Change R1092 to 10K 02/15 PV

23

Correct AC_LED control by EC 38 AC_LED Change controll by EC 02/15 PV

24

Change all LED limit current resistor to 200 ohm 39 Change all LED limit current resistor to 200 ohm and add Touch pad LED for PR 02/15 PV

25

Add 33 ohm for MUTE_LED and DOCK_SLP_BTN# 40 Add 33 ohm for MUTE_LED and DOCK_SLP_BTN# 02/15 PV

26

36 Add C2125,C2126,C2127Reserve capacitor on SPI_FSEL#,CLK#,FER for EMI request

27

28

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

HW PIR

Size Document Number Rev

2

Date: Sheet of

LA-4102P Blade discrete

01/04 SI

01/04

01/04

01/04

01/04

01/04

01/04

01/04

01/04

01/04

01/04

01/04

01/04

01/04 SI

02/15 PV

02/20 PVfollow check list ver:1.5 6 change R13 to 56 ohm;change R2~R8 to 51 ohm;change R11 to 0ohm

02/20 PVadd C1250,C124942Reserve Cap for EMI

53 53Monday, February 25, 2008

1

SI

SI

SI

SI

SI

SI

SI

SI

SI

SI

SI

SI

0.4

5

www.kythuatvitinh.com

4

3

2

1

PhaseItem (Reason for change)Fixed Issue PAGE Modify List Date

1

follow check list Ver:1.5

2

follow check list Ver:1.5

3

D D

boot code "88" power sequence faill

4

Change BT,LAN,DOCK,Multibay connect for DFX

5

6

For EMI

7

For EMI

8

For EMI

reserve R14817

change R45,R48 to 10K9

39Change WWAN and WLAN LED

SPI_CLK add R2118 , R2119 , R2120 => 33ohm add C2125 , C2126 , C2127 => 22pF;R553, 554, 556 =>10ohm37

30 LAN add C656 and C657 => o.1uF

39 T/P add D28 and C729

02/15

02/15

02/15

02/15PVPV

02/15

02/15

02/15

PV

PV

PV02/15add Diode from PWROK to RSMRST27

PV

PV

PV

9

10

11

C C

12

13

14

15

16

17

18

19

B B

20

21

22

23

24

25

26

27

A A

28

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/02/25 2008/02/25

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

HW PIR

Size Document Number Rev

2

Date: Sheet of

LA-4102P Blade discrete

1

54 53Monday, February 25, 2008

0.4