HP DV4 CQ40, DV4 CQ45 Schematics

A
hexainf@hotmail.com
1 1
B
C
D
E
Compal confidential
Schematics Document
Mobile Penryn uFCPGA with Intel
2 2
Cantiga_PM+ICH9-M core logic
2007-09-16
3 3
4 4
A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
Cover Sheet
Cover Sheet
Cover Sheet
Montevina Consumer discrete
Montevina Consumer discrete
Montevina Consumer discrete
E
0.1
0.1
1 51Friday, October 05, 2007
1 51Friday, October 05, 2007
1 51Friday, October 05, 2007
0.1
A
B
C
D
E
Compal confidential
1 1
TV out
VRAM DDR2 128/512MB
page 23,24
64bits
Discrete
Nvidia NB9M-GE
P20,21,22
Montevina Consumer Discrete
Thermal Sensor EMC1402
Fan conn
P6
P6
Mobile Penryn
uFCPGA-478 CPU
H_A#(3..35) H_D#(0..63)
P6,7, 8
FSB
667/800/1066 MHz 1.05V
DDR2 667MHz 1.8V
CK505
72QFN
Clock Generator SLG8SP553V
DDR2 SO-DIMM X2
BANK 0, 1, 2, 3
P17
P15, 16
Intel Cantiga MCH
LVDS Panel Interface
Dock connecter
2 2
CRT
P40
CRT
Support V1.3
HDMI
P19
P18
DMI X4
P42
FCBGA 1329
P9, 10, 11, 12, 13, 14
C-Link
PCI-E BUS*5
Intel ICH9-M
Mavell 88E8072(Gbe)
Mini-Card*2
WLAN & Robson
P30
New Card
P31
RJ45/11 CONN
3 3
P30
Flash Memory Card Controller
P31
JMB385
P32
mBGA-676
P25,26,27,28
LPC BUS
Dual Channel
USB2.0 X12
Azalia SATA Master-1
SATA Slave SATA Slave
USB conn x3
BT Conn
USB Camera
P36
P36
P19
Audio CKT AMP & Audio Jack
Codec_IDT9271B7
MDC
P34
SATA HDD Connector
P33 P35
P29
TPA6017A2
LED
P39
RTC CKT.
P26
FPR Conn
Power On/Off CKT.
4 4
DC/DC Interface CKT.
P41
A
Touch Screen Conn
5 in1 Slot
B
P32
Touch Pad CONN.
ENE
KB926
P38
Int.KBD
P39
SPI
SPI ROM 25LF080A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
P37
C
P38
Compal Secret Data
Compal Secret Data
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
SATA ODD Connector
e-SATA Connector With 3'th USB
Custom
Custom
Custom
D
P29
Dock
P29
P40
CIR Conn
P35
Capsense switch Conn
P39
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Block Diagram
Block Diagram
Block Diagram
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
E
2 51Friday, October 05, 2007
2 51Friday, October 05, 2007
2 51Friday, October 05, 2007
0.1
0.1
0.1
A
hexainf@hotmail.com
Voltage Rails
O MEANS ON
X MEANS OFF
Symbol Note :
: means Digital Ground
+5VS
power plane
+B
+5VALW
+3VALW
+1.8V
State
S0
S1
S3
S5 S4/AC
S5 S4/ Battery only
S5 S4/AC & Battery don't exist
1 1
O O O O O
O O O O
X XX
O O O
X X X
SMBUS Control Table
SMB_EC_CK1 SMB_EC_DA1 SMB_EC_CK2 SMB_EC_DA2 SMB_CK_CLK1 SMB_CK_DAT1
SOURCE
KB926
KB926
ICH9
INVERTER BATT
X V
XXX
X
SERIAL EEPROM
Thermal Sensor
V
X
SODIMM CLK CHIP
X
V
X
X X
V V V
+3VS +1.5VS +0.9V +VCCP +CPU_CORE +2.5VS +1.8VS +NVVDD +PCIE
O O
X X X X
X X
MINI CARD
X X
Sensor board
X
VX
X
NB9M
Thermal Sensor
X
V
X
NB9M
X
V
X
: means Analog Ground
@ : means just reserve , no build DEBUG@ : means just reserve for debug.
USB assignment:
USB-0 Right side USB-1 Right side USB-2 Left side(with ESATA) USB-3 Dock USB-4 Camera USB-5 WLAN USB-6 Bluetooth USB-7 Finger Printer USB-8 MiniCard(WWAN/TV) USB-9 Express card USB-10 X USB-11 X
PCIe assignment:
PCIe-1 TV tuner/WWAN/Robeson PCIe-2 X PCIe-3 WLAN PCIe-4 New Card PCIe-5 Card reader PCIe-6 GLAN (Marvell)
NB9M SMBUS Control Table
SOURCE LVDS CRT
DDC2_DATA DDC2_CLK 3VDDCDA 3VDDCCL HDMIDAT_VGA HDMICLK_VGA
NB9M NB9M
NB9M
I2C / SMBUS ADDRESSING
DEVICE
DDR SO-DIMM 0 DDR SO-DIMM 1 CLOCK GENERATOR (EXT.)
HDMI
V
X X
X X
V
X
HEX
A0
D2
X
V
ADDRESS
1 0 1 0 0 0 0 0 1 0 1 0 0 1 0 0A4 1 1 0 1 0 0 1 0
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Notes List
Notes List
Notes List
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
3 51Friday, October 05, 2007
3 51Friday, October 05, 2007
3 51Friday, October 05, 2007
0.1
0.1
0.1
5
4
3
2
50mA
Finger printer
1
50mA
177mA
1A
D D
+V_BATTERY Dock con
300mA
60mA
AC
VIN
0.3A
2A
INVPWR_B+
B++
LVDS CON
1.7A
+3VALW
20mA
10mA
550mA
ICH9
LAN
+3VAUX_BT
+3VALW_EC
SPI ROM
JMB385
25mA
35mA
1A
1A
278mA
5.39A5.89A
+3VS
1.5A
250mA
C C
+1.5VS
B+
+5VALW
2.2A0.3A
1.3A0.58A
657mA
1.56A
ICH_VCC1_5 ICH9
ICH9
+5VS
35mA
390mA
1A
+VDDA IDT 9271B7
PC Camera
+3VS_DVDD ALC268
MDC 1.5
New card
Mini card (WLAN)
ICH9
+LCDVDD
LVDS CON
+3VS_CK505
NB9M (VGA)
Mini card (TV tu/WWAN/Robeson)
7A
10mA
360mA
B B
3.7 X 3=11.1V
DC BATT
B+++
12.11A1.9A
+1.8V
3.7A
8 A
50mA
NB9M (VGA)
MCH
DDR2 800Mhz 4G x2
+0.9V
1.17A
ICH9
1.8A
700mA
1.8A
+5VAMP
ODD
SATA
Muti Bay
Issued Date
Issued Date
Issued Date
1.26A
2.3A
MCH
CPU
Compal Secret Data
Compal Secret Data
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Montevina Consumer UMA
Montevina Consumer UMA
Montevina Consumer UMA
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Power delivery
Power delivery
Power delivery
1
0.1
0.1
4 51Friday, O ctober 05, 2007
4 51Friday, O ctober 05, 2007
4 51Friday, O ctober 05, 2007
0.1
4.7A
1.05V_B+
A A
5
CPU_B+ +VCC_CORE
0.27A
+NVVDDP +NVVDD
0.19A
+1.1V_PCIE +PCIE
10mA2A
4
34A/1.025V
2.725A
2A/1.1V
+VCCP
CPU
NB9M (VGA)
NB9M (VGA)
Security Classification
Security Classification
Security Classification
THIS SHE ET OF ENGIN EERING D RAWING IS TH E PROPR IETARY PROPE RTY OF COMPAL ELE CTRON ICS, INC. AND CONTAINS CONFID ENTIAL
THIS SHE ET OF ENGIN EERING D RAWING IS TH E PROPR IETARY PROPE RTY OF COMPAL ELE CTRON ICS, INC. AND CONTAINS CONFID ENTIAL
THIS SHE ET OF ENGIN EERING D RAWING IS TH E PROPR IETARY PROPE RTY OF COMPAL ELE CTRON ICS, INC. AND CONTAINS CONFID ENTIAL AND TRADE S ECRE T INFORMATION. THIS S HEET MAY NOT BE TR ANSFERED FROM THE C USTODY OF TH E COMPETEN T DIVISION OF R& D
AND TRADE S ECRE T INFORMATION. THIS S HEET MAY NOT BE TR ANSFERED FROM THE C USTODY OF TH E COMPETEN T DIVISION OF R& D
AND TRADE S ECRE T INFORMATION. THIS S HEET MAY NOT BE TR ANSFERED FROM THE C USTODY OF TH E COMPETEN T DIVISION OF R& D DEPARTMEN T EXCEPT AS AUTHO RIZED BY CO MPAL ELECTR ONICS , INC. NEITH ER THIS S HEET NO R THE INF ORMATION IT CONTAINS
DEPARTMEN T EXCEPT AS AUTHO RIZED BY CO MPAL ELECTR ONICS , INC. NEITH ER THIS S HEET NO R THE INF ORMATION IT CONTAINS
DEPARTMEN T EXCEPT AS AUTHO RIZED BY CO MPAL ELECTR ONICS , INC. NEITH ER THIS S HEET NO R THE INF ORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
3
A
hexainf@hotmail.com
1 1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Notes List
Notes List
Notes List
Montevina Consumer UMA
Montevina Consumer UMA
Montevina Consumer UMA
5 51Friday, October 05, 2007
5 51Friday, October 05, 2007
5 51Friday, October 05, 2007
0.1
0.1
0.1
5
4
3
2
1
R1
@R1
ITP-XDP Connector
XDP_DBRESET#_R
@
1 2
Change value in 5/02
JP1
JP1
1
+3VS
FAN_PWM38
Deciphered Date
Deciphered Date
Deciphered Date
GND0
3
OBSFN_A0
5
OBSFN_A1
7
GND2
9
OBSDATA_A0
11
OBSDATA_A1
13
GND4
15
OBSDATA_A2
17
OBSDATA_A3
19
GND6
21
OBSFN_B0
23
OBSFN_B1
25
GND8
27
OBSDATA_B0
29
OBSDATA_B1
31
GND10
33
OBSDATA_B2
35
OBSDATA_B3
37
GND12
39
PWRGOOD/HOOK0
41
HOOK1
43
VCC_OBS_AB
45
HOOK2
47
HOOK3
49
GND14
51
SDA
53
SCL
55
TCK1
57
TCK0
59
GND16
C3
C3
1 2
R16
R16
1 2
10K_0402_5%
10K_0402_5%
CONN@
CONN@
SAMTE_BSH-030-01-L-D-A
SAMTE_BSH-030-01-L-D-A
+3VS
1
C2
2
0.1U_0402_16V4ZC20.1U_0402_16V4Z
H_THERMDA H_THERMDC
2200P_0402_50V7K
2200P_0402_50V7K
THERM#
RB751V_SOD323
RB751V_SOD323
2
OBSDATA_C0 OBSDATA_C1
OBSDATA_C2 OBSDATA_C3
OBSDATA_D0 OBSDATA_D1
OBSDATA_D2 OBSDATA_D3
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
D1
D1
1
G
G
3
D D
H_A#[3..16]9
H_ADSTB#09
H_REQ#09 H_REQ#19 H_REQ#29 H_REQ#39 H_REQ#49
C C
B B
A A
H_A#[17..35]9
H_ADSTB#19
H_A20M#26
H_FERR#26
H_IGNNE#26 H_STPCLK#26
H_INTR26 H_NMI26 H_SMI#26
+VCCP
B
B
E
H_PROCHOT# OCP#
H_IERR#
E
3 1
Q1
@
Q1
@
MMBT3904_NL_SOT23-3
MMBT3904_NL_SOT23-3
+VCCP
12
@
@
R17
R17 56_0402_5%
56_0402_5%
2
C
C
R18
R18 56_0402_5%
56_0402_5%
1 2
5
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_ADSTB#0
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 H_ADSTB#1
H_A20M# H_FERR# H_IGNNE#
H_STPCLK# H_INTR H_NMI H_SMI#
JCPU1A
JCPU1A
J4
A[3]#
L5
A[4]#
L4
A[5]#
K5
A[6]#
M3
A[7]#
N2
A[8]#
J1
A[9]#
N3
A[10]#
P5
A[11]#
P2
A[12]#
L2
A[13]#
P4
A[14]#
P1
A[15]#
R1
A[16]#
M1
ADSTB[0]#
K3
REQ[0]#
H2
REQ[1]#
K2
REQ[2]#
J3
REQ[3]#
L1
REQ[4]#
Y2
A[17]#
U5
A[18]#
R3
A[19]#
W6
A[20]#
U4
A[21]#
Y5
A[22]#
U1
A[23]#
R4
A[24]#
T5
A[25]#
T3
A[26]#
W2
A[27]#
W5
A[28]#
Y4
A[29]#
U2
A[30]#
V4
A[31]#
W3
A[32]#
AA4
A[33]#
AB2
A[34]#
AA3
A[35]#
V1
ADSTB[1]#
A6
A20M#
A5
FERR#
C4
IGNNE#
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
M4
RSVD[01]
N5
RSVD[02]
T2
RSVD[03]
V3
RSVD[04]
B2
RSVD[05]
D2
RSVD[06]
D22
RSVD[07]
D3
RSVD[08]
F6
RSVD[09]
Penryn
Penryn
OCP# 27
ADDR GROUP_0
ADDR GROUP_0
ADDR GROUP_1
ADDR GROUP_1
ICH
ICH
ADS# BNR#
BPRI#
DEFER#
DRDY# DBSY#
IERR#
LOCK#
CONTROL
CONTROL
RESET#
RS[0]# RS[1]# RS[2]#
TRDY#
HITM#
BPM[0]# BPM[1]# BPM[2]# BPM[3]#
PRDY# PREQ#
TRST#
DBR#
XDP/ITP SIGNALS
XDP/ITP SIGNALS
THERMAL
THERMAL
PROCHOT#
THERMDA THERMDC
THERMTRIP#
H CLK
H CLK
BCLK[0] BCLK[1]
RESERVED
RESERVED
BR0#
INIT#
HIT#
TCK TDO
TMS
H_ADS#
H1
H_BNR#
E2
H_BPRI#
G5
H_DEFER#
H5
H_DRDY#
F21
H_DBSY#
E1
H_BR0#
F1
H_IERR#
D20
H_INIT#
B3
H_LOCK#
H4
H_RESET#
C1
H_RS#0
F3
H_RS#1
F4
H_RS#2
G3
H_TRDY#
G2
H_HIT#
G6
H_HITM#
E4
XDP_BPM#0
AD4
XDP_BPM#1
AD3
XDP_BPM#2
AD1
XDP_BPM#3
AC4
XDP_BPM#4
AC2
XDP_BPM#5
AC1
XDP_TCK
AC5
XDP_TDI
AA6
TDI
XDP_TDO
AB3
XDP_TMS
AB5
XDP_TRST#
AB6
XDP_DBRESET#
C20
H_PROCHOT#
D21 A24
H_THERMDC_R
B25
H_THERMTRIP#
C7
CLK_CPU_BCLK
A22
CLK_CPU_BCLK#
A21
For Merom, R1798 and R1799 are 0ohm For Penryn, R1798 and R1799 are 100ohm.
ZZZ1
ZZZ1
PCB
PCB
4
H_ADS# 9 H_BNR# 9
H_BPRI# 9
H_DEFER# 9 H_DRDY# 9 H_DBSY# 9
H_BR0# 9
H_INIT# 26 H_LOCK# 9 H_RESET# 9
H_RS#0 9
H_RS#1 9
H_RS#2 9
H_TRDY# 9
H_HIT# 9 H_HITM# 9
R13 49.9_0402_1%R13 49.9_0402_1% R14 100_0402_5%R14 100_0402_5%
R15 100_0402_5%R15 100_0402_5%
H_THERMTRIP# 9,26
CLK_CPU_BCLK 17 CLK_CPU_BCLK# 17
T1T1
Place TP with a GND 0.1" away
XDP_DBRESET# 27
1 2 1 2
1 2
H_THERMDA, H_THERMDC routing together, Trace width / Spacing = 10 / 10 mil
H_PWRGOOD7,26 CLK_CPU_XDP 17
C1 0.1U_0402_16V4ZC1 0.1U_0402_16V4Z
Removed at 5/30.(Follow Chimay)
+VCCP
H_THERMDAH_THERMDA_R H_THERMDC
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
XDP_BPM#5 XDP_BPM#4
XDP_BPM#3 XDP_BPM#2
XDP_BPM#1 XDP_BPM#0
R9
R9 1K_0402_5%
1K_0402_5%
H_PWRGOOD_R
12
XDP_HOOK1
12
XDP_TCK
PWM Fan Control circuit
Compal Secret Data
Compal Secret Data
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
GND1 OBSFN_C0 OBSFN_C1
GND3
GND5
GND7 OBSFN_D0 OBSFN_D1
GND9
GND11
GND13
GND15
TD0
TRST#
TDI
TMS
GND17
U1
U1
1
VDD
2
DP
3
DN
4
THERM#
EMC1402-1-ACZL-TR_MSOP8
EMC1402-1-ACZL-TR_MSOP8
Address:100_1100
+5VS
2 1
6
2
D
Q2
D
Q2
S
SI3456BDV-T1-E3_TSOP6
S
SI3456BDV-T1-E3_TSOP6
4 5
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60
1
C4
C4
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
XDP_TDI XDP_TMS XDP_TDO XDP_BPM#5 XDP_HOOK1 XDP_TRST# XDP_TCK
CLK_CPU_XDP CLK_CPU_XDP#
H_RESET#_R
XDP_TDO XDP_TRST# XDP_TDI XDP_TMS XDP_PRE
R2 54.9_0402_1%R2 54.9_0402_1%
1 2
R3 54.9_0402_1%R3 54.9_0402_1%
1 2
R4 54.9_0402_1%R4 54.9_0402_1%
1 2
R5 54.9_0402_1%R5 54.9_0402_1%
1 2
R6 54.9_0402_1%@ R6 54.9_0402_1%@
1 2
R7 54.9_0402_1%R7 54.9_0402_1%
1 2
R8 54.9_0402_1%R8 54.9_0402_1%
1 2
This shall place near CPU
+VCCP+VCCP
R10 1K_0402_1%R10 1K_0402_1%
1 2
R11 200_0402_1%R11 200_0402_1%
R12
R12 0_0402_5%
0_0402_5%
1 2
12
CLK_CPU_XDP# 17
Place R191 within 200ps (~1") to CPU
SMB_EC_CK2
8
SMCLK
SMDATA
ALERT#
+FAN
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
SMB_EC_DA2
7 6 5
GND
1
C5
C5
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
12
D2
@D2
@
RLZ5.1B_LL34
RLZ5.1B_LL34
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Penryn(1/3)-AGTL+/ITP-XDP
Penryn(1/3)-AGTL+/ITP-XDP
Penryn(1/3)-AGTL+/ITP-XDP
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
1
+3VS
1K_0402_5%
1K_0402_5%
+VCCP
H_RESET# XDP_DBRESET#XDP_DBRESET#_R
SMB_EC_CK2 21,38 SMB_EC_DA2 21,38
JP2
JP2
1
1
2
2
3
G1
4
G2
ACES_85204-02001
ACES_85204-02001
6 51Friday, October 05, 2007
6 51Friday, October 05, 2007
6 51Friday, October 05, 2007
0.1
0.1
0.1
5
hexainf@hotmail.com
4
3
2
1
H_D#[0..15]9
D D
H_DSTBN#09 H_DSTBP#09 H_DINV#09 H_D#[16..31]9
C C
* Route the TEST3 and TEST5 signals through a ground referenced Zo = 55-ohm trace that ends in a via that is near a GND via and is accessible through an oscilloscope connection.
B B
CPU_BSEL CPU_BSEL2 CPU_BSEL1
R21 1K_0402_5%@R21 1K_0402_5%@ R22 1K_0402_5%@R22 1K_0402_5%@
166
H_DSTBN#19 H_DSTBP#19 H_DINV#19
1 2 1 2
CPU_BSEL017 CPU_BSEL117 CPU_BSEL217
T2T2 T3T3 T4T4 T5T5 T6T6
0 1
200
266
0 0
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_DSTBN#0 H_DSTBP#0 H_DINV#0
H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_DSTBN#1 H_DSTBP#1 H_DINV#1
+V_CPU_GTLREF
TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 TEST7 CPU_BSEL0 CPU_BSEL1 CPU_BSEL2
10
JCPU1B
JCPU1B
E22
D[0]#
F24
D[1]#
E26
D[2]#
G22
D[3]#
F23
D[4]#
G25
D[5]#
E25
D[6]#
E23
D[7]#
K24
D[8]#
G24
D[9]#
J24
D[10]#
J23
D[11]#
H22
D[12]#
F26
D[13]#
K22
D[14]#
H23
D[15]#
J26
DSTBN[0]#
H26
DSTBP[0]#
H25
DINV[0]#
N22
D[16]#
K25
D[17]#
P26
D[18]#
R23
D[19]#
L23
D[20]#
M24
D[21]#
L22
D[22]#
M23
D[23]#
P25
D[24]#
P23
D[25]#
P22
D[26]#
T24
D[27]#
R24
D[28]#
L25
D[29]#
T25
D[30]#
N25
D[31]#
L26
DSTBN[1]#
M26
DSTBP[1]#
N24
DINV[1]#
AD26
GTLREF
C23
TEST1
D25
TEST2
C24
TEST3
AF26
TEST4
AF1
TEST5
A26
TEST6
C3
TEST7
B22
BSEL[0]
B23
BSEL[1]
C21
BSEL[2]
Penryn
Penryn
CPU_BSEL0
H_D#32
Y22
MISC
MISC
D[32]# D[33]#
DATA GRP 0
DATA GRP 0
D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]#
DATA GRP 2DATA GRP 3
DATA GRP 2DATA GRP 3
D[41]# D[42]# D[43]# D[44]# D[45]# D[46]#
D[47]# DSTBN[2]# DSTBP[2]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
DATA GRP 1
DATA GRP 1
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]# DSTBN[3]# DSTBP[3]#
DINV[3]# COMP[0]
COMP[1] COMP[2] COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22
AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20
R26 U26 AA1 Y1
E5 B5 D24 D6 D7 AE6
H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_DSTBN#2 H_DSTBP#2 H_DINV#2
H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 H_DSTBN#3 H_DSTBP#3 H_DINV#3
COMP0 COMP1 COMP2 COMP3
H_DPRSTP# H_DPSLP# H_DPWR# H_PWRGOOD H_CPUSLP# H_PSI#
1
0
0
H_D#[32..47] 9
H_DSTBN#2 9 H_DSTBP#2 9 H_DINV#2 9 H_D#[48..63] 9
H_DSTBN#3 9 H_DSTBP#3 9 H_DINV#3 9
H_DPRSTP# 9,26,49
H_DPSLP# 26 H_DPWR# 9 H_PWRGOOD 6,26
H_CPUSLP# 9 H_PSI# 49
R24
R24
R23
R23
12
54.9_0402_1%
54.9_0402_1%
Resistor placed within 0.5" of CPU pin.Trace should be at least 25 mils away from any other toggling signal. COMP[0,2] trace width is 18 mils. COMP[1,3] trace width is 4 mils.
+V_CPU_GTLREF
R25
R25
12
12
27.4_0402_1%
27.4_0402_1%
54.9_0402_1%
54.9_0402_1%
+VCCP
12
R27
R27 1K_0402_1%
1K_0402_1%
12
R29
R29 2K_0402_1%
2K_0402_1%
27.4_0402_1%
27.4_0402_1%
+VCC_CORE +VCC_CORE
R26
R26
12
AA10 AA12 AA13 AA15 AA17 AA18 AA20
AC10 AB10 AB12 AB14 AB15 AB17 AB18
JCPU1C
JCPU1C
A7
VCC[001]
A9
VCC[002]
A10
VCC[003]
A12
VCC[004]
A13
VCC[005]
A15
VCC[006]
A17
VCC[007]
A18
VCC[008]
A20
VCC[009]
B7
VCC[010]
B9
VCC[011]
B10
VCC[012]
B12
VCC[013]
B14
VCC[014]
B15
VCC[015]
B17
VCC[016]
B18
VCC[017]
B20
VCC[018]
C9
VCC[019]
C10
VCC[020]
C12
VCC[021]
C13
VCC[022]
C15
VCC[023]
C17
VCC[024]
C18
VCC[025]
D9
VCC[026]
D10
VCC[027]
D12
VCC[028]
D14
VCC[029]
D15
VCC[030]
D17
VCC[031]
D18
VCC[032]
E7
VCC[033]
E9
VCC[034]
E10
VCC[035]
E12
VCC[036]
E13
VCC[037]
E15
VCC[038]
E17
VCC[039]
E18
VCC[040]
E20
VCC[041]
F7
VCC[042]
F9
VCC[043]
F10
VCC[044]
F12
VCC[045]
F14
VCC[046]
F15
VCC[047]
F17
VCC[048]
F18
VCC[049]
F20
VCC[050]
AA7
VCC[051]
AA9
VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059]
AB9
VCC[060] VCC[061] VCC[062] VCC[063] VCC[064]
VCCSENSE VCC[065] VCC[066] VCC[067]
VSSSENSE
Penryn
Penryn
AB20
VCC[068]
AB7
VCC[069]
AC7
VCC[070]
AC9
VCC[071]
AC12
VCC[072]
AC13
VCC[073]
AC15
VCC[074]
AC17
VCC[075]
AC18
VCC[076]
AD7
VCC[077]
AD9
VCC[078]
AD10
VCC[079]
AD12
VCC[080]
AD14
VCC[081]
AD15
VCC[082]
AD17
VCC[083]
AD18
VCC[084]
AE9
VCC[085]
AE10
VCC[086]
AE12
VCC[087]
AE13
VCC[088]
AE15
VCC[089]
AE17
VCC[090]
AE18
VCC[091]
AE20
VCC[092]
AF9
VCC[093]
AF10
VCC[094]
AF12
VCC[095]
AF14
VCC[096]
AF15
VCC[097]
AF17
VCC[098]
AF18
VCC[099]
AF20
VCC[100]
VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]
VCCA[01] VCCA[02]
VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]
+VCCPA
G21
+VCCPB
V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21
B26 C26
AD6 AF5 AE5 AF4 AE3 AF3 AE2
AF7
AE7
.
.
VCCSENSE
VSSSENSE
R19
R19
1 2 1 2
R20
R20
Length match within 25 mils. The trace width/space/other is 20/7/25.
+VCC_CORE
R28 100_0402_1%R28 100_0402_1%
1 2
R30 100_0402_1%R30 100_0402_1%
1 2
0_0402_5%
0_0402_5% 0_0402_5%
0_0402_5%
CPU_VID0 49 CPU_VID1 49 CPU_VID2 49 CPU_VID3 49 CPU_VID4 49 CPU_VID5 49 CPU_VID6 49
VCCSENSE 49
VSSSENSE 49
+VCCP
10U_0805_6.3V6M
10U_0805_6.3V6M
VCCSENSE
VSSSENSE
1
+
+
C6
C6 330U_D2E_2.5VM_R7
330U_D2E_2.5VM_R7
2
1
C7
C7
2
+1.5VS
1
C8
C8
2
0.01U_0402_16V7K
0.01U_0402_16V7K
Near pin B26
Close to CPU pin within
A A
Close to CPU pin AD26 within 500mils.
500mils.
5
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Penryn(2/3)-AGTL+/ITP-XDP
Penryn(2/3)-AGTL+/ITP-XDP
Penryn(2/3)-AGTL+/ITP-XDP
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
1
0.1
0.1
7 51Monday, October 08, 2007
7 51Monday, October 08, 2007
7 51Monday, October 08, 2007
0.1
5
D D
C C
B B
JCPU1D
JCPU1D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VSS[004]
A16
VSS[005]
A19
VSS[006]
A23
VSS[007]
AF2
VSS[008]
B6
VSS[009]
B8
VSS[010]
B11
VSS[011]
B13
VSS[012]
B16
VSS[013]
B19
VSS[014]
B21
VSS[015]
B24
VSS[016]
C5
VSS[017]
C8
VSS[018]
C11
VSS[019]
C14
VSS[020]
C16
VSS[021]
C19
VSS[022]
C2
VSS[023]
C22
VSS[024]
C25
VSS[025]
D1
VSS[026]
D4
VSS[027]
D8
VSS[028]
D11
VSS[029]
D13
VSS[030]
D16
VSS[031]
D19
VSS[032]
D23
VSS[033]
D26
VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037]
E11
VSS[038]
E14
VSS[039]
E16
VSS[040]
E19
VSS[041]
E21
VSS[042]
E24
VSS[043]
F5
VSS[044]
F8
VSS[045]
F11
VSS[046]
F13
VSS[047]
F16
VSS[048]
F19
VSS[049]
F2
VSS[050]
F22
VSS[051]
F25
VSS[052]
G4
VSS[053]
G1
VSS[054]
G23
VSS[055]
G26
VSS[056]
H3
VSS[057]
H6
VSS[058]
H21
VSS[059]
H24
VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066]
K23
VSS[067]
K26
VSS[068]
L3
VSS[069]
L6
VSS[070]
L21
VSS[071]
L24
VSS[072]
M2
VSS[073]
M5
VSS[074]
M22
VSS[075]
M25
VSS[076]
N1
VSS[077]
N4
VSS[078]
N23
VSS[079]
N26
VSS[080] VSS[081]P3VSS[162]
Penryn
Penryn
VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161]
VSS[163]
P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25
.
.
4
Place these capacitors on L8 (North side,Secondary Layer)
Place these capacitors on L8 (North side,Secondary Layer)
Place these capacitors on L8 (North side,Secondary Layer)
Place these capacitors on L8 (North side,Secondary Layer)
Mid Frequence Decoupling
Near CPU CORE regulator
+VCC_CORE
C41
C45
C45
0.1U_0402_10V6K
0.1U_0402_10V6K
C41
330U_D2E_2.5VM_R7
330U_D2E_2.5VM_R7
+VCCP
1
2
3
+VCC_CORE
1
2
+VCC_CORE
1
2
+VCC_CORE
1
2
+VCC_CORE
1
2
C9
C9 10U_0805_6.3V6M
10U_0805_6.3V6M
C17
C17 10U_0805_6.3V6M
10U_0805_6.3V6M
C25
C25 10U_0805_6.3V6M
10U_0805_6.3V6M
C33
C33 10U_0805_6.3V6M
10U_0805_6.3V6M
1
C10
C10 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C18
C18 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C26
C26 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C34
C34 10U_0805_6.3V6M
10U_0805_6.3V6M
2
ESR <= 1.5m ohm Capacitor > 1980uF
330U_D2E_2.5VM_R7
330U_D2E_2.5VM_R7
1
1
1
+
+
+
+
C42
C42
2
2
330U_D2E_2.5VM_R7
330U_D2E_2.5VM_R7
Inside CPU center cavity in 2 rows
1
C46
C46
0.1U_0402_10V6K
0.1U_0402_10V6K
2
@+C43
@
C43
1
+
C44
C44
2
330U_D2E_2.5VM_R7
330U_D2E_2.5VM_R7
1
C47
C47
0.1U_0402_10V6K
0.1U_0402_10V6K
2
+
+
2
1
2
1
C11
C11 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C19
C19 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C27
C27 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C35
C35 10U_0805_6.3V6M
10U_0805_6.3V6M
2
C48
C48
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C12
C12 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C20
C20 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C28
C28 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C36
C36 10U_0805_6.3V6M
10U_0805_6.3V6M
2
5
1
C49
C49
0.1U_0402_10V6K
0.1U_0402_10V6K
2
5
1
C13
C13 10U_0805_6.3V6M
10U_0805_6.3V6M
2
5
1
C21
C21 10U_0805_6.3V6M
10U_0805_6.3V6M
2
5
1
C29
C29 10U_0805_6.3V6M
10U_0805_6.3V6M
2
5
1
C37
C37 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C50
C50
0.1U_0402_10V6K
0.1U_0402_10V6K
2
2
1
C14
C14 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C22
C22 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C30
C30 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C38
C38 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C15
C15 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C23
C23 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C31
C31 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C39
C39 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
2
1
2
1
2
1
2
C16
C16 10U_0805_6.3V6M
10U_0805_6.3V6M
C24
C24 10U_0805_6.3V6M
10U_0805_6.3V6M
C32
C32 10U_0805_6.3V6M
10U_0805_6.3V6M
C40
C40 10U_0805_6.3V6M
10U_0805_6.3V6M
1
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Penryn(3/3)-AGTL+/ITP-XDP
Penryn(3/3)-AGTL+/ITP-XDP
Penryn(3/3)-AGTL+/ITP-XDP
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
1
0.1
0.1
8 51Monday, October 08, 2007
8 51Monday, October 08, 2007
8 51Monday, October 08, 2007
0.1
5
hexainf@hotmail.com
U2A
12
R54
R54
H_RCOMP
U2A
F2
H_D#_0
G8
H_D#_1
F8
H_D#_2
E6
H_D#_3
G2
H_D#_4
H6
H_D#_5
H2
H_D#_6
F6
H_D#_7
D4
H_D#_8
H3
H_D#_9
M9
H_D#_10
M11
H_D#_11
J1
H_D#_12
J2
H_D#_13
N12
H_D#_14
J6
H_D#_15
P2
H_D#_16
L2
H_D#_17
R2
H_D#_18
N9
H_D#_19
L6
H_D#_20
M5
H_D#_21
J3
H_D#_22
N2
H_D#_23
R1
H_D#_24
N5
H_D#_25
N6
H_D#_26
P13
H_D#_27
N8
H_D#_28
L7
H_D#_29
N10
H_D#_30
M3
H_D#_31
Y3
H_D#_32
AD14
H_D#_33
Y6
H_D#_34
Y10
H_D#_35
Y12
H_D#_36
Y14
H_D#_37
Y7
H_D#_38
W2
H_D#_39
AA8
H_D#_40
Y9
H_D#_41
AA13
H_D#_42
AA9
H_D#_43
AA11
H_D#_44
AD11
H_D#_45
AD10
H_D#_46
AD13
H_D#_47
AE12
H_D#_48
AE9
H_D#_49
AA2
H_D#_50
AD8
H_D#_51
AA3
H_D#_52
AD3
H_D#_53
AD7
H_D#_54
AE14
H_D#_55
AF3
H_D#_56
AC1
H_D#_57
AE3
H_D#_58
AC3
H_D#_59
AE11
H_D#_60
AE8
H_D#_61
AG2
H_D#_62
AD6
H_D#_63
C5
H_SWING
E3
H_RCOMP
C12
H_CPURST#
E11
H_CPUSLP#
A11
H_AVREF
B11
H_DVREF
CANTIGA ES_FCBGA1329
CANTIGA ES_FCBGA1329
+VCCP
221_0603_1%
221_0603_1%
100_0402_1%
100_0402_1%
H_ADSTB#_0 H_ADSTB#_1
H_DEFER#
HPLL_CLK
HPLL_CLK#
HOST
HOST
12
R47
R47
+H_SWNG
12
1
C59
C59
R55
R55
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
H_DPWR#
H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3
H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3
H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3
H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4
H_D#[0..63]7
D D
C C
H_RESET#6
H_CPUSLP#7
B B
Layout note:
Route H_SCOMP and H_SCOMP# with trace width, spacing and impedance (55 ohm) same as FSB data traces
Layout Note: H_RCOMP / H_VREF / H_SWNG trace width and spacing is 10/20
+VCCP
12
R46
R46
1K_0402_1%
1K_0402_1%
A A
12
R52
2K_0402_1%
2K_0402_1%
R52
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+H_VREF
1
C58
C58
2
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
+H_SWNG H_RCOMP
H_RESET# H_CPUSLP#
+H_VREF
24.9_0402_1%
24.9_0402_1%
Near B3 pinwithin 100 mils from NB
5
4
H_A#3
A14
H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8
H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35
H_ADS#
H_BNR#
H_BPRI#
H_BREQ# H_DBSY#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK# H_TRDY#
H_RS#_0 H_RS#_1 H_RS#_2
H_A#4
C15
H_A#5
F16
H_A#6
H13
H_A#7
C18
H_A#8
M16
H_A#9
J13
H_A#10
P16
H_A#11
R16
H_A#12
N17
H_A#13
M13
H_A#14
E17
H_A#15
P17
H_A#16
F17
H_A#17
G20
H_A#18
B19
H_A#19
J16
H_A#20
E20
H_A#21
H16
H_A#22
J20
H_A#23
L17
H_A#24
A17
H_A#25
B17
H_A#26
L16
H_A#27
C21
H_A#28
J17
H_A#29
H20
H_A#30
B18
H_A#31
K17
H_A#32
B20
H_A#33
F21
H_A#34
K21
H_A#35
L20
H_ADS#
H12
H_ADSTB#0
B16
H_ADSTB#1
G17
H_BNR#
A9
H_BPRI#
F11
H_BR0#
G12
H_DEFER#
E9
H_DBSY#
B10
CLK_MCH_BCLK
AH7
CLK_MCH_BCLK#
AH6
H_DPWR#
J11
H_DRDY#
F9
H_HIT#
H9
H_HITM#
E12
H_LOCK#
H11
H_TRDY#
C9
H_DINV#0
J8
H_DINV#1
L3
H_DINV#2
Y13
H_DINV#3
Y1
H_DSTBN#0
L10
H_DSTBN#1
M7
H_DSTBN#2
AA5
H_DSTBN#3
AE6
H_DSTBP#0
L9
H_DSTBP#1
M8
H_DSTBP#2
AA6
H_DSTBP#3
AE5
H_REQ#0
B15
H_REQ#1
K13
H_REQ#2
F13
H_REQ#3
B13
H_REQ#4
B14
H_RS#0
B6
H_RS#1
F12
H_RS#2
C8
Layout Note: V_DDR_MCH_REF trace width and spacing is 20/20.
V_DDR_MCH_REF15,16
4
H_A#[3..35] 6
SMRCOMP_VOH
80% of 1.8V VCC_SM
20% of 1.8V VCC_SM
SMRCOMP_VOL
H_ADS# 6 H_ADSTB#0 6 H_ADSTB#1 6 H_BNR# 6 H_BPRI# 6 H_BR0# 6 H_DEFER# 6 H_DBSY# 6 CLK_MCH_BCLK 17 CLK_MCH_BCLK# 17 H_DPWR# 7 H_DRDY# 6 H_HIT# 6 H_HITM# 6 H_LOCK# 6 H_TRDY# 6
H_DINV#0 7 H_DINV#1 7 H_DINV#2 7 H_DINV#3 7
H_DSTBN#0 7 H_DSTBN#1 7 H_DSTBN#2 7 H_DSTBN#3 7
H_DSTBP#0 7 H_DSTBP#1 7 H_DSTBP#2 7 H_DSTBP#3 7
H_REQ#0 6 H_REQ#1 6 H_REQ#2 6 H_REQ#3 6 H_REQ#4 6
H_RS#0 6 H_RS#1 6 H_RS#2 6
PLT_RST#20,25,30,31,32
H_THERMTRIP#6,26
DPRSLPVR27,49
V_DDR_MCH_REF
1
C57
C57
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
3
T7T7 T8T8 T9T9
+1.8V
1
C51
C51
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
C53
C53
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
PLT_RST#
+1.8V
1
2
1
2
12
C52
C52
R31
R31 1K_0402_1%
1K_0402_1%
0.01U_0402_25V7K
0.01U_0402_25V7K
2
12
R32
R32
3.01K_0402_1%
3.01K_0402_1%
12
R33
R33
1
1K_0402_1%
1K_0402_1%
C54
C54
2
0.01U_0402_25V7K
0.01U_0402_25V7K
PM_EXTTS#0
PM_EXTTS#1
CLKREQ#_7
R41
R41 R42
R42
12
R45
R45 1K_0402_1%
1K_0402_1%
12
R48
R48 1K_0402_1%
1K_0402_1%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R38 10K_0402_5%
R38 10K_0402_5%
1 2
R39 10K_0402_5%R39 10K_0402_5%
1 2
R40 10K_0402_5%R40 10K_0402_5%
1 2
MCH_CLKSEL017 MCH_CLKSEL117 MCH_CLKSEL217
CFG511 CFG611 CFG711 CFG811
CFG911 CFG1011 CFG1111 CFG1211 CFG1311 CFG1411 CFG1511 CFG1611 CFG1711 CFG1811 CFG1911 CFG2011
PM_BMBUSY#27
H_DPRSTP#7,26,49 PM_EXTTS#015 PM_EXTTS#116 PM_PWROK27,38
1 2
100_0402_5%
100_0402_5%
1 2
0_0402_5%
0_0402_5%
3
T10T10 T11T11 T12T12 T13T13 T14T14 T15T15 T16T16 T17T17 T18T18 T19T19 T20T20
T21T21 T22T22 T23T23
T24T24
T25T25 T26T26 T27T27 T28T28
MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2
CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20
PM_BMBUSY# H_DPRSTP# PM_EXTTS#0 PM_EXTTS#1 PM_PWROK
THERMTRIP# DPRSLPVR
@
@
1
C55
C55
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
U2B
U2B
M36
RESERVED
N36
RESERVED
R33
RESERVED
T33
RESERVED
AH9
RESERVED
AH10
RESERVED
AH12
RESERVED
AH13
RESERVED
K12
RESERVED
AL34
RESERVED
AK34
RESERVED
AN35
RESERVED
AM35
RESERVED
T24
RESERVED
B31
RESERVED
B2
RESERVED
M1
RESERVED
AY21
RESERVED
BG23
RESERVED
BF23
RESERVED
BH18
RESERVED
BF18
RESERVED
+3VS
T25
CFG_0
R25
CFG_1
P25
CFG_2
P20
CFG_3
P24
CFG_4
C25
CFG_5
N24
CFG_6
M24
CFG_7
E21
CFG_8
C23
CFG_9
C24
CFG_10
N21
CFG_11
P21
CFG_12
T21
CFG_13
R20
CFG_14
M20
CFG_15
L21
CFG_16
H21
CFG_17
P29
CFG_18
R28
CFG_19
T28
CFG_20
R29
PM_SYNC#
B7
PM_DPRSTP#
N33
PM_EXT_TS#_0
P32
PM_EXT_TS#_1
AT40
PWROK
AT11
RSTIN#
T20
THERMTRIP#
R32
DPRSLPVR
BG48
NC
BF48
NC
BD48
NC
BC48
NC
BH47
NC
BG47
NC
BE47
NC
BH46
NC
BF46
NC
BG45
NC
BH44
NC
BH43
NC
BH6
NC
BH5
NC
BG4
NC
BH3
NC
BF3
NC
BH2
NC
BG2
NC
BE2
NC
BG1
NC
BF1
NC
BD1
NC
BC1
NC
F1
NC
A47
NC
CANTIGA ES_FCBGA1329
CANTIGA ES_FCBGA1329
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
RSVD
RSVD
CFG
CFG
PM
PM
NC
NC
2
SM_RCOMP
SM_RCOMP#
SM_RCOMP_VOH SM_RCOMP_VOL
SM_PWROK
SM_DRAMRST#
DDR CLK/ CONTROL/COMPENSATIONCLK
DDR CLK/ CONTROL/COMPENSATIONCLK
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3
DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3
DMI
DMI
GFX_VR_EN
GRAPHICS VIDMEHDA
GRAPHICS VIDMEHDA
CL_PWROK
DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
ICH_SYNC#
MISC
MISC
SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1
SA_CK#_0 SA_CK#_1 SB_CK#_0 SB_CK#_1
SA_CKE_0 SA_CKE_1 SB_CKE_0 SB_CKE_1
SA_CS#_0 SA_CS#_1 SB_CS#_0 SB_CS#_1
SA_ODT_0 SA_ODT_1 SB_ODT_0 SB_ODT_1
SM_VREF
SM_REXT
PEG_CLK
PEG_CLK#
DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3
DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3
GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4
CL_CLK
CL_DATA
CL_RST#
CL_VREF
CLKREQ#
TSATN#
HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC
1
M_CLK_DDR0
AP24
M_CLK_DDR1
AT21
M_CLK_DDR2
AV24
M_CLK_DDR3
AU20
M_CLK_DDR#0
AR24
M_CLK_DDR#1
AR21
M_CLK_DDR#2
AU24
M_CLK_DDR#3
AV20
DDR_CKE0_DIMMA
BC28
DDR_CKE1_DIMMA
AY28
DDR_CKE2_DIMMB
AY36
DDR_CKE3_DIMMB
BB36
DDR_CS0_DIMMA#
BA17
DDR_CS1_DIMMA#
AY16
DDR_CS2_DIMMB#
AV16
DDR_CS3_DIMMB#
AR13
M_ODT0
BD17
M_ODT1
AY17
M_ODT2
BF15
M_ODT3
AY13
SMRCOMP
BG22
SMRCOMP#
BH21
SMRCOMP_VOH
BF28
SMRCOMP_VOL
BH28
V_DDR_MCH_REF
AV42
SM_PWROK
AR36
SM_REXT
BF17
TP_SM_DRAMRST#
BC36 B38
A38 E41 F41
CLK_MCH_3GPLL
F43
CLK_MCH_3GPLL#
E43
DMI_TXN0
AE41
DMI_TXN1
AE37
DMI_TXN2
AE47
DMI_TXN3
AH39
DMI_TXP0
AE40
DMI_TXP1
AE38
DMI_TXP2
AE48
DMI_TXP3
AH40
DMI_RXN0
AE35
DMI_RXN1
AE43
DMI_RXN2
AE46
DMI_RXN3
AH42
DMI_RXP0
AD35
DMI_RXP1
AE44
DMI_RXP2
AF46
DMI_RXP3
AH43
B33 B32 G33 F33 E33
C34
CL_CLK0
AH37
CL_DATA0
AH36
M_PWROK
AN36
CL_RST#
AJ35
+CL_VREF
AH34
0621 add CLK and DAT for DVI
N28 M28 G36 E36
CLKREQ#_7
K36
MCH_ICH_SYNC#
H36
TSATN#
B12
B28 B30 B29 C29 A28
Title
Title
Title
Cantiga(1/6)-AGTL/DMI/DDR
Cantiga(1/6)-AGTL/DMI/DDR
Cantiga(1/6)-AGTL/DMI/DDR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
Date: Sheet of
Date: Sheet of
Date: Sheet of
M_CLK_DDR0 15 M_CLK_DDR1 15 M_CLK_DDR2 16 M_CLK_DDR3 16
M_CLK_DDR#0 15 M_CLK_DDR#1 15 M_CLK_DDR#2 16 M_CLK_DDR#3 16
DDR_CKE0_DIMMA 15 DDR_CKE1_DIMMA 15 DDR_CKE2_DIMMB 16 DDR_CKE3_DIMMB 16
DDR_CS0_DIMMA# 15 DDR_CS1_DIMMA# 15 DDR_CS2_DIMMB# 16 DDR_CS3_DIMMB# 16
M_ODT0 15 M_ODT1 15 M_ODT2 16 M_ODT3 16
R34 80.6_0402_1%
R34 80.6_0402_1%
1 2
R35 80.6_0402_1%R35 80.6_0402_1%
1 2
Follow Design Guide For Cantiga: 80.6ohm
R36 0_0402_5%R36 0_0402_5%
1 2
R37 499_0402_1%R37 499_0402_1%
1 2
T29 PADT29 PAD
CLK_MCH_3GPLL 17 CLK_MCH_3GPLL# 17
DMI_TXN0 27 DMI_TXN1 27 DMI_TXN2 27 DMI_TXN3 27
DMI_TXP0 27 DMI_TXP1 27 DMI_TXP2 27 DMI_TXP3 27
DMI_RXN0 27 DMI_RXN1 27 DMI_RXN2 27 DMI_RXN3 27
DMI_RXP0 27 DMI_RXP1 27 DMI_RXP2 27 DMI_RXP3 27
T30T30 T31T31 T32T32 T33T33 T34T34
T35T35
CL_CLK0 27 CL_DATA0 27 M_PWROK 27,38 CL_RST# 27
0.1U_0402_16V4Z
0.1U_0402_16V4Z
T36T36 T37T37
CLKREQ#_7 17 MCH_ICH_SYNC# 27
TSATN# 38
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
1
C56
C56
2
1
+VCCP
*R37*Follow Intel feedback
9 51Monday, October 08, 2007
9 51Monday, October 08, 2007
9 51Monday, October 08, 2007
+1.8V
12
R43
R43 1K_0402_1%
1K_0402_1%
12
R44
R44 499_0402_1%
499_0402_1%
0.1
0.1
0.1
5
D D
DDR_A_D[0..63]15
C C
B B
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
U2D
U2D
AJ38
SA_DQ_0
AJ41
SA_DQ_1
AN38
SA_DQ_2
AM38
SA_DQ_3
AJ36
SA_DQ_4
AJ40
SA_DQ_5
AM44
SA_DQ_6
AM42
SA_DQ_7
AN43
SA_DQ_8
AN44
SA_DQ_9
AU40
SA_DQ_10
AT38
SA_DQ_11
AN41
SA_DQ_12
AN39
SA_DQ_13
AU44
SA_DQ_14
AU42
SA_DQ_15
AV39
SA_DQ_16
AY44
SA_DQ_17
BA40
SA_DQ_18
BD43
SA_DQ_19
AV41
SA_DQ_20
AY43
SA_DQ_21
BB41
SA_DQ_22
BC40
SA_DQ_23
AY37
SA_DQ_24
BD38
SA_DQ_25
AV37
SA_DQ_26
AT36
SA_DQ_27
AY38
SA_DQ_28
BB38
SA_DQ_29
AV36
SA_DQ_30
AW36
SA_DQ_31
BD13
SA_DQ_32
AU11
SA_DQ_33
BC11
SA_DQ_34
BA12
SA_DQ_35
AU13
SA_DQ_36
AV13
SA_DQ_37
BD12
SA_DQ_38
BC12
SA_DQ_39
BB9
SA_DQ_40
BA9
SA_DQ_41
AU10
SA_DQ_42
AV9
SA_DQ_43
BA11
SA_DQ_44
BD9
SA_DQ_45
AY8
SA_DQ_46
BA6
SA_DQ_47
AV5
SA_DQ_48
AV7
SA_DQ_49
AT9
SA_DQ_50
AN8
SA_DQ_51
AU5
SA_DQ_52
AU6
SA_DQ_53
AT5
SA_DQ_54
AN10
SA_DQ_55
AM11
SA_DQ_56
AM5
SA_DQ_57
AJ9
SA_DQ_58
AJ8
SA_DQ_59
AN12
SA_DQ_60
AM13
SA_DQ_61
AJ11
SA_DQ_62
AJ12
SA_DQ_63
CANTIGA ES_FCBGA1329
CANTIGA ES_FCBGA1329
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_BS_0 SA_BS_1 SA_BS_2
SA_RAS# SA_CAS#
SA_WE#
SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7
SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6
SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7
SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8
SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14
4
DDR_A_BS0
BD21 BG18 AT25
BB20 BD20 AY20
AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5
AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7 AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8
BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25
DDR_A_BS1 DDR_A_BS2
DDR_A_RAS# DDR_A_CAS# DDR_A_WE#
DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14
DDR_A_BS0 15 DDR_A_BS1 15 DDR_A_BS2 15
DDR_A_RAS# 15 DDR_A_CAS# 15 DDR_A_WE# 15
DDR_A_DM[0..7] 15
DDR_A_DQS[0..7] 15
DDR_A_DQS#[0..7] 15
DDR_A_MA[0..14] 15
3
DDR_B_D[0..63]16
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
U2E
U2E
AK47 AH46 AP47 AP46
AJ46
AJ48 AM48 AP48 AU47 AU46 BA48 AY48
AT47 AR47 BA47 BC47 BC46 BC44 BG43
BF43 BE45 BC41
BF40
BF41 BG38
BF38 BH35 BG35 BH40 BG39 BG34 BH34 BH14 BG12 BH11
BG8
BH12
BF11
BF8 BG7 BC5 BC6 AY3 AY1 BF6 BF5 BA1 BD3 AV2 AU3 AR3 AN2 AY2 AV1 AP3 AR1
AL1 AL2
AJ1 AH1 AM2 AM3 AH3
AJ3
CANTIGA ES_FCBGA1329
CANTIGA ES_FCBGA1329
SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63
2
DDR_B_BS0
BC16
SB_BS_0 SB_BS_1 SB_BS_2
SB_RAS# SB_CAS#
SB_WE#
SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7
SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6
SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7
SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8
SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
BB17 BB33
AU17 BG16 BF14
AM47 AY47 BD40 BF35 BG11 BA3 AP1 AK2
AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6 AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5
AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33
DDR_B_BS1 DDR_B_BS2
DDR_B_RAS# DDR_B_CAS# DDR_B_WE#
DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7 DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14
1
DDR_B_BS0 16 DDR_B_BS1 16 DDR_B_BS2 16
DDR_B_RAS# 16 DDR_B_CAS# 16 DDR_B_WE# 16
DDR_B_DM[0..7] 16
DDR_B_DQS[0..7] 16
DDR_B_DQS#[0..7] 16
DDR_B_MA[0..14] 16
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Cantiga(2/6)-DDR2 A/B CH
Cantiga(2/6)-DDR2 A/B CH
Cantiga(2/6)-DDR2 A/B CH
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
1
0.1
0.1
10 51Friday, October 05, 2007
10 51Friday, October 05, 2007
10 51Friday, October 05, 2007
0.1
5
hexainf@hotmail.com
D D
C C
B B
4
U2C
U2C
L32
L_BKLT_CTRL
G32
L_BKLT_EN
M32
L_CTRL_CLK
M33
L_CTRL_DATA
K33
L_DDC_CLK
J33
L_DDC_DATA
M29
L_VDD_EN
C44
LVDS_IBG
B43
LVDS_VBG
E37
LVDS_VREFH
E38
LVDS_VREFL
C41
LVDSA_CLK#
C40
LVDSA_CLK
B37
LVDSB_CLK#
A37
LVDSB_CLK
H47
LVDSA_DATA#_0
E46
LVDSA_DATA#_1
G40
LVDSA_DATA#_2
A40
LVDSA_DATA#_3
H48
LVDSA_DATA_0
D45
LVDSA_DATA_1
F40
LVDSA_DATA_2
B40
LVDSA_DATA_3
A41
LVDSB_DATA#_0
H38
LVDSB_DATA#_1
G37
LVDSB_DATA#_2
J37
LVDSB_DATA#_3
B42
LVDSB_DATA_0
G38
LVDSB_DATA_1
F37
LVDSB_DATA_2
K37
LVDSB_DATA_3
F25
TVA_DAC
H25
TVB_DAC
K25
TVC_DAC
H24
TV_RTN
C31
TV_DCONSEL_0
E32
TV_DCONSEL_1
E28
CRT_BLUE
G28
CRT_GREEN
J28
CRT_RED
G29
CRT_IRTN
H32
CRT_DDC_CLK
J32
CRT_DDC_DATA
J29
CRT_HSYNC
E29
CRT_TVO_IREF
L29
CRT_VSYNC
CANTIGA ES_FCBGA1329
CANTIGA ES_FCBGA1329
3
2
1
Strap Pin Table
PEGCOMP trace width and spacing is 20/25 mils.
PEG_RXN0 20 PEG_RXN1 20 PEG_RXN2 20 PEG_RXN3 20 PEG_RXN4 20 PEG_RXN5 20 PEG_RXN6 20 PEG_RXN7 20 PEG_RXN8 20 PEG_RXN9 20 PEG_RXN10 20 PEG_RXN11 20 PEG_RXN12 20 PEG_RXN13 20 PEG_RXN14 20 PEG_RXN15 20
PEG_RXP0 20 PEG_RXP1 20 PEG_RXP2 20 PEG_RXP3 20 PEG_RXP4 20 PEG_RXP5 20 PEG_RXP6 20 PEG_RXP7 20 PEG_RXP8 20 PEG_RXP9 20 PEG_RXP10 20 PEG_RXP11 20 PEG_RXP12 20 PEG_RXP13 20 PEG_RXP14 20 PEG_RXP15 20
PEG_M_TXN0 20 PEG_M_TXN1 20 PEG_M_TXN2 20 PEG_M_TXN3 20 PEG_M_TXN4 20 PEG_M_TXN5 20 PEG_M_TXN6 20 PEG_M_TXN7 20 PEG_M_TXN8 20 PEG_M_TXN9 20 PEG_M_TXN10 20 PEG_M_TXN11 20 PEG_M_TXN12 20 PEG_M_TXN13 20 PEG_M_TXN14 20 PEG_M_TXN15 20
PEG_M_TXP0 20 PEG_M_TXP1 20 PEG_M_TXP2 20 PEG_M_TXP3 20 PEG_M_TXP4 20 PEG_M_TXP5 20 PEG_M_TXP6 20 PEG_M_TXP7 20 PEG_M_TXP8 20 PEG_M_TXP9 20 PEG_M_TXP10 20 PEG_M_TXP11 20 PEG_M_TXP12 20 PEG_M_TXP13 20 PEG_M_TXP14 20 PEG_M_TXP15 20
CFG[2:0] FSB Freq select
CFG[4:3] CFG5 (DMI select)
CFG6
(Intel Management
CFG7
Engine Crypto strap)
CFG8
CFG9 (PCIE Graphics
Lane Reversal)
CFG10
(PCIE Lookback enable)
CFG11
CFG[13:12] (XOR/ALLZ)
CFG[15:14]
CFG16 (FSB Dynamic ODT)
CFG[18:17]
CFG19 (DMI Lane Reversal)
(PCIE/SDVO
CFG20
concurrent)
+3VS
R71
R71
4.02K_0402_1%
4.02K_0402_1%
CFG59
CFG5
@
@
R74
R74
2.21K_0402_1%
2.21K_0402_1%
12
12
000 = FSB 1066MHz 010 = FSB 800MHz 011 = FSB 667MHz Others = Reserved
Reserved 0 = DMI x 2
1 = DMI x 4 0 = The iTPM Host Interface is enable
*
1 = The iTPM Host Interface is disable 0 =(TLS)chiper suite with no confidentiality 1 =(TLS)chiper suite with confidentiality
Reserved
0 = Reverse Lane,15->0, 14->1 1 = Normal Operation,Lane Number in
order 0 = Enable
1 = Disable Reserved 00 = Reserved
01 = XOR Mode Enabled 10 = All Z Mode Enabled
*
(Default)11 = Normal Operation
*
Reserved
0 = Disabled 1 = Enabled
*
Reserved
0 = Normal Operation
(Lane number in Order)
*
1 = Reverse Lane
0 = Only PCIE or SDVO is operational. 1 = PCIE/SDVO are operating simu.
R72
R72
@ R73
@
@R75
@
R73
R75
1 2
4.02K_0402_1%
4.02K_0402_1%
1 2
4.02K_0402_1%
4.02K_0402_1%
1 2
4.02K_0402_1%
4.02K_0402_1%
CFG169
CFG199
CFG209
*
*
*
*
+3VS
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
+VCC_PEG
R57
R57
PEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7 PEG_RXN8 PEG_RXN9 PEG_RXN10 PEG_RXN11 PEG_RXN12 PEG_RXN13 PEG_RXN14 PEG_RXN15
PEG_RXP0 PEG_RXP1 PEG_RXP2 PEG_RXP3 PEG_RXP4 PEG_RXP5 PEG_RXP6 PEG_RXP7 PEG_RXP8 PEG_RXP9 PEG_RXP10 PEG_RXP11 PEG_RXP12 PEG_RXP13 PEG_RXP14 PEG_RXP15
PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8 PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15
PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8 PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15
1 2
49.9_0402_1%
49.9_0402_1%
C1289 0.1U_0402_16V4ZC1289 0.1U_0402_16V4Z C1290 0.1U_0402_16V4ZC1290 0.1U_0402_16V4Z C1291 0.1U_0402_16V4ZC1291 0.1U_0402_16V4Z C1292 0.1U_0402_16V4ZC1292 0.1U_0402_16V4Z C1293 0.1U_0402_16V4ZC1293 0.1U_0402_16V4Z C1294 0.1U_0402_16V4ZC1294 0.1U_0402_16V4Z C1295 0.1U_0402_16V4ZC1295 0.1U_0402_16V4Z C1296 0.1U_0402_16V4ZC1296 0.1U_0402_16V4Z C1297 0.1U_0402_16V4ZC1297 0.1U_0402_16V4Z C1298 0.1U_0402_16V4ZC1298 0.1U_0402_16V4Z C1299 0.1U_0402_16V4ZC1299 0.1U_0402_16V4Z C1300 0.1U_0402_16V4ZC1300 0.1U_0402_16V4Z C1301 0.1U_0402_16V4ZC1301 0.1U_0402_16V4Z C1302 0.1U_0402_16V4ZC1302 0.1U_0402_16V4Z C1303 0.1U_0402_16V4ZC1303 0.1U_0402_16V4Z C1304 0.1U_0402_16V4ZC1304 0.1U_0402_16V4Z
C1305 0.1U_0402_16V4ZC1305 0.1U_0402_16V4Z C1306 0.1U_0402_16V4ZC1306 0.1U_0402_16V4Z C1307 0.1U_0402_16V4ZC1307 0.1U_0402_16V4Z C1308 0.1U_0402_16V4ZC1308 0.1U_0402_16V4Z C1309 0.1U_0402_16V4ZC1309 0.1U_0402_16V4Z C1310 0.1U_0402_16V4ZC1310 0.1U_0402_16V4Z C1311 0.1U_0402_16V4ZC1311 0.1U_0402_16V4Z C1312 0.1U_0402_16V4ZC1312 0.1U_0402_16V4Z C1313 0.1U_0402_16V4ZC1313 0.1U_0402_16V4Z C1314 0.1U_0402_16V4ZC1314 0.1U_0402_16V4Z C1315 0.1U_0402_16V4ZC1315 0.1U_0402_16V4Z C1316 0.1U_0402_16V4ZC1316 0.1U_0402_16V4Z C1317 0.1U_0402_16V4ZC1317 0.1U_0402_16V4Z C1318 0.1U_0402_16V4ZC1318 0.1U_0402_16V4Z C1319 0.1U_0402_16V4ZC1319 0.1U_0402_16V4Z C1320 0.1U_0402_16V4ZC1320 0.1U_0402_16V4Z
T37
PEG_COMPI
PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8
PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15
PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8
PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15
PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9
PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15
PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8
PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15
T36
H44 J46 L44 L40 N41 P48 N44 T43 U43 Y43 Y48 Y36 AA43 AD37 AC47 AD39
H43 J44 L43 L41 N40 P47 N43 T42 U42 Y42 W47 Y37 AA42 AD36 AC48 AD40
J41 M46 M47 M40 M42 R48 N38 T40 U37 U40 Y40 AA46 AA37 AA40 AD43 AC46
J42 L46 M48 M39 M43 R47 N37 T39 U36 U39 Y39 Y46 AA36 AA39 AD42 AD46
PEG_COMPO
LVDS
LVDS
TV VGA
TV VGA
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
R76
@R76
@
@R80
@
@R82
@
@R85
@
@R87
@
R77
R77
R78
R78
R80
R82
R85
R87
1 2
2.21K_0402_1%
2.21K_0402_1%
1 2
2.21K_0402_1%
2.21K_0402_1%
1 2
2.21K_0402_1%
2.21K_0402_1%
1 2
2.21K_0402_1%
2.21K_0402_1%
1 2
2.21K_0402_1%
2.21K_0402_1%
1 2
2.21K_0402_1%
2.21K_0402_1%
1 2
2.21K_0402_1%
2.21K_0402_1%
11 51Monday, October 08, 2007
11 51Monday, October 08, 2007
11 51Monday, October 08, 2007
0.1
0.1
0.1
CFG119
CFG129
R79
@R79
@
CFG69
CFG79
CFG89
CFG99
A A
5
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
CFG109
2
1 2
2.21K_0402_1%
2.21K_0402_1%
R81
R81
1 2
2.21K_0402_1%
2.21K_0402_1%
R83
@R83
@
1 2
2.21K_0402_1%
2.21K_0402_1%
R84
@R84
@
1 2
2.21K_0402_1%
2.21K_0402_1%
R86
@R86
@
1 2
2.21K_0402_1%
2.21K_0402_1%
Title
Title
Title
Cantiga(3/6)-VGA/LVDS/TV
Cantiga(3/6)-VGA/LVDS/TV
Cantiga(3/6)-VGA/LVDS/TV
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
Date: Sheet of
Date: Sheet of
Date: Sheet of
CFG139
CFG149
CFG159
CFG179
CFG189
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
1
5
4
3
2
1
U2H
U2H
73mA
B27
VCCA_CRT_DAC
A26
VCCA_CRT_DAC
2.68mA
A25
VCCA_DAC_BG
B25
D D
+1.05VS_HPLL +1.05VS_MPLL
R96
@ R96
@
1 2
+3VS
0_0603_5%
0_0603_5%
R97
R97
1 2
+1.5VS
0_0603_5%
0_0603_5%
+VCCP
C C
220U_D2_4VM
220U_D2_4VM
R103
R103
1 2
1U_0603_10V4Z
1U_0603_10V4Z
B B
C94
C94
0_0603_5%
0_0603_5%
1
2
C102
C102
+
+
R100
R100
1 2
0_0805_5%
0_0805_5%
<BOM Structure>
<BOM Structure>
1
C89
C89
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
2
+1.5VS_PEG_BG
10U_0805_10V4Z
10U_0805_10V4Z
C95
C95
1
2
+1.05VS_A_SM_CK
10U_0805_10V4Z
10U_0805_10V4Z
C103
C103
1
2
+1.05VS_A_SM
C96
C96
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1U_0603_10V4Z
1U_0603_10V4Z
C104
C104
1
2
+1.05VS_PEGPLL
1
2
1U_0603_10V4Z
1U_0603_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C105
C105
1
2
+1.5VS
+1.5VS_TVDAC
+1.05VS_HPLL
+1.05VS_PEGPLL
1
C97
C97
2
VSSA_DAC_BG
F47
VCCA_DPLLA
L48
VCCA_DPLLB
AD1
VCCA_HPLL
AE1
VCCA_MPLL
13.2mA
J48
VCCA_LVDS
J47
VSSA_LVDS
414uA
AD48
VCCA_PEG_BG
50mA
AA48
VCCA_PEG_PLL
AR20
VCCA_SM
AP20
VCCA_SM
AN20
VCCA_SM
AR17
VCCA_SM
AP17
VCCA_SM
AN17
VCCA_SM
AT16
VCCA_SM
AR16
VCCA_SM
AP16
VCCA_SM
AP28
VCCA_SM_CK
AN28
VCCA_SM_CK
AP25
VCCA_SM_CK
AN25
VCCA_SM_CK
AN24
VCCA_SM_CK
AM28
VCCA_SM_CK_NCTF
AM26
VCCA_SM_CK_NCTF
AM25
VCCA_SM_CK_NCTF
AL25
VCCA_SM_CK_NCTF
AM24
VCCA_SM_CK_NCTF
AL24
VCCA_SM_CK_NCTF
AM23
VCCA_SM_CK_NCTF
AL23
VCCA_SM_CK_NCTF
B24
VCCA_TV_DAC
A24
VCCA_TV_DAC
A32
VCC_HDA
M25
VCCD_TVDAC
L28
VCCD_QDAC
AF1
VCCD_HPLL
AA47
VCCD_PEG_PLL
M38
VCCD_LVDS
L37
VCCD_LVDS
60.31mA
CANTIGA ES_FCBGA1329
CANTIGA ES_FCBGA1329
64.8mA
64.8mA 24mA
139.2mA
720mA
26mA 26mA
TVA 24.15mA TVB 39.48mA TVX 24.15mA
50mA
58.67mA
48.363mA
157.2mA 50mA
CRTPLLA PEGA SMTV
CRTPLLA PEGA SMTV
A LVDSHDA
A LVDSHDA
POWER
POWER
A CK
A CK
105.3mA
1732mA
D TV/CRT
D TV/CRT
LVDS
LVDS
852mA
AXF
AXF
SM CK
SM CK
118.8mA
VCC_TX_LVDS
HV
HV
PEG
PEG
DMI
DMI
456mA
VTT
VTT
321.35mA
VCC_AXF VCC_AXF VCC_AXF
124mA
VCC_SM_CK VCC_SM_CK VCC_SM_CK VCC_SM_CK
VCC_HV VCC_HV VCC_HV
VCC_PEG VCC_PEG VCC_PEG VCC_PEG VCC_PEG
VCC_DMI VCC_DMI VCC_DMI VCC_DMI
VTTLF VTTLF VTTLF
VTTLF
VTTLF
+VCCP
U13
VTT
T13
VTT
U12
VTT
T12
VTT
U11
VTT
T11
VTT
U10
VTT
T10
VTT
U9
VTT
T9
VTT
U8
VTT
T8
VTT
U7
VTT
T7
VTT
U6
VTT
T6
VTT
U5
VTT
T5
VTT
V3
VTT
U3
VTT
V2
VTT
U2
VTT
T2
VTT
V1
VTT
U1
VTT
B22 B21 A21
BF21 BH20 BG20 BF20
K47 C35
B35 A35
V48 U48 V47 U47 U46
AH48 AF48 AH47 AG47
A8 L1 AB2
0.47U_0603_10V7K
0.47U_0603_10V7K
C110
C110
C111
C111
1
2
1
C71
C71
+
+
2
1
C80
C80
2
+V1.05VS_AXF
+1.8V_SM_CK
+VCC_PEG
+1.05VS_DMI
0.47U_0603_10V7K
0.47U_0603_10V7K C112
C112
1
2
220U_D2_4VM
220U_D2_4VM
4.7U_0805_10V4Z
4.7U_0805_10V4Z
C72
C72
1
2
0.47U_0603_10V7K
0.47U_0603_10V7K
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
1
1
C81
C81
C82
C82
2
2
+1.05VS_HPLL
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C90
C90
1
2
+1.05VS_MPLL
1
C99
C99
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VS_HV
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C107
C107
1
2
0.47U_0603_10V7K
0.47U_0603_10V7K
1
2
2
+1.05VS_PEGPLL
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C106
C106
10U_0805_10V4Z
10U_0805_10V4Z
C91
C91
1
2
1
2
10U_0805_10V4Z
10U_0805_10V4Z
1
2
R98
R98
1 2
MBK2012121YZF_0805
MBK2012121YZF_0805
R101
R101
1 2
MBK2012121YZF_0805
MBK2012121YZF_0805
C100
C100 10U_0805_10V4Z
10U_0805_10V4Z
L1
L1
1 2
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
C108
C108
+VCCP
+3VS
+VCCP
+VCCP
+VCCP
+VCCP_D
D3
D3
2 1
CH751H-40PT_SOD323-2
CH751H-40PT_SOD323-2
@
@
C83
C83
R105
R105
1 2
10_0402_5%
10_0402_5%
+V1.05VS_AXF
+1.8V_SM_CK
10U_0805_10V4Z
10U_0805_10V4Z
1
2
+1.5VS_TVDAC
+VCC_PEG
C98
C98
+1.05VS_DMI
10U_0805_10V4Z
10U_0805_10V4Z
1
2
C84
C84
1
2
1
C92
C92
2
1
2
1
2
R106
R106
1 2
0_0402_5%
0_0402_5%
1U_0603_10V4Z
1U_0603_10V4Z
C79
C79
C78
C78
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0805_10V4Z
10U_0805_10V4Z
C85
C85
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.022U_0402_16V7K
0.022U_0402_16V7K
1
C93
C93
2
1 2
10U_0805_10V4Z
10U_0805_10V4Z
220U_D2_4VM
220U_D2_4VM
C101
C101
1
+
+
2
+VCCP
R104
R104
1 2
0_0603_5%
0_0603_5%
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C109
C109
+3VS_HV
R93
R93
1 2
0_0603_5%
0_0603_5%
R95
R95
1 2
0_0805_5%
0_0805_5%
R99
R99
1 2
0_0805_5%
0_0805_5%
R102
R102
0_0805_5%
0_0805_5%
+VCCP
+VCCP
+1.8V
+1.5VS
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Cantiga(4/6)-PWR
Cantiga(4/6)-PWR
Cantiga(4/6)-PWR
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
1
0.1
0.1
12 51Friday, October 05, 2007
12 51Friday, October 05, 2007
12 51Friday, October 05, 2007
0.1
5
hexainf@hotmail.com
Extnal Graphic: 1210.34mA integrated Graphic: 1930.4mA
U2F
+VCCP
D D
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.22U_0402_10V4Z
0.22U_0402_10V4Z
0.22U_0402_10V4Z
220U_D2_4VM
220U_D2_4VM
C C
B B
0.22U_0402_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
1
C131
C131
+
+
2
C132
C132
C124
C124
1
1
2
2
C125
C125
C133
C133
1
1
2
2
U2F
AG34
VCC
AC34
VCC
AB34
VCC
AA34
VCC
Y34
VCC
V34
VCC
U34
VCC
AM33
VCC
AK33
VCC
AJ33
VCC
AG33
VCC
AF33
VCC
AE33
VCC
AC33
VCC
AA33
VCC
Y33
VCC
W33
VCC
V33
VCC
U33
VCC
AH28
VCC
AF28
VCC
AC28
VCC
AA28
VCC
AJ26
VCC
AG26
VCC
AE26
VCC
AC26
VCC
AH25
VCC
AG25
VCC
AF25
VCC
AG24
VCC
AJ23
VCC
AH23
VCC
AF23
VCC
T32
VCC
CANTIGA ES_FCBGA1329
CANTIGA ES_FCBGA1329
4
VCC CORE
VCC CORE
+VCCP
AM32
VCC_NCTF
AL32
VCC_NCTF
AK32
VCC_NCTF
AJ32
VCC_NCTF
AH32
VCC_NCTF
AG32
VCC_NCTF
AE32
VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF
AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23
POWER
POWER
VCC NCTF
VCC NCTF
+1.8V
3
U2G
U2G
AP33
VCC_SM
AN33
VCC_SM
BH32
VCC_SM
330U_D2E_2.5VM_R7
330U_D2E_2.5VM_R7
1
+
+
2
10U_0805_10V4Z
10U_0805_10V4Z
C126
C126
C122
C122
1
2
0317 change value
0.01U_0402_16V7K
0.01U_0402_16V7K
10U_0805_10V4Z
10U_0805_10V4Z
C130
C130
2
1
1
2
T42PAD T42PAD T43PAD T43PAD
BG32
VCC_SM
BF32
VCC_SM
BD32
VCC_SM
BC32
C123
C123
BB32 BA32 AY32
AW32
AV32 AU32 AT32 AR32 AP32 AN32 BH31 BG31 BF31 BG30 BH29 BG29 BF29 BD29 BC29 BB29 BA29 AY29
AW29
AV29 AU29 AT29 AR29 AP29
BA36 BB24 BD16
BB21 AW16 AW13
AT13
AE25
AB25
AA25
AE24
AC24
AA24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21
AH20
AF20
AE20
AC20
AB20
AA20
AM15
AL15
AE15
AJ15
AH15
AG15
AF15
AB15
AA15
AN14
AM14
AJ14
AH14
Y26
Y24
Y21
T17 T16
Y15 V15 U15
U14
T14
VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM
VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC
6326.84mA
VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG
VCC_AXG_SENSE VSS_AXG_SENSE
3000mA
2
VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF
W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16
AV44 BA37 AM40 AV21 AY5 AM10 BB13
VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7
1
2
VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF
POWER
POWER
VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF
VCC GFX NCTF
VCC GFX NCTF
VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF
VCC SM LF
VCC SM LF
VCC SMVCC GFX
VCC SMVCC GFX
1
C143 0.47U_0402_6.3V6KC143 0.47U_0402_6.3V6K
C140 0.1U_0402_16V4ZC140 0.1U_0402_16V4Z
C141 0.22U_0603_10V7KC141 0.22U_0603_10V7K
C139 0.1U_0402_16V4ZC139 0.1U_0402_16V4Z
1
2
C142 0.22U_0603_10V7KC142 0.22U_0603_10V7K
1
1
1
2
2
2
C145 1U_0603_10V4ZC145 1U_0603_10V4Z
C144 1U_0603_10V4ZC144 1U_0603_10V4Z
1
1
2
2
A A
CANTIGA ES_FCBGA1329
CANTIGA ES_FCBGA1329
5
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Cantiga(5/6)-PWR/GND
Cantiga(5/6)-PWR/GND
Cantiga(5/6)-PWR/GND
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
1
0.1
0.1
13 51Monday, October 08, 2007
13 51Monday, October 08, 2007
13 51Monday, October 08, 2007
0.1
5
U2I
U2I
AU48
VSS
AR48
VSS
AL48
VSS
BB47
VSS
AW47
VSS
AN47
VSS
AJ47
VSS
AF47
D D
C C
B B
A A
VSS
AD47
VSS
AB47
VSS
Y47
VSS
T47
VSS
N47
VSS
L47
VSS
G47
VSS
BD46
VSS
BA46
VSS
AY46
VSS
AV46
VSS
AR46
VSS
AM46
VSS
V46
VSS
R46
VSS
P46
VSS
H46
VSS
F46
VSS
BF44
VSS
AH44
VSS
AD44
VSS
AA44
VSS
Y44
VSS
U44
VSS
T44
VSS
M44
VSS
F44
VSS
BC43
VSS
AV43
VSS
AU43
VSS
AM43
VSS
J43
VSS
C43
VSS
BG42
VSS
AY42
VSS
AT42
VSS
AN42
VSS
AJ42
VSS
AE42
VSS
N42
VSS
L42
VSS
BD41
VSS
AU41
VSS
AM41
VSS
AH41
VSS
AD41
VSS
AA41
VSS
Y41
VSS
U41
VSS
T41
VSS
M41
VSS
G41
VSS
B41
VSS
BG40
VSS
BB40
VSS
AV40
VSS
AN40
VSS
H40
VSS
E40
VSS
AT39
VSS
AM39
VSS
AJ39
VSS
AE39
VSS
N39
VSS
L39
VSS
B39
VSS
BH38
VSS
BC38
VSS
BA38
VSS
AU38
VSS
AH38
VSS
AD38
VSS
AA38
VSS
Y38
VSS
U38
VSS
T38
VSS
J38
VSS
F38
VSS
C38
VSS
BF37
VSS
BB37
VSS
AW37
VSS
AT37
VSS
AN37
VSS
AJ37
VSS
H37
VSS
C37
VSS
BG36
VSS
BD36
VSS
AK15
VSS
AU36
VSS
CANTIGA ES_FCBGA1329
CANTIGA ES_FCBGA1329
VSS
VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
4
AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6
3
U2J
U2J
BG21
VSS
L12
VSS
AW21
VSS
AU21
VSS
AP21
VSS
AN21
VSS
AH21
VSS
AF21
VSS
AB21
VSS
R21
VSS
M21
VSS
J21
VSS
G21
VSS
BC20
VSS
BA20
VSS
AW20
VSS
AT20
VSS
AJ20
VSS
AG20
VSS
Y20
VSS
N20
VSS
K20
VSS
F20
VSS
C20
VSS
A20
VSS
BG19
VSS
A18
VSS
BG17
VSS
BC17
VSS
AW17
VSS
AT17
VSS
BA16 AU16
AN16
BG15 AC15
W15
BG14 AA14
BG13 BC13 BA13
AN13
AJ13
AE13
BF12
AV12
AT12 AM12 AA12
BD11 BB11 AY11 AN11 AH11
BG10 AV10
AT10
AJ10 AE10 AA10
R17 M17 H17 C17
N16 K16 G16 E16
A15
C14
N13 G13
E13
A12
Y11 N11 G11 C11
M10 BF9 BC9 AN9 AM9 AD9
BH8 BB8 AV8 AT8
L13
J12
G9 B9
VSS
VSS
VSS VSS VSS VSS
VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
CANTIGA ES_FCBGA1329
CANTIGA ES_FCBGA1329
VSS SCB
VSS SCB
2
AH8
VSS
Y8
VSS
L8
VSS
E8
VSS
B8
VSS
AY7
VSS
AU7
VSS
AN7
VSS
AJ7
VSS
AE7
VSS
AA7
VSS
N7
VSS
J7
VSS
BG6
VSS
BD6
VSS
AV6
VSS
AT6
VSS
AM6
VSS
M6
VSS
C6
VSS
BA5
VSS
AH5
VSS
AD5
VSS
Y5
VSS
L5
VSS
J5
VSS
H5
VSS
F5
VSS
BE4
VSS
BC3
VSS
AV3
VSS
AL3
VSS
R3
VSS
P3
VSS
F3
VSS
BA2
VSS
AW2
VSS
AU2
VSS
AR2
VSS
AP2
VSS
AJ2
VSS
AH2
VSS
AF2
VSS
AE2
VSS
AD2
VSS
AC2
VSS
Y2
VSS
M2
VSS
K2
VSS
AM1
VSS
AA1
VSS
P1
VSS
H1
VSS
U24
VSS
U28
VSS
U25
VSS
U29
VSS
AF32
VSS_NCTF
AB32
VSS_NCTF
V32
VSS_NCTF
AJ30
VSS_NCTF
AM29
VSS_NCTF
AF29
VSS_NCTF
AB29
VSS_NCTF
U26
VSS_NCTF
U23
VSS_NCTF
AL20
VSS_NCTF
V20
VSS_NCTF
AC19
VSS_NCTF
AL17
VSS_NCTF
AJ17
VSS_NCTF
VSS NCTF
VSS NCTF
NC
NC
VSS_NCTF VSS_NCTF
VSS_SCB VSS_SCB VSS_SCB VSS_SCB VSS_SCB
AA17 U17
BH48 BH1 A48 C1 A3
E1
NC
D2
NC
C3
NC
B4
NC
A5
NC
A6
NC
A43
NC
A44
NC
B45
NC
C46
NC
D47
NC
B47
NC
A46
NC
F48
NC
E48
NC
C48
NC
B48
NC
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Cantiga(6/6)-PWR/GND
Cantiga(6/6)-PWR/GND
Cantiga(6/6)-PWR/GND
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
1
0.1
0.1
14 51Friday, October 05, 2007
14 51Friday, October 05, 2007
14 51Friday, October 05, 2007
0.1
5
hexainf@hotmail.com
DDR_A_DQS#[0..7]10 DDR_A_D[0..63]10 DDR_A_DM[0..7]10 DDR_A_DQS[0..7]10 DDR_A_MA[0..14]10
D D
C C
B B
A A
Layout Note: Place near JP3
+1.8V
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C159
C159
R117 56_0402_5%R117 56_0402_5%
5
2.2U_0805_16V4Z
C147
C147
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C160
C160
RP156_0404_4P2R_5% RP156_0404_4P2R_5%
1 4 2 3
RP356_0404_4P2R_5% RP356_0404_4P2R_5%
1 4 2 3
RP556_0404_4P2R_5% RP556_0404_4P2R_5%
1 4 2 3
RP756_0404_4P2R_5% RP756_0404_4P2R_5%
1 4 2 3
RP956_0404_4P2R_5% RP956_0404_4P2R_5%
1 4 2 3
RP1156_0404_4P2R_5% RP1156_0404_4P2R_5%
2 3 1 4
1 2
C153
C153
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C161
C161
2.2U_0805_16V4Z
2.2U_0805_16V4Z C152
C152
1
2
Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9VS
+0.9V
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C158
C158
DDR_A_MA8 DDR_A_MA5
DDR_A_MA1 DDR_A_MA3
DDR_A_RAS# DDR_CS0_DIMMA#
DDR_A_BS0 DDR_A_MA10
DDR_A_CAS# DDR_A_WE#
DDR_CS1_DIMMA# M_ODT1
DDR_A_MA11
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z C154
C154
1
2
5 10
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C162
C162
+0.9V
RP2 56_0404_4P2R_5%RP2 56_0404_4P2R_5%
RP4 56_0404_4P2R_5%RP4 56_0404_4P2R_5%
RP6 56_0404_4P2R_5%RP6 56_0404_4P2R_5%
RP8 56_0404_4P2R_5%RP8 56_0404_4P2R_5%
RP10 56_0404_4P2R_5%RP10 56_0404_4P2R_5%
RP12 56_0404_4P2R_5%RP12 56_0404_4P2R_5%
RP13 56_0404_4P2R_5%RP13 56_0404_4P2R_5%
C155
C155
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C163
C163
DDR_A_BS2
14
DDR_CKE0_DIMMA
23
DDR_A_MA7
14
DDR_A_MA6
23
DDR_A_MA12
14
DDR_A_MA9
23
DDR_A_MA4
14
DDR_A_MA2
23
DDR_A_MA0
14
DDR_A_BS1
23
M_ODT0
14
DDR_A_MA13
23
DDR_CKE1_DIMMA
14
DDR_A_MA14
23
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C165
C165
C164
C164
C156
C156
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4
330U_D2E_2.5VM_R7
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C166
C166
C149
C149
C148
C148
1
1
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C167
C167
4
330U_D2E_2.5VM_R7
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C168
C168
1
C157
C157
1
+
+
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C170
C170
C169
C169
Layout Note: Place these resistor closely JP3,all trace length Max=1.5"
C150
C150
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
+1.8V
V_DDR_MCH_REF
JDIMM1
JDIMM1
1
VREF
3
DDR_A_D4 DDR_A_D1
DDR_A_DQS#0 DDR_A_DQS0
DDR_A_D2 DDR_A_D3
DDR_A_D8 DDR_A_D9
DDR_A_DQS#1 DDR_A_DQS1
DDR_A_D11 DDR_A_D15 DDR_A_D10 DDR_A_D14
DDR_A_D16 DDR_A_D17
DDR_A_DQS#2 DDR_A_DQS2
DDR_A_D18 DDR_A_D19
DDR_A_DM3
DDR_A_D26 DDR_A_D27
DDR_CKE0_DIMMA9
DDR_A_BS210
DDR_A_BS010
DDR_A_WE#10
DDR_A_CAS#10
DDR_CS1_DIMMA#9
M_ODT19
CLK_SMBDATA16,17 CLK_SMBCLK16,17
+3VS
3
DDR_CKE0_DIMMA
DDR_A_BS2 DDR_A_MA12
DDR_A_MA9 DDR_A_MA7 DDR_A_MA8
DDR_A_MA5 DDR_A_MA3 DDR_A_MA1
DDR_A_MA10 DDR_A_BS0 DDR_A_WE#
DDR_A_CAS# DDR_CS1_DIMMA#
M_ODT1 DDR_A_D37
DDR_A_D36 DDR_A_DQS#4
DDR_A_DQS4 DDR_A_D39
DDR_A_D38 DDR_A_D45
DDR_A_D44 DDR_A_DM5 DDR_A_D47 DDR_A_D43
DDR_A_D46 DDR_A_D49
DDR_A_D48
DDR_A_DQS#6 DDR_A_DQS6
DDR_A_D50 DDR_A_D61 DDR_A_D57
DDR_A_D60 DDR_A_DM7 DDR_A_D59
DDR_A_D58 CLK_SMBDATA
CLK_SMBCLK
C171
C171
C172
C172
1
2
Compal Secret Data
Compal Secret Data
Compal Secret Data
1
2
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
5
7
9
11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97
99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Deciphered Date
Deciphered Date
Deciphered Date
VSS DQ0 DQ1 VSS DQS0# DQS0 VSS DQ2 DQ3 VSS DQ8 DQ9 VSS DQS1# DQS1 VSS DQ10 DQ11 VSS
VSS DQ16 DQ17 VSS DQS2# DQS2 VSS DQ18 DQ19 VSS DQ24 DQ25 VSS DM3 NC VSS DQ26 DQ27 VSS CKE0 VDD NC BA2 VDD A12 A9 A8 VDD A5 A3 A1 VDD A10/AP BA0 WE# VDD CAS# NC/S1# VDD NC/ODT1 VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS NC,TEST VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SDA SCL VDDSPD
FOX_ASOA426-M4R-TR
FOX_ASOA426-M4R-TR
SO-DIMM A
VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7
VSS DQ12 DQ13
VSS
DM1
VSS
CK0 CK0#
VSS DQ14 DQ15
VSS
VSS DQ20 DQ21
VSS
DM2
VSS DQ22 DQ23
VSS DQ28 DQ29
VSS
DQS3#
DQS3
VSS DQ30 DQ31
VSS
NC/CKE1
VDD
NC/A15 NC/A14
VDD
VDD
VDD
BA1 RAS#
VDD ODT0
NC/A13
VDD
VSS DQ36 DQ37
VSS
DM4
VSS DQ38 DQ39
VSS DQ44 DQ45
VSS
DQS5#
DQS5
VSS DQ46 DQ47
VSS DQ52 DQ53
VSS
CK1 CK1#
VSS
DM6
VSS DQ54 DQ55
VSS DQ60 DQ61
VSS
DQS7#
DQS7
VSS DQ62 DQ63
VSS
SAO
SA1
2
+1.8V
2.2U_0805_16V4Z
2
DDR_A_D5
4
DDR_A_D0
6 8
DDR_A_DM0
10 12
DDR_A_D6
14
DDR_A_D7
16 18
DDR_A_D13
20
DDR_A_D12
22 24
DDR_A_DM1
26 28
M_CLK_DDR0
30
M_CLK_DDR#0
32 34 36 38 40
42
DDR_A_D20
44
DDR_A_D21
46 48 50
NC
A11
A7 A6
A4 A2 A0
S0#
NC
2
DDR_A_DM2
52 54
DDR_A_D23
56
DDR_A_D22
58 60
DDR_A_D28DDR_A_D29
62
DDR_A_D25DDR_A_D24
64 66
DDR_A_DQS#3
68
DDR_A_DQS3
70 72
DDR_A_D31
74
DDR_A_D30
76 78
DDR_CKE1_DIMMA
80 82 84
DDR_A_MA14
86 88
DDR_A_MA11
90 92
DDR_A_MA6
94 96
DDR_A_MA4
98
DDR_A_MA2
100
DDR_A_MA0
102 104
DDR_A_BS1
106
DDR_A_RAS#
108
DDR_CS0_DIMMA#
110 112
M_ODT0
114
DDR_A_MA13
116 118 120 122
DDR_A_D32
124
DDR_A_D33
126 128
DDR_A_DM4
130 132
DDR_A_D34
134
DDR_A_D35
136 138
DDR_A_D40
140
DDR_A_D41
142 144
DDR_A_DQS#5
146
DDR_A_DQS5
148 150 152
DDR_A_D42
154 156
DDR_A_D52
158
DDR_A_D53
160 162
M_CLK_DDR1
164
M_CLK_DDR#1
166 168
DDR_A_DM6
170 172
DDR_A_D51DDR_A_D54
174
DDR_A_D55
176 178 180
DDR_A_D56
182 184
DDR_A_DQS#7
186
DDR_A_DQS7
188 190
DDR_A_D62
192
DDR_A_D63
194 196 198 200
12
12
R115
R115
10K_0402_5%
10K_0402_5%
R116
R116
10K_0402_5%
10K_0402_5%
2.2U_0805_16V4Z C146
C146
1
2
M_CLK_DDR0 9 M_CLK_DDR#0 9
PM_EXTTS#0 9
DDR_CKE1_DIMMA 9
DDR_A_BS1 10 DDR_A_RAS# 10 DDR_CS0_DIMMA# 9
M_ODT0 9
M_CLK_DDR1 9 M_CLK_DDR#1 9
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DDRII-SODIMM SLOT1
DDRII-SODIMM SLOT1
DDRII-SODIMM SLOT1
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
V_DDR_MCH_REF 9,16
C151
C151
1
0.1
0.1
15 51Monday, October 08, 2007
15 51Monday, October 08, 2007
15 51Monday, October 08, 2007
0.1
5
DDR_B_DQS#[0..7]10 DDR_B_D[0..63]10 DDR_B_DM[0..7]10 DDR_B_DQS[0..7]10 DDR_B_MA[0..14]10
D D
C C
B B
A A
Layout Note: Place near JP10
+1.8V
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9VS
+0.9V
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_B_MA3 DDR_B_MA1
DDR_B_BS0 DDR_B_MA10
DDR_B_MA0 DDR_B_BS1
DDR_CS2_DIMMB# DDR_B_RAS#
DDR_B_CAS# DDR_B_WE#
DDR_CS3_DIMMB# M_ODT3
DDR_CKE3_DIMMB
C174
C174
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C184
C184
C175
C175
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C185
C185
R120 56_0402_5%
R120 56_0402_5%
5
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C186
C186
RP1456_0404_4P2R_5% RP1456_0404_4P2R_5%
1 4 2 3
RP1656_0404_4P2R_5% RP1656_0404_4P2R_5%
1 4 2 3
RP1856_0404_4P2R_5% RP1856_0404_4P2R_5%
1 4 2 3
RP2056_0404_4P2R_5% RP2056_0404_4P2R_5%
1 4 2 3
RP2256_0404_4P2R_5% RP2256_0404_4P2R_5%
1 4 2 3
RP2456_0404_4P2R_5% RP2456_0404_4P2R_5%
2 3 1 4
1 2
2.2U_0805_16V4Z
C176
C176
1
2
C187
C187
+0.9V
5
2.2U_0805_16V4Z
2.2U_0805_16V4Z
C183
C183
C177
C177
1
1
2
2
5 10
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C188
C188
C189
C189
RP15 56_0404_4P2R_5%RP15 56_0404_4P2R_5%
14 23
RP17 56_0404_4P2R_5%RP17 56_0404_4P2R_5%
14 23
RP19 56_0404_4P2R_5%RP19 56_0404_4P2R_5%
14 23
RP21 56_0404_4P2R_5%RP21 56_0404_4P2R_5%
14 23
RP23 56_0404_4P2R_5%RP23 56_0404_4P2R_5%
14 23
RP25 56_0404_4P2R_5%RP25 56_0404_4P2R_5%
14 23
RP26 56_0404_4P2R_5%RP26 56_0404_4P2R_5%
14 23
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C190
C190
DDR_B_MA12 DDR_B_MA9
DDR_B_MA11 DDR_B_MA14
DDR_B_MA5 DDR_B_MA8
DDR_B_MA6 DDR_B_MA7
DDR_B_MA2 DDR_B_MA4
DDR_B_MA13 M_ODT2
DDR_CKE2_DIMMB DDR_B_BS2
0.1U_0402_16V4Z
0.1U_0402_16V4Z C178
C178
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C191
C191
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C192
C192
4
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C179
C179
1
1
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C193
C193
C194
C194
Layout Note: Place these resistor closely JP3,all trace length Max=1.5"
4
3
+1.8V
V_DDR_MCH_REF
JDIMM2
JDIMM2
1
VREF
3
11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97
99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Deciphered Date
Deciphered Date
Deciphered Date
5 7 9
VSS DQ0 DQ1 VSS DQS0# DQS0 VSS DQ2 DQ3 VSS DQ8 DQ9 VSS DQS1# DQS1 VSS DQ10 DQ11 VSS
VSS DQ16 DQ17 VSS DQS2# DQS2 VSS DQ18 DQ19 VSS DQ24 DQ25 VSS DM3 NC VSS DQ26 DQ27 VSS CKE0 VDD NC BA2 VDD A12 A9 A8 VDD A5 A3 A1 VDD A10/AP BA0 WE# VDD CAS# NC/S1# VDD NC/ODT1 VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS NC,TEST VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SDA SCL VDDSPD
FOX_AS0A426-N8RN-7F
FOX_AS0A426-N8RN-7F
SO-DIMM B
DDR_B_D0 DDR_B_D1
DDR_B_DQS#0 DDR_B_DQS0
DDR_B_D2 DDR_B_D3
DDR_B_D8 DDR_B_D9
DDR_B_DQS#1 DDR_B_DQS1
DDR_B_D10 DDR_B_D11
0.1U_0402_16V4Z
0.1U_0402_16V4Z C181
C181
C180
C180
1
2
DDR_CKE2_DIMMB9
DDR_B_BS210
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C195
C195
C196
C196
DDR_B_BS010
DDR_B_WE#10
DDR_B_CAS#10
DDR_CS3_DIMMB#9
M_ODT39
CLK_SMBDATA15,17 CLK_SMBCLK15,17
+3VS
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
DDR_B_D20 DDR_B_DQS#2
DDR_B_DQS2 DDR_B_D19
DDR_B_D18 DDR_B_D28
DDR_B_DM3
DDR_B_D30 DDR_B_D31
DDR_CKE2_DIMMB
DDR_B_BS2 DDR_B_MA12
DDR_B_MA9 DDR_B_MA8
DDR_B_MA5 DDR_B_MA3 DDR_B_MA1
DDR_B_MA10 DDR_B_BS0 DDR_B_WE#
DDR_B_CAS# DDR_CS3_DIMMB#
M_ODT3 DDR_B_D32
DDR_B_D37 DDR_B_DQS#4
DDR_B_DQS4 DDR_B_D34
DDR_B_D35 DDR_B_D40
DDR_B_D41 DDR_B_DM5 DDR_B_D42
DDR_B_D43 DDR_B_D55
DDR_B_D50
DDR_B_DQS#6 DDR_B_DQS6
DDR_B_D52 DDR_B_D53
DDR_B_D60 DDR_B_D61 DDR_B_D57
DDR_B_DM7 DDR_B_D63
DDR_B_D58 CLK_SMBDATA
CLK_SMBCLK
1
C197
C197
2
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
1
C198
C198
2
Compal Secret Data
Compal Secret Data
Compal Secret Data
VSS DQ4 DQ5 VSS
DM0
VSS DQ6 DQ7
VSS DQ12 DQ13
VSS
DM1
VSS
CK0 CK0#
VSS DQ14 DQ15
VSS
VSS DQ20 DQ21
VSS
DM2
VSS DQ22 DQ23
VSS DQ28 DQ29
VSS
DQS3#
DQS3
VSS DQ30 DQ31
VSS
NC/CKE1
VDD NC/A15 NC/A14
VDD
VDD
VDD
BA1
RAS#
VDD
ODT0
NC/A13
VDD
VSS DQ36 DQ37
VSS
DM4
VSS DQ38 DQ39
VSS DQ44 DQ45
VSS
DQS5#
DQS5
VSS DQ46 DQ47
VSS DQ52 DQ53
VSS
CK1 CK1#
VSS
DM6
VSS DQ54 DQ55
VSS DQ60 DQ61
VSS
DQS7#
DQS7
VSS DQ62 DQ63
VSS
SA0
SA1
2
+1.8V
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2.2U_0805_16V4Z
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50
NC
52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90
A11
92
A7
94
A6
96 98
A4
100
A2
102
A0
104 106 108 110
S0#
112 114 116 118 120
NC
122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
2
DDR_B_D5 DDR_B_D4
DDR_B_DM0 DDR_B_D6
DDR_B_D7 DDR_B_D12
DDR_B_D13 DDR_B_DM1 M_CLK_DDR2
M_CLK_DDR#2 DDR_B_D14
DDR_B_D15
DDR_B_D16DDR_B_D21 DDR_B_D17
DDR_B_DM2 DDR_B_D22
DDR_B_D23 DDR_B_D29
DDR_B_D24DDR_B_D25 DDR_B_DQS#3
DDR_B_DQS3 DDR_B_D26
DDR_B_D27 DDR_CKE3_DIMMB
DDR_B_MA14 DDR_B_MA11
DDR_B_MA7 DDR_B_MA6
DDR_B_MA4 DDR_B_MA2 DDR_B_MA0
DDR_B_BS1 DDR_B_RAS# DDR_CS2_DIMMB#
M_ODT2 DDR_B_MA13
DDR_B_D36 DDR_B_D33
DDR_B_DM4 DDR_B_D39
DDR_B_D38 DDR_B_D44
DDR_B_D45 DDR_B_DQS#5
DDR_B_DQS5 DDR_B_D46
DDR_B_D47 DDR_B_D51
DDR_B_D54 M_CLK_DDR3
M_CLK_DDR#3 DDR_B_DM6 DDR_B_D49
DDR_B_D48 DDR_B_D56
DDR_B_DQS#7 DDR_B_DQS7
DDR_B_D59 DDR_B_D62
10K_0402_5%
10K_0402_5%
12
R119
R119
2.2U_0805_16V4Z
M_CLK_DDR2 9 M_CLK_DDR#2 9
PM_EXTTS#1 9
DDR_CKE3_DIMMB 9
1
1
C173
C173
2
2
0612 add
DDR_B_BS1 10 DDR_B_RAS# 10 DDR_CS2_DIMMB# 9
M_ODT2 9
M_CLK_DDR3 9 M_CLK_DDR#3 9
R118
R118
1 2
10K_0402_5%
10K_0402_5%
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
+3VS
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
DDRII-SODIMM SLOT2
DDRII-SODIMM SLOT2
DDRII-SODIMM SLOT2
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
1
V_DDR_MCH_REF 9,15
C182
C182
1
0.1
0.1
16 51Friday, October 05, 2007
16 51Friday, October 05, 2007
16 51Friday, October 05, 2007
0.1
5
hexainf@hotmail.com
PCI
FSC
FSB
CLKSEL2
CLKSEL1
00
00
0
1
D D
0
1
0
1
0
1
1
1
1
1
FSA
CPU_BSEL07
C C
FSB
CPU_BSEL17
B B
FSC
CPU_BSEL27
FSA
CLKSEL0
0
1
0 1
0
1
0 1
R128
R128
1 2
2.2K_0402_5%
2.2K_0402_5% R138
R138
1 2
0_0402_5%
0_0402_5%
R154
R154
1 2
0_0402_5%
0_0402_5%
R164
R164
1 2
10K_0402_5%
10K_0402_5% R171
R171
1 2
0_0402_5%
0_0402_5%
CPU MHz
266
133
200
166
333
100
400
+VCCP
+VCCP
12
12
1 2
12
12
12
CLRP1
CLRP1 NO SHORT PADS
NO SHORT PADS
1 2
R129
R129 1K_0402_5%
1K_0402_5%
@
@
R139
R139 1K_0402_5%
1K_0402_5%
@
@
R143
R143 1K_0402_5%
1K_0402_5%
1 2
R150
R150 1K_0402_5%
1K_0402_5%
@
@
R157
R157 0_0402_5%
0_0402_5%
@
@
R163
R163 1K_0402_5%
1K_0402_5%
1 2
R165
R165 1K_0402_5%
1K_0402_5%
@
@
R174
R174 0_0402_5%
0_0402_5%
MHz
100
100
100
100
100
100
100
R123
R123
1 2
56_0402_5%
56_0402_5%
Mini card debug port 24pin debug port
SRC
REF
MHz
MHz
33.3
14.318 96.0 48.0
14.318
33.3
14.318
33.3
14.318
33.3
14.318
33.3
14.318
33.3
14.318
33.3
Reserved
+VCCP
MCH_CLKSEL0 9
MCH_CLKSEL1 9
MCH_CLKSEL2 9
DOT_96 MHz
CLK_DEBUG_PORT_131 CLK_DEBUG_PORT_037
96.0
96.0
96.0
96.0
96.0
96.0
CLK_PCI_EC38 CLK_PCI_ICH25
CLK_SMBDATA15,16
CLK_SMBCLK15,16
NB CPU
CLK_ENABLE#49
CK_PWRGD27
CLK_14M_ICH27
4
USB MHz
48.0
48.0
48.0
48.0
48.0
48.0
CLKREQ#_79
CLK_MCH_BCLK9 CLK_CPU_BCLK#6 CLK_CPU_BCLK6
VGATE27,49
R141 0_0402_5%@R141 0_0402_5%@ R142 0_0402_5%@R142 0_0402_5%@ R140 0_0402_5%R140 0_0402_5%
No Debug port anymore
R147 33_0402_1%R147 33_0402_1%
R169 33_0402_1%
R169 33_0402_1% R155 33_0402_1%
R155 33_0402_1% R158 33_0402_1%R158 33_0402_1%
R161 33_0402_1%R161 33_0402_1%
CLK_48M_ICH27
CLK_PCIE_VGA20
VGA
CLK_PCIE_VGA#20
+3VS
Routing the trace at least 10mil
Y1
Y1
2
C213
C213
18P_0402_50V8J
18P_0402_50V8J
1
Vendor suggests 22pF
R126 475_0402_1%R126 475_0402_1%
1 2
R130 0_0402_5%R130 0_0402_5%
1 2
R132 0_0402_5%R132 0_0402_5%
1 2
R134 0_0402_5%R134 0_0402_5%
1 2
R136 0_0402_5%R136 0_0402_5%
1 2
1 2 1 2 1 2
1 2
T44T44
DEBUG@
DEBUG@ DEBUG@
DEBUG@ 1 2 1 2 1 2
1 2
R167 33_0402_1%R167 33_0402_1%
1 2
R173 0_0402_5%R173 0_0402_5%
1 2
R175 0_0402_5%R175 0_0402_5%
1 2
R121
R121
1 2
0_0805_5%
0_0805_5%
CLK_XTAL_OUT CLK_XTAL_IN
14.31818MHZ_16P
14.31818MHZ_16P
12
2
C214
C214 18P_0402_50V8J
18P_0402_50V8J
1
R_CKPWRGD FSB
CLK_XTAL_OUT CLK_XTAL_IN
FSC REF1 CLK_SMBDATA CLK_SMBCLK
PCI2_1 PCI2_2 27_SEL PCI_CLK3 ITP_EN
3
+3VS_CK505
1
C199
C199 10U_0805_10V4Z
10U_0805_10V4Z
2
R_CLKREQ#_7 R_MCH_BCLK# R_MCH_BCLK R_CPU_BCLK# R_CPU_BCLK
U3
U3
+3VS_CK505
1
CKPWRGD/PD#
2
FS_B/TEST_MODE
3
VSS_REF
4
XTAL_OUT
5
XTAL_IN
6
VDD_REF
7
REF_0/FS_C/TEST_
8
REF_1
9
SDA
10
SCL
11
NC
12
VDD_PCI
13
PCI_1
14
PCI_2
15
PCI_3
16
PCI_4/SEL_LCDCL
17
PCIF_5/ITP_EN
18
VSS_PCI
+3VS_CK505
FSA
+1.05VS_CK505
R_CLK_PCIE_VGA R_CLK_PCIE_VGA# SSCDREFCLK#
1
C200
C200
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+VCCP
R122
R122
1 2
0_0805_5%
0_0805_5%
10U_0805_10V4Z
10U_0805_10V4Z
+3VS_CK505
71
72
CPU_0
VDD_CPU
VDD_4819USB_0/FS_A20USB_1/CLKREQ_A#21VSS_4822VDD_IO23SRC_0/DOT_9624SRC_0#/DOT_96#25VSS_IO26VDD_PLL327LCDCLK/27M28LCDCLK#/27M_SS29VSS_PLL330VDD_PLL3_IO31SRC_232SRC_2#33VSS_SRC34SRC_335SRC_3#
+1.05VS_CK505
68
69
70
CPU_0#
VSS_CPU
61
66
62
67
64
63
65
CPU_1
CPU_1#
CLKREQ_7#
VDD_CPU_IO
VDD_SRC_IO
SRC_8/CPU_ITP
SRC_8#/CPU_ITP#
60
SRC_7
1
C201
C201
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C206
C206
2
57
59
56
58
SRC_6
SRC_7#
SRC_6#
VSS_SRC
CLKREQ_6#
+1.05VS_CK505
1
C202
C202
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
Place close to U51
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C207
C207
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R_CPU_XDP R_CPU_XDP# R_MCH_3GPLL R_MCH_3GPLL# R_CLKREQ#_6 R_CLK_PCIE_MCARD2 R_CLK_PCIE_MCARD2#
+3VS_CK505
55
VDD_SRC
PCI_STOP#
CPU_STOP#
VDD_SRC_IO
SRC_10#
SRC_10
CLKREQ_10#
SRC_11
SRC_11#
CLKREQ_11#
SRC_9#
SRC_9
CLKREQ_9#
VSS_SRC
CLKREQ_4#
SRC_4#
SRC_4
VDD_SRC_IO
CLKREQ_3#
SLG8SP553VTR_QFN72_10x10
SLG8SP553VTR_QFN72_10x10
36
R_PCIE_SATA# R_PCIE_SATA
R_PCIE_ICH# R_PCIE_ICH
SSCDREFCLK
2
1
C203
C203
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
10U_0805_10V4Z
10U_0805_10V4Z
1
1
C208
C208
C209
C209
2
2
R124 0_0402_5%R124 0_0402_5%
1 2
R125 0_0402_5%R125 0_0402_5%
1 2
R127 0_0402_5%R127 0_0402_5%
1 2
R131 0_0402_5%R131 0_0402_5%
1 2
R133 475_0402_1%R133 475_0402_1%
1 2
R135 0_0402_5%R135 0_0402_5%
1 2
R137 0_0402_5%R137 0_0402_5%
1 2
+1.05VS_CK505
H_STP_PCI#
54
H_STP_CPU#
53 52
R_CLK_PCIE_MCARD0#
51
R_CLK_PCIE_MCARD0
50
R_CLKREQ#_10
49
R_CLK_SRC11
48
R_CLK_SRC11#
47 46
R_CLK_PCIE_LAN#
45
R_CLK_PCIE_LAN
44
R_CLKREQ#_9
43 42
R_CLKREQ#_4
41
R_CLK_PCIE_NCARD#
40
R_CLK_PCIE_NCARD
39 38
R_CLKREQ#_C
37
R166 0_0402_5%R166 0_0402_5% R168 0_0402_5%R168 0_0402_5%
R170 0_0402_5%R170 0_0402_5% R172 0_0402_5%R172 0_0402_5%
R176 0_0402_5%R176 0_0402_5% R177 0_0402_5%R177 0_0402_5%
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C210
C210
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2 1 2
1 2 1 2
1 2 1 2
1
C204
C204
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C211
C211
2
R144 0_0402_5%R144 0_0402_5% R145 0_0402_5%R145 0_0402_5% R146 475_0402_1%R146 475_0402_1% R725 0_0402_5%R725 0_0402_5% R726 0_0402_5%R726 0_0402_5%
R152 0_0402_5%R152 0_0402_5% R153 0_0402_5%R153 0_0402_5% R738 475_0402_1%R738 475_0402_1%
R156 475_0402_1%R156 475_0402_1% R159 0_0402_5%R159 0_0402_5% R160 0_0402_5%R160 0_0402_5%
R162 475_0402_1%R162 475_0402_1%
1
C205
C205
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+1.05VS_CK505
1
C212
C212
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CLK_CPU_XDP 6 CLK_CPU_XDP# 6 CLK_MCH_3GPLL 9 CLK_MCH_3GPLL# 9CLK_MCH_BCLK#9
CLKREQ#_6 31
CLK_PCIE_MCARD2 31 CLK_PCIE_MCARD2# 31
H_STP_PCI# 27 H_STP_CPU# 27
1 2 1 2 1 2 1 2 1 2
1 2 1 2 1 2
1 2 1 2 1 2
1 2
CLK_PCIE_SATA# 26 CLK_PCIE_SATA 26
CLK_PCIE_ICH# 27 CLK_PCIE_ICH 27
27M_SSC 21 27M_CLK 21
1
XDP/ITP
3G_PLL
MiniCard_WLAN
CLK_PCIE_MCARD0# 31 CLK_PCIE_MCARD0 31
CLKREQ#_10 31
CLK_SRC11 32 CLK_SRC11# 32
CLK_PCIE_LAN# 30 CLK_PCIE_LAN 30
CLKREQ#_9 30 CLKREQ#_4 31
CLK_PCIE_NCARD# 31 CLK_PCIE_NCARD 31
CLKREQ#_C 27
SATA
ICH
VGA
MiniCard_WWAN
Card reader
GLAN
New Card
+3VS
ITP_EN
PCI_CLK3
A A
0 = SRC8/SRC8# 1 = ITP/ITP# 0 = Enable DOT96 & SRC1(UMA) 1 = Enable SRC0 & 27MHz(DIS)
+3VS +3VS
12
R180
R180 10K_0402_5%
10K_0402_5%
ITP_EN PCI_CLK3
12
@
@
R182
R182 10K_0402_5%
10K_0402_5%
5
12
R181
R181 10K_0402_5%
10K_0402_5%
12
@
@
R183
R183 10K_0402_5%
10K_0402_5%
V V
ICH_SMBDATA21,27,31,37
SB, MINI PCI
ICH_SMBCLK21,27,31,37
4
+3VS
2
G
G
1 3
D
S
D
2
G
G
1 3
D
S
D
S
2N7002_SOT23-3
2N7002_SOT23-3 Q4
Q4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
S
2N7002_SOT23-3
2N7002_SOT23-3 Q3
Q3
3
+3VS
R179
R178
R178
2.2K_0402_5%
2.2K_0402_5%
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
R179
2.2K_0402_5%
2.2K_0402_5%
CLK_SMBDATA
CLK_SMBCLK
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C215
@C215
@
5P_0402_50V8C
5P_0402_50V8C
C216
@C216
@
4.7P_0402_50V8C
4.7P_0402_50V8C C217
@C217
@
4.7P_0402_50V8C
4.7P_0402_50V8C C218
@C218
@
4.7P_0402_50V8C
4.7P_0402_50V8C
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet
Compal Electronics, Inc.
Clock Generator CK505
Clock Generator CK505
Clock Generator CK505
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
12 12 12 12
1
CLK_48M_ICH CLK_14M_ICH CLK_PCI_ICH CLK_PCI_EC
17 51Friday, October 05, 2007
17 51Friday, October 05, 2007
17 51Friday, October 05, 2007
0.1
0.1
0.1
of
A
B
C
D
E
0.1U_0402_16V4Z
0.1U_0402_16V4Z C220
C220
CONN@
CONN@
SUYIN_070546FR015S263ZR
SUYIN_070546FR015S263ZR
16 17
12
R186
R186
+CRTVDD+RCRT_VCC+5VS
1
2
+3VS
2
1 3
D
D
2N7002_SOT23-3
2N7002_SOT23-3 Q5
Q5
BLUE GREEN RED
@D5
@
3
D5
R187
R187
1
D6
@D6
@
2
3
DAN217T146_SC59-3
DAN217T146_SC59-3
+3VS
12
12
R188
R188
2.2K_0402_5%
2.2K_0402_5%
3VDDCDA
3VDDCCL
1
2
2.2K_0402_5%
2
G
G
1 3
D
D
2N7002_SOT23-3
2N7002_SOT23-3 Q6
Q6
2.2K_0402_5%
S
S
G
G
S
S
DAN217T146_SC59-3
DAN217T146_SC59-3
Place close to JCRT
1
D7
@D7
@
+5VS
2
3
DAN217T146_SC59-3
DAN217T146_SC59-3
3VDDCDA 21
3VDDCCL 21
CRT Connector
1 1
+5VS +5VS
C221
C221
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2
1
5
U4
U4 SN74AHCT1G125GW_SOT353-5
SN74AHCT1G125GW_SOT353-5
CRT_HSYNC20
CRT_VSYNC20
2 2
CRT_HSYNC
CRT_VSYNC
51K_0402_5%
51K_0402_5%
R190
R190
P
A2Y4OE#
G
3
12
12
R191
R191 51K_0402_5%
51K_0402_5%
C222
C222
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2
HSYNC_G_A
1
5
P
A2Y
G
3
VSYNC_G_A D_VSYNC
4
OE#
U5
U5 SN74AHCT1G125GW_SOT353-5
SN74AHCT1G125GW_SOT353-5
R184
R184
1 2
R189
R189
1 2
RED40
GREEN40
D_HSYNC40
BLUE40
D_VSYNC40
0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%
RED
GREEN
BLUE
D_HSYNC
@
@
1
C223
C223 5P_0402_50V8C
5P_0402_50V8C
2
D4
D4
2 1
RB491D_SC59-3
RB491D_SC59-3
@
@
1
C224
C224 5P_0402_50V8C
5P_0402_50V8C
2
F1
F1
1.1A_6VDC_FUSE
1.1A_6VDC_FUSE
2.2K_0402_5%
2.2K_0402_5%
D_DDCDATA
D_DDCCLK
21
W=40mils
JCRT1
JCRT1
6
11
1 7
12
2 8
13
3 9
14
4 10 15
5
+CRTVDD +CRTVDD
12
R185
R185
2.2K_0402_5%
2.2K_0402_5%
D_DDCDATA 40 D_DDCCLK 40
CRT Termination/EMI Filter
Note: CRT / TV-out should route to JP30 first then to the JP1 & JP2 on system side.
3 3
4 4
M_RED20
M_GREEN20
M_BLUE20
A
12
12
R195
R195
12
150_0402_1%
150_0402_1%
150_0402_1%
150_0402_1%
R196
R196
R197
R197
150_0402_1%
150_0402_1%
C_RED
C_GRN
C_BLU
C229
C229
RED
GREEN
BLUE
1
C230
C230 10P_0402_50V8J
10P_0402_50V8J
2
C
Compal Secret Data
Compal Secret Data
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
CRT Connector
CRT Connector
CRT Connector
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
18 51Friday, October 05, 2007
18 51Friday, October 05, 2007
18 51Friday, October 05, 2007
E
0.1
0.1
0.1
L2
L2
1 2
HLC0603CSCCR11JT_0603
HLC0603CSCCR11JT_0603
L3
L3
1 2
HLC0603CSCCR11JT_0603
HLC0603CSCCR11JT_0603
L4
L4
1 2
HLC0603CSCCR11JT_0603
12
12
R239
R239
B
12
150_0402_1%
150_0402_1%
150_0402_1%
150_0402_1%
R238
R238
R237
R237
150_0402_1%
150_0402_1%
HLC0603CSCCR11JT_0603
10P_0402_50V8J
10P_0402_50V8J
1
1
C228
C228
2
2
10P_0402_50V8J
10P_0402_50V8J
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
hexainf@hotmail.com
4
3
2
1
+3VS+LCDVDD
S
S
G
G
C234
C234
1
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
47K_0402_5%
47K_0402_5%
0.22U_0603_10V7K
0.22U_0603_10V7K
1
2
+5VALW+LCDVDD
R199
R199
1 2
R200
R200
100K_0402_5%
100K_0402_5%
13
D
D
Q9
Q9
2
2N7002_SOT23-3
2N7002_SOT23-3
G
G
S
S
@
@
L5 0_0805_5%
L5 0_0805_5%
1 2
L6
L6
1 2
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
0308_Reserve L10 and install L11.
C233
C233
4.7U_0805_10V4Z
4.7U_0805_10V4Z
12
1
2
0.047U_0402_16V7K
0.047U_0402_16V7K
Q7
Q7
SI2301BDS-T1-E3_SOT23-3
SI2301BDS-T1-E3_SOT23-3
1 3
D
D
C238
C238
INVPWR_B+B+
+LCDVDD
12
R198
R198
100_0402_5%
1
1
C232
C231
INVPWR_B++LCDVDD+3VS
D D
C C
C235
C235
C236
C236
C237
C237
1
12
680P_0402_50V7K
680P_0402_50V7K
USB20_P427 USB20_N427
LVDS_BCLK+20 LVDS_BCLK-20
LVDS_B0+20 LVDS_B0-20 LVDS_B1+20 LVDS_B1-20 LVDS_B2+20 LVDS_B2-20
12
2
680P_0402_50V7K
680P_0402_50V7K
USB20_P4 USB20_N4
LVDS_BCLK+ LVDS_BCLK-
LVDS_B0+ LVDS_B0­LVDS_B1+ LVDS_B1­LVDS_B2+ LVDS_B2-
LVDS CONN WITH Camera and Digi MIC
JLVDS
680P_0402_50V7K
680P_0402_50V7K
+3VS
JLVDS
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39 GND41GND
ACES_88242-4001
ACES_88242-4001
10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
LVDS_A2-
2
2
LVDS_A2+
4
4
LVDS_A1-
6
6
LVDS_A1+
8
8
LVDS_A0-
10
LVDS_A0+
12
LVDS_ACLK-
14
LVDS_ACLK+
16 18 20 22
DMIC_DAT
24
DMIC_CLK
26
+3V_LOGO
R727
28 30 32 34 36 38 40 42
R727
INV_PWM BKOFF# DAC_BRIG
DDC2_CLK DDC2_DATA
680P_0402_50V7K
680P_0402_50V7K
1 2
470_0402_5%
470_0402_5%
USB_CAM
C435
C435
0308_Install all cap for EMI request.
1
2
1
C434
C434 680P_0402_50V7K
680P_0402_50V7K
2
LVDS_A2- 20 LVDS_A2+ 20 LVDS_A1- 20 LVDS_A1+ 20 LVDS_A0- 20 LVDS_A0+ 20 LVDS_ACLK- 20 LVDS_ACLK+ 20
DMIC_DAT 33
DMIC_CLK 33
+5VS
INV_PWM 38
BKOFF# 38
DAC_BRIG 38 DDC2_CLK 21
DDC2_DATA 21
R202
R202
2.2K_0402_5%
2.2K_0402_5%
DDC2_CLK DDC2_DATA
C231
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VS
R203
R203
2.2K_0402_5%
2.2K_0402_5%
1 2
1 2
C232
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
Limited Current < 1A
Avoid Panel display garbage after power on.
100_0402_5%
2N7002_SOT23-3
2N7002_SOT23-3
ENAVDD21
100K_0402_5%
100K_0402_5%
13
D
D
Q8
Q8
2
G
G
S
S
12
C239
C239
R201
R201
B B
3.9K_0402_1%
3.9K_0402_1%
12
R1091
R1091
12
R1093
R1093
USB_CAM
12
C1391
C1391
10U_1206_6.3V6M
10U_1206_6.3V6M
PAD-OPEN 2x2m
PAD-OPEN 2x2m
C1392
C1392
10U_1206_6.3V6M
10U_1206_6.3V6M
PJP604
PJP604
+5VALW
2 1 12
U42
U42
1
SHDN#
2
GND
3
VIN
G913E-SOT23-5
G913E-SOT23-5
OUTPUT
4
5
SET
1K_0402_1%
1K_0402_1%
USB_VCCA is +3.6VS, R892:1K; R891:3.9Kohm USB_VCCA is +4VS, R892:1K; R891:4.22Kohm
A A
5
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
LCD CONN.
LCD CONN.
LCD CONN.
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
19 51Friday, October 05, 2007
19 51Friday, October 05, 2007
19 51Friday, October 05, 2007
1
0.1
0.1
0.1
A
B
C
D
E
LVDS & DAC Interface
U17F
U17F
NB9M-GS_BGA_533P
NB9M-GS_BGA_533P COMMON
COMMON
6/13 IFPAB
6/13 IFPAB
+1.8VS
1 1
+1.8VS
BLM18PG 181SN 1D_ 0603
BLM18PG 181SN 1D_ 0603
2 2
3 3
+3VS
4 4
L7
L7
BLM18PG 181SN 1D_ 0603
BLM18PG 181SN 1D_ 0603
1
4.7U_ 0603 _6.3V6K
4.7U_ 0603 _6.3V6K
2
C257
C257
12
L8
L8
BLM18PG 181SN 1D_ 0603
BLM18PG 181SN 1D_ 0603
+3VS
1U_0 402_ 6.3V4Z
1U_0 402_ 6.3V4Z
BLM18PG 181SN 1D_ 0603
BLM18PG 181SN 1D_ 0603
L11
L11
100mA
12
4.7U_ 0603 _6.3V6K
4.7U_ 0603 _6.3V6K
100 mA
L9
L9
C317
C317
12
1
C246
C246
2
1
C251
C251
2
4.7U_ 0603 _6.3V6K
4.7U_ 0603 _6.3V6K
150 mA
12
1
2
4700 P_04 02_2 5V7K
4700 P_04 02_2 5V7K
1U_0 402_ 6.3V4Z
1U_0 402_ 6.3V4Z
1
C333
C333
2
4700 P_04 02_2 5V7K
4700 P_04 02_2 5V7K
4700 P_04 02_2 5V7K
4700 P_04 02_2 5V7K
1
C247
C247
2
4700 P_04 02_2 5V7K
4700 P_04 02_2 5V7K
1
2
C266
C266
4700 P_04 02_2 5V7K
4700 P_04 02_2 5V7K
1
C319
C319
2
1
C334
C334
2
A
470P_ 040 2_50 V7K
470P_ 040 2_50 V7K
470P_ 040 2_50 V7K
470P_ 040 2_50 V7K
1
2
C279
C279
470P_ 040 2_50 V7K
470P_ 040 2_50 V7K
1
2
470P_ 040 2_50 V7K
470P_ 040 2_50 V7K
1
C335
C335
C336
C336
2
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
2
C248
C248
1
2
1
C267
C267
470P_ 040 2_50 V7K
470P_ 040 2_50 V7K
1 2
C320
C320
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
1
2
IFPAB_PLLVDD IFPAB_RSET
12
R205
R205 1K_04 02_ 1%
1K_04 02_ 1%
IFPA_IOVDD IFPB_IOVDD
2
1
C280
C280
R206
R206
10K_0 402 _5%
10K_0 402 _5%
DACA_VDD
DACA_VREF
1
C321
C321
2
124_ 0402 _1%
124_ 0402 _1%
DACB_VDD DACB_VREF DACB_RSET
12
R210
R210
124_ 0402 _1%
124_ 0402 _1%
AD5
IFPAB_PLLV DD
AB6
IFPAB_RSET
@
@
V3
IFPA_IOVDD
V2
IFPB_IOVDD
U17D
U17D
NB9M-GS_BGA_533P
NB9M-GS_BGA_533P COMMON
COMMON
5/13 DACC
5/13 DACC
W5
DACC_VDD
R6
DACC_VREF
V6
DACC_RSET
U17C
U17C
NB9M-GS_BGA_533P
NB9M-GS_BGA_533P COMMON
COMMON
3/13 DACA
3/13 DACA
AG2
DACA_VDD
AF1
DACA_VREF
AE1
DACA_RSET
12
R207
R207
U17E
U17E
NB9M-GS_BGA_533P
NB9M-GS_BGA_533P COMMON
COMMON
4/13 DACB
4/13 DACB
D7
DACB_VDD
G6
DACB_VREF
F8
DACB_RSET
A
A
DATA
DATA
B
B
A
A
CLOCK
CLOCK
B
B
DAC C
CRT
DAC A
TV-OUT
DAC B
IFPA_TXD0 IFPA_TXD0
IFPA_TXD1 IFPA_TXD1
IFPA_TXD2 IFPA_TXD2
IFPA_TXD3 IFPA_TXD3
IFPB_TXD4 IFPB_TXD4
IFPB_TXD5 IFPB_TXD5
IFPB_TXD6 IFPB_TXD6
IFPB_TXD7 IFPB_TXD7
DACC_HSYNC DACC_VSYNC
DACC_GREEN
DACA_HSYNC DACA_VSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
DACB_CSYNC
DACB_RED
DACB_GREEN
DACB_BLUE
IFPA_TXC IFPA_TXC
IFPB_TXC IFPB_TXC
DACC_RED
DACC_BLUE
B
V4 V5
AA4 AA5
Y4 W4
AB5 AB4
V1 W1
W2 W3
AA3 AA2
AA1 AB1
AD4 AC4
AB2 AB3
U6 U4
T5 T4 R4
AD2 AD1
AE2 AE3 AD3
D6
TV_CRMA
F7
TV_LUMA
E7
TV_COMPS
E6
LVDS_A0- 19 LVDS_A0+ 19
LVDS_A1- 19 LVDS_A1+ 19
LVDS_A2- 19 LVDS_A2+ 19
LVDS_B0 - 19 LVDS_B0 + 19
LVDS_B1 - 19 LVDS_B1 + 19
LVDS_B2 - 19 LVDS_B2 + 19
LVDS_ACL K- 19 LVDS_ACL K+ 19
LVDS_BC LK- 19 LVDS_BC LK+ 19
CRT_H SYNC 18 CRT_VSYNC 18
M_RED 18 M_GREEN 18 M_BLUE 18
TV_CRMA 40 TV_LUMA 4 0 TV_COMPS 40
R204
R204 0_04 02_5 %
PLT_R ST#9,25 ,30,31 ,32
PEG_RXP011
PEG_RXN 011
PEG_M_TXP011 PEG_M_TXN011
PEG_RXP111
PEG_RXN 111
PEG_M_TXP111 PEG_M_TXN111
PEG_RXP211
PEG_RXN 211
PEG_M_TXP211 PEG_M_TXN211
PEG_RXP311
PEG_RXN 311
PEG_M_TXP311 PEG_M_TXN311
PEG_RXP411
PEG_RXN 411
PEG_M_TXP411 PEG_M_TXN411
PEG_RXP511
PEG_RXN 511
PEG_M_TXP511 PEG_M_TXN511
PEG_RXP611
PEG_RXN 611
PEG_M_TXP611 PEG_M_TXN611
PEG_RXP711
PEG_RXN 711
PEG_M_TXP711 PEG_M_TXN711
PEG_RXP811
PEG_RXN 811
PEG_M_TXP811 PEG_M_TXN811
PEG_RXP911
PEG_RXN 911
PEG_M_TXP911 PEG_M_TXN911
PEG_RXP1 011 PEG_RXN 1011
PEG_M_TXP1 011 PEG_M_TXN1 011
PEG_RXP1 111 PEG_RXN 1111
PEG_M_TXP1 111 PEG_M_TXN1 111
PEG_RXP1 211 PEG_RXN 1211
PEG_M_TXP1 211 PEG_M_TXN1 211
PEG_RXP1 311 PEG_RXN 1311
PEG_M_TXP1 311 PEG_M_TXN1 311
PEG_RXP1 411 PEG_RXN 1411
PEG_M_TXP1 411 PEG_M_TXN1 411
PEG_RXP1 511 PEG_RXN 1511
PEG_M_TXP1 511 PEG_M_TXN1 511
0_04 02_5 %
CLK_ PCIE_VGA17 CLK_ PCIE_VGA#17
C265 0.1U _040 2_16 V4ZC265 0.1U_ 0402 _16V4Z1 2 C268 0.1U _040 2_16 V4ZC268 0.1U_ 0402 _16V4Z
1 2
C270 0.1U _040 2_16 V4ZC270 0.1U_ 0402 _16V4Z1 2 C271 0.1U _040 2_16 V4ZC271 0.1U_ 0402 _16V4Z
1 2
C281 0.1U _040 2_16 V4ZC281 0.1U_ 0402 _16V4Z1 2 C282 0.1U _040 2_16 V4ZC282 0.1U_ 0402 _16V4Z
1 2
C283 0.1U _040 2_16 V4ZC283 0.1U_ 0402 _16V4Z1 2 C284 0.1U _040 2_16 V4ZC284 0.1U_ 0402 _16V4Z
1 2
C291 0.1U _040 2_16 V4ZC291 0.1U_ 0402 _16V4Z1 2 C292 0.1U _040 2_16 V4ZC292 0.1U_ 0402 _16V4Z
1 2
C293 0.1U _040 2_16 V4ZC293 0.1U_ 0402 _16V4Z1 2 C294 0.1U _040 2_16 V4ZC294 0.1U_ 0402 _16V4Z
1 2
C301 0.1U _040 2_16 V4ZC301 0.1U_ 0402 _16V4Z1 2 C302 0.1U _040 2_16 V4ZC302 0.1U_ 0402 _16V4Z
1 2
C303 0.1U _040 2_16 V4ZC303 0.1U_ 0402 _16V4Z1 2 C304 0.1U _040 2_16 V4ZC304 0.1U_ 0402 _16V4Z
1 2
C305 0.1U _040 2_16 V4ZC305 0.1U_ 0402 _16V4Z1 2 C306 0.1U _040 2_16 V4ZC306 0.1U_ 0402 _16V4Z
1 2
C307 0.1U _040 2_16 V4ZC307 0.1U_ 0402 _16V4Z1 2 C308 0.1U _040 2_16 V4ZC308 0.1U_ 0402 _16V4Z
1 2
C309 0.1U _040 2_16 V4ZC309 0.1U_ 0402 _16V4Z1 2 C310 0.1U _040 2_16 V4ZC310 0.1U_ 0402 _16V4Z
1 2
C315 0.1U _040 2_16 V4ZC315 0.1U_ 0402 _16V4Z1 2 C316 0.1U _040 2_16 V4ZC316 0.1U_ 0402 _16V4Z
1 2
C322 0.1U _040 2_16 V4ZC322 0.1U_ 0402 _16V4Z1 2 C323 0.1U _040 2_16 V4ZC323 0.1U_ 0402 _16V4Z
1 2
C324 0.1U _040 2_16 V4ZC324 0.1U_ 0402 _16V4Z1 2 C326 0.1U _040 2_16 V4ZC326 0.1U_ 0402 _16V4Z
1 2
C328 0.1U _040 2_16 V4ZC328 0.1U_ 0402 _16V4Z1 2 C329 0.1U _040 2_16 V4ZC329 0.1U_ 0402 _16V4Z
1 2
C330 0.1U _040 2_16 V4ZC330 0.1U_ 0402 _16V4Z1 2 C331 0.1U _040 2_16 V4ZC331 0.1U_ 0402 _16V4Z
1 2
C
1 2
PEX_RST#
PEX_REFCLKP PEX_REFCLKN
PEX_TXP0 PEX_TXN0
PEX_TXP1 PEX_TXN1
PEX_TXP2 PEX_TXN2
PEX_TXP3 PEX_TXN3
PEX_TXP4 PEX_TXN4
PEX_TXP5 PEX_TXN5
PEX_TXP6 PEX_TXN6
PEX_TXP7 PEX_TXN7
PEX_TXP8 PEX_TXN8
PEX_TX9 PEX_TX9 *
PEX_TX1 0 PEX_TX1 0*
PEX_TX1 1 PEX_TX1 1*
PEX_TX1 2 PEX_TX1 2*
PEX_TX1 3 PEX_TX1 3*
PEX_TX1 4 PEX_TX1 4*
PEX_TXP15 PEX_TXN15
PEG Interface
U17A
U17A
NB9M-GS_BGA_533P
NB9M-GS_BGA_533P COMMON
COMMON
1/13 PCI_E XPRESS
1/13 PCI_E XPRESS
AE9
RFU
AD9
PEX_RST
AB10
PEX_REFCLK
AC10
PEX_REFCLK
AD10
PEX_TX0
AD11
PEX_TX0
AE12
PEX_RX0
AF12
PEX_RX0
AD12
PEX_TX1
AC12
PEX_TX1
AG12
PEX_RX1
AG13
PEX_RX1
AB11
PEX_TX2
AB12
PEX_TX2
AF13
PEX_RX2
AE13
PEX_RX2
AD13
PEX_TX3
AD14
PEX_TX3
AE15
PEX_RX3
AF15
PEX_RX3
AD15
PEX_TX4
AC15
PEX_TX4
AG15
PEX_RX4
AG16
PEX_RX4
AB14
PEX_TX5
AB15
PEX_TX5
AF16
PEX_RX5
AE16
PEX_RX5
AC16
PEX_TX6
AD16
PEX_TX6
AE18
PEX_RX6
AF18
PEX_RX6
AD17
PEX_TX7
AD18
PEX_TX7
AG18
PEX_RX7
AG19
PEX_RX7
AC18
PEX_TX8
AB18
PEX_TX8
AF19
PEX_RX8
AE19
PEX_RX8
AB19
PEX_TX9
AB20
PEX_TX9
AE21
PEX_RX9
AF21
PEX_RX9
AD19
PEX_TX1 0
AD20
PEX_TX1 0
AG21
PEX_RX10
AG22
PEX_RX10
AD21
PEX_TX1 1
AC21
PEX_TX1 1
AF22
PEX_RX11
AE22
PEX_RX11
AB21
PEX_TX1 2
AB22
PEX_TX1 2
AE24
PEX_RX12
AF24
PEX_RX12
AC22
PEX_TX1 3
AD22
PEX_TX1 3
AG24
PEX_RX13
AF25
PEX_RX13
AD23
PEX_TX1 4
AD24
PEX_TX1 4
AG25
PEX_RX14
AG26
PEX_RX14
AE25
PEX_TX1 5
AE26
PEX_TX1 5
AF27
PEX_RX15
AE27
PEX_RX15
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SH EET OF ENG INEE RING DRA WING IS T HE PRO PRIE TA RY P ROP ERT Y O F COM PA L E LEC TRO NICS , INC . AND CONT AI NS C ONFID ENT IAL
THIS SH EET OF ENG INEE RING DRA WING IS T HE PRO PRIE TA RY P ROP ERT Y O F COM PA L E LEC TRO NICS , INC . AND CONT AI NS C ONFID ENT IAL
THIS SH EET OF ENG INEE RING DRA WING IS T HE PRO PRIE TA RY P ROP ERT Y O F COM PA L E LEC TRO NICS , INC . AND CONT AI NS C ONFID ENT IAL AND T RA DE S ECRE T I NFOR MAT IO N. T HIS SHEE T MA Y NO T B E T RAN SFER ED F ROM TH E CUS TO DY O F T HE C OM PET ENT DI VISI ON O F R& D
AND T RA DE S ECRE T I NFOR MAT IO N. T HIS SHEE T MA Y NO T B E T RAN SFER ED F ROM TH E CUS TO DY O F T HE C OM PET ENT DI VISI ON O F R& D
AND T RA DE S ECRE T I NFOR MAT IO N. T HIS SHEE T MA Y NO T B E T RAN SFER ED F ROM TH E CUS TO DY O F T HE C OM PET ENT DI VISI ON O F R& D DEPA RT MEN T E XCE PT AS AUT HOR IZED BY COM PAL EL ECT RONI CS, INC. N EIT HER THI S SH EET NO R T HE IN FORM AT ION IT CONT AI NS
DEPA RT MEN T E XCE PT AS AUT HOR IZED BY COM PAL EL ECT RONI CS, INC. N EIT HER THI S SH EET NO R T HE IN FORM AT ION IT CONT AI NS
DEPA RT MEN T E XCE PT AS AUT HOR IZED BY COM PAL EL ECT RONI CS, INC. N EIT HER THI S SH EET NO R T HE IN FORM AT ION IT CONT AI NS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PEX_TST CLK_OUT PEX_TST CLK_OUT
2006/02 /13 2006/03 /10
2006/02 /13 2006/03 /10
2006/02 /13 2006/03 /10
PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD
PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ
VDD_SENSE GND_SENSE
PEX_PLLV DD
PEX_TERM P
D
AC9 AD7 AD8 AE7 AF7 AG7
AB13 AB16 AB17 AB7 AB8 AB9 AC13 AC7 AD6 AE6 AF6 AG6
J10
VDD
J12
VDD
J13
VDD
J9
VDD
L9
VDD
M11
VDD
M17
VDD
M9
VDD
N11
VDD
N12
VDD
N13
VDD
N14
VDD
N15
VDD
N16
VDD
N17
VDD
N19
VDD
N9
VDD
P11
VDD
P12
VDD
P13
VDD
P14
VDD
P15
VDD
P16
VDD
P17
VDD
R11
VDD
R12
VDD
R13
VDD
R14
VDD
R15
VDD
R16
VDD
R17
VDD
R9
VDD
T11
VDD
T17
VDD
T9
VDD
U19
VDD
U9
VDD
W10
VDD
W12
VDD
W13
VDD
W18
VDD
W19
VDD
W9
VDD
W15 W16
A12
VDD33
B12
VDD33
C12
VDD33
D12
VDD33
E12
VDD33
F12
VDD33
AF9
AF10 AE10
AG9
RFU
AG10
Compal Secret Data
Compal Secret Data
Compal Secret Data
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
120mA
PEX_PLLDVDD
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
1 2
1 2
R209
R209
2.49K_ 0402 _1%
2.49K_ 0402 _1%
Deciphere d Date
Deciphere d Date
Deciphere d Date
1
C244
C244
2
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
1
C258
C258
2
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
2
C262
C262
1
1U_0 603_ 10V4Z
1U_0 603_ 10V4Z
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
1
C273
C273
2
1
C285
C285
2
470P_ 040 2_50 V7K
470P_ 040 2_50 V7K
1
C295
C295
2
R392 0_04 02_5 %R392 0_04 02_5 %
1 2
110 mA
1
C327
C327
2
R208 200 _040 2_1%R208 200_ 0402 _1%
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
1
2
470P_ 040 2_50 V7K
470P_ 040 2_50 V7K
1
C249
C249
2
4.7U_ 0603 _6.3V6K
4.7U_ 0603 _6.3V6K
1
C263
C263
2
1
C274
C274
2
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
1
C286
C286
2
470P_ 040 2_50 V7K
470P_ 040 2_50 V7K
1
C296
C296
2
470P_ 040 2_50 V7K
470P_ 040 2_50 V7K
+NVVDD_S ENSE
1
C147 6
C147 6
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_ 0603 _6.3V6M
4.7U_ 0603 _6.3V6M
1
C325
C325
2
0.01U _040 2_25 V7K
0.01U _040 2_25 V7K
C252
C252
C259
C259
1U_0 603_ 10V4Z
1U_0 603_ 10V4Z
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
4.7U_ 0603 _6.3V6K
4.7U_ 0603 _6.3V6K
470P_ 040 2_50 V7K
470P_ 040 2_50 V7K
VDD33
1
C314
C314
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C446
C446
2
2
1
1U_0 603_ 10V4Z
1U_0 603_ 10V4Z
2
1
1
C264
C264
2
10U_ 0805 _6.3V6M
10U_ 0805 _6.3V6M
1
C275
C275
2
1
C287
C287
2
1
C297
C297
2
+3VS
1
2
1U_0603_10V4Z
1U_0603_10V4Z
1
C447
C447
2
1U_0 402_ 6.3V4Z
1U_0 402_ 6.3V4Z
+PCIE
600 mA
10U_ 0805 _6.3V6M
10U_ 0805 _6.3V6M
1
1
C254
C254
C255
C253
C253
2
4.7U_ 0603 _6.3V6K
4.7U_ 0603 _6.3V6K
+PCIE
1.920 Amps
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
1
C276
C276
2
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
4.7U_ 0603 _6.3V6K
4.7U_ 0603 _6.3V6K
1
C288
C288
2
4.7U_ 0603 _6.3V6K
4.7U_ 0603 _6.3V6K
470P_ 040 2_50 V7K
470P_ 040 2_50 V7K
1
C298
C298
2
470P_ 040 2_50 V7K
470P_ 040 2_50 V7K
C311
C311
L10
L10
BLM18PG 181SN 1D_ 0603
BLM18PG 181SN 1D_ 0603
Title
Title
Title
Size Do cume nt Num be r Rev
Size Do cume nt Num be r Rev
Size Do cume nt Num be r Rev
Cus tom
Cus tom
Cus tom Date: Sheet of
Date: Sheet of
Date: Sheet of
C255
2
1
1
C278
C278
C277
C277
2
2
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
4.7u X 3
1
C289
C289
2
1
C299
C299
2
12
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
0.47u X 7
0.1u X 7
1
C300
C300
2
470P_ 040 2_50 V7K
470P_ 040 2_50 V7K
+PCIE
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PEG & LVDS & DAC
PEG & LVDS & DAC
PEG & LVDS & DAC
E
+NVVDD
0.1
0.1
0.1
20 5 1Friday, October 0 5, 2007
20 5 1Friday, October 0 5, 2007
20 5 1Friday, October 0 5, 2007
5
hexainf@hotmail.com
U17L
U17L
NB9M-GS_BGA_533P
NB9M-GS_BGA_533P COMMON
COMMON
11/13 M ISC
R214
R214
40.2K_ 0402 _1%
40.2K_ 0402 _1% R216
R216
HDCP ROM
36 mA
GPU_PLLVDD
1
2
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
R228
R228
10K_0 402 _5%
10K_0 402 _5%
@
@
11/13 M ISC
C7
STRAP0
B9
STRAP1
A9
STRAP2
F11
STRAP_REF_3 V3
F10
STRAP_REF_M IOB
F9
SPDIF
C15
RFU
D15
RFU
+3VS +3VS
2
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z C351
C351
1
HDCP _WP HDCP_SCL HDCP_SDA
U17K
U17K
NB9M-GS_BGA_533P
NB9M-GS_BGA_533P COMMON
COMMON
K5
PLLVDD
K6
VID_PLLVDD
L6
SP_PLLVDD
D11
XTAL_SS IN
D10
XTAL_IN
C356
@C 356
@
18P_0 402 _50V8J
18P_0 402 _50V8J
R233 0_0 402_ 5%
R233 0_0 402_ 5%
12/13 XTA L_PLL
12/13 XTA L_PLL
1 2
@ R 235
@
10K_0 402 _5%
10K_0 402 _5%
HDCP _WP
R235
12
XTALIN
8
VCC
7
WP
6
SCL
5
SDA
1
C355
C355
2
12
XTALIN XTALOUT
1
2
27M_CL K17
STRAP0 STRAP1 STRAP2
D D
SPDIF
L14
L14
C497
C497
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.01U _040 2_25 V7K
0.01U _040 2_25 V7K
12
1
2
1 2
C352
C352
1U_0402_6.3V4Z
1U_0402_6.3V4Z
SPDIF_OU T33,40
C C
BLM18PG 181SN 1D_ 0603
BLM18PG 181SN 1D_ 0603
+PCIE
B B
+3VS
C349
C349
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
1
C353
C353
2
1U_0 402_ 6.3V4Z
1U_0 402_ 6.3V4Z
12
10K_0 402 _5%
10K_0 402 _5% R217
SPDIF_IN
12
10K_0 402 _5%
10K_0 402 _5% R220
R220
1
2
27M_SSC17
40.2K_ 0402 _1%
40.2K_ 0402 _1%
1 2 1 2
@R217
@
@
@
U7
U7
1
A0
2
A1
3
A2
4
GND
AT88SC0 808
AT88SC0 808
<BOM Structur e>
<BOM Structur e>
C354
C354
12
10K_0 402 _5%
10K_0 402 _5% R221
12
10K_0 402 _5%
10K_0 402 _5% R223
R223
@R221
@
HDCP _SCL
ROM_CS
ROM_SI
ROM_SO
ROM_SCLK
I2CH_SCL
I2CH_SDA
BUFRST
TESTM ODE
RFU_GND
RFU
RFU
12
10K_0 402 _5%
10K_0 402 _5% R224
R224
Straps
MULTI LEVEL STRAPS
ValueDDR2
STRAP0 STRAP1 STRAP2 ROM_SI ROM_SO ROM_SCL K
R243
R242
@ R242
@
1 2
5.1K_0 402_ 5%
A A
5.1K_0 402_ 5%
1 2
10K_0 402 _1%
10K_0 402 _1%
@ R246
@
1 2
5.1K_0 402_ 5%
5.1K_0 402_ 5%
20K_0 402 _1%
20K_0 402 _1%
@ R250
@
1 2
5.1K_0 402_ 5%
5.1K_0 402_ 5%
1 2
15K_0 402 _5%
15K_0 402 _5%
R244
R244
R246
R248
R248
1
R250
R252
R252
R243
1 2
45.3K_ 0402 _1%
45.3K_ 0402 _1% R245
5.1K_0 402_ 5%
5.1K_0 402_ 5% R247
R247
1 2
5.1K_0 402_ 5%
5.1K_0 402_ 5% R249
@ R249
@ 1 2
5.1K_0 402_ 5%
5.1K_0 402_ 5% R251
R251
1 2
5.1K_0 402_ 5%
5.1K_0 402_ 5% R253
@ R253
@ 1 2
5.1K_0 402_ 5%
5.1K_0 402_ 5%
5
16MX16 Hynix 16MX16 Samsung 32MX16 Hynix 32MX16 Samsung
+3VS
@R245
@1 2
Resis tor R248Locating
20 Kohms 10 Kohms 45 Kohms 30 Kohms
B10 A10
C10 C9
A3 A4
N5 J5 F6
AD25
AC6
XTAL_OUT BUFF
XTAL_OUT
10K_0 402 _5%
10K_0 402 _5%
ROM_CS# ROM_SI
ROM_SO ROM_SCL K
HDCP_SCL HDCP_SDA
18P_0 402 _50V8J
18P_0 402 _50V8J
4
R211
R211
1 2
12
10K_0 402 _5%
10K_0 402 _5% R218
R218
E9
E10
C357
@C3 57
@
4
3
+3VS
12
R21310K_0 402_ 5%@ R21310K_0 402_ 5%@
+3VS
12
+3VS
R21510K _040 2_5% R21510K _040 2_5%
4.7U_ 0603 _6.3V6K
4.7U_ 0603 _6.3V6K C337
C337
+1.8VS
BLM18PG 181SN 1D_ 0603
BLM18PG 181SN 1D_ 0603
1
2
4.7U_ 0603 _6.3V6K
4.7U_ 0603 _6.3V6K
L12
L12
C342
C342
12
C338
C338
4.7U_ 0603 _6.3V6K
4.7U_ 0603 _6.3V6K
+PCIE
9/21 change C341 form 220p to 470p for nvidia
160 mA
1
2
4700 P_04 02_2 5V7K
4700 P_04 02_2 5V7K
BLM18PG 181SN 1D_ 0603
BLM18PG 181SN 1D_ 0603
12
L13
L13
1
2
4.7U_ 0603 _6.3V6K
4.7U_ 0603 _6.3V6K
1
2
C340
C340
4700 P_04 02_2 5V7K
4700 P_04 02_2 5V7K
1
C343
C343
2
470P_ 040 2_50 V7K
470P_ 040 2_50 V7K
1
2
C341
C341
385 mA
1
2
C346
C346
IFPC_IOVDD
470P_ 040 2_50 V7K
470P_ 040 2_50 V7K
VGA Thermal Sensor
1
2
12
R229
R229 10K_0 402 _5%
10K_0 402 _5%
@
@
ADM1032ARMZ
+3VS
Closed to VGA
2
C348
@C3 48
@
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
1
U6
1
THERM#_ VGA
VDD
2
D+
3
D­THERM#4GND
ADM1032 ARMZ REEL_ MSOP8@U6ADM1032 ARMZ REEL_ MSOP8@
ALERT#
1 2
2200 P_04 02_5 0V7K
2200 P_04 02_5 0V7K
+3VS
C350
@C 350
@
R222
R222
1 2
@
@
10K_0 402 _5%
10K_0 402 _5%
VGA_THERMDA VGA_THERMDC
GPIO I/O ACTIVE USAGE
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
HDMI_CL K­HDMI_CL K+ HDMI_TX0­HDMI_TX0+ HDMI_TX1­HDMI_TX1+ HDMI_TX2­HDMI_TX2+
499_ 0402 _1%
499_ 0402 _1%
R960
R960
<BOM Structur e>
<BOM Structur e>
499_ 0402 _1%
499_ 0402 _1%
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
IN
OUT
OUT
12
R961
R961
12
R962
R962
499_ 0402 _1%
499_ 0402 _1%
N/A
N/A
H
H
H
N/A
N/A
N/A
L
L
N/A
N/A
N/A
L
H
12
R963
R963
499_ 0402 _1%
499_ 0402 _1%
12
499_ 0402 _1%
499_ 0402 _1%
VGA_SM_CLK
8
SCLK
VGA_SM_DA
7
SDATA
THERM_S CI#
6 5
Primary DVI Hot-plug
2nd DVI Hot-plug
Panel Back-Light PWM
Panel Power Enable
Panel Back-Light Enable
NVVDD VID0
NVVDD VID1
FBVDD VID0
Thermal Alert
FAN PWM
FBVref Select
SLI SYNCO
AC Detect
PS Control or HDMI_CEC
PS Control
12
12
R965
R965
R966
R966
R964
R964
499_ 0402 _1%
499_ 0402 _1%
499_ 0402 _1%
499_ 0402 _1%
3
VGA_SM_CLK VGA_SM_DA
12
R967
R967
499_ 0402 _1%
499_ 0402 _1%
R219
R219 10K_0 402 _5%
10K_0 402 _5%
1 2
12
@
@
THERM_S CI# 27,38
R112 9 0_0 402_ 5%R1129 0 _04 02_5 %
12 12
R113 0 0 _040 2_5%R1 130 0_0402 _5%
9/21 follow 17"
SMB_EC_ CK2 6,38 SMB_EC_ DA2 6,38
ICH_S MBCLK1 7,27,31 ,37
ICH_S MBDATA17,27 ,31,37
Security Classification
Security Classification
Security Classification
THIS SH EET OF ENG INEE RING DRA WING IS T HE PRO PRIE TA RY P ROP ERT Y O F COM PA L E LEC TRO NICS , INC . AND CONT AI NS C ONFID ENT IAL
THIS SH EET OF ENG INEE RING DRA WING IS T HE PRO PRIE TA RY P ROP ERT Y O F COM PA L E LEC TRO NICS , INC . AND CONT AI NS C ONFID ENT IAL
THIS SH EET OF ENG INEE RING DRA WING IS T HE PRO PRIE TA RY P ROP ERT Y O F COM PA L E LEC TRO NICS , INC . AND CONT AI NS C ONFID ENT IAL AND T RA DE S ECRE T I NFOR MAT IO N. T HIS SHEE T MA Y NO T B E T RAN SFER ED F ROM TH E CUS TO DY O F T HE C OM PET ENT DI VISI ON O F R& D
AND T RA DE S ECRE T I NFOR MAT IO N. T HIS SHEE T MA Y NO T B E T RAN SFER ED F ROM TH E CUS TO DY O F T HE C OM PET ENT DI VISI ON O F R& D
AND T RA DE S ECRE T I NFOR MAT IO N. T HIS SHEE T MA Y NO T B E T RAN SFER ED F ROM TH E CUS TO DY O F T HE C OM PET ENT DI VISI ON O F R& D DEPA RT MEN T E XCE PT AS AUT HOR IZED BY COM PAL EL ECT RONI CS, INC. N EIT HER THI S SH EET NO R T HE IN FORM AT ION IT CONT AI NS
DEPA RT MEN T E XCE PT AS AUT HOR IZED BY COM PAL EL ECT RONI CS, INC. N EIT HER THI S SH EET NO R T HE IN FORM AT ION IT CONT AI NS
DEPA RT MEN T E XCE PT AS AUT HOR IZED BY COM PAL EL ECT RONI CS, INC. N EIT HER THI S SH EET NO R T HE IN FORM AT ION IT CONT AI NS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
U17I
U17I
NB9M-GS_BGA_533P
NB9M-GS_BGA_533P COMMON
COMMON
10/13 HDAUDIO
10/13 HDAUDIO
Issued Date
Issued Date
Issued Date
R234
R234 10K_0 402 _5%
10K_0 402 _5%
R236
R236 10K_0 402 _5%
10K_0 402 _5%
HDA_BCLK
HDA_SYNC
2
U17H
U17H
NB9M-GS_BGA_533P
NB9M-GS_BGA_533P COMMON
COMMON
7/13 IFPC
IFPC_PLLVDD
IFPC_RSET
12
R212
R212 1K_04 02_ 1%
1K_04 02_ 1%
1
2
C347
C347
@
7/13 IFPC
P6
IFPC_PLLVDD
R5
IFPC_RSET
J6
IFPC_IOVDD
U17G
U17G
NB9M-GS_BGA_533P
NB9M-GS_BGA_533P COMMON
COMMON
8/13 IFPE
8/13 IFPE
N6
IFPE_PLLVDD
M6
IFPE_RSET
12
H6
IFPE_IOVDD
12
VGA_THERMDC VGA_THERMDA
JTAG_TCK
T47T47
JTAG_TMS
T48T48
JTAG_TDI
T49T49
JTAG_TDO
T50T50
JTAG_TRST
T51T51
R2250_04 02_5 % @ R2250_0402 _5% @
VGA_SM_CLK
12
VGA_SM_DA
12
R2260_04 02_5 %@R2260_04 02_5 %
MXM DVI DP
MXM DVI DP
TXD0
TXD0 TXD0
TXD0
C
C
TXD1
TXD1 TXD1
TXD1
TXD2
TXD2 TXD2
TXD2
TXC
TXC TXC
TXC
TXD0
TXD0 TXD0
TXD0
E
E
TXD1
TXD1 TXD1
TXD1
TXD2
TXD2 TXD2
TXD2
TXC
TXC TXC
TXC
U17M
U17M
NB9M-GS_BGA_533P
NB9M-GS_BGA_533P COMMON
COMMON
9/13 I2C_G PIO_THERM_ JTAG
9/13 I2C_G PIO_THERM_ JTAG
D8
THERMDN
D9
THERMDP
AF3
JTAG_TCK
AF4
JTAG_TM S
AG4
JTAG_TDI
AE4
JTAG_TDO
AG3
JTAG_TRS T
T1
I2CS_SCL
T2
I2CS_SDA
HD AUDIO
A7 B7
HDA_SD IN2_R
R399 33_0 402 _5%
2
R399 33_0 402 _5%
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphere d Date
Deciphere d Date
Deciphere d Date
A6
HDA_SDI
B6
HDA_SDO
C6
HDA_RST
9/21 R329 near GPU
9/21 R237, R238, R240, R241 near ICH
2006/02 /13 2006/03 /10
2006/02 /13 2006/03 /10
2006/02 /13 2006/03 /10
TXD0
TXD0 TXD0
TXD0
TXD2
TXD2 TXD2
TXD2
TXD1
TXD1 TXD1
TXD1
TXC
TXC TXC
TXC
DVIMXM
DVIMXM
TXD0
TXD0 TXD0
TXD0
TXD2
TXD2 TXD2
TXD2
TXD1
TXD1 TXD1
TXD1
TXC
TXC TXC
TXC
1 2
G5
IFPC_AUX
G4
IFPC_AUX
J4
IFPC_L3
H4
IFPC_L3
K4
IFPC_L2
L4
IFPC_L2
M4
IFPC_L1
M5
IFPC_L1
N4
IFPC_L0
P4
IFPC_L0
DP
DP
D4
IFPE_AUX
D3
IFPE_AUX
B4
IFPE_L3
B3
IFPE_L3
C4
IFPE_L2
C3
IFPE_L2
D5
IFPE_L1
E4
IFPE_L1
F4
IFPE_L0
F5
IFPE_L0
HDA_BITC LK_VGA 26,33
HDA_SYNC _VGA 26,3 3
HDA_SD IN2 26
HDA_SD OUT_VGA 26
HDA_R ST#_VGA 2 6,33
1
HDMI_C_ CLK-
C147 4 0 .1U_0 402_ 16V4ZC147 4 0 .1U_0 402_ 16V4Z
HDMI_C_ CLK+ HDMI_C_ TX0-
HDMI_C_ TX0+ HDMI_C_ TX1-
HDMI_C_ TX1+ HDMI_C_ TX2-
HDMI_C_ TX2+
I2CA_SCL
I2CA_SDA
I2CB_SCL
I2CB_SDA
I2CC_SCL I2CC_SDA
I2CD_SCL I2CD_SDA
I2CE_SCL
I2CE_SDA
1 2
C147 5 0 .1U_0 402_ 16V4ZC147 5 0 .1U_0 402_ 16V4Z1 2 C146 8 0 .1U_0 402_ 16V4ZC146 8 0 .1U_0 402_ 16V4Z1 2
C146 9 0 .1U_0 402_ 16V4ZC146 9 0 .1U_0 402_ 16V4Z
1 2
C147 0 0 .1U_0 402_ 16V4ZC147 0 0 .1U_0 402_ 16V4Z
1 2
C147 1 0 .1U_0 402_ 16V4ZC147 1 0 .1U_0 402_ 16V4Z1 2 C147 2 0 .1U_0 402_ 16V4ZC147 2 0 .1U_0 402_ 16V4Z1 2
C147 3 0 .1U_0 402_ 16V4ZC147 3 0 .1U_0 402_ 16V4Z
1 2
I2CE_S CL I2CE_S DA
I2CB_S CL I2CB_S DA
R1 T3
I2CB_S CL
R2
I2CB_S DA
R3
DDC2_CLK
A2
DDC2_DATA
B1 N2
N3
I2CE_S CL
Y6
I2CE_S DA
W6
N1
GPIO0
G1
GPIO1
C1
GPIO2
ENVDD
M2
GPIO3
M3
GPIO4
K3
GPIO5
K2
GPIO6
J2
GPIO7
THERMAL ALERT
C2
GPIO8
SINN_GPIO9
M1
GPIO9
D2
GPIO10
D1
GPIO11
J3
GPIO12
J1
GPIO13
K1
GPIO14
F3
GPIO15
G3
GPIO16
G2
GPIO17
F1
GPIO18
F2
GPIO19
Title
Title
Title
Size Do cume nt Num be r Rev
Size Do cume nt Num be r Rev
Size Do cume nt Num be r Rev
Cus tom
Cus tom
Cus tom Date: Sheet
Date: Sheet
Date: Sheet
1 2 1 2
9/21 GPU_VID
High: +NVVDDP 1.0V Low: +NVVDDP 0.9V
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Straps & HDMI
Straps & HDMI
Straps & HDMI
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
1
1 2 1 2
3VDDC CL 18
3VDDC DA 18
DDC2 _CL K 19
DDC2 _DATA 19
HDMICLK _VGA 42
HDMIDAT_VGA 42
HDMI_DE TECT 42 ENAVDD 19
ENBKL 3 8 GPU_VID 4 7
THERM#_ VGA THERM_S CI#
R3960_04 02_5 % R39 60_0402_ 5% R3950_04 02_5 % R39 50_0402_ 5%
HDMI_CL K- 42 HDMI_CL K+ 42
HDMI_TX0- 42 HDMI_TX0+ 42
HDMI_TX1- 42 HDMI_TX1+ 42
HDMI_TX2- 42 HDMI_TX2+ 42
R2272K_0 402_ 5% R22 72 K_040 2_5% 1 2 R2302K_0 402_ 5% R23 02 K_040 2_5%
R2312K_0 402_ 5% R23 12 K_040 2_5% R2322K_0 402_ 5% R23 22 K_040 2_5% 1 2
+3VS
CRT
LVDS
21 5 1Monday, October 0 8, 200 7
21 5 1Monday, October 0 8, 200 7
21 5 1Monday, October 0 8, 200 7
HDMI
of
of
of
0.1
0.1
0.1
A
R112 4 0_12 06_5 %
R112 4 0_12 06_5 %
0.022 U_04 02_1 6V7K
0.022 U_04 02_1 6V7K
1
C358
C358
2
4700 P_04 02_2 5V7K
4700 P_04 02_2 5V7K
1
C361
C361
2
4700 P_04 02_2 5V7K
4700 P_04 02_2 5V7K
1
C370
C370
2
CMDA[30..0] 2 3,24
CLKA0 2 3 CLKA0# 23 CLKA1 2 4 CLKA1# 24
R254 30_ 0402 _1%R 254 30_0 402 _1%
+VDD_MEM18
R255 30_0 402 _1%R2 55 30_04 02_1 %1 2 R256 40.2_ 0402 _1%@ R2 56 40.2_0 402_ 1%@1 2
+VDD_MEM18
1 2 1 2
R112 5 0_1 206_ 5%
R112 5 0_1 206_ 5%
1
C359
C359
C366
C366
2
0.022 U_04 02_1 6V7K
0.022 U_04 02_1 6V7K
1
C369
C369
C362
C362
2
4700 P_04 02_2 5V7K
4700 P_04 02_2 5V7K
1
C371
C371
2
C372
C372
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
1
C360
C360
2
0.022 U_04 02_1 6V7K
0.022 U_04 02_1 6V7K
1
C363
C363
2
1U_0 402_ 6.3V4Z
1U_0 402_ 6.3V4Z
C373
C373
1
2
<BOM Structur e>
<BOM Structur e>
9/18 add R for nvidia
CMDA12
CMDA11
1
2
4.7U_ 0603 _6.3V6K
4.7U_ 0603 _6.3V6K
1
2
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
1
2
1U_0 402_ 6.3V4Z
1U_0 402_ 6.3V4Z
R113 1 1 0K_0 402_ 5%R 1131 10K_04 02_5 %
1 2
R394 10K _040 2_5%R394 10K_04 02_5 %
1 2
+VDD_MEM18
4.7U_ 0603 _6.3V6K
4.7U_ 0603 _6.3V6K
C367
C367
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
C364
C364
0.022 U_04 02_1 6V7K
0.022 U_04 02_1 6V7K
C374
C374
U17J
U17J
NB9M-GS_BGA_533P
NB9M-GS_BGA_533P COMMON
COMMON
13/13 GND_NC
13/13 GND_NC
AC11
GND
AC14
GND
AC17
1
C368
C368
2
1
C365
C365
2
1
C375
C375
2
GND
AC2
GND
AC20
GND
AC23
GND
AC26
GND
AC5
GND
AC8
GND
AF11
GND
AF14
GND
AF17
GND
AF2
GND
AF20
GND
AF23
GND
AF26
GND
AF5
GND
AF8
GND
B11
GND
B14
GND
B17
GND
B2
GND
B20
GND
B23
GND
B26
GND
B5
GND
B8
GND
E11
GND
E14
GND
E17
GND
E2
GND
E20
GND
E23
GND
E26
GND
E5
GND
E8
GND
H2
GND
H5
GND
J11
GND
J14
GND
J17
GND
K19
GND
K9
GND
L11
GND
L12
GND
L13
GND
L14
GND
L15
GND
L16
GND
L17
GND
L2
GND
L5
GND
M12
GND
M13
GND
M14
GND
M15
GND
M16
GND
P19
GND
P2
GND
P23
GND
P26
GND
P5
GND
P9
GND
T12
GND
T13
GND
T14
GND
T15
GND
T16
GND
U11
GND
U12
GND
U13
GND
U14
GND
U15
GND
U16
GND
U17
GND
U2
GND
U23
GND
U26
GND
U5
GND
V19
GND
V9
GND
W11
GND
W14
GND
W17
GND
Y2
GND
Y23
GND
Y26
GND
Y5
GND
AA6
NC
AC19
NC
E15
NC
T6
NC
VRAM Interface
MDA[15..0]23 MDA[31..16]23 MDA[47..32]24 MDA[63..48]24
1 1
MDA[15..0] MDA[31..16] MDA[47..32] MDA[63..48]
U17B
U17B
NB9M-GS_BGA_533P
NB9M-GS_BGA_533P COMMON
COMMON
2/13 FRAME_ BUFFER
2/13 FRAME_ BUFFER
MDA0
D21
FBA_D0
MDA1
C22
FBA_D1
MDA2
B22
FBA_D2
MDA3
A22
FBA_D3
MDA4
C24
FBA_D4
MDA5
B25
FBA_D5
MDA6
A25
FBA_D6
MDA7
A26
FBA_D7
MDA8
D22
FBA_D8
MDA9
E22
FBA_D9
MDA10
E24
FBA_D10
MDA11
D24
FBA_D11
MDA12
D26
FBA_D12
MDA13
D27
FBA_D13
MDA14
C27
FBA_D14
MDA15
B27
FBA_D15
MDA16
D16
FBA_D16
MDA17
E16
FBA_D17
MDA18
D17
FBA_D18
MDA19
F18
FBA_D19
MDA20
D20
FBA_D20
MDA21
F20
FBA_D21
MDA22
E21
FBA_D22
MDA23
F21
FBA_D23
MDA24
C16
FBA_D24
MDA25
B18
FBA_D25
MDA26
C18
FBA_D26
MDA27
D18
FBA_D27
MDA28
C19
FBA_D28
MDA29
C21
FBA_D29
MDA30
B21
FBA_D30
MDA31
A21
FBA_D31
MDA32
P22
FBA_D32
MDA33
P24
FBA_D33
MDA34
R23
FBA_D34
MDA35
R24
FBA_D35
MDA36
T23
FBA_D36
MDA37
U24
FBA_D37
MDA38
V23
FBA_D38
MDA39
V24
FBA_D39
MDA40
N25
FBA_D40
MDA41
N26
FBA_D41
MDA42
R25
FBA_D42
MDA43
R26
FBA_D43
MDA44
T25
FBA_D44
MDA45
V26
FBA_D45
MDA46
V25
FBA_D46
MDA47
V27
FBA_D47
MDA48
V22
FBA_D48
MDA49
W22
FBA_D49
MDA50
W23
FBA_D50
MDA51
W24
FBA_D51
MDA52
AA22
FBA_D52
MDA53
AB23
FBA_D53
MDA54
AB24
FBA_D54
MDA55
AC24
FBA_D55
MDA56
W25
FBA_D56
MDA57
W26
FBA_D57
MDA58
W27
FBA_D58
MDA59
AA25
FBA_D59
MDA60
AB25
FBA_D60
MDA61
AB26
FBA_D61
MDA62
AD26
FBA_D62
MDA63
AD27
DQMA[3..0]23
DQMA[7..4]24
QSA[3..0]2 3
QSA[7..4]2 4
QSA#[3..0]23
QSA#[7..4]24
DQMA0 DQMA1 DQMA2 DQMA3 DQMA4 DQMA5 DQMA6 DQMA7
QSA0 QSA1 QSA2 QSA3 QSA4 QSA5 QSA6 QSA7
QSA#0 QSA#1 QSA#2 QSA#3 QSA#4 QSA#5 QSA#6 QSA#7
FBA_D63
D23
FBA_DQM0
C26
FBA_DQM1
D19
FBA_DQM2
B19
FBA_DQM3
T24
FBA_DQM4
T26
FBA_DQM5
AA23
FBA_DQM6
AB27
FBA_DQM7
A24
FBA_DQS_WP0
C25
FBA_DQS_WP1
E19
FBA_DQS_WP2
A19
FBA_DQS_WP3
T22
FBA_DQS_WP4
T27
FBA_DQS_WP5
AA24
FBA_DQS_WP6
AA26
FBA_DQS_WP7
B24
FBA_DQS_RN0
D25
FBA_DQS_RN1
E18
FBA_DQS_RN2
A18
FBA_DQS_RN3
R22
FBA_DQS_RN4
R27
FBA_DQS_RN5
Y24
FBA_DQS_RN6
AA27
FBA_DQS_RN7
FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ
FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8
FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28
FBA_CLK0 FBA_CLK0 FBA_CLK1 FBA_CLK1
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TE RM_GND
FBA_DEBUG
RFU RFU
+VDD_MEM18 +1.8VS
1 A13 B13 C13
2
D13 D14 E13
0.022 U_04 02_1 6V7K
0.022 U_04 02_1 6V7K
F13 F14 F15 F16 F17 F19
1 F22 H23 H26
2
J15 J16
4700 P_04 02_2 5V7K
4700 P_04 02_2 5V7K
J18 J19 L19 L23 L26 M19
1 N22 U22 Y22
2
4700 P_04 02_2 5V7K
4700 P_04 02_2 5V7K
CMDA0
F26
CMDA1
J24
CMDA2
F25
CMDA3
M23
CMDA4
N27
CMDA5
M27
CMDA6
K26
CMDA7
J25
CMDA8
J27
CMDA9
G23
CMDA10
G26
CMDA11
J23
CMDA12
M25
CMDA13
K27
CMDA14
G25
CMDA15
L24
CMDA16
K23
CMDA17
K24
CMDA18
G22
CMDA19
K25
CMDA20
H22
CMDA21
M26
CMDA22
H24
CMDA23
F27
CMDA24
J26
CMDA25
G24
CMDA26
G27
CMDA27
M24
CMDA28
K22
CMDA29
J22
CMDA30
L22
F24 F23 N24 N23
B15
1 2 A15 B16
R257
R257
M22
1 2
10K_0 402 _5% @
10K_0 402 _5% @
R258
@ R 258
@
1K_04 02_ 1%
1K_04 02_ 1%
R259
@ R 259
@
1K_04 02_ 1%
1K_04 02_ 1%
+VDD_MEM18
12
12
Rt
Rb
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
R19
0.1U_ 0402 _16V4Z
0.1U_ 0402 _16V4Z
FB_PLLAVDD
T19
FB_DLLAVDD
A16
FB_VREF
1
C378
C378
2
@
@
1
C376
C376
2
1
C379
C379
2
0.01U _040 2_25 V7K
0.01U _040 2_25 V7K
1
C377
C377 1U_0 402_ 6.3V4Z
1U_0 402_ 6.3V4Z
2
BLM18PG 181SN 1D_ 0603
BLM18PG 181SN 1D_ 0603
1
C380
C380 1U_0 402_ 6.3V4Z
1U_0 402_ 6.3V4Z
2
12
L15
L15
BLM18PG 181SN 1D_ 0603
BLM18PG 181SN 1D_ 0603
+PCIE
12
+PCIE
L16
L16
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SH EET OF ENG INEE RING DRA WING IS T HE PRO PRIE TA RY P ROP ERT Y O F COM PA L E LEC TRO NICS , INC . AND CONT AI NS C ONFID ENT IAL
THIS SH EET OF ENG INEE RING DRA WING IS T HE PRO PRIE TA RY P ROP ERT Y O F COM PA L E LEC TRO NICS , INC . AND CONT AI NS C ONFID ENT IAL
THIS SH EET OF ENG INEE RING DRA WING IS T HE PRO PRIE TA RY P ROP ERT Y O F COM PA L E LEC TRO NICS , INC . AND CONT AI NS C ONFID ENT IAL AND T RA DE S ECRE T I NFOR MAT IO N. T HIS SHEE T MA Y NO T B E T RAN SFER ED F ROM TH E CUS TO DY O F T HE C OM PET ENT DI VISI ON O F R& D
AND T RA DE S ECRE T I NFOR MAT IO N. T HIS SHEE T MA Y NO T B E T RAN SFER ED F ROM TH E CUS TO DY O F T HE C OM PET ENT DI VISI ON O F R& D
AND T RA DE S ECRE T I NFOR MAT IO N. T HIS SHEE T MA Y NO T B E T RAN SFER ED F ROM TH E CUS TO DY O F T HE C OM PET ENT DI VISI ON O F R& D DEPA RT MEN T E XCE PT AS AUT HOR IZED BY COM PAL EL ECT RONI CS, INC. N EIT HER THI S SH EET NO R T HE IN FORM AT ION IT CONT AI NS
DEPA RT MEN T E XCE PT AS AUT HOR IZED BY COM PAL EL ECT RONI CS, INC. N EIT HER THI S SH EET NO R T HE IN FORM AT ION IT CONT AI NS
DEPA RT MEN T E XCE PT AS AUT HOR IZED BY COM PAL EL ECT RONI CS, INC. N EIT HER THI S SH EET NO R T HE IN FORM AT ION IT CONT AI NS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03 /10 2006/03 /10
2005/03 /10 2006/03 /10
2005/03 /10 2006/03 /10
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphere d Date
Deciphere d Date
Deciphere d Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Do cume nt Num be r Rev
Size Do cume nt Num be r Rev
Size Do cume nt Num be r Rev
Cus tom
Cus tom
Cus tom
Date: Sheet of
Date: Sheet of
Date: Sheet of
VRAM / GND
VRAM / GND
VRAM / GND
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
22 5 1Friday, October 0 5, 2007
22 5 1Friday, October 0 5, 2007
22 5 1Friday, October 0 5, 2007
0.1
0.1
0.1
5
hexainf@hotmail.com
4
3
2
1
DATA Bus
Address
VRAM DDR2 chips (256MB & 128MB)
32Mx16 DDR2 400MHz *4==>256MB 16Mx16 DDR2 400MHz*4==>128MB
D D
QSA[7..0]22,24 QSA#[7..0]22,24
DQMA[7..0]22,24
MDA[63..0]22,24
CMDA[30..0]22,24
QSA[7..0] QSA#[7..0]
DQMA[7..0]
MDA[63..0]
CMDA[30..0]
0..31 CMD0 CMD1 CMD2 CMD3 CMD4 CMD5 CMD6 CMD7
CMD9 CMD10 CMD11 CMD12
A3 A0 A2 A1
CS# WE# BA0 CKE ODT
32..63
A0
A1 A3 A4 A5
CS#CMD8 WE# BA0 CKE ODT
CMD13
A12 RAS# A11 A10 BA1 A8 A9 A6
A7
CAS# A13 BA2
CLKA0
CLKA0#
R261
R261
A12 RAS# A11 A10 BA1 A8 A9 A6 A5
A4 CAS# A13 BA2
12
CMD14
U9
U8
CMDA10 CMDA18
CMDA14 CMDA16 CMDA17 CMDA20 CMDA19 CMDA23
C C
1K_0402_1%
1K_0402_1%
R262
R262
+VDD_MEM18
12
R260
R260
12
1
2
(SSTL-1.8) VREF = .5*VDDQ
C385
C385
0.1U_0402_16V4Z
0.1U_0402_16V4Z
B B
1K_0402_1%
1K_0402_1%
CMDA21 CMDA22 MDA20 CMDA24 CMDA0 CMDA2 CMDA3 CMDA1
CLKA0# CLKA0
CMDA11
CMDA8 CMDA9 CMDA15 CMDA25
DQMA2 DQMA0
CMDA12
QSA2 QSA#2
QSA0 QSA#0
MEM_VREF0
U8
L2
BA0
L3
BA1
R2
A12
P7
A11
M2
A10/AP
P3
A9
P8
A8
P2
A7
N7
A6
N3
A5
N8
A4
N2
A3
M7
A2
M3
A1
M8
A0
K8
CK
J8
CK
K2
CKE
L8
CS
K3
WE
K7
RAS
L7
CAS
F3
LDM
B3
UDM
K9
ODT
F7
LDQS
E8
LDQS
B7
UDQS
A8
UDQS
J2
VREF
A2
NC#A2
E2
NC#E2
L1
NC#L1
R3
NC#R3
R7
NC#R7
R8
NC#R8
HY5PS561621F-25
HY5PS561621F-25
DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9
VDDQ10
VDD1 VDD2 VDD3 VDD4 VDD5
VDDL
VSSDL
VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9
VSSQ10
VSS1 VSS2 VSS3 VSS4 VSS5
DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
A1 E1 J9 M9 R1
J1 J7
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
A3 E3 J3 N1 P9
MDA7 MDA0 MDA5 MDA2 MDA3 MDA4 MDA1 MDA6 MDA23 MDA18
MDA16 MDA17 MDA21 MDA19 MDA22
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C383
C383
2
1
C384
C384
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
2
CMDA10 CMDA18
CMDA14 CMDA16 CMDA17 CMDA20 CMDA19 CMDA23 CMDA21 CMDA22 CMDA24 CMDA0 CMDA2 CMDA3 CMDA1
CLKA0# CLKA0
CMDA11
CMDA8 CMDA9 CMDA15 CMDA25
DQMA1 DQMA3
CMDA12
QSA1 QSA#1
QSA3 QSA#3
MEM_VREF0
U9
L2
BA0
L3
BA1
R2
A12
P7
A11
M2
A10/AP
P3
A9
P8
A8
P2
A7
N7
A6
N3
A5
N8
A4
N2
A3
M7
A2
M3
A1
M8
A0
K8
CK
J8
CK
K2
CKE
L8
CS
K3
WE
K7
RAS
L7
CAS
F3
LDM
B3
UDM
K9
ODT
F7
LDQS
E8
LDQS
B7
UDQS
A8
UDQS
J2
VREF
A2
NC#A2
E2
NC#E2
L1
NC#L1
R3
NC#R3
R7
NC#R7
R8
NC#R8
HY5PS561621F-25
HY5PS561621F-25
DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9
VDDQ10
VDD1 VDD2 VDD3 VDD4 VDD5
VDDL
VSSDL
VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9
VSSQ10
VSS1 VSS2 VSS3 VSS4 VSS5
B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
A1 E1 J9 M9 R1
J1 J7
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
A3 E3 J3 N1 P9
MDA27 MDA28 MDA24 MDA31 MDA30 MDA25 MDA29 MDA26 MDA15 MDA9 MDA12 MDA8 MDA11 MDA13 MDA10 MDA14
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C381
C381
2
+VDD_MEM18+VDD_MEM18
1
C382
C382
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
2
CLKA022
CLKA0#22
CMD15 CMD16 CMD17 CMD18 CMD19 CMD20 CMD21 CMD22 CMD23 A7 CMD24 CMD25 CMD26 CMD27 CMD28 CMD29 CMD30
475_0402_1%
475_0402_1%
DDR2 BGA MEMORY
+VDD_MEM18
1
C395
A A
C395
1000P_0402_50V7K
1000P_0402_50V7K
2
1
C396
C396
2
0.01U_0402_16V7K
0.01U_0402_16V7K
5
0.01U_0402_16V7K
0.01U_0402_16V7K
1
C397
C397
2
1
C398
C398
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
1
C399
C399
2
1
C400
C400
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C401
C401
2
C402
C402
0.01U_0402_16V7K
0.01U_0402_16V7K
4
1
2
DDR BGA MEMORY
+VDD_MEM18
1
C387
C387
C386
C386
1000P_0402_50V7K
1000P_0402_50V7K
Security Classification
Security Classification
Security Classification
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Issued Date
Issued Date
2
3
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
1
1
2
C389
C389
C388
C388
2
2005/05/05 2006/05/05
2005/05/05 2006/05/05
2005/05/05 2006/05/05
1
C390
C390
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Compal Secret Data
Compal Secret Data
Compal Secret Data
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
1
2
Deciphered Date
Deciphered Date
Deciphered Date
1
C391
C391
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.01U_0402_16V7K
0.01U_0402_16V7K
1
C392
C392
C393
C393
2
2
0.01U_0402_16V7K
0.01U_0402_16V7K
1
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LS-2821 ATI_M56-P VGA Board
CHANNEL A EXT. 256M_1
Monday, October 08, 2007
Monday, October 08, 2007
Monday, October 08, 2007
1
7
0.1
16
5
22,23
22,23
22,23
4
3
2
1
DATA Bus
Address
VRAM DDR2 chips (256MB & 128MB)
32Mx16 DDR2 400MHz *4==>256MB 16Mx16 DDR2 400MHz*4==>128MB
D D
DQMA[7..0] CMDA[30..0]
QSA#[7..0]22,23 QSA[7..0]22,23
MDA[63..0]
DQMA[7..0]
CMDA[30..0] QSA#[7..0] QSA[7..0]
MDA[63..0]
0..31 CMD0 CMD1 CMD2 CMD3 CMD4 CMD5 CMD6 CMD7
CMD9 CMD10 CMD11 CMD12
A3 A0 A2 A1
CS# WE# BA0 CKE ODT
32..63
A0
A1 A3 A4 A5
CS#CMD8 WE# BA0 CKE ODT
CMD13
A12 RAS# A11 A10 BA1 A8 A9 A6
A7
CAS# A13 BA2
CLKA1
12
CLKA1#
0.1
16
8
R267
R267
475_0402_1%
475_0402_1%
1
A12 RAS# A11 A10 BA1 A8 A9 A6 A5
A4 CAS# A13 BA2
CMD14 CMD15 CMD16
U10
CMDA10 CMDA18
CMDA14
C C
B B
+VDD_MEM18
12
R266
R266
1K_0402_1%
1K_0402_1%
12
1
C407
C407
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
R268
R268
1K_0402_1%
1K_0402_1%
CMDA16 CMDA17 CMDA20 CMDA19 CMDA23 CMDA21 CMDA6 CMDA5 CMDA4 CMDA13 CMDA3 CMDA1
CLKA1# CLKA1
CMDA11
CMDA8 CMDA9 CMDA15 CMDA25
CMDA12
QSA5 QSA#5
QSA#4
MEM_VREF1 MEM_VREF1
U10
L2
BA0
L3
BA1
R2
A12
P7
A11
M2
A10/AP
P3
A9
P8
A8
P2
A7
N7
A6
N3
A5
N8
A4
N2
A3
M7
A2
M3
A1
M8
A0
K8
CK
J8
CK
K2
CKE
L8
CS
K3
WE
K7
RAS
L7
CAS
F3
LDM
B3
UDM
K9
ODT
F7
LDQS
E8
LDQS
B7
UDQS
A8
UDQS
J2
VREF
A2
NC#A2
E2
NC#E2
L1
NC#L1
R3
NC#R3
R7
NC#R7
R8
NC#R8
HY5PS561621F-25
HY5PS561621F-25
DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9
VDDQ10
VDD1 VDD2 VDD3 VDD4 VDD5
VDDL
VSSDL
VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9
VSSQ10
VSS1 VSS2 VSS3 VSS4 VSS5
DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
DDR2 BGA MEMORY
4.7U_0805_6.3V6K
1
C420
C420
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0805_6.3V6K
C421
C421
0.01U_0402_16V7K
0.01U_0402_16V7K
1
1
A A
C417
C417
1000P_0402_50V7K
1000P_0402_50V7K
5
C418
C418
2
0.01U_0402_16V7K
0.01U_0402_16V7K
1
C419
C419
2
2
MDA39
B9
MDA32
B1
MDA38
D9
MDA34
D1
MDA33
D3
MDA37
D7
MDA35
C2
MDA36
C8
MDA44
F9
MDA43
F1
MDA47
H9
MDA40
H1
MDA41 MDA52
H3
MDA46
H7
MDA42 MDA54
G2
MDA45
G8
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
A1 E1 J9 M9 R1
J1 J7
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
A3 E3 J3 N1 P9
1
C422
C422
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4
+VDD_MEM18 +VDD_MEM18
1
2
C405
C405
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C423
C423
2
1
C406
C406
2
1
C424
C424
2
0.01U_0402_16V7K
0.01U_0402_16V7K
+VDD_MEM18+VDD_MEM18
C408
C408
1000P_0402_50V7K
1000P_0402_50V7K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CMDA10 CMDA18
CMDA14 CMDA16 CMDA17 CMDA20 CMDA19 CMDA23 CMDA21 CMDA6 CMDA5 CMDA4 CMDA13 CMDA3 CMDA1
CLKA1# CLKA1
CMDA11
CMDA8 CMDA9 CMDA15 CMDA25
DQMA6DQMA5 DQMA7DQMA4
CMDA12
QSA6 QSA#6
QSA7QSA4 QSA#7
(SSTL-1.8) VREF = .5*VDDQ
0.01U_0402_16V7K
0.01U_0402_16V7K
1
1
C409
C409
C410
C410
2
2
0.01U_0402_16V7K
0.01U_0402_16V7K
3
U11
U11
L2
BA0
L3
BA1
R2
A12
P7
A11
M2
A10/AP
P3
A9
P8
A8
P2
A7
N7
A6
N3
A5
N8
A4
N2
A3
M7
A2
M3
A1
M8
A0
K8
CK
J8
CK
K2
CKE
L8
CS
K3
WE
K7
RAS
L7
CAS
F3
LDM
B3
UDM
K9
ODT
F7
LDQS
E8
LDQS
B7
UDQS
A8
UDQS
J2
VREF
A2
NC#A2
E2
NC#E2
L1
NC#L1
R3
NC#R3
R7
NC#R7
R8
NC#R8
HY5PS561621F-25
HY5PS561621F-25
DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9
VDDQ10
VDD1 VDD2 VDD3 VDD4 VDD5
VDDL
VSSDL
VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9
VSSQ10
VSS1 VSS2 VSS3 VSS4 VSS5
B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
A1 E1 J9 M9 R1
J1 J7
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
A3 E3 J3 N1 P9
MDA59 MDA60 MDA58 MDA62 MDA63 MDA56 MDA61 MDA57 MDA51 MDA53 MDA48 MDA55
MDA49 MDA50
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C403
C403
2
1
C404
C404
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
2
DDR BGA MEMORY
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
1
1
C411
C411
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2005/05/05 2006/05/05
2005/05/05 2006/05/05
2005/05/05 2006/05/05
1
C412
C412
2
2
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
1
C413
C413
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.01U_0402_16V7K
0.01U_0402_16V7K
1
C414
C414
2
2
1
C415
C415
2
0.01U_0402_16V7K
0.01U_0402_16V7K
Title
Title
Title
LS-2821 ATI_M56-P VGA Board
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, October 08, 2007
Date: Sheet of
Monday, October 08, 2007
Date: Sheet of
Monday, October 08, 2007
CMD17 CMD18 CMD19 CMD20 CMD21 CMD22 CMD23 A7 CMD24 CMD25 CMD26 CMD27 CMD28 CMD29 CMD30
CLKA122
CLKA1#22
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
CHANNEL A EXT. 256M_2
5
hexainf@hotmail.com
+3VS
R272 8.2K_0402_5%
R272 8.2K_0402_5%
1 2
R273 8.2K_0402_5%
R273 8.2K_0402_5%
1 2 1 2 1 2 1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2
12
R274 8.2K_0402_5%
R274 8.2K_0402_5% R275 8.2K_0402_5%
R275 8.2K_0402_5% R276 8.2K_0402_5%
D D
C C
R276 8.2K_0402_5% R277 8.2K_0402_5%
R277 8.2K_0402_5% R278 8.2K_0402_5%
R278 8.2K_0402_5% R279 8.2K_0402_5%
R279 8.2K_0402_5%
+3VS
R281 8.2K_0402_5%R281 8.2K_0402_5% R282 8.2K_0402_5%
R282 8.2K_0402_5% R283 8.2K_0402_5%
R283 8.2K_0402_5% R284 8.2K_0402_5%
R284 8.2K_0402_5% R285 8.2K_0402_5%
R285 8.2K_0402_5% R286 8.2K_0402_5%
R286 8.2K_0402_5% R287 8.2K_0402_5%
R287 8.2K_0402_5% R288 8.2K_0402_5%
R288 8.2K_0402_5%
R289 8.2K_0402_5%R289 8.2K_0402_5% R290 8.2K_0402_5%R290 8.2K_0402_5% R292 8.2K_0402_5%R292 8.2K_0402_5% R293 8.2K_0402_5%R293 8.2K_0402_5%
PCI_DEVSEL# PCI_STOP# PCI_TRDY# PCI_FRAME# PCI_PLOCK# PCI_IRDY# PCI_SERR# PCI_PERR#
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#
PCI_REQ0# PCI_REQ1# PCI_REQ2# PCI_REQ3#
4
U12B
U12B
D11
AD0
C8
AD1
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
D9
E12
E9 C9
E10
B7 C7 C5
G11
F8
F11
E7 A3 D2
F10
D5
D10
B3 F7 C3 F3 F4 C1 G7 H7 D1 G5 H6 G1 H3
J5
E1
J6
C4
ICH9-M ES_FCBGA676
ICH9-M ES_FCBGA676
PCI
PCI
AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
Interrupt I/F
Interrupt I/F
PIRQA# PIRQB# PIRQC# PIRQD#
REQ0#
GNT0# REQ1#/GPIO50 GNT1#/GPIO51 REQ2#/GPIO52 GNT2#/GPIO53 REQ3#/GPIO54 GNT3#/GPIO55
C/BE0# C/BE1# C/BE2# C/BE3#
IRDY#
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR# STOP# TRDY#
FRAME#
PLTRST#
PCICLK
PME#
PIRQE#/GPIO2
PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5
3
PCI_REQ0#
F1
PCI_GNT0#
G4
PCI_REQ1#
B6 A7
PCI_REQ2#
F13 F12
PCI_REQ3#
E6
PCI_GNT3#
F6 D8
B4 D6 A5
PCI_IRDY#
D3 E3
PAR
PCI_RST#
R1
PCI_DEVSEL#
C6
PCI_PERR#
E4
PCI_PLOCK#
C2
PCI_SERR#
J4
PCI_STOP#
A4
PCI_TRDY#
F5
PCI_FRAME#
D7
PLT_RST#
C14
CLK_PCI_ICH
D4
PCI_PME#
R2
PCI_RST# 37,38 PCI_SERR# 38
PLT_RST# 9,20,30,31,32 CLK_PCI_ICH 17 PCI_PME# 38
3/28 PCI_PME# Remvoe 8.2k pull high +3VALW resistance.
PCI_PIRQE#
H4
PCI_PIRQF#
K6
PCI_PIRQG#
F2
PCI_PIRQH#
G2
1 2
R291 0_0402_5%R291 0_0402_5%
08/25 Follow Abita
2
ACCEL_INT 37
Place closely pin D4
CLK_PCI_ICH
12
@
@
R280
R280 10_0402_5%
10_0402_5%
1
@
@
C425
C425
8.2P_0402_50V
8.2P_0402_50V
2
1
B B
PCI_GNT3#
PCI_GNT3#
A A
Low= A16 swap override Enble High= Default
R294
@R294
@
1 2
5
1K_0402_5%
1K_0402_5%
*
A16 swap override Strap
Boot BIOS Strap
PCI_GNT0# SPI_CS#1
0
1
SPI_CS1#_R27
4
1
01
1
SPI_CS1#_R
PCI_GNT0#
R295
@R295
@
1 2
R296
@R296
@
1 2
Boot BIOS Location
SPI
PCI
LPC
*
+3VALW
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
ICH9(1/4)-PCI/INT
ICH9(1/4)-PCI/INT
ICH9(1/4)-PCI/INT
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
25 51Friday, October 05, 2007
25 51Friday, October 05, 2007
25 51Friday, October 05, 2007
1
0.1
0.1
0.1
5
4
3
2
1
+RTCVCC
HDD
SM_INTRUDER# LAN100_SLP ICH_INTVRMEN ICH_SRTCRST#
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+RTCVCC
R312 33_0402_5%
R312 33_0402_5% R313 33_0402_5%
R313 33_0402_5% R324 33_0402_5%
R324 33_0402_5% R314 33_0402_5%
R314 33_0402_5% R316 33_0402_5%
R316 33_0402_5% R397 33_0402_5%
R397 33_0402_5% R317 33_0402_5%
R317 33_0402_5% R318 33_0402_5%
R318 33_0402_5% R398 33_0402_5%
R398 33_0402_5%
C426
C426
1 2
HDA_SDIN033 HDA_SDIN134 HDA_SDIN221
HDA_SDOUT_MDC34 HDA_SDOUT_CODEC33 HDA_SDOUT_VGA21
1
2
0_0402_5%
0_0402_5%
R307
R307 20K_0402_5%
20K_0402_5%
1U_0603_10V4Z
1U_0603_10V4Z
SATA_LED#39
SATA_RXN0_C29
SATA_RXP0_C29 SATA_TXN029 SATA_TXP029
SATA_RXP1_C29 SATA_TXN129 SATA_TXP129
12
@
@
R303
R303
C427
C427
1 2 1 2 1 2
1 2 1 2 1 2
1 2 1 2 1 2
12
@
@
R304
R304
0_0402_5%
0_0402_5%
1
2
SATA_TXN0 SATA_TXP0
SATA_TXN1 SATA_TXP1
1 2
R297 1M_0402_5%R297 1M_0402_5%
1 2
R299 330K_0402_5%R299 330K_0402_5%
1 2
R300 330K_0402_5%R300 330K_0402_5%
1 2
D D
C C
R302 180K_0402_5%R302 180K_0402_5%
HDA_BITCLK_CODEC21,33 HDA_BITCLK_MDC34 HDA_BITCLK_VGA34
HDA_SYNC_MDC34 HDA_SYNC_CODEC21,33 HDA_SYNC_VGA21,33
HDA_RST#_CODEC21,33 HDA_RST#_MDC34 HDA_RST#_VGA34
Multi bay
B B
ICH8M Internal VR Enable Strap (Internal VR for VccSus1.05, VccSus1.5, VccCL1.5)
ICH_INTVRMEN
ICH8M LAN100 SLP Strap (Internal VR for VccLAN1.05 and VccCL1.05)
ICH_LAN100_SLP Low = Internal VR Disabled
12
CLRP2
CLRP2 SHORT PADS
SHORT PADS
HDA_BITCLKHDA_BITCLK
HDA_SYNCHDA_SYNC
HDARST#
R320 33_0402_5%
R320 33_0402_5% R321 33_0402_5%
R321 33_0402_5% R323 33_0402_5%
R323 33_0402_5%
0.01U_0402_50V7K
0.01U_0402_50V7K
C431
C431
1 2
C433
C433
1 2
0.01U_0402_50V7K
0.01U_0402_50V7K
0.01U_0402_50V7K
0.01U_0402_50V7K
C820
C820
1 2
C821
C821
1 2
0.01U_0402_50V7K
0.01U_0402_50V7K
+1.5VS
24.9_0402_1%
24.9_0402_1%
1 2 1 2 1 2
Low = Internal VR Disabled High = Internal VR Enabled(Default)
High = Internal VR Enabled(Default)
ICH_RTCX1 ICH_RTCX2
ICH_RTCRST# ICH_SRTCRST# SM_INTRUDER#
ICH_INTVRMEN LAN100_SLP
R311
R311
GLAN_COMP
1 2
HDA_BITCLK HDA_SYNC
HDARST# HDA_SDIN0
HDA_SDIN1 HDA_SDIN2
HDA_SDOUT
T55PAD T55PAD T56PAD T56PAD
SATA_LED#
SATA_TXN0_C SATA_TXP0_C
SATA_TXN1_C SATA_TXP1_C
U12A
U12A
C23
RTCX1
C24
RTCX2
A25
RTCRST#
F20
SRTCRST#
C22
INTRUDER#
B22
INTVRMEN
A22
LAN100_SLP
E25
GLAN_CLK
C13
LAN_RSTSYNC
F14
LAN_RXD0
G13
LAN_RXD1
D14
LAN_RXD2
D13
LAN_TXD_0
D12
LAN_TXD_1
E13
LAN_TXD_2
B10
GPIO56
B28
GLAN_COMPI
B27
GLAN_COMPO
AF6
HDA_BIT_CLK
AH4
HDA_SYNC
AE7
HDA_RST#
AF4
HDA_SDIN0
AG4
HDA_SDIN1
AH3
HDA_SDIN2
AE5
HDA_SDIN3
AG5
HDA_SDOUT
AG7
HDA_DOCK_EN#/GPIO33
AE8
HDA_DOCK_RST#/GPIO34
AG8
SATALED#
AJ16
SATA0RXN
AH16
SATA0RXP
AF17
SATA0TXN
AG17
SATA0TXP
AH13
SATA1RXN
AJ13
SATA1RXP
AG14
SATA1TXN
AF14
SATA1TXP
ICH9-M ES_FCBGA676
ICH9-M ES_FCBGA676
+3VS
R298
GATEA20
KB_RST#
H_DPRSTP#
FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3
FWH4/LFRAME#
RTC
RTC
LPCCPU
LPCCPU
LAN / GLAN
LAN / GLAN
IHDA
IHDA
SATA
SATA
LDRQ0#
LDRQ1#/GPIO23
A20GATE
A20M#
DPRSTP#
DPSLP#
FERR#
CPUPWRGD
IGNNE#
INIT#
RCIN#
SMI#
STPCLK#
THRMTRIP#
TP12
SATA4RXN SATA4RXP
SATA4TXN SATA4TXP
SATA5RXN SATA5RXP
SATA5TXN SATA5TXP
SATA_CLKN SATA_CLKP
SATARBIAS#
SATARBIAS
INTR
LPC_AD1
K4
LPC_AD2
L6
LPC_AD3
K2
LPC_FRAME#
K3 J3
J1
GATEA20
N7
H_A20M#
AJ27 AJ25
H_DPSLP#
AE23
R_H_FERR#
AJ26
H_PWRGOOD
AD22
H_IGNNE#
AF25
H_INIT#
AE22
H_INTR
AG25
KB_RST#
L3
H_NMI
AF23
NMI
H_SMI#
AF24
H_STPCLK#
AH27
THRMTRIP_ICH#
AG26 AG27
AH11 AJ11
SATA_TXN4_C
AG12
SATA_TXP4_C
AF12
AH9 AJ9
SATA_TXN5_C
AE10
SATA_TXP5_C
AF10
CLK_PCIE_SATA#
AH18
CLK_PCIE_SATA
AJ18 AJ7
R322
R322
AH7
1 2
24.9_0402_1%
24.9_0402_1%
LPC_AD0
K5
Within 500 mils
LPC_AD[0..3] 31,37,38
LPC_FRAME# 31,37,38
T54 PADT54 PAD
GATEA20 38 H_A20M# 6
R309
R309
1 2
0_0402_5%
R310
R310
R319 54.9_0402_1%R319 54.9_0402_1%
0.01U_0402_50V7K
0.01U_0402_50V7K
0.01U_0402_50V7K
0.01U_0402_50V7K
0_0402_5%
1 2
56_0402_5%
56_0402_5%
H_PWRGOOD 6,7 H_IGNNE# 6 H_INIT# 6
H_INTR 6
KB_RST# 38
H_NMI 6 H_SMI# 6
H_STPCLK# 6 1 2
C428
C428
12
C429
C429
12
0.01U_0402_50V7K
0.01U_0402_50V7K C430
C430
12
C432
C432
12
0.01U_0402_50V7K
0.01U_0402_50V7K
SATA_TXN4 SATA_TXP4
SATA_TXN5 SATA_TXP5
H_DPSLP#
H_DPRSTP#H_DPRSTP_R#
H_FERR#
3/28 add 56ohm
+VCCP
R298
1 2
10K_0402_5%
10K_0402_5% R301
R301
1 2
10K_0402_5%
10K_0402_5%
R305
@R305
@
1 2
56_0402_5%
56_0402_5% R306
@R306
@
1 2
56_0402_5%
56_0402_5%
H_DPRSTP# 7,9,49 H_DPSLP# 7
within 2" from R379
12
R315
R315 56_0402_5%
56_0402_5%
H_THERMTRIP# 6,9
placed within 2" from ICH9M
SATA_RXN4_C 29 SATA_RXP4_C 29
SATA_TXN4 29
SATA_TXP4 29
SATA_RXN5_C 36 SATA_RXP5_C 36
SATA_TXN5 36
SATA_TXP5 36
CLK_PCIE_SATA# 17 CLK_PCIE_SATA 17SATA_RXN1_C29
+VCCP
+VCCP
R308
R308 56_0402_5%
56_0402_5%
1 2
ODD
e-SATA
De-feature disable
H_FERR# 6
XOR CHAIN ENTRANCE STRAP:RSVD
+3VS
R325
@R325
@
1 2
R326
@R326
@
1 2
ICH_RSVD HDA_SDOUT_CODEC
A A
0 0 1 1 1
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
HDA_SDOUT_CODEC
ICH_RSVD
0 1 0
5
ICH_RSVD 27
C436
C436
15P_0402_50V8J
15P_0402_50V8J
4
0821 Change C528 and C516 to 15PF
R328
R328
1 2
10M_0402_5%
10M_0402_5%
1
2
1 4 2 3
32.768KHZ_12.5P_MC-146
32.768KHZ_12.5P_MC-146
Y2
Y2
ICH_RTCX1
ICH_RTCX2
1
C437
C437 15P_0402_50V8J
15P_0402_50V8J
2
HDA_BITCLK
12
@
@
R327
R327 10_0402_5%
10_0402_5%
1
C438
1
@
@
C439
C439 10P_0402_25V8K
10P_0402_25V8K
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C438
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2
R329
R329
1 2
W=20mils
0_0402_5%
0_0402_5%
Place near ICH9
2
W=20mils
D8
D8
1
DAN202U_SC70
DAN202U_SC70
+3VL+RTCVCC
2 3
W=20mils
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
BATT1.1
JBATT1
R330
R330
1 2
1K_0402_5%
1K_0402_5%
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
W=20mils
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
ICH9(2/4)_LAN,HD,IDE,LPC
ICH9(2/4)_LAN,HD,IDE,LPC
ICH9(2/4)_LAN,HD,IDE,LPC
JBATT1
1
1
2
2
3
GND
4
GND
ACES_85205-02001
ACES_85205-02001
CONN@
CONN@
1
26 51Monday, October 08, 2007
26 51Monday, October 08, 2007
26 51Monday, October 08, 2007
0.1
0.1
0.1
5
hexainf@hotmail.com
R331 2.2K_0402_5%R331 2.2K_0402_5% R332 2.2K_0402_5%R332 2.2K_0402_5%
+3VS
12
12
@
@
R339
R339
VGATE17,49
R353
R353
R364
R364
EXP_CPPE#31
SB_SPKR33
R424 Low -->default High -->No boot
ICH_SMBCLK17,21,31,37
ICH_SMBDATA17,21,31,37
@
@
R340
R340 10K_0402_5%
10K_0402_5%
R345 0_0402_5%R345 0_0402_5%
100K_0402_5%
100K_0402_5%
1 2
H_STP_PCI#17 H_STP_CPU#17
17" High 14" Low Dis" High UMA" Low
+3VALW
10K_0402_5%
10K_0402_5%
+3VS
WLAN
New Card
Card reader
GLAN
+3VS
1 2
R333 10K_0402_5%R333 10K_0402_5%
1 2
R334 8.2K_0402_5%R334 8.2K_0402_5%
1 2
R335 10K_0402_5%R335 10K_0402_5%
1 2
R336 8.2K_0402_5%@ R336 8.2K_0402_5%@
1 2
D D
C C
B B
R337 10K_0402_5%@R337 10K_0402_5%@
1 2
R338 8.2K_0402_5%@ R338 8.2K_0402_5%@
1 2
R341 8.2K_0402_5%R341 8.2K_0402_5%
1 2
R344 8.2K_0402_5%R344 8.2K_0402_5%
1 2
R349 8.2K_0402_5%R349 8.2K_0402_5%
1 2
R350 8.2K_0402_5%R350 8.2K_0402_5%
1 2
R351 8.2K_0402_5%R351 8.2K_0402_5%
1 2
R352 8.2K_0402_5%R352 8.2K_0402_5%
1 2
R356 8.2K_0402_5%R356 8.2K_0402_5%
1 2
R357 8.2K_0402_5%R357 8.2K_0402_5%
1 2
R358 8.2K_0402_5%R358 8.2K_0402_5%
1 2
R359 10K_0402_5%R359 10K_0402_5%
1 2
R361 8.2K_0402_5%R361 8.2K_0402_5%
1 2
R362 8.2K_0402_5%R362 8.2K_0402_5%
1 2
R365 10K_0402_5%
R365 10K_0402_5%
+3VALW
1 2
R369 10K_0402_5%R369 10K_0402_5%
1 2
R371 8.2K_0402_5%R371 8.2K_0402_5%
1 2
R372 1K_0402_5%R372 1K_0402_5%
1 2
R374 10K_0402_5%R374 10K_0402_5%
1 2
R375 10K_0402_5%R375 10K_0402_5%
1 2
R376 10K_0402_5%R376 10K_0402_5%
1 2
R377 10K_0402_5%R377 10K_0402_5%
1 2
R378 10K_0402_5%R378 10K_0402_5%
1 2
R379 10K_0402_5%R379 10K_0402_5%
1 2
R373 10K_0402_5%R373 10K_0402_5%
1 2
R380 8.2K_0402_5%R380 8.2K_0402_5%
1 2
R381 8.2K_0402_5%R381 8.2K_0402_5%
+3VS +3VS
SIRQ PM_CLKRUN# OCP# THERM_SCI# CLKREQ#_C PM_BMBUSY# EC_SCI#
GPIO6
GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO36 GPIO37 GPIO39 GPIO48 GPIO57
GPIO49
@
@
LINKALERT# ICH_LOW_BAT# ICH_PCIE_WAKE# ICH_RI# XDP_DBRESET# S4_STATE# ME_EC_CLK1 ME_EC_DATA1 GPIO10 EC_LID_OUT# EC_SMI# GPIO14
TV Tuner/WWAN/Robeson
Board ID
R745
R745 10K_0402_5%
10K_0402_5%
1 2
DIS/UMA 17/14
R746
@R746
@
10K_0402_5%
10K_0402_5%
1 2
USB_OC#6 USB_OC#1 USB_OC#2 USB_OC#4
10K_1206_8P4R_5%
10K_1206_8P4R_5%
A A
USB_OC#7 USB_OC#8 USB_OC#9 USB_OC#0
WXMIT_OFF# USB_OC#5 USB_OC#10 USB_OC#11
10K_1206_8P4R_5%
10K_1206_8P4R_5%
10K_1206_8P4R_5%
10K_1206_8P4R_5%
RP27
RP27
4 5 3 6 2 7 1 8
RP28
RP28
4 5 3 6 2 7 1 8
RP29
RP29
4 5 3 6 2 7 1 8
5
R747 10K_0402_5%
10K_0402_5%
1 2
R748
R748 10K_0402_5%
10K_0402_5%
1 2
@R747
@
+3VALW
4
1 2 1 2
XDP_DBRESET#6
PM_BMBUSY#9
EC_LID_OUT#38
1 2
ICH_PCIE_WAKE#30,31 SIRQ38 THERM_SCI#21,38
1 2
8.2K_0402_5%
8.2K_0402_5%
CLKREQ#_C17
R393 0_0402_5%R393 0_0402_5%
1 2
@
@
R366 1K_0402_5%
R366 1K_0402_5%
1 2
+3VS
MCH_ICH_SYNC#9
ICH_RSVD26
PCIE_RXN131 PCIE_RXP131 PCIE_TXN131
PCIE_TXP131
PCIE_RXN331 PCIE_RXP331 PCIE_TXN331
PCIE_TXP331
PCIE_RXN431 PCIE_RXP431 PCIE_TXN431
PCIE_TXP431
PCIE_RXN532 PCIE_RXP532 PCIE_TXN532
PCIE_TXP532
GLAN_RXN30 GLAN_RXP30 GLAN_TXN30
GLAN_TXP30
SPI_CS1#_R25
BT_OFF36 WXMIT_OFF#31
4
ICH_SMBCLK ICH_SMBDATA LINKALERT# ME_EC_CLK1 ME_EC_DATA1
ICH_RI#
T59PAD T59PAD
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
T61PAD T61PAD T62PAD T62PAD
T63PAD T63PAD T64PAD T64PAD
1 2
SUS_STAT# XDP_DBRESET#
PM_BMBUSY# EC_LID_OUT# H_STP_PCI#
R_STP_CPU# PM_CLKRUN# ICH_PCIE_WAKE#
SIRQ THERM_SCI#
VGATE
OCP# GPIO6 EC_SCI# EC_SMI#
17/14 GPIO18 GPIO20 GPIO22 DIS/UMA
CLKREQ#_C GPIO38 GPIO39 GPIO48 GPIO49 GPIO57
SB_SPKR MCH_ICH_SYNC# ICH_RSVD
12
Within 500 mils
R384
R384
22.6_0402_1%
22.6_0402_1%
T57PAD T57PAD
OCP#6 EC_SCI#38
EC_SMI#38
C445 0.1U_0402_16V4Z
C445 0.1U_0402_16V4Z C444 0.1U_0402_16V4Z
C444 0.1U_0402_16V4Z
C448 0.1U_0402_16V4Z
C448 0.1U_0402_16V4Z C449 0.1U_0402_16V4Z
C449 0.1U_0402_16V4Z
C450 0.1U_0402_16V4Z
C450 0.1U_0402_16V4Z C451 0.1U_0402_16V4Z
C451 0.1U_0402_16V4Z
C501 0.1U_0402_16V4Z
C501 0.1U_0402_16V4Z C500 0.1U_0402_16V4Z
C500 0.1U_0402_16V4Z
C452 0.1U_0402_16V4Z C452 0.1U_0402_16V4Z C453 0.1U_0402_16V4Z C453 0.1U_0402_16V4Z
R383 0_0402_5%R383 0_0402_5%
3
U12C
U12C
G16
SMBCLK
A13
SMBDATA
E17
LINKALERT#/GPIO60/CLGPIO4
C17
SMLINK0
B18
SMLINK1
F19
RI#
R4
SUS_STAT#/LPCPD#
G19
SYS_RESET#
M6
PMSYNC#/GPIO0
A17
SMBALERT#/GPIO11
A14
STP_PCI#
E19
STP_CPU#
L4
CLKRUN#
E20
WAKE#
M5
SERIRQ
AJ23
THRM#
D21
VRMPWRGD
A20
TP11
AG19
GPIO1
AH21
GPIO6
AG21
GPIO7
A21
GPIO8
C12
GPIO12
C21
GPIO13
AE18
GPIO17
K1
GPIO18
AF8
GPIO20
AJ22
SCLOCK/GPIO22
A9
GPIO27
D19
GPIO28
L1
SATACLKREQ#/GPIO35
AE19
SLOAD/GPIO38
AG22
SDATAOUT0/GPIO39
AF21
SDATAOUT1/GPIO48
AH24
GPIO49
A8
GPIO57/CLGPIO5
M7
SPKR
AJ24
MCH_SYNC#
B21
TP3
AH20
TP8
AJ20
TP9
AJ21
TP10
ICH9-M ES_FCBGA676
ICH9-M ES_FCBGA676
PCIE_RXN1 PCIE_RXP1 PCIE_C_TXN1 PCIE_C_TXP1
PCIE_RXN3 PCIE_RXP3 PCIE_C_TXN3 PCIE_C_TXP3
PCIE_RXN4 PCIE_RXP4 PCIE_C_TXN4 PCIE_C_TXP4
PCIE_RXN5 PCIE_RXP5 PCIE_C_TXN5 PCIE_C_TXP5
GLAN_RXN GLAN_RXP GLAN_TXN_C GLAN_TXP_C
SPI_CS1#_R
USB_OC#0 USB_OC#1 USB_OC#2 WXMIT_OFF# USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7 USB_OC#8 USB_OC#9 USB_OC#10 USB_OC#11
USBRBIAS
Security Classification
Security Classification
Security Classification
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SMB
SMB
U12D
U12D
N29
PERN1
N28
PERP1
P27
PETN1
P26
PETP1
L29
PERN2
L28
PERP2
M27
PETN2
M26
PETP2
J29
PERN3
J28
PERP3
K27
PETN3
K26
PETP3
G29
PERN4
G28
PERP4
H27
PETN4
H26
PETP4
E29
PERN5
E28
PERP5
F27
PETN5
F26
PETP5
C29
PERN6/GLAN_RXN
C28
PERP6/GLAN_RXP
D27
PETN6/GLAN_TXN
D26
PETP6/GLAN_TXP
D23
SPI_CLK
D24
SPI_CS0#
F23
SPI_CS1#GPIO58/CLGPIO6
D25
SPI_MOSI
E23
SPI_MISO
N4
OC0#/GPIO59
N5
OC1#/GPIO40
N6
OC2#/GPIO41
P6
OC3#/GPIO42
M1
OC4#/GPIO43
N2
OC5#/GPIO29
M4
OC6#/GPIO30
M3
OC7#/GPIO31
N3
OC8#/GPIO44
N1
OC9#/GPIO45
P5
OC10#/GPIO46
P3
OC11#/GPIO47
AG2
USBRBIAS
AG1
USBRBIAS#
ICH9-M ES_FCBGA676
ICH9-M ES_FCBGA676
Issued Date
Issued Date
Issued Date
3
SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37
SATA
GPIO
SATA
GPIO
clocks
clocks
SYS / GPIOGPIOMISC
SYS / GPIOGPIOMISC
Power MGT
Power MGT
GPIO10/SUS_PWR_ACK
Controller Link
Controller Link
PCI - Express
PCI - Express
SPI
SPI
USB
USB
CLK14 CLK48
SUSCLK
SLP_S3# SLP_S4# SLP_S5#
S4_STATE#/GPIO26
PWROK
DPRSLPVR/GPIO16
BATLOW# PWRBTN# LAN_RST#
RSMRST#
CK_PWRGD
CLPWROK
SLP_M#
CL_CLK0 CL_CLK1
CL_DATA0 CL_DATA1
CL_VREF0 CL_VREF1
CL_RST0# CL_RST1#
MEM_LED/GPIO24
GPIO14/AC_PRESENT
WOL_EN/GPIO9
DMI0RXN DMI0RXP DMI0TXN DMI0TXP
DMI1RXN DMI1RXP DMI1TXN DMI1TXP
DMI2RXN DMI2RXP DMI2TXN DMI2TXP
DMI3RXN DMI3RXP DMI3TXN DMI3TXP
DMI_CLKN DMI_CLKP
DMI_ZCOMP
Direct Media Interface
Direct Media Interface
DMI_IRCOMP
USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N
USBP9P USBP10N USBP10P USBP11N USBP11P
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
GPIO21
AH23
GPIO19
AF19
GPIO36
AE21
GPIO37
AD20
CLK_14M_ICH
H1
CLK_48M_ICH
AF3
ICH_SUSCLK
P1
SLP_S3#
C16
SLP_S4#
E16
SLP_S5#
G17
S4_STATE#
C10
PM_PWROK
G20
R348 0_0402_5%R348 0_0402_5%
M2
ICH_LOW_BAT#
B13
PWRBTN_OUT#
R3 D20
R_EC_RSMRST#
D22
CK_PWRGD
R5
M_PWROK
R6 B16
CL_CLK0
F24 B19
CL_DATA0
F22 C19
CL_VREF0_ICH
C25
CL_VREF1_ICH
A19
CL_RST#
F21 D18
XMIT_OFF
A16
GPIO10
C18
GPIO14
C11
LAN_WOL_EN
C20
DMI_RXN0
V27
DMI_RXP0
V26
DMI_TXN0
U29
DMI_TXP0
U28
DMI_RXN1
Y27
DMI_RXP1
Y26
DMI_TXN1
W29
DMI_TXP1
W28
DMI_RXN2
AB27
DMI_RXP2
AB26
DMI_TXN2
AA29
DMI_TXP2
AA28
DMI_RXN3
AD27
DMI_RXP3
AD26
DMI_TXN3
AC29
DMI_TXP3
AC28
CLK_PCIE_ICH#
T26
CLK_PCIE_ICH
T25 AF29
DMI_IRCOMP
AF28
USB20_N0
AC5
USB20_P0
AC4
USB20_N1
AD3
USB20_P1
AD2
USB20_N2
AC1
USB20_P2
AC2
USB20_N3
AA5
USB20_P3
AA4
USB20_N4
AB2
USB20_P4
AB3
USB20_N5
AA1
USB20_P5
AA2
USB20_N6
W5
USB20_P6
W4
USB20_N7
Y3
USB20_P7
Y2
USB20_N8
W1
USB20_P8
W2
USB20_N9
V2
USB20_P9
V3 U5 U4 U1 U2
Compal Secret Data
Compal Secret Data
Compal Secret Data
1 2
R370
R370
100K_0402_5%
100K_0402_5%
R382 24.9_0402_1%R382 24.9_0402_1%
Deciphered Date
Deciphered Date
Deciphered Date
R354 100_0402_5% R354 100_0402_5% R355 10K_0402_5%R355 10K_0402_5%
2
CLK_14M_ICH 17 CLK_48M_ICH 17
T58 PADT58 PAD
SLP_S3# 38
T60 PADT60 PAD
SLP_S5# 38
PM_PWROK 9,38
PWRBTN_OUT# 38
1 2 1 2
CK_PWRGD 17 M_PWROK 9,38
CL_CLK0 9
CL_DATA0 9
CL_RST# 9
XMIT_OFF 31
12
+3VALW
DMI_RXN0 9 DMI_RXP0 9 DMI_TXN0 9 DMI_TXP0 9
DMI_RXN1 9 DMI_RXP1 9 DMI_TXN1 9 DMI_TXP1 9
DMI_RXN2 9 DMI_RXP2 9 DMI_TXN2 9 DMI_TXP2 9
DMI_RXN3 9 DMI_RXP3 9 DMI_TXN3 9 DMI_TXP3 9
CLK_PCIE_ICH# 17 CLK_PCIE_ICH 17
1 2
USB20_N0 36 USB20_P0 36 USB20_N1 36 USB20_P1 36 USB20_N2 36 USB20_P2 36 USB20_N3 40 USB20_P3 40 USB20_N4 19 USB20_P4 19 USB20_N5 31 USB20_P5 31 USB20_N6 36 USB20_P6 36 USB20_N7 36 USB20_P7 36 USB20_N8 31 USB20_P8 31 USB20_N9 31 USB20_P9 31
USB-0 Right side USB-1 Right side USB-2 Left side(with ESATA) USB-3 Dock USB-4 Camera USB-5 WLAN USB-6 Bluetooth USB-7 Finger Printer USB-8 MiniCard(WWAN/TV) USB-9 Express card
2
R346 10K_0402_5%R346 10K_0402_5%
1 2
DPRSLPVR 9,49
EC_RSMRST# 38
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Within 500 mils
+1.5VS
1
Place closely pin AF3
CLK_48M_ICH
12
@
@
R342
R342 10_0402_5%
10_0402_5%
@
@
1
C440
C440
4.7P_0402_50V8C
4.7P_0402_50V8C
2
R360
R360
1 2
3.24K_0402_1%
12
1
C442
C442
2
12
1
C443
C443
2
Title
Title
Title
ICH9(3/4)_DMI,USB,GPIO,PCIE
ICH9(3/4)_DMI,USB,GPIO,PCIE
ICH9(3/4)_DMI,USB,GPIO,PCIE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
Date: Sheet of
Date: Sheet of
Date: Sheet of
3.24K_0402_1%
R363
R363 453_0402_1%
453_0402_1%
NA lead free
R367
R367
1 2
3.24K_0402_1%
3.24K_0402_1%
R368
R368 453_0402_1%
453_0402_1%
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Place closely pin H1
+3VS
+3VALW
1
CLK_14M_ICH
12
@
@
R343
R343 10_0402_5%
10_0402_5%
@
@
1
C441
C441
4.7P_0402_50V8C
4.7P_0402_50V8C
2
27 51Monday, October 08, 2007
27 51Monday, October 08, 2007
27 51Monday, October 08, 2007
0.1
0.1
0.1
5
+RTCVCC
20 mils
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
40 mils
1
+
+
C459
C459
2
10U_0805_10V4Z
10U_0805_10V4Z
220U_D2_4VM
220U_D2_4VM
1
C477
C477
2
1U_0603_10V4Z
1U_0603_10V4Z
1
C483
C483
2
1
C487
C487
2
10U_0805_10V4Z
10U_0805_10V4Z
1
C454
C454
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
10U_0805_10V4Z
10U_0805_10V4Z
+1.5VS
1
C488
C488
2
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
C462
C462
R387
R387
1 2
R386
R386
100_0402_5%
100_0402_5%
R388
R388
10_0402_5%
10_0402_5%
+1.5VS
0316 change design
+1.5VS
+5VS +3VS
12
+3VALW+5VALW
12
R389
R389
1 2
CHB1608U301_0603
CHB1608U301_0603
+3VS
C485
C485
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CHB1608U301_0603
CHB1608U301_0603
21
D9
D9 CH751H-40_SC76
CH751H-40_SC76
ICH_V5REF_RUN
20 mils
1
C465
C465
0.1U_0402_10V6K
0.1U_0402_10V6K
2
21
D10
D10 CH751H-40_SC76
CH751H-40_SC76
ICH_V5REF_SUS
20 mils
1
C472
C472
0.1U_0402_10V6K
0.1U_0402_10V6K
2
+1.5VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
R390 CHB1608U301_0603R390 CHB1608U301_0603
1 2
+1.5VS
2
5
C458
C458
1
C476
C476
2
D D
C C
B B
A A
ICH_V5REF_RUN
ICH_V5REF_SUS
10U_0805_10V4Z
10U_0805_10V4Z
1
C456
C456
C460
C460
2
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
+1.5VS
C478
C478
1U_0603_10V4Z
1U_0603_10V4Z
+1.5VS
C481
C481
1U_0603_10V4Z
1U_0603_10V4Z
C484
C484
0.1U_0402_16V4Z
0.1U_0402_16V4Z
VCC_LAN1_05_INT_ICH_1
T69T69
VCC_LAN1_05_INT_ICH_2
T70T70
R391
R391
1 2
+1.5VS
CHB1608U301_0603
CHB1608U301_0603
0316 change design
1
2
1
2
1
2
1
2
C489
C489
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
+3VS
2
4
U12F
U12F
A23
VCCRTC
A6
V5REF
AE1
V5REF_SUS
AA24
VCC1_5_B[01]
AA25
VCC1_5_B[02]
AB24
VCC1_5_B[03]
AB25
VCC1_5_B[04]
AC24
VCC1_5_B[05]
AC25
VCC1_5_B[06]
AD24
VCC1_5_B[07]
AD25
VCC1_5_B[08]
AE25
VCC1_5_B[09]
AE26
VCC1_5_B[10]
AE27
VCC1_5_B[11]
AE28
VCC1_5_B[12]
AE29
VCC1_5_B[13]
F25
VCC1_5_B[14]
G25
VCC1_5_B[15]
H24
VCC1_5_B[16]
H25
VCC1_5_B[17]
J24
VCC1_5_B[18]
J25
VCC1_5_B[19]
K24
VCC1_5_B[20]
K25
VCC1_5_B[21]
L23
VCC1_5_B[22]
L24
VCC1_5_B[23]
L25
VCC1_5_B[24]
M24
VCC1_5_B[25]
M25
VCC1_5_B[26]
N23
VCC1_5_B[27]
N24
VCC1_5_B[28]
N25
VCC1_5_B[29]
P24
VCC1_5_B[30]
P25
VCC1_5_B[31]
R24
VCC1_5_B[32]
R25
VCC1_5_B[33]
R26
VCC1_5_B[34]
R27
VCC1_5_B[35]
T24
VCC1_5_B[36]
T27
VCC1_5_B[37]
T28
VCC1_5_B[38]
T29
VCC1_5_B[39]
U24
VCC1_5_B[40]
U25
VCC1_5_B[41]
V24
VCC1_5_B[42]
V25
VCC1_5_B[43]
U23
VCC1_5_B[44]
W24
VCC1_5_B[45]
W25
VCC1_5_B[46]
K23
VCC1_5_B[47]
Y24
VCC1_5_B[48]
Y25
VCC1_5_B[49]
AJ19
VCCSATAPLL
AC16
VCC1_5_A[01]
AD15
VCC1_5_A[02]
AD16
VCC1_5_A[03]
AE15
VCC1_5_A[04]
AF15
VCC1_5_A[05]
AG15
VCC1_5_A[06]
AH15
VCC1_5_A[07]
AJ15
VCC1_5_A[08]
AC11
VCC1_5_A[09]
AD11
VCC1_5_A[10]
AE11
VCC1_5_A[11]
AF11
VCC1_5_A[12]
AG10
VCC1_5_A[13]
AG11
VCC1_5_A[14]
AH10
VCC1_5_A[15]
AJ10
VCC1_5_A[16]
AC9
VCC1_5_A[17]
AC18
VCC1_5_A[18]
AC19
VCC1_5_A[19]
AC21
VCC1_5_A[20]
G10
VCC1_5_A[21]
G9
VCC1_5_A[22]
11mA
AC12
VCC1_5_A[23]
AC13
VCC1_5_A[24]
AC14
VCC1_5_A[25]
AJ5
VCCUSBPLL
AA7
VCC1_5_A[26]
AB6
VCC1_5_A[27]
AB7
VCC1_5_A[28]
AC6
VCC1_5_A[29]
AC7
VCC1_5_A[30]
A10
VCCLAN1_05[1]
A11
VCCLAN1_05[2]
A12
VCCLAN3_3[1]
B12
VCCLAN3_3[2]
23mA
A27
VCCGLANPLL
80mA
D28
VCCGLAN1_5[1]
D29
VCCGLAN1_5[2]
E26
VCCGLAN1_5[3]
E27
VCCGLAN1_5[4]
1mA
A26
VCCGLAN3_3
ICH9-M ES_FCBGA676
ICH9-M ES_FCBGA676
4
11mA
G3: 6uA 2mA
2mA 646mA
47mA
1342mA
ARX
212mA
ATX
ATXARX
USB CORE
USB CORE
1634mA
VCCA3GP
VCCA3GP
GLAN POWER
GLAN POWER
11mA
CORE
CORE
23mA
48mA
2mA
VCCP_CORE
VCCP_CORE
PCI
PCI
VCCPSUS
VCCPSUS
VCCPUSB
VCCPUSB
VCC1_05[01] VCC1_05[02] VCC1_05[03] VCC1_05[04] VCC1_05[05] VCC1_05[06] VCC1_05[07] VCC1_05[08] VCC1_05[09] VCC1_05[10] VCC1_05[11] VCC1_05[12] VCC1_05[13] VCC1_05[14] VCC1_05[15] VCC1_05[16] VCC1_05[17] VCC1_05[18] VCC1_05[19] VCC1_05[20] VCC1_05[21] VCC1_05[22] VCC1_05[23] VCC1_05[24] VCC1_05[25] VCC1_05[26]
VCCDMIPLL VCC_DMI[1]
VCC_DMI[2]
V_CPU_IO[1] V_CPU_IO[2]
VCC3_3[01] VCC3_3[02] VCC3_3[07]
VCC3_3[03] VCC3_3[04] VCC3_3[05] VCC3_3[06]
308mA
VCC3_3[08] VCC3_3[09] VCC3_3[10] VCC3_3[11] VCC3_3[12] VCC3_3[13] VCC3_3[14]
11mA
VCCSUSHDA
VCCSUS1_05[1] VCCSUS1_05[2]
VCCSUS1_5[1] VCCSUS1_5[2]
VCCSUS3_3[01] VCCSUS3_3[02] VCCSUS3_3[03] VCCSUS3_3[04]
VCCSUS3_3[05]
VCCSUS3_3[06] VCCSUS3_3[07] VCCSUS3_3[08] VCCSUS3_3[09] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20]
VCCCL1_05
VCCCL1_5
19/73/73mA19/78/78mA
VCCCL3_3[1] VCCCL3_3[2]
3
+VCCP
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
VCCSUS1_5_ICH_1 VCCSUS1_5_ICH_2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
VCCCL1_05_ICH
+3VS
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
0.1U_0402_16V4Z
1
1
C455
C455
C457
C457
2
2
R385
1
C464
C464
2
+3VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C463
C463 10U_0805_10V4Z
10U_0805_10V4Z
2
+VCCP
1
C470
C470
2
R385
1 2
CHB1608U301_0603
CHB1608U301_0603
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2 1 2
+1.5VS
1
C471
C471
2
R741
R741 0_0402_5%
0_0402_5% R740
R740 0_0402_5%
0_0402_5%
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
0.01U_0402_16V7K
0.01U_0402_16V7K
1
C461
C461
2
22U_0805_6.3VAM
22U_0805_6.3VAM
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C469
C469
2
+3VS
1
C473
C473
2
1
C475
C475
T65T65
2
T66T66
T67T67 T68T68
+3VALW
1
1
2
1
2
C480
C480
C479
C479
2
+3VALW
1
C482
C482
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
2
T71T71
@
@
C486
C486 1U_0603_10V4Z
1U_0603_10V4Z
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
+VCCP
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
VCCHDA
A15 B15 C15 D15 E15 F15 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18
R29 W23
Y23 AB23
AC23 AG29
AJ6 AC10
AD19 AF20 AG24 AC20
B9 F9 G3 G6 J2 J7 K7
AJ4 AJ3
AC8 F17
AD8 F18
A18 D16 D17 E22
AF1
T1 T2 T3 T4 T5 T6 U6 U7 V6 V7 W6 W7 Y6 Y7 T7
G22 G23
A24 B24
C466
C466
+3VALW
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C467
C467
C468
C468
1
1
2
2
(DMI)
+3VS
1
C474
C474
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
U12E
U12E
AA26
VSS[001]
AA27
VSS[002]
AA3
VSS[003]
AA6
VSS[004]
AB1
VSS[005]
AA23
VSS[006]
AB28
VSS[007]
AB29
VSS[008]
AB4
VSS[009]
AB5
VSS[010]
AC17
VSS[011]
AC26
VSS[012]
AC27
VSS[013]
AC3
VSS[014]
AD1
VSS[015]
AD10
VSS[016]
AD12
VSS[017]
AD13
VSS[018]
AD14
VSS[019]
AD17
VSS[020]
AD18
VSS[021]
AD21
VSS[022]
AD28
VSS[023]
AD29
VSS[024]
AD4
VSS[025]
AD5
VSS[026]
AD6
VSS[027]
AD7
VSS[028]
AD9
VSS[029]
AE12
VSS[030]
AE13
VSS[031]
AE14
VSS[032]
AE16
VSS[033]
AE17
VSS[034]
AE2
VSS[035]
AE20
VSS[036]
AE24
VSS[037]
AE3
VSS[038]
AE4
VSS[039]
AE6
VSS[040]
AE9
VSS[041]
AF13
VSS[042]
AF16
VSS[043]
AF18
VSS[044]
AF22
VSS[045]
AH26
VSS[046]
AF26
VSS[047]
AF27
VSS[048]
AF5
VSS[049]
AF7
VSS[050]
AF9
VSS[051]
AG13
VSS[052]
AG16
VSS[053]
AG18
VSS[054]
AG20
VSS[055]
AG23
VSS[056]
AG3
VSS[057]
AG6
VSS[058]
AG9
VSS[059]
AH12
VSS[060]
AH14
VSS[061]
AH17
VSS[062]
AH19
VSS[063]
AH2
VSS[064]
AH22
VSS[065]
AH25
VSS[066]
AH28
VSS[067]
AH5
VSS[068]
AH8
VSS[069]
AJ12
VSS[070]
AJ14
VSS[071]
AJ17
VSS[072]
AJ8
VSS[073]
B11
VSS[074]
B14
VSS[075]
B17
VSS[076]
B2
VSS[077]
B20
VSS[078]
B23
VSS[079]
B5
VSS[080]
B8
VSS[081]
C26
VSS[082]
C27
VSS[083]
E11
VSS[084]
E14
VSS[085]
E18
VSS[086]
E2
VSS[087]
E21
VSS[088]
E24
VSS[089]
E5
VSS[090]
E8
VSS[091]
F16
VSS[092]
F28
VSS[093]
F29
VSS[094]
G12
VSS[095]
G14
VSS[096]
G18
VSS[097]
G21
VSS[098]
G24
VSS[099]
G26
VSS[100]
G27
VSS[101]
G8
VSS[102]
H2
VSS[103]
H23
VSS[104]
H28
VSS[105]
H29
VSS[106]
ICH9-M ES_FCBGA676
ICH9-M ES_FCBGA676
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
ICH9(4/4)_POWER&GND
ICH9(4/4)_POWER&GND
ICH9(4/4)_POWER&GND
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
1
VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198]
VSS_NCTF[01] VSS_NCTF[02] VSS_NCTF[03] VSS_NCTF[04] VSS_NCTF[05] VSS_NCTF[06] VSS_NCTF[07] VSS_NCTF[08] VSS_NCTF[09] VSS_NCTF[10] VSS_NCTF[11] VSS_NCTF[12]
1
H5 J23 J26 J27 AC22 K28 K29 L13 L15 L2 L26 L27 L5 L7 M12 M13 M14 M15 M16 M17 M23 M28 M29 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 P12 P13 P14 P15 P16 P17 P2 P23 P28 P29 P4 P7 R11 R12 R13 R14 R15 R16 R17 R18 R28 T12 T13 T14 T15 T16 T17 T23 B26 U12 U13 U14 U15 U16 U17 AD23 U26 U27 U3 V1 V13 V15 V23 V28 V29 V4 V5 W26 W27 W3 Y1 Y28 Y29 Y4 Y5 AG28 AH6 AF2 B25
A1 A2 A28 A29 AH1 AH29 AJ1 AJ2 AJ28 AJ29 B1 B29
0.1
0.1
28 51Friday, October 05, 2007
28 51Friday, October 05, 2007
28 51Friday, October 05, 2007
0.1
5
hexainf@hotmail.com
D D
4
+5VS
C490
C490
10U_0805_10V4Z
10U_0805_10V4Z
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Pleace near HD CONN
1
1
2
C491
C491
C492
C492
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
3
HDD Connector
JP3
JP3
1
GND
2
1
C493
C493
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
A+
3
A-
4
GND
5
B-
6
B+
7
GND
8
V33
9
V33
10
V33
11
GND
12
GND
13
GND
14
V5
15
V5
16
V5
17
GND
18
Reserved
19
GND
20
V12
21
V12
22
V12
SUYIN_127072FR022G523_RV
SUYIN_127072FR022G523_RV
CONN@
CONN@
0.01U_0402_16V7K
0.01U_0402_16V7K
SATA_RXN0 SATA_RXP0 SATA_RXP0_C
0.01U_0402_16V7K
0.01U_0402_16V7K
+3VS
+5VS
SATA_TXP0 SATA_TXN0
SATA_RXN0_C
C494
C494
12
C495
C495
12
Near CONN side.
2
SATA_TXP0 26
SATA_TXN0 26
SATA_RXN0_C 26 SATA_RXP0_C 26
1
CD-ROM Connector
JP5
+5VS
Placea caps. near ODD
C C
CONN.
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0603_10V4Z
1U_0603_10V4Z
10U_0805_10V4Z
C512
C512
1
C513
C513
2
10U_0805_10V4Z
1
C514
C514
2
1
1
2
C515
C515 10U_0805_10V4Z
10U_0805_10V4Z
2
JP5
13
GND
12
A+
11
A-
10
GND
9
B-
8
B+
7
GND
6
DP
5
V5
4
V5
3
MD
2
GND
1
GND
SUYIN_127382FR013GX09ZR
SUYIN_127382FR013GX09ZR
CONN@
CONN@
SATA_TXP4
0.01U_0402_16V7K
0.01U_0402_16V7K
SATA_RXN4 SATA_RXN4_C
0.01U_0402_16V7K
0.01U_0402_16V7K
+5VS
SATA_TXN4
C510
C510
12
SATA_RXP4_CSATA_RXP4
C511
C511
12
Near CONN side.
SATA_TXP4 26 SATA_TXN4 26
SATA_RXN4_C 26 SATA_RXP4_C 26
Multi Bay Connector
JP12
VCC3 VCC3 VCC3 VCC5 VCC5 VCC5
JAE_WM2M016JPA
JAE_WM2M016JPA
CONN@
CONN@
3
GND
GND RX+
GND GND GND GND
JP12
TX+
TX-
RX-
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
SATA_TXP1 SATA_TXN1
SATA_RXN1 SATA_RXN1_C SATA_RXP1 SATA_RXP1_C
+5VS
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
SATA_TXP1 26 SATA_TXN1 26
C822 0.01U_0402_16V7K
C822 0.01U_0402_16V7K
12
C823 0.01U_0402_16V7K
C823 0.01U_0402_16V7K
12
MultiBay@
MultiBay@ MultiBay@
MultiBay@
Near CONN side.
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
SATA_RXN1_C 26 SATA_RXP1_C 26
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
HDD & CDROM
HDD & CDROM
HDD & CDROM
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
1
0.1
0.1
29 51Monday, October 08, 2007
29 51Monday, October 08, 2007
29 51Monday, October 08, 2007
0.1
B B
A A
5
+5VS
Placea caps. near ODD CONN.
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0603_10V4Z
1
2
MultiBay@
MultiBay@
4
1U_0603_10V4Z
1
C518
C518
2
MultiBay@
MultiBay@
C517
C517
10U_0805_10V4Z
10U_0805_10V4Z
1
2
MultiBay@
MultiBay@
1
C516
C516 10U_0805_10V4Z
10U_0805_10V4Z
2
MultiBay@
MultiBay@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C519
C519
5
+3V_LAN
R1107 10K_0402_5%
R1107 10K_0402_5% R1110 10K_0402_5%
R1110 10K_0402_5% R1111 10K_0402_5%
R1111 10K_0402_5%
C143022U_0805_6.3VAM C143022U_0805_6.3VAM
12
C14344.7U_0805_6.3V6K C14344.7U_0805_6.3V6K
12
V1.8_LAN
12
12
12
12
+3V_LAN
C14254.7U_0805_10V4Z C14254.7U_0805_10V4Z
12
+3V_LAN
C14324.7U_0805_10V4Z C14324.7U_0805_10V4Z
12
5
Q107
Q107
2 3
Q108
Q108
2 3
D D
C C
2SB1188T100R_SC62-3
2SB1188T100R_SC62-3
V1.2_LAN
B B
7/31
2SB1188T100R_SC62-3
2SB1188T100R_SC62-3
V1.8_LAN
C1435
C1435
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C1436
C1436
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C1439
C1439
0.1U_0402_16V4Z
0.1U_0402_16V4Z
A A
C1440
C1440
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CLKREQ#_9
12
ICH_PCIE_WAKE#
12
LAN_LOM_DIS
12
CLKREQ#_917
GLAN_RXP27 GLAN_RXN27 GLAN_TXP27 GLAN_TXN27
ICH_PCIE_WAKE#27,31
CLK_PCIE_LAN17
CLK_PCIE_LAN#17
PLT_RST#9,20,25,31,32
R1114 4.7K_0402_5%
R1114 4.7K_0402_5%
12
R1116 4.7K_0402_5%
R1116 4.7K_0402_5%
TRM_CT LAN_MDI3+ LAN_MDI3-
TRM_CT LAN_MDI2+ LAN_MDI2-
TRM_CT LAN_MDI1+ LAN_MDI1-
TRM_CT LAN_MDI0+ LAN_MDI0-
CTRL12
1
12
1
T72
T72
1 2 3
4 5
7 8 9
10 11 12
0.5u_GST5009
0.5u_GST5009
<BOM Structure>
<BOM Structure>
+3VS
CTRL18
TCT1 TD1+ TD1-
TCT2 TD2+ TD2-6MX2-
TCT3 TD3+ TD3-
TCT4 TD4+ TD4-
ICH_PCIE_WAKE#
24
MCT1
23
MX1+
22
MX1-
21
MCT2
20
MX2+
19 18
MCT3
17
MX3+
16
MX3-
15
MCT4
14
MX4+
13
MX4-
CLKREQ#_9
+3V_LAN
R1112 0_0402_5% R1112 0_0402_5%
1 2
R1113 4.99K_0402_1%
R1113 4.99K_0402_1%
CTRL18 CTRL12
LAN_X1 LAN_X2
RJ45_MIDI3+
RJ45_MIDI3-
RJ45_MIDI2+
RJ45_MIDI2-
RJ45_MIDI1+
RJ45_MIDI1-
RJ45_MIDI0+
RJ45_MIDI0-
C14040.1U_0402_16V4Z
C14040.1U_0402_16V4Z
12
C14050.1U_0402_16V4Z
C14050.1U_0402_16V4Z
12
LAN_MDI0+ LAN_MDI0­LAN_MDI1+ LAN_MDI1­LAN_MDI2+ LAN_MDI2­LAN_MDI3+ LAN_MDI3-
LAN_EE_CLK LAN_EE_DATA
LAN_X1 LAN_X2
LAN_LOM_DIS
4
C1403
C1403
0.1U_0402_16V4Z
0.1U_0402_16V4Z
U43
U43
1
A0
2
A1
3
NC
4
GND
CAT24C08WI-GT3 SO 8P <BOM Structure>
CAT24C08WI-GT3 SO 8P <BOM Structure>
U44
U44
42
R1118
R1118
R1119
R1119
R1120
R1120
R1121
R1121
1 2
12
12
12
12
CLKREQn
49
TX_P
50
TX_N
54
RX_P
53
RX_N
6
WAKEn
55
REFCLKP
56
REFCLKN
5
PERSTn
17
MDIP0
18
MDIN0
20
MDIP1
21
MDIN1
26
MDIP2
27
MDIN2
30
MDIP3
31
MDIN3
38
VPD_CLK
41
VPD_DATA
34
SPI_DO
35
SPI_DI
37
SPI_CLK
36
SPI_CS
15
XTALI
14
XTALO
10
LOM_DISABLEn
12
VAUX_AVLBL
11
SWITCH_VCC
47
VMAIN_AVLBL
9
SWITCH_VAUX
16
RSET
4
CTRL18
3
CTRL12
88E8072_QFN64
88E8072_QFN64
Y6
Y6 25MHZ_20P_1BG25000CK1A
25MHZ_20P_1BG25000CK1A
PCIE_RXP2_LAN PCIE_RXN2_LAN
75_0402_1%
75_0402_1%
75_0402_1%
75_0402_1%
75_0402_1%
75_0402_1%
75_0402_1%
75_0402_1%
4
12
8
VCC
7
WP
6
SCL
5
SDA
PCI-E
PCI-E
Media
Media
EEPROM
EEPROM
FLASH
FLASH
MEMORY
MEMORY
CLOCK
CLOCK
Analog
Analog
C1431 27P_0402_50V8J
C1431 27P_0402_50V8J
1 2
C1433 27P_0402_50V8J
C1433 27P_0402_50V8J
1 2
1000P_1808_3KV7K
1000P_1808_3KV7K
LAN_EE_CLK LAN_EE_DATA
C1441
1 2
12
R1108
R1108
1K_0402_5%
1K_0402_5%
LED
LED
LED_LINK10/100n
LED_LINK1000n
TEST
TEST
POWER
POWER
&
&
GROUND
GROUND
No Connect
No Connect
C1441
3
+3V_LAN
12
R1109
R1109
1K_0402_5%
1K_0402_5%
LAN_POWER_OFF38
LAN_ACT#
59
LED_ACTn
60 62
LANLINK_STATUS#
LED_DUPLEXn
63 46
TESTMODE
8
AVDDH
19
AVDD
22
AVDD
23
AVDD
28
AVDD
1
VDDO_TTL
40
VDDO_TTL
45
VDDO_TTL
61
VDDO_TTL
2
VDD
7
VDD
13
VDD
33
VDD
39
VDD
44
VDD
48
VDD
58
VDD
65
VSS
32
NC
51
NC
52
NC
57
NC
64
NC
24
Reserved
25
Reserved
29
Reserved
43
Reserved
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
+3V_LAN
V1.8_LAN
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3V_LAN
V1.2_LAN
V1.8_LAN
1
C1411
C1411
2
1
C1412
C1412
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C1413
C1413
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C1419
C1419
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
for power saving
Compal Secret Data
Compal Secret Data
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
1
C1406
C1406
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C1414
C1414
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C1420
C1420
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
+3V_LAN
R1106
R1106 0_1206_5% @
0_1206_5% @
1 2
1 3
D
D
RJ45_MIDI3-40 RJ45_MIDI3+40 RJ45_MIDI1-40 RJ45_MIDI2-40 RJ45_MIDI2+40 RJ45_MIDI1+40 RJ45_MIDI0-40 RJ45_MIDI0+40
+3V_LAN
1
+3VALW+3V_LAN
Turn off power when S3. 06/14
Q106AP2305GN
Q106AP2305GN
S
S
G
G
2
1
C1407
C1407
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C1415
C1415
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C1421
C1421
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C1426
C1426
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
R1115 300_0402_5%R1115 300_0402_5%
R1117 300_0402_5%R1117 300_0402_5%
1
C1408
C1408
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C1416
C1416
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C1422
C1422
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
V1.2_LAN
1
C1427
C1427
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
12
LAN_ACT# RJ45_MIDI3­RJ45_MIDI3+ RJ45_MIDI1­RJ45_MIDI2­RJ45_MIDI2+
RJ45_MIDI1+
RJ45_MIDI0­RJ45_MIDI0+
12
LANLINK_STATUS#
LAN_ACT# LANLINK_STATUS#
2
@C1437
@
300p_0402_25V
300p_0402_25V
1
C1437
13 14
8 7 6 5 4 3 2
1 11 12
2
1
1
C1409
C1409
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C1417
C1417
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C1423
C1423
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C1428
C1428
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
CONN@
CONN@
JRJ45
JRJ45
Yellow LED+ Yellow LED­PR4­PR4+ PR2­PR3­PR3+ PR2+ PR1­PR1+ Green LED+ Green LED-
FOX_JM36113-P1122-7F
FOX_JM36113-P1122-7F
C1438
@C1438
@
300p_0402_25V
300p_0402_25V
1115 EMI REQUEST
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LAN-88E8072
LAN-88E8072
LAN-88E8072
LA-3821P
LA-3821P
LA-3821P
1
+3V_LAN
V1.8_LAN
V1.2_LAN
SHLD1
DETECT PIN1
DETCET PIN2
SHLD1
1
C1410
C1410
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C1418
C1418
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C1424
C1424
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
16 9
10 15
30 51Friday, October 05, 2007
30 51Friday, October 05, 2007
30 51Friday, October 05, 2007
0.1
0.1
0.1
A
hexainf@hotmail.com
B
C
D
E
Mini Card 0--TV tuner/WWAN/Robson
+3VALW
1
C572
1 1
2 2
C572
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CLK_PCIE_MCARD0#17 CLK_PCIE_MCARD017
PCIE_RXN127 PCIE_RXP127
CLKREQ#_1017
PCIE_TXN127 PCIE_TXP127
1 2 1 2
+3VS_WWAN
0.01U_0402_16V7K
0.01U_0402_16V7K
1
C573
C573
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
ICH_PCIE_WAKE# CH_DATA CH_CLK CLKREQ#_10
0_0402_5%
0_0402_5%
R419
R419 R421
R421
0_0402_5%
0_0402_5%
PCIE_TXN1 PCIE_TXP1
1 2 1 2
PCIE_C_RXN1 PCIE_C_RXP1
R427 0_0603_5%R427 0_0603_5%
R428 0_0603_5%R428 0_0603_5%
0821 Change +3VS to +3VS_WWAN 0811 Pins 37 and 43 connect to GND and remove +1.5VS
WXMIT_OFF#27
D11
D11
21
CH751H-40_SC76
CH751H-40_SC76
+3VS_WWAN
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
C574
C574
2
M_WXMIT_OFF#
1
C575
C575
2
CONN@
CONN@
JP6
JP6
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
GND1
FOX_AS0B226-S40N-7F
FOX_AS0B226-S40N-7F
WWAN_POWER_OFF38
GND2
+3VS_WWAN
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
SIM card Connector
+3VS_WWAN
UIM_PWR UIM_DATA UIM_CLK UIM_RST UIM_VPP
+1.5VS_WLAN
UIM_PWR UIM_DATA UIM_CLK UIM_RST UIM_VPP
M_WXMIT_OFF# PLT_RST#
R420 0_0402_5% @R420 0_0402_5% @
1 2
R422 0_0402_5%R422 0_0402_5%
1 2
ICH_SMBCLK ICH_SMBDATA
+1.5VS_WLAN +3VS_WWAN
R418
R418
1 2
0_1206_5%
0_1206_5%
@
@
1 3
D
D
+1.5VS_WLAN
USB20_N8 27 USB20_P8 27
+3VS_WWAN
+3VALW+3VS_WWAN
Q115AP2305GN
Q115AP2305GN
S
S
G
G
2
R440
@R440
@
R441
@R441
@
18P_0402_50V8J
18P_0402_50V8J
47K_0402_5%
47K_0402_5% 47K_0402_5%
47K_0402_5%
1 2 1 2
JP4
JP4
1
1
2
2
3
3
4
4
5
5
6
6
G1
7
7
G2
ACES_88266-07001
ACES_88266-07001
+3VALW +3VS_WWAN
1
C585
C585
2
@
@
8 9
UIM_PWR UIM_DATA
UIM_CLK
Mini Card 2---WLAN
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C566
C566
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
CH_DATA36
CH_CLK36
CLKREQ#_617
CLK_PCIE_MCARD2#17 CLK_PCIE_MCARD217
R704 0_0402_5% DEBUG@R704 0_0402_5% DEBUG@
CLK_DEBUG_PORT_117
PCIE_RXN327 PCIE_RXP327
+1.5VS
R423
R423 R425
R425
R431 0_1206_5%R431 0_1206_5%
R432 0_1206_5%R432 0_1206_5%
+3VS +3VS_WLAN
0_0402_5%
0_0402_5%
1 2 1 2
0_0402_5%
0_0402_5%
PCIE_TXN327
PCIE_TXP327
1 2
1 2
1 2
+3VS_WLAN
1
C567
C567
2
ICH_PCIE_WAKE# CH_DATA CH_CLK CLKREQ#_6
CLK_PCIE_MCARD2# CLK_PCIE_MCARD2
PLT_RST#
PCIE_C_RXN3 PCIE_C_RXP3
PCIE_TXN3 PCIE_TXP3
+3VS_WLAN
+1.5VS_WLAN
XMIT_OFF27
CONN@
CONN@
JP7
JP7
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
GND1
GND2
FOX_AS0B226-S40N-7F
FOX_AS0B226-S40N-7F
+3VALW
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
10K_0402_5%
10K_0402_5%
0.01U_0402_16V7K
0.01U_0402_16V7K
C568
C568
+3VS_WLAN +1.5VS_WLAN
R699 0_0402_5% DEBUG@R699 0_0402_5% DEBUG@
1 2
R700 0_0402_5% DEBUG@R700 0_0402_5% DEBUG@
1 2
R701 0_0402_5% DEBUG@R701 0_0402_5% DEBUG@
1 2
R702 0_0402_5% DEBUG@R702 0_0402_5% DEBUG@
1 2
R703 0_0402_5% DEBUG@R703 0_0402_5% DEBUG@
1 2
XMIT_OFF#
PLT_RST#
R424 0_0402_5%R424 0_0402_5% R426 0_0402_5%@R426 0_0402_5%@
ICH_SMBCLK
ICH_SMBDATA
12
R433
@R433
@
2
G
G
R435
R435
1 2
0_0402_5%
0_0402_5%
1
C569
C569
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2 1 2
+3VALW
12
@
@
R434
R434 100K_0402_5%
100K_0402_5%
13
D
D
S
S
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
C570
C570
2
USB20_N5 27 USB20_P5 27
XMIT_OFF#
@
@
Q10
Q10 2N7002_SOT23-3
2N7002_SOT23-3
+1.5VS_WLAN
1
C571
C571
2
+3VALW +3VS +1.5VS_WLAN
+1.5VS_WLAN +3VS_WLAN
LPC_FRAME# 26,37,38 LPC_AD3 26,37,38 LPC_AD2 26,37,38 LPC_AD1 26,37,38 LPC_AD0 26,37,38
WL_LED# 39
Near to Express Card slot.
CONN@
CONN@
JEXP1
JEXP1
GND USB_D­USB_D+ CPUSB# RSV RSV SMB_CLK SMB_DATA +1.5V +1.5V WAKE# +3.3VAUX PERST# +3.3V +3.3V CLKREQ# CPPE# REFCLK­REFCLK+ GND PERn0 PERp0 GND PETn0 PETp0 GND
GND GND
SANTA_131851-A_LT
SANTA_131851-A_LT
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
WLAN, WWAN, New Card
WLAN, WWAN, New Card
WLAN, WWAN, New Card
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
+3VS_PEC
C577
C577
+1.5VS_PEC
C581
C581
+3V_PEC
C583
C583
E
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
C578
C578
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
C582
C582
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
C584
C584
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
31 51Friday, October 05, 2007
31 51Friday, October 05, 2007
31 51Friday, October 05, 2007
1
2
1
2
1
2
0.1
0.1
0.1
of
0.1U_0402_16V4Z
0.1U_0402_16V4Z
New Card
Express Card Power Switch
+1.5VS
U16
U16
12
+3VS
1.5Vin
14
1.5Vin
2
3.3Vin
4
3.3Vin AUX_IN17AUX_OUT
6
SYSRST#
20
SHDN#
1
STBY#
10
CPPE#
9
CPUSB#
18
RCLKEN
R5538D001-TR-F_QFN20_4X4~D
R5538D001-TR-F_QFN20_4X4~D
Close to JEXP
R436 0_0402_5%R436 0_0402_5%
11
1.5Vout
13
1.5Vout
3
3.3Vout
5
3.3Vout
15 19
OC#
8
PERST#
16
NC
7
GND
B
PERST#
+1.5VS_PEC
+3VS_PEC
+3V_PEC
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
USB20_N927
USB20_P927
ICH_SMBCLK17,21,27,37
ICH_SMBDATA17,21,27,37
ICH_PCIE_WAKE#27,30
CLK_PCIE_NCARD#17 CLK_PCIE_NCARD17
Compal Secret Data
Compal Secret Data
Compal Secret Data
CLKREQ#_417
PCIE_RXN427 PCIE_RXP427
PCIE_TXN427
PCIE_TXP427
Deciphered Date
Deciphered Date
Deciphered Date
1 2
R437 0_0402_5%R437 0_0402_5%
1 2
R438
R438
1 2
0_0402_5%
0_0402_5%
+1.5VS_PEC +1.5VS_PEC
+3V_PEC +3VS_PEC
D
USB10­USB10+ CPUSB#
ICH_SMBCLK ICH_SMBDATA
PCIE_PME#_R PERST#
CLKREQ#_4 CPUSB#
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
27 28
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
3 3
C576
C576
1 2
C579 0.1U_0402_16V4ZC579 0.1U_0402_16V4Z
1 2
C580 0.1U_0402_16V4ZC580 0.1U_0402_16V4Z
+3VALW
PLT_RST#9,20,25,30,32
SYSON38,39,41,47,50 SUSP#33,38,41,44,46,47,48
+3VALW
EXP_CPPE#27
1 2
PLT_RST# SYSON SUSP#
R439 100K_0402_5% R439 100K_0402_5%
EXP_CPPE#
1 2
internal pull high to 3.3Vaux-in
4 4
EC need setting at Hi-Z & output Low
A
5
4
3
2
1
GND GND GND GND
NC NC NC
5 10
30 20
44 18 37
48 47 46 45 43 42 41 40 29 28 27 26 25 23 22
34 35 36
6 24
31 32 33
10U_0805_10V4Z
10U_0805_10V4Z
XD_SD_MS_D0
+1.8VS_CR
C1326
C1326
+3VS
1
2
XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 SDCMD_MSBS_XDWE# SDCLK_MSCLK_XDCE# XDWP#_SDWP# XD_CLE XD_D4 XD_D5 XD_D6 XD_D7 XD_RE# XD_RB# XD_ALE
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C1336
C1336
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C1327
C1327
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C1332
C1332
+3VS
+1.8VS_CR
1
2
1
2
C1328
C1328 1000P_0402_50V7K
1000P_0402_50V7K
1
C1334
C1334
2
1
C1329
C1329
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C1333
C1333
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C1335
C1335
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
VIN VIN/CE
GND
1
2
VOUT VOUT
1U_0603_10V4Z
1U_0603_10V4Z
+VCC_4IN1+VCC_OUT
12
1 5
R1128
@ R1128
@
0_0603_5%
0_0603_5%
1 2
C1324
C1324
10U_0805_10V4Z
10U_0805_10V4Z
Use 0603 type and over 20 mils trace width on both side
+VCC_OUT
+3VS
U37
U37
3 4
1
C1330
C1330
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
RT9701CB_SOT25
RT9701CB_SOT25
2
reserved power circuit
+1.8VS_CR +1.8VS
C1325
C1325
0.1U_0805_50V7M
0.1U_0805_50V7M
+VCC_4IN1
1
2
C1331
C1331
40mil
12
R1050
@ R1050
@
150K_0402_5%
150K_0402_5%
+3VS
1 2
1 2
1 2 1 2 1 2
D42
D42
DAN202U_SC70
DAN202U_SC70
XDCD0#_SDCD# XDCD1#_MSCD#
XDWP#_SDWP#
XD_RB#
XD_CLE
12
C788
@ C788
@
100P_0402_25V8K
100P_0402_25V8K
C789
@ C789
@
100P_0402_25V8K
100P_0402_25V8K
C790
@ C790
@
100P_0402_25V8K
100P_0402_25V8K
1
1
2
SDCLKSDCLK_MSCLK_XDCE# MSCLK XDCE#
XD_CD#
C1047
C1047 270P_0402_50V7K
270P_0402_50V7K
U36
U36
PREXT
XIN
3
APCLKN
4
APCLKP
9
APRXN
8
APRXP
11
APTXN
12
APTXP
7
APREXT
38
PCIES_EN
39
PCIES
19
REG_CTRL
1
XRSTN
2
XTEST
13
SEEDAT
14
SEECLK
15
CR1_CD1N
16
CR1_CD0N
17
CR1_PCTLN
21
CR1_LEDN
JMB385-LGEZ0A_LQFP48_7X7
JMB385-LGEZ0A_LQFP48_7X7
JMB385
JMB385
APVDD
APV18
TAV33
DV33 DV33 DV18 DV18
MDIO0 MDIO1 MDIO2 MDIO3 MDIO4 MDIO5 MDIO6 MDIO7 MDIO8
MDIO9 MDIO10 MDIO11 MDIO12 MDIO13 MDIO14
APGND
CLK_SRC11#17 CLK_SRC1117
PCIE_TXN527 PCIE_TXP527
C1321 0.1U_0402_16V4ZC1321 0.1U_0402_16V4Z
PCIE_RXN527 PCIE_RXP52 7
12
C1322 0.1U_0402_16V4ZC1322 0.1U_0402_16V4Z
12
R1047 10K_0402_5%
R1047 10K_0402_5%
R972 10K_0402_5%R972 10K_0402_5%
1 2
+3VS
PLT_RST#9,20,25,30 ,31
use for PWR_EN#
8mA sink current
12
+VCC_OUT
PCIE_C_RXN5 PCIE_C_RXP5
+3VS
XDCD1#_MSCD# XDCD0#_SDCD#
CR_LED#
Layout must add a thermal pad pin49
R1042 4.7K_0402_5%
R1042 4.7K_0402_5%
1 2
R1041 4.7K_0402_5%
R1041 4.7K_0402_5%
1 2
D D
C C
+VCC_4IN1
R1044 10K_0402_5%
R1044 10K_0402_5% R1043 10K_0402_5%
R1043 10K_0402_5%
+3VS
R709
R709
1 2
XD_RE#
R1046 200K_0402_5%
R1046 200K_0402_5% R1048 200K_0402_5%
R1048 200K_0402_5%
XD_ALE
XDCE#
SDCLK
1 2
MSCLK
1 2
XDCD1#_MSCD# XDCD0#_SDCD#
12 12
200K_0603_5%
200K_0603_5%
1 2 1 2
12
R706
@ R706
@
100_0402_5%
100_0402_5%
R707
@ R707
@
100_0402_5%
100_0402_5%
R708
@ R708
@
100_0402_5%
100_0402_5%
R710 22_0 402_5%R710 22_0402_5% R711 22_0402_5%R711 22_0402_5% R712 22_0402_5%R712 22_0402_5%
2 3
Card Reader Connector
U35
U35
B B
White LED: VF=3V, IF = 5mA, Res = 56ohm
+5VALW_LED
12
R719
R719 56_0402_5%
56_0402_5%
21
D15
D15 S1-023459_AQUA-WHITE_0603
S1-023459_AQUA-WHITE_0603
47K
47K
Q103
Q103
10K
10K
CR_LED#
2
DTA114YKAT146_SOT23-3
DTA114YKAT146_SOT23-3
+VCC_4IN1 +VCC_4IN1
XD_SD_MS_D0 XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 XD_D4 XD_D5 XD_D6 XD_D7
SDCMD_MSBS_XDWE# XDWP#_SDWP# XD_ALE XD_CD# XD_RB# XD_SD_MS_D0 XD_RE# XDCE# XD_SD_MS_D2 XD_CLE
1 3
A A
33
XD-VCC
8
XD-D0
9
XD-D1
26
XD-D2
27
XD-D3
28
XD-D4
30
XD-D5
31
XD-D6
32
XD-D7
6
XD-WE
7
XD-WP
5
XD-ALE
34
XD-CD
1
XD-R/B
2
XD-RE
3
XD-CE
4
XD-CLE
13
4IN1 GND
22
4IN1 GND
37
4IN1 GND
38
4IN1 GND
TAITW_R015-312-LM
TAITW_R015-312-LM
CONN@
CONN@
4 IN 1 CONN
4 IN 1 CONN
SD-VCC MS-VCC
SD_CLK SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3
SD-CMD
SD-CD-SW
SD-WP-SW
MS-SCLK MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3
MS-INS
MS-BS
23 14
SDCLK
24
XD_SD_MS_D0
25
XD_SD_MS_D1
29
XD_SD_MS_D2
10
XD_SD_MS_D3
11
SDCMD_MSBS_XDWE#
12
XDCD0#_SDCD#
36
XDWP#_SDWP#
35
MSCLK
15 19
XD_SD_MS_D1
20 18
XD_SD_MS_D3
16
XDCD1#_MSCD#
17
SDCMD_MSBS_XDWE#
21
R705
R705
1 2
0_0805_5%
0_0805_5%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
USB CardReader&CONN
USB CardReader&CONN
USB CardReader&CONN
Montevina Consumer Discrtet
Montevina Consumer Discrtet
Montevina Consumer Discrtet
1
0.1
0.1
32 51Friday, October 05, 2007
32 51Friday, October 05, 2007
32 51Friday, October 05, 2007
0.1
A
hexainf@hotmail.com
B
C
D
E
+3VS_HDA
R1051
R1051
1 2
BLM18BD601SN1D_0603
BLM18BD601SN1D_0603
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C1342
C1342
1 1
2 2
33P_0402_50V8K
33P_0402_50V8K
3 3
@
@
R1054
R1054
47_0402_5%
47_0402_5%
@
@
C1345
C1345
C1358
@C1358
@
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C1359
@C1359
@
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C1360
@C1360
@
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C1361
@C1361
@
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R1067
R1067
1 2
R1065
R1065
1 2
R1066
R1066
1 2
HDA_BITCLK_CODEC
12
1
2
0_1206_5%
0_1206_5%
0_1206_5%
0_1206_5%
0_1206_5%
0_1206_5%
SB_SPKR27
GNDA 35,40
1
2
HDA_BITCLK_CODEC21,26 HDA_SDOUT_CODEC26
HDA_SDIN026 HDA_SYNC_CODEC21,26 HDA_RST#_CODEC21,26
DMIC_CLK19
R1060 47K_0402_5%R1060 47K_0402_5%
1 2
R1061 10K_0402_5%R1061 10K_0402_5%
1 2
C1349 0.1U_0402_16V4ZC1349 0.1U_0402_16V4Z
1 2
+VDDA_CODEC_R
SENSE_B#40
R1062 5.1K_0402_1%R1062 5.1K_0402_1% R1063 39.2K_0402_1%R1063 39.2K_0402_1%
1 2 1 2
+3VS
R1052
R1052
1 2
+3VS +VDDA_CODEC
BLM18BD601SN1D_0603
BLM18BD601SN1D_0603
+3VDD_CODEC
+VDDA_CODEC_R
+3VS_HDA
HDA_BITCLK_CODEC HDA_SDOUT_CODEC
R1055 33_0402_5% R1055 33_0402_5%
1 2
HDA_SYNC_CODEC HDA_RST#_CODEC
R1058 22_0402_5%
R1058 22_0402_5%
1 2
C1347
C1347
12
1U_0603_10V4Z
1U_0603_10V4Z
MONO_INR
1 2
C1348 0.1U_0402_16V4ZC1348 0.1U_0402_16V4Z
SENSEB#
1
C1353
C1353
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C1355
C1355 10U_0805_10V4Z
10U_0805_10V4Z
1 2
2
VC_REFA
+3VDD_CODEC +5VALW
1
2
C1337
C1337
1U_0603_10V4Z
1U_0603_10V4Z
U38
U38
9
DVDD_CORE*
1
DVDD_CORE
25
AVDD1*
38
AVDD2**
3
DVDD_IO
32
MONO_OUT
6
BITCLK
5
SDO
8
SDI_CODEC
10
SYNC
11
RESET#
46
DMIC_CLK
33
CAP2
12
PCBEEP
40
NC / OTP
34
SENSE_B / NC
37
NC
18
NC
19
NC
20
NC
27
VREFFILT
26
AVSS1*
42
AVSS2**
7
DVSS**
92HD71B7X5NLGXA1X8_QFN48_7X7
92HD71B7X5NLGXA1X8_QFN48_7X7
+VDDA_CODEC_R
1
2
C1339
C1338
C1338
C1339
0.1U_0402_16V4Z
0.1U_0402_16V4Z
EAPD/ SPDIF OUT 0 or 1 / GPIO 0
VOL_UP/DMIC_0/GPIO 1 VOL_DN/DMIC_1/GPIO 2
1
2
1U_0603_10V4Z
1U_0603_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C1340
C1340
VREFOUT-E / GPIO 4
SPDIF OUT1 / GPIO 7
SPDIF OUT0
VREFOUT-B VREFOUT-C
SENSE_A
PORTA_R PORTA_L
PORTB_R PORTB_L
PORTC_R
PORTC_L
PORTD_R
PORTD_L
PORTE_R PORTE_L
PORTF_R PORTF_L
1 2
1
2
GPIO 3
GPIO 5 GPIO 6
R1053
R1053 0_0603_5%
0_0603_5%
47 2 4 30 31 43 44 45 48
28 29
13
41 39
22 21
24 23
36 35
15 14
17 16
EAPD_CODEC
SPDIF_OUT
VREFOUT_B
SENSE
HP_OUTR HP_OUTL
MIC_EXTR MIC_EXTL
MIC_INR MIC_INL
LINE_OUT_R LINE_OUT_L
DOCK_MICR DOCK_MICL
EAPD_CODEC 38 DMIC_DAT 19
SPDIF_OUT 21,40
VREFOUT_B 35
R1056 5.1K_0402_1%R1056 5.1K_0402_1%
1 2
R1057 20K_0402_1%R1057 20K_0402_1%
1 2
R1059 39.2K_0402_1%R1059 39.2K_0402_1%
1 2
R683 10K_0402_1%
R683 10K_0402_1%
1 2
C1346 0.1U_0402_16V4ZC1346 0.1U_0402_16V4Z
1 2
HP_OUTR 35 HP_OUTL 35
1 2
C1350 1U_0603_10V6K
C1350 1U_0603_10V6K
1 2
C1351 1U_0603_10V6K
C1351 1U_0603_10V6K
LINE_OUT_R 35
LINE_OUT_L 35
1 2
C1356 1U_0603_10V6K
C1356 1U_0603_10V6K
1 2
C1357 1U_0603_10V6K
C1357 1U_0603_10V6K
0212_Change to +5VALW.
W=40Mil
C1341
C1341
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
SUSP#31,38,41,44,46,47,48
0208_Change SLP_S3# to SUSP#.
+VDDA_CODEC_R
EXTMIC_DET# 35 JACK_DET# 35,40 INTMIC_DET# 35
HP Jack & Dock
1 2
C1352 1U_0603_10V6K
C1352 1U_0603_10V6K
12
R1064
@R1064
@
0_0603_5%
0_0603_5% C1354 1U_0603_10V6K
C1354 1U_0603_10V6K
1 2
Internal SPKR.
CODEC POWER
U39
U39
1
VIN
OUT
2
GND SHDN#3BP
GMT_G9191-475T1U_SOT23-5
GMT_G9191-475T1U_SOT23-5
MIC_EXT_R 35 MIC_EXT_L 35
MIC_IN_R 35
MIC_IN_L 35
DOCK_MIC_R 40 DOCK_MIC_L 40
5
4
+VDDA_CODEC
1
2
C1343
C1343
1
C1344
C1344
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
Jack MIC
Internal MIC
DOCK MIC
(4.75V)
2.2U_0805_16V4Z
2.2U_0805_16V4Z
300mA
GNDAGND
SENSE A SENSE B
Port Resistor Port Resistor
A 39.2K
4 4
B 20K
C 10K
D 5.11K
A
E
F
G
H
39.2K
20K
10K
5.11K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Codec_IDT9271B7
Codec_IDT9271B7
Codec_IDT9271B7
Montevina Consumer UMA
Montevina Consumer UMA
Montevina Consumer UMA
E
0.1
0.1
33 51Friday, October 05, 2007
33 51Friday, October 05, 2007
33 51Friday, October 05, 2007
0.1
5
4
3
2
1
D D
C C
MDC 1.5 Conn.
HDA_SDOUT_MDC26
HDA_SYNC_MDC26
HDA_SDIN126
HDA_RST#_MDC26
1 2
R477 33_0402_5%R477 33_0402_5%
HDA_SDOUT_MDC HDA_SYNC_MDC
HDA_SDIN1_MDC
JP8
JP8
1
GND1
3
IAC_SDATA_OUT
5
GND2
7
IAC_SYNC
9
IAC_SDATA_IN
11
IAC_RESET#
Connector for MDC Rev1.5
Connector for MDC Rev1.5
IAC_BITCLK
GND13GND14GND15GND16GND17GND
RES0 RES1
GND3 GND4
18
2 4 6
3.3V
8 10 12
ACES_88018-124G
ACES_88018-124G
R475 0_0603_5%
R475 0_0603_5% R476 0_0603_5%R476 0_0603_5%
+3VS
R478
@R478
@
10_0402_5%
10_0402_5%
1 2
@
@
1 2
12
HDA_BITCLK_MDC 26
1 2
C618
@C618
@
10P_0402_25V8K
10P_0402_25V8K
+1.5VS +3VS
+3VS
1
1
C619
C619
2
1
C620
C620
C621
@C621
@
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0805_10V4Z
1000P_0402_50V7K
1000P_0402_50V7K
4.7U_0805_10V4Z
B B
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
MDC 1.5 & Robson
MDC 1.5 & Robson
MDC 1.5 & Robson
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
1
0.1
0.1
34 51Friday, October 05, 2007
34 51Friday, October 05, 2007
34 51Friday, October 05, 2007
0.1
A
hexainf@hotmail.com
B
C
D
E
10 dB
12
12
+5VS+5VAMP
+5VS
12
@R1135
@
100K_0402_5%
100K_0402_5%
12
R1138
R1138 100K_0402_5%
100K_0402_5%
MIC_EXT_R MIC_EXT_L
R1135
R684
R684
0_0402_5%
0_0402_5%
4.7K_0402_5%
4.7K_0402_5%
R685
R685
12
SP02000D000 S W-CONN ACES 85204-04001 4P P1.25
SPKL+ SPKL­SPKR+ SPKR-
1
1
C1376
C1376
C1375
12
C787
C787
1U_0603_10V4Z
1U_0603_10V4Z
12
R686
R686
4.7K_0402_5%
4.7K_0402_5%
C1375
1 2
2
2
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
ANA_MIC_DET38
INTMIC_DET#33
EXTMIC IN
C1377
C1377
1
C1378
C1378
2
100P_0402_50V8J
100P_0402_50V8J
EXTMIC_DET#33
+VDDA_CODEC
2N7002_SOT23-3
2N7002_SOT23-3
R1102 0_0603_5%R1102 0_0603_5%
1 2
R1103 0_0603_5%R1103 0_0603_5%
1 2
R1104 0_0603_5%R1104 0_0603_5%
1 2
R1105 0_0603_5%R1105 0_0603_5%
1 2
1
2
100P_0402_50V8J
100P_0402_50V8J
MIC_EXT_R MIC_EXT_L
HP_OUT_R HP_OUT_L
EXTMIC_DET# HP_DET#
CIR_IN38,40
R1077
R1077
0_0402_5%
0_0402_5%
4.7K_0402_5%
4.7K_0402_5%
MIC_IN_L33 MIC_IN_R33
+3VS
R681 10K_0402_5%R681 10K_0402_5%
13
D
D
Q110
Q110
2
G
G
S
S
3
D55
@D55
@
PSOT24C_SOT23-3
PSOT24C_SOT23-3
8/31EMI request
Audio/B & CIR
CIR_IN
+5VL
1U_0603_10V4Z
1U_0603_10V4Z
12
12
1 2
12
R1079
R1079
4.7K_0402_5%
4.7K_0402_5%
D
D
Q109
Q109
S
S
13
12
R1078
R1078
2N7002_SOT23-3
2N7002_SOT23-3
3
2
1
JP49
JP49
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
ACES_87213-1400G
ACES_87213-1400G
CONN@
CONN@
+VDDA_CODEC
C1379
C1379
2
G
G
SPEAKER
2
D56 PSOT24C_SOT23-3
PSOT24C_SOT23-3
1
R951
R951 10K_0402_5%
10K_0402_5%
1 2
JP60
JP60
1
1
2
2
3
3
4
4
5
G1
6
G2
ACES_85204-04001
ACES_85204-04001
CONN@
CONN@
@D56
@
INTMIC IN
JP51
JP51
1
1
2
2
3
3
4
4
5
GND1
6
GND2
ACES_88231-04001
ACES_88231-04001
CONN@
CONN@
R1133
9/21 follow 14" AMD
10U_0805_10V4Z
10U_0805_10V4Z
1 1
15
U40
U40
C1480 0.47U_0603_16V7K C1480 0.47U_0603_16V7K
1 2 1 2
R1136
EC_MUTE#38
2
+3VALW
R676
R676
G
G
Q114
Q114
R1136
20K_0402_5%
20K_0402_5%
R1139
R1139
20K_0402_5%
20K_0402_5%
JACK_DET#33,40
1 2
13
D
D
S
S
LINE_OUT_R33
LINE_OUT_L33
2 2
10K_0402_5%
10K_0402_5%
3 3
HP_DET#
2N7002_SOT23-3
2N7002_SOT23-3
HP_OUTR33
HP_OUTL33
4 4
C1481 47P_0402_50V8JC1481 47P_0402_50V8J C1482 0.47U_0603_16V7K C1482 0.47U_0603_16V7K
12
C1483 47P_0402_50V8JC1483 47P_0402_50V8J
C1484 0.47U_0603_16V7K C1484 0.47U_0603_16V7K C1485 47P_0402_50V8JC1485 47P_0402_50V8J C1486 0.47U_0603_16V7K C1486 0.47U_0603_16V7K
12
C1487 47P_0402_50V8JC1487 47P_0402_50V8J
EC_MUTE#
Q49
Q49
13
D
D
2N7002_SOT23-3
2N7002_SOT23-3
2
G
G
S
S
Q50
Q50
13
D
D
2N7002_SOT23-3
2N7002_SOT23-3
2
G
G
S
S
C785
C785
C786
C786
1 2 1 2
1 2 1 2
1 2 1 2
2
G
G
1 3
D
S
D
S
Q48
Q48 2N7002_SOT23-3
2N7002_SOT23-3
+
+
1 2
100U_D2_6.3VM
100U_D2_6.3VM
+
+
1 2
100U_D2_6.3VM
100U_D2_6.3VM
B+
12
2
1 3
D
D
R678
R678 330K_0402_5%
330K_0402_5%
Q47
Q47 2N7002_SOT23-3
2N7002_SOT23-3
G
G
S
S
7
17
9
5
19
DOCK_LOUT_R
DOCK_LOUT_L
HP_OUT_R
HP_OUT_L
16
VDD
RIN+
RIN-
LIN+
LIN-
SHUTDOWN
PVDD1
GND41GND311GND213GND1
20
HP OUT
DOCK_LOUT_R 40
HP OUT For Docking
DOCK_LOUT_L 40
HP OUT For M/B
C1477
C1477
6
PVDD2
GAIN0 GAIN1
ROUT+
ROUT-
LOUT+
LOUT-
NC
BYPASS
THERMAL PAD
21
TPA6017A2_TSSOP20
TPA6017A2_TSSOP20
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C1478
C1478
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2 3
SPKR+
18
SPKR-
14
SPKL+
4
SPKL-
8
12 10
1
C1488 10U_0805_10V4ZC1488 10U_0805_10V4Z
2
R1133
1 2
0_1206_5%
0_1206_5%
1
C1479
C1479
2
R1134
R1134
100K_0402_5%
100K_0402_5%
R1137
@R1137
@
100K_0402_5%
100K_0402_5%
Keep 10 mil width
VREFOUT_B33
MIC_EXT_R33
MIC_EXT_L33
A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet
AMP & Audio Jack
AMP & Audio Jack
AMP & Audio Jack
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
E
0.1
0.1
0.1
of
35 51Friday, October 05, 2007
35 51Friday, October 05, 2007
35 51Friday, October 05, 2007
5
4
3
2
1
+5VALW
U41
U41
1
GND
2
D D
C1381
C1381
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
2
IN
3
IN
4
EN#
TPS2061IDGNR_MSOP8
TPS2061IDGNR_MSOP8
USB_EN#
OUT OUT OUT OC#
8
W=60mils
7 6 5
1
+
+
C1380
C1380
2
150U_D_6.3VM
150U_D_6.3VM
R1083 10K_0402_5%R1083 10K_0402_5%
20070921 remove invter
C C
B B
USB cable connector for Right side
JP55
JP55
+5VALW
USB_EN#
USB20_N027 USB20_P027
USB20_N127 USB20_P127
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
GND1
12
GND2
ACES_87213-1000G
ACES_87213-1000G
Finger printer
R627 0_0603_5% R627 0_0603_5%
1 2
Q31 SI2301BDS_SOT23@
Q31 SI2301BDS_SOT23@
S
S
D
D
+3VALW
USB_EN#38
USB20_N727 USB20_P727
A A
13
G
G
2
R634 0_0402_5%R634 0_0402_5%
1 2
R635 0_0402_5%R635 0_0402_5%
1 2
2
3
D30
@D30
@
PACDN042_SOT23-3~D
PACDN042_SOT23-3~D
1
USB_VCCC
1
1
C1383
C1383
C1382
C1382
1 2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z 1000P_0402_50V7K
1000P_0402_50V7K
20070209 Add for FPR
1
C756
C756
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
USB20_N7_R USB20_P7_R
+5VALW
R628
@R628
@
1 2
0_0603_5%
0_0603_5%
JP24
JP24
1
1
2
2
3
3
4
4
5
GND1
6
GND2
ACES_88231-04001
ACES_88231-04001
+3VS
USB_VCCC
USB20_N227 USB20_P227
SATA_TXP526 SATA_TXN526
SATA_RXN5_C26 SATA_RXP5_C26
C1385 0.01U_0402_16V7K
C1385 0.01U_0402_16V7K
12
C1384 0.01U_0402_16V7K
C1384 0.01U_0402_16V7K
12
SATA_TXP5 SATA_TXN5
SATA_RXN5 SATA_RXP5
+5VALW
BT Connector
JP57
JP57
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
GND1
10
GND2
ACES_88231-08001
ACES_88231-08001
1
C1386
C1386 1U_0603_10V4Z
1U_0603_10V4Z
2
BT_OFF27
JP53
JP53
1
B_VCC
2
B_D-
3
B_D+
4
B_GND
5
GND
6
A+
7
A-
8
GND
9
B-
10
B+
11
GND
TYCO_1759576-1
TYCO_1759576-1
CONN@
CONN@
D46
D46
SATA_TXN5
USB20_P6_R USB20_N6_R
4 3
PRTR5V0U2X_SOT143-4@
PRTR5V0U2X_SOT143-4@
R1084 0_0402_5%R1084 0_0402_5% R1085 0_0402_5%R1085 0_0402_5%
R1086 1K_0402_5%@R1086 1K_0402_5%@
1 2
R1087 1K_0402_5%@R1087 1K_0402_5%@
1 2
0612 no install
12
R1090
R1090 100K_0402_5%
100K_0402_5%
R1092
R1092
1 2
47K_0402_5%
47K_0402_5%
USB
USB
ESATA
ESATA
SATA_TXP5
2
IO1
VIN
1
GND
IO2
12 12
+5VALW
USB20_N6_R
Q105 SI2301BDS_SOT23
Q105 SI2301BDS_SOT23
S
S
D
D
13
G
G
2
0.01U_0402_16V7K
0.01U_0402_16V7K C1390
C1390
1 2
Need change to New version
+3VAUX_BT
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C1387
C1387
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C1388
C1388
D47
D47
4
IO1
VIN
3
GND
IO2
PRTR5V0U2X_SOT143-4@
PRTR5V0U2X_SOT143-4@
+3VAUX_BT+3VALW
1
C1389
C1389
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
USB20_P6 27 USB20_N6 27 BT_LED 39 CH_DATA 31
CH_CLK 31
USB20_P6_R
2 1
Left side ESATA/USB combination Connector
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
USB, BT, eSATA
USB, BT, eSATA
USB, BT, eSATA
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
36 51Friday, October 05, 2007
36 51Friday, October 05, 2007
36 51Friday, October 05, 2007
1
0.1
0.1
0.1
5
hexainf@hotmail.com
4
3
2
1
+3VL+3VL
1
C711
C711
0.1U_0402_16V4Z
0.1U_0402_16V4Z
SMB_EC_CK1
D D
SMB_EC_DA1
2
U28
U28
8
VCC
7
WP
6
SCL
5
SDA
AT24C16AN-10SI-2.7_SO8
AT24C16AN-10SI-2.7_SO8
GND
12
R552
R552 100K_0402_5%
100K_0402_5%
1
A0
2
A1
3
A2
4
12
R557
R557 100K_0402_5%
100K_0402_5%
FSEL#38 SPI_CLK38
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VL
20mils
1
C712
C712
2
1 2
R553 0_0402_5%R553 0_0402_5%
1 2
R554 0_0402_5%R554 0_0402_5%
1 2
R556 0_0402_5%R556 0_0402_5%
SPI_FSEL# SPI_CLK_R
SPI ROM
CONN@
CONN@
U27
U27
8
VCC
3
W
7
HOLD
1
S
6
C
5
D
WIESON G6179 8P SPI
WIESON G6179 8P SPI
SP07000F500 S SOCKET WIESON G6179-100000 8P SPIFLASH WIESO_G6179-100000_8P
4
VSS
SPI_SOSPI_FWR#
2
Q
&U1
&U1
1 2
R555 0_0402_5%
R555 0_0402_5%
FRD#
FRD# 38FWR#38
45level
45@
45@
SST25LF080B_SO8-200mil
SST25LF080B_SO8-200mil
C C
Acceleromter
+3VS +3VS_ACL
D23
D23
2 1
CH751H-40PT_SOD323-2
CH751H-40PT_SOD323-2
U29
U29
ACCEL_INT25
B B
+3VS_ACL_IO
+3VS_ACL
ICH_SMBDATA17,21,27,31
ICH_SMBCLK17,21,27,31
R569 10K_0402_5%R569 10K_0402_5%
12
R571
R571 0_0402_5%
0_0402_5%
1
INT/RDY
2
SDD
3
SDA/SDI/SPC
4
VDD_IO
5
SCL/SPC
6
12
CS
7
NC
8
CK
LIS3LV02DL-TR _LGA16
LIS3LV02DL-TR _LGA16
Must be placed in the center of the system.
L
R564
R564 0_0603_5%
0_0603_5%
1 2
GND
RES
GND
VDD
RES
VDD
RES
GND
+3VS_ACL_IO
16
15
14
13
12
11
10
9
R567
R567
0_0402_5%
0_0402_5%
1 2
R568
R568 0_0402_5%
0_0402_5%
1 2
R570
R570
0_0402_5%
0_0402_5%
1 2
+3VS_ACL
+3VS_ACL_IO
1
C713
C713
2
+3VS_ACL
1
C714
C714
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0805_6.3V6M
10U_0805_6.3V6M
LPC Debug Port
CLK_DEBUG_PORT_017
LPC_FRAME#26,31,38
PCI_RST#25,38
LPC_AD026,31,38 LPC_AD126,31,38 LPC_AD226,31,38 LPC_AD326,31,38
Connect pin3 & 23 together and pin 24 to GND in 6/29.
+3VALW
R561
R561
1 2
ON/OFFBTN_LED#38,39
VCC1_PWRGD38
ON/OFFBTNLED#
VCC1PWRGD SPI_CLK_JP52 SPI_CS#_JP52 SPI_SI_JP52 SPI_SO_JP52 SPI_HOLD#_0
SPI_CLK
FSEL#
FWR#
HOLD#
3.3K_0402_5%
3.3K_0402_5%
FRD#
ON/OFFBTN_LED#
VCC1_PWRGD
Change from +3VL to +3VS. 6/9 Removed +3VS. 6/13
B+
CONN@
CONN@
JP18
JP18
1
Ground
2
LPC_PCI_CLK
3
Ground
4
LPC_FRAME#
5
+V3S
6
LPC_RESET#
7
+V3S
8
LPC_AD0
9
LPC_AD1
10
LPC_AD2
11
LPC_AD3
12
VCC_3VA
13
PWR_LED#
14
CAPS_LED#
15
NUM_LED#
16
VCC1_PWRGD
17
SPI_CLK
18
SPI_CS#
19
SPI_SI
20
SPI_SO
21
SPI_HOLD#
22
Reserved
23
Reserved
24
Reserved
ACES_87216-2404_24P
ACES_87216-2404_24P
1 2
R558 0_0402_5%DEBUG@ R558 0_0402_5%DEBUG@
1 2
R559 0_0402_5%DEBUG@ R559 0_0402_5%DEBUG@
1 2
R560 0_0402_5%DEBUG@ R560 0_0402_5%DEBUG@
1 2
R562 0_0402_5%DEBUG@ R562 0_0402_5%DEBUG@
1 2
R563 0_0402_5%DEBUG@ R563 0_0402_5%DEBUG@
1 2
R565 0_0402_5%DEBUG@ R565 0_0402_5%DEBUG@
1 2
R566 0_0402_5%DEBUG@ R566 0_0402_5%DEBUG@
SPI_CLK_JP52
SPI_CS#_JP52
SPI_SI_JP52
SPI_HOLD#_0
SPI_SO_JP52
ON/OFFBTNLED#
VCC1PWRGD
A A
5
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
BIOS ROM
BIOS ROM
BIOS ROM
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
1
0.1
0.1
37 51Friday, October 05, 2007
37 51Friday, October 05, 2007
37 51Friday, October 05, 2007
0.1
+3VL_EC
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
SMB_EC_DA1 SMB_EC_CK1 SMB_EC_DA2 SMB_EC_CK2 CLKRUN#
PCI_PME#25
DOCK_SLP_BTN#
C716
C716
C715
C715
2
R573 4.7K_0402_5%R573 4.7K_0402_5% R577 4.7K_0402_5%R577 4.7K_0402_5% R574 4.7K_0402_5%R574 4.7K_0402_5% R575 4.7K_0402_5%R575 4.7K_0402_5% R724 8.2K_0402_5%R724 8.2K_0402_5%
SUSP#
12
R581
R581 100K_0402_5%
100K_0402_5%
EC DEBUG port
JP20
JP20
1
1 2 3 4
ACES_85205-0400
ACES_85205-0400
CONN@
CONN@
URX
2
UTX
3 4
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C717
C717
2
1000P_0402_50V7K
1000P_0402_50V7K
1 2 1 2 1 2 1 2 1 2
CLK_PCI_EC17
PCI_RST#
12
R713
R713 100K_0402_5%
100K_0402_5%
R589
R589
1 2
R592
R592
1 2
+5VL
ESB_CLK39
ESB_DAT39
1
C718
C718
2
+3VL
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
1000P_0402_50V7K
1000P_0402_50V7K
1
C719
C719
2
+5VL +3VS
@
@
C722
C722
15P_0402_50V8J
15P_0402_50V8J
@
@
R576
R576
1 2
1 2
R578
R578
1 2
C721
C721
+3VL
12
R583
@R583
@
10K_0402_5%
10K_0402_5%
LID_SW#
+3VL
R585
R585 10K_0402_5%
10K_0402_5%
1 2
EC_PME#
PWRBTN_OUT#
R729 0_0402_5%@R729 0_0402_5%@ R730 0_0402_5%@R730 0_0402_5%@
R731 0_0402_5%R731 0_0402_5% R732 0_0402_5%R732 0_0402_5%
33_0402_5%
33_0402_5%
47K_0402_5%
47K_0402_5%
R721
R721
4.7K_0402_5%
4.7K_0402_5%
1 2
TP_BTN#
TSATN#9
ON/OFFBTN39
3 2
12
JOPENJ1JOPEN
+3VL
C723
C723 15P_0402_50V8J
15P_0402_50V8J
1 2
Y5
Y5
OUT
NC NC
1 2
C725
C725 15P_0402_50V8J
15P_0402_50V8J
IN
0.1U_0402_16V4Z
0.1U_0402_16V4Z12J1
+3VL
WWAN_POWER_OFF31
32.768KHZ_12.5P_1TJS125DJ2A073
32.768KHZ_12.5P_1TJS125DJ2A073
1 2 1 2
1 2 1 2
GATEA2026 KB_RST#26 SIRQ27
LPC_FRAME#26,31,37
LPC_AD326,31,37 LPC_AD226,31,37 LPC_AD126,31,37 LPC_AD026,31,37
PCI_RST#25,37 EC_SCI#27
SMB_EC_CK137,43 SMB_EC_DA137,43 SMB_EC_CK26,21 SMB_EC_DA26,21
SLP_S3#27 SLP_S5#27 EC_SMI#27 LID_SW#39
R591 0_0603_5% @ R591 0_0603_5% @
1 2
CONA#40
R593 4.7K_0402_5%R593 4.7K_0402_5%
1 2
DIM_LED41 NUM_LED#39
4 1
SMB_EC_CK2 SMB_EC_DA2
ESB_CLK_R ESB_DAT_R
12
@
@
R595
R595 20M_0402_5%
20M_0402_5%
Cypress
ENE
+3VL +3VL_EC
R572
R572
1 2
GATEA20 KB_RST# SIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0
CLK_PCI_EC
PCI_RST# ECRST#
CLKRUN#
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15
SMB_EC_CK1 SMB_EC_DA1 SMB_EC_CK2 SMB_EC_DA2
SLP_S3# SLP_S5# EC_SMI# LID_SW# ESB_CLK_R ESB_DAT_R EC_PME#
CONA# UTX
URX ON/OFFBTN DIM_LED NUM_LED#
CRY2
CRY1
1 2 3 4 5 7 8
10 12
13 37 20 38
55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82
77 78 79 80
6 14 15 16 17 18 19 25 28 29 30 31 32 34 36
122 123
+EC_AVCC
0_0805_5%
0_0805_5%
U30
U30
GA20/GPIO00 KBRST#/GPIO01 SERIRQ# LFRAME# LAD3 LAD2 LAD1
LPC & MISC
LPC & MISC
LAD0 PCICLK
PCIRST#/GPIO05 ECRST# SCI#/GPIO0E CLKRUN#/GPIO1D
KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49
SCL1/GPIO44 SDA1/GPIO45 SCL2/GPIO46 SDA2/GPIO47
PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 LID_SW#/GPIO0A SUSP#/GPIO0B PBTN_OUT#/GPIO0C EC_PME#/GPIO0D EC_THERM#/GPIO11 FAN_SPEED1/FANFB1/GPIO14 FANFB2/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 ON_OFF/GPIO18 PWR_LED#/GPIO19 NUMLED#/GPIO1A
XCLK1 XCLK0
Int. K/B
Int. K/B Matrix
Matrix
SM Bus
SM Bus
+3VL_EC
12
L30
L30 0_0603_5%
0_0603_5%
1 2
C726 0.1U_0402_16V4Z
C726 0.1U_0402_16V4Z
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+EC_AVCC
9
22
33
96
111
125
VCC
VCC
VCC
VCC
VCC
VCC
PWM Output
PWM Output
AD Input
AD Input
DA Output
DA Output
PS2 Interface
PS2 Interface
SPI Device Interface
SPI Device Interface
SPI Flash ROM
SPI Flash ROM
GPIO
GPIO
GPIO
GPIO
GND
GND
GND
GND
GND
11
24
35
94
113
Issued Date
Issued Date
Issued Date
67
AVCC
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
AD3/GPIO3B AD4/GPIO42
SELIO2#/AD5/GPIO43
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
SDICS#/GPXOA00 SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0
SPICLK/GPIO58
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPI
GPI
AGND
KB926QFB0_LQFP128_14X14
KB926QFB0_LQFP128_14X14
69
<BOM Structure>
<BOM Structure>
ECAGND
L31
L31
1 2
INV_PWM
21
FAN_PWM
23
LAN_POWER_OFF
26
ACOFF
27
BATT_TEMP
63
BATT_OVP
64
ADP_I
65
ADP_ID
66
TP_BTN#
75
ANA_MIC_DET
76
DAC_BRIG
68
VCTRL
70
IREF
71
AC_SET
72
EC_MUTE#
83
USB_EN#
84
I2C_INT
85
MUTE_LED
86
TP_CLK
87
TP_DATA
88
97
DOCK_VOL_UP#
98
DOCK_VOL_DWN#
99 109
FRD#
119
SPIDI/RD#
SPIDO/WR#
SPICS#
GPXO10 GPXO11
GPXID3 GPXID4 GPXID5 GPXID6 GPXID7
V18R
0_0603_5%
0_0603_5%
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
120 126 128
73 74 89 90 91 92 93 95 121 127
100 101 102 103 104 105 106 107 108
110 112 114 115 116 117 118
124
For C Revision
R588
R588
FWR# SPI_CLK FSEL#
CIR_IN VCC1_PWRGD FSTCHG STD_ADP CAPS_LED# BAT_LED# ON/OFFBTN_LED# SYSON VR_ON AC_IN
EC_RSMRST#
1 2
EC_ON
0_0402_5%
0_0402_5%
WL_BLUE_LED# PM_PWROK BKOFF# M_PWROK TP_LED# HDDHALT_LED#
DOCK_PWRON ENBKL EAPD_CODEC THERM_SCI# SUSP# PWRBTN_OUT# NMI_DBG#
1
C724
C724
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
AC_IN ACIN
1 2
C791 100P_0402_50V8JC791 100P_0402_50V8J
Vendor Recommend
Compal Secret Data
Compal Secret Data
Compal Secret Data
INV_PWM 19 FAN_PWM 6 LAN_POWER_OFF 30 ACOFF 44
BATT_TEMP 43 BATT_OVP 43 ADP_I 44 ADP_ID 43 TP_BTN# 39 ANA_MIC_DET 35
DAC_BRIG 19
VCTRL 44 IREF 44 AC_SET 44
EC_MUTE# 35
USB_EN# 36 I2C_INT 39 MUTE_LED 40
R582 4.7K_0402_5%R582 4.7K_0402_5%
1 2
DOCK_VOL_UP# 40 DOCK_VOL_DWN# 40
FRD# 37
FWR# 37
SPI_CLK 37
FSEL# 37
R720 10K_0402_5%
R720 10K_0402_5%
1 2
CIR_IN 35,40
VCC1_PWRGD 37
FSTCHG 44
STD_ADP 44
CAPS_LED# 39
BAT_LED# 39
ON/OFFBTN_LED# 37,39 SYSON 31,39,41,47,50
VR_ON 49
R586 10K_0402_5%
R586 10K_0402_5%
EC_RSMRST# 27
EC_LID_OUT# 27
EC_ON 45
WL_BLUE_LED# 39 PM_PWROK 9,27 BKOFF# 19 M_PWROK 9,27 TP_LED# 39 HDDHALT_LED# 39
THERM_SCI# 21,27 SUSP# 31,33,41,44,46,47,48
PWRBTN_OUT# 27
+3VL
12
CH751H-40PT_SOD323-2
CH751H-40PT_SOD323-2
Deciphered Date
Deciphered Date
Deciphered Date
0.01U_0402_16V7K
0.01U_0402_16V7K
C720
C720
1 2
@
@
12
DOCK_PWRON 40 ENBKL 21 EAPD_CODEC 33
R715
R715 10K_0402_5%
10K_0402_5%
D13
D13
2 1
NMI_DBG# PCI_SERR#
ECAGND
R579 10K_0402_5%R579 10K_0402_5%
1 2
R580 10K_0402_5%R580 10K_0402_5%
1 2
TP_CLK 39
Select SPI ROM or LPC ROM
+3VL
TP_DATA 39
9/21 add R for nvidia
ENBKL
R1132 10K_0402_5%
R1132 10K_0402_5%
+3VL
D16
D16
+3VL
CH751H-40PT_SOD323-2
CH751H-40PT_SOD323-2
12
R714
R714
10K_0402_5%
10K_0402_5%
D14
D14
2 1
CH751H-40PT_SOD323-2
CH751H-40PT_SOD323-2
ACIN 44,45
For EMI
KSI7 KSI0
KSO13 KSO14 KSO15
KSO9 KSO10 KSO11 KSO12
+5V
12
KSO6 KSO3 KSO7 KSO8
KSO4 KSO0
KSO5
KSI3 KSI2 KSO1 KSO2
KSI5 KSI1 KSI4 KSI6
1 2 1 2
1 2 1 2 1 2
1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2
1 2 1 2
1 2
1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2
C1442100P_0402_50V8J @ C1442100P_0402_50V8J @ C1443100P_0402_50V8J @ C1443100P_0402_50V8J @
C1444100P_0402_50V8J @ C1444100P_0402_50V8J @ C1445100P_0402_50V8J @ C1445100P_0402_50V8J @ C1446100P_0402_50V8J @ C1446100P_0402_50V8J @
C1448100P_0402_50V8J @ C1448100P_0402_50V8J @ C1449100P_0402_50V8J @ C1449100P_0402_50V8J @ C1450100P_0402_50V8J @ C1450100P_0402_50V8J @ C1451100P_0402_50V8J @ C1451100P_0402_50V8J @
C1452100P_0402_50V8J @ C1452100P_0402_50V8J @ C1453100P_0402_50V8J @ C1453100P_0402_50V8J @ C1454100P_0402_50V8J @ C1454100P_0402_50V8J @ C1455100P_0402_50V8J @ C1455100P_0402_50V8J @
C1456100P_0402_50V8J @ C1456100P_0402_50V8J @ C1459100P_0402_50V8J @ C1459100P_0402_50V8J @
C1458100P_0402_50V8J @ C1458100P_0402_50V8J @
C1460100P_0402_50V8J @ C1460100P_0402_50V8J @ C1461100P_0402_50V8J @ C1461100P_0402_50V8J @ C1462100P_0402_50V8J @ C1462100P_0402_50V8J @ C1463100P_0402_50V8J @ C1463100P_0402_50V8J @
C1464100P_0402_50V8J @ C1464100P_0402_50V8J @ C1465100P_0402_50V8J @ C1465100P_0402_50V8J @ C1466100P_0402_50V8J @ C1466100P_0402_50V8J @ C1467100P_0402_50V8J @ C1467100P_0402_50V8J @
14" INT_KBD CONN.( TYPE "D" KB)
JP19
JP19
KSO15
1
KSO10
2
KSO11
3
ADP_ID
21
PCI_SERR# 25
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
EC KB926/KB Conn.
EC KB926/KB Conn.
EC KB926/KB Conn.
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
KSO14 KSO13 KSO12 KSO3 KSO6 KSO8 KSO7 KSO4 KSO2 KSI0 KSO1 KSO5 KSI3 KSI2
KSO0 KSI5 KSI4 KSO9 KSI6 KSI7 KSI1
38 51Monday, October 08, 2007
38 51Monday, October 08, 2007
38 51Monday, October 08, 2007
4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
ACES_85201-2405
ACES_85201-2405
CONN@
CONN@
0.1
0.1
0.1
A
hexainf@hotmail.com
B
C
D
E
System LED
S1-023459_AQUA-WHITE_0603
S1-023459_AQUA-WHITE_0603
CAPS_LED#38
S1-023459_AQUA-WHITE_0603
S1-023459_AQUA-WHITE_0603
SATA_LED#26
HDDHALT_LED#38
BAT_LED#38
S1-023462_AQUA-WHITE/AMBER
S1-023462_AQUA-WHITE/AMBER
S1-023459_AQUA-WHITE_0603
S1-023459_AQUA-WHITE_0603
ON/OFFBTN_LED#
1 1
D50
D50
D52
D52
White
AMBER
D17
D17
White
White
D53
D53
White
21
21
21
43
21
R1095
R1095
1 2
470_0402_5%
470_0402_5%
R1097
R1097
1 2
470_0402_5%
470_0402_5%
R1098
R1098 470_0402_5%
470_0402_5%
1 2
1 2
R728
R728 470_0402_5%
470_0402_5%
R980
R980
1 2
470_0402_5%
470_0402_5%
+5VALW_LED
+5VALW
+5VALW_LED
+5VALW_LED
+5VALW_LED
Cap lock
Battery Charge LED
HDD LED
System Power LED
Capacitor Sensor Conn
+3VL+5VALW_LED
2 2
4.7K_0402_5%
4.7K_0402_5%
NUM_LED#38
ESB_CLK38 ESB_DAT38 I2C_INT38
ON/OFFBTN_LED#37,38
ON/OFFBTN38
10K_0402_5%
10K_0402_5%
R1101
R1101
R1099
R1099
4.7K_0402_5%
4.7K_0402_5%
12
R1100
R1100
12
12
JP59
JP59
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
GND
12
GND
ACES_85201-1005N
ACES_85201-1005N
CONN@
CONN@
Keyboard backlight Conn
JP9
JP9
1
1
2
2
3
5
3
G1
4
6
4
G2
ACES_85201-04051
ACES_85201-04051
TouchPAD ON/OFF LED
200_0402_5%
200_0402_5%
+5VS
12
R613
R613 10K_0402_5%
10K_0402_5%
TP_LED#_LIGHT
2N7002_SOT23-3
2N7002_SOT23-3
R609
R609
Q25
Q25
2
G
G
+5VALW_LED
+5VALW_LED
+5VALW_LED
12
21
13
D
D
D
D
S
S
S
S
12
R610
R610 820_0402_5%
820_0402_5%
43
AMBERWhite
Q26
Q26
13
G
G
2N7002_SOT23-3
2N7002_SOT23-3
WL_LED#31
DTA114YKAT146_SOT23-3
DTA114YKAT146_SOT23-3
D54
D54 S1-023462_AQUA-WHITE/AMBER
S1-023462_AQUA-WHITE/AMBER
On (TP_LED#=L)-> White Off (TP_LED#=H)-> Amber
TP_LED#
2
TP_LED# 38
Mini card LED
+3VS
47K
2
Q111
Q111
47K
10K
10K
1 3
SW1
SW1 SMT1-05-A_4P
SMT1-05-A_4P
3 4
5
BT_LED36
TP ON/OFF
1 2
6
R1126
R1126
100K_0402_5%
100K_0402_5%
WL_LED
100K_0402_5%
100K_0402_5%
+5V
2N7002_SOT23-3
2N7002_SOT23-3
R1127
R1127
12
R611
R611 10K_0402_5%@
10K_0402_5%@
TP_BTN#
Q112
Q112
12
12
2
G
G
13
D
D
S
S
13
2
G
G
TP_BTN# 38
D
D
Q113
Q113
2N7002_SOT23-3
2N7002_SOT23-3
S
S
WL_BLUE_LED# 38
T/P Board T/P Power
+5V
3 3
4 4
ON/OFF Button Connector
+3VALW
JP10
JP10
1
ON/OFFBTN ON/OFFBTN_LED#
1
2
2
3
3
G1
4
4
G2
ACES_85201-04051
ACES_85201-04051
CONN@
CONN@
5 6
Reed Switch Connector
+3VALW
JP11
JP11
1
1
2
LID_SW#38
A
2
G1
3
3
G2
ACES_85204-03001
ACES_85204-03001
CONN@
CONN@
4 5
@
@
1
C729
C729
0.1U_0402_16V4Z
0.1U_0402_16V4Z
JP23
JP23
1
1
2
2
3
5
3
G1
4
6
4
G2
ACES_85201-04051
ACES_85201-04051
CONN@
CONN@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2
TP_CLK 38 TP_DATA 38
1
1
@
@
@
@
C731
C731
C730
C730
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
TP_DATA TP_CLK
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2
2
3
1
100P_0402_50V8J
2
D28
D28 PSOT24C_SOT23-3
PSOT24C_SOT23-3
@
@
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
SYSON31,38,41,47,50
+5VALW +5V
SI2301BDS-T1-E3_SOT23-3
SI2301BDS-T1-E3_SOT23-3
S
S
12
R612
R612
10K_0402_5%
10K_0402_5%
13
D
SYSON
D
D
Q24
Q24
2
2N7002_SOT23-3
2N7002_SOT23-3
G
G
S
S
Q23
Q23
D
D
13
G
G
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LED, TP,KBL,Cab sensor boar
LED, TP,KBL,Cab sensor boar
LED, TP,KBL,Cab sensor boar
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
39 51Monday, October 08, 2007
39 51Monday, October 08, 2007
39 51Monday, October 08, 2007
E
0.1
0.1
0.1
CONA#38
C739
C739
100N_0402_50V7M
100N_0402_50V7M
TV-out
TV_LUMA20 TV_CRMA20 TV_COMPS20
DOCK_PRESENT
1
2
12
R623
R623 2K_0402_5%
2K_0402_5%
R1069
Atlas/ Saturn Dock
+DOCKVIN
RED GREEN BLUE D_DDCDATA D_DDCCLK D_HSYNC D_VSYNC USB20_N3
USB20_P3 NB_GND RJ45_MIDI3­RJ45_MIDI3+ RJ45_MIDI2­RJ45_MIDI2+ RJ45_MIDI1­RJ45_MIDI1+ RJ45_MIDI0­RJ45_MIDI0+
+V_BATTERY
21
need change to reverse type connector
2
B
B
+3VALW
E
E
1 2
C
C
3 1
R621
R621 10K_0402_5%
10K_0402_5%
Q27
Q27 MMBT3904_NL_SOT23-3
MMBT3904_NL_SOT23-3
NB_GND
D_DDCDATA18 D_DDCCLK18 D_HSYNC18 D_VSYNC18 USB20_N327
RJ45_MIDI3-30 RJ45_MIDI3+30 RJ45_MIDI2-30 RJ45_MIDI2+30 RJ45_MIDI1-30 RJ45_MIDI1+30 RJ45_MIDI0-30 RJ45_MIDI0+30
USB20_P327
B+
GREEN18
RED18 BLUE18
PJP3
PJP3
PAD-OPEN 2x2m
PAD-OPEN 2x2m
0720 Add dock_present_gnd 0815 change
dock_present_gnd to NB_GND
TV_LUMA TV_CRMA TV_COMPS
12
12
R629
R629
150_0402_1%
150_0402_1%
12
R630
R630
R631
R631
150_0402_1%
150_0402_1%
150_0402_1%
150_0402_1%
C740
C740
1
2
JDOCK1
JDOCK1
43 44
40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10
8 6 4 2
41 42
FOX_QL1122L-H212AR-7F
FOX_QL1122L-H212AR-7F
DOCK_LOUT_R DOCK_LOUT_L
1
1
2
2
C741
C741
220P_0402_50V7K
220P_0402_50V7K
DOC_GNDADOC_GNDA
C744
C744 1000P_0402_50V7K
1000P_0402_50V7K
43 44
NB_GND
39
40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2
41 42
220P_0402_50V7K
220P_0402_50V7K
39
37
37
35
35
33
33
31
31
29
29
27
27
25
25
23
23
21
21
19
19
17
17
15
15
13
13
11
11
9
9
7
7
5
5
3
3
1
1
R_VOL_DWN#R_VOL_UP#
1
C745
C745 1000P_0402_50V7K
1000P_0402_50V7K
2
+DOCKVIN
1
C734
C734 1000P_0402_50V7K
1000P_0402_50V7K
2
TV_LUMA TV_CRMA TV_COMPS VGA_GND CIR_IN DOCK_PWRON MUTE_LED DOCK_SLP_BTN# JACK_DET# R_VOL_UP# R_VOL_DWN# SPDIFO_L AUDIO_OGND DOCK_LOUT_R DOCK_LOUT_L DOCK_MIC_R_C DOCK_MIC_L_C AUDIO_IGND DOCK_PRESENT
CIR_IN 35,38 DOCK_PWRON 38 MUTE_LED 38 DOCK_SLP_BTN# 38
R617 200_0402_5%R617 200_0402_5% R618 200_0402_5%R618 200_0402_5%
DOCK_LOUT_R 35 DOCK_LOUT_L 35
12
R620
R620 2K_0402_5%
2K_0402_5%
DOC_GNDA
1 2 1 2
DOC_GNDA
DOC_GNDA
JACK_DET# 33,35
DOCK_VOL_UP# 38 DOCK_VOL_DWN# 38
2N7002_SOT23-3
2N7002_SOT23-3
SPDIFO_L
1 2
R1142
R1142 0_0603_5%
0_0603_5%
MIC_Dock
DOCK_MIC_R33 DOCK_MIC_L33
R632
DOCK_MIC_L_C
R632
1 2
10K_0402_5%
10K_0402_5%
C746 1U_0603_10V6K
C746 1U_0603_10V6K
C753 1U_0603_10V6K
C753 1U_0603_10V6K
R633
R633 47K_0402_5%
47K_0402_5%
R1069
0_0402_5%
0_0402_5%
R1068
R1068
0_0402_5%
0_0402_5%
+3VS_HDA
1 2 13
D
D
Q116
Q116
S
S
220P_0402_25V8J
220P_0402_25V8J
1 2 1 2
MMBT3904_NL_SOT23-3
MMBT3904_NL_SOT23-3
1 2
12
12
R1140
R1140 33_0402_5%
33_0402_5%
2
G
G
C1489
C1489
R626
R626 10K_0402_5%
10K_0402_5%
2
2
1
1U_0603_10V6K
1U_0603_10V6K
DOC_GNDA
12
1
R1143
R1143 110_0402_5%
110_0402_5%
2
Need 600 Ohm 500 mA
FBM-11-160808-601-T_0603
FBM-11-160808-601-T_0603
+3VS
10K_0402_5%
10K_0402_5%
1 2
C
C
Q32
Q32
B
B
E
E
3 1
C757
C757
R1141
R1141
1 2
220_0402_5%
220_0402_5%
L36
L36 FBM-11-160808-601-T_0603
FBM-11-160808-601-T_0603
1 2 1 2
L37
L37
C754
C754
220P_0402_50V7K
220P_0402_50V7K
DOC_GNDA DOC_GNDA
R625
2
R625
B
B
E
E
13
1 2
2
G
G
C
C
Q30
Q30
3 1
MMBT3904_NL_SOT23-3
MMBT3904_NL_SOT23-3
DOCK_MIC_R_C DOCK_MIC_L_C
1
2
D
D
Q29
Q29 2N7002_SOT23-3
2N7002_SOT23-3
S
S
SPDIF_OUT 21,33
1
C755
C755
2
220P_0402_50V7K
220P_0402_50V7K
SENSE_B# 33
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DOCK CONN.
DOCK CONN.
DOCK CONN.
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
40 51Friday, October 05, 2007
40 51Friday, October 05, 2007
40 51Friday, October 05, 2007
0.1
0.1
0.1
5
hexainf@hotmail.com
4
3
2
1
+5VALW to +5VS Transfer +3VALW to +3VS Transfer
B+
1
C760
D D
12
SUSP
R636
R636 330K_0402_5%
330K_0402_5%
2
G
G
2
RUNON
13
D
D
Q34
Q34 2N7002_SOT23-3
2N7002_SOT23-3
S
S
C760 10U_0805_10V4Z
10U_0805_10V4Z
@
@
8 7 6 5
@
@
U32
U32
D D D D
AO4466_SO8
AO4466_SO8
12
R638
R638 470_0402_5%
470_0402_5%
1
C765
C765
0.01U_0402_16V7K
0.01U_0402_16V7K
2
+5VS+5VALW +3VS+3VALW
10U_0805_10V4Z
1
C761
C761
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0805_10V4Z
1
C762
C762
2
1
S
2
S
3
S
4
G
B+
12
SUSP
R649
R649 330K_0402_5%
330K_0402_5%
2
G
G
1
C759
C759 10U_0805_10V4Z
10U_0805_10V4Z
2
RUNON_3VS
13
D
D
Q45
Q45 2N7002_SOT23-3
2N7002_SOT23-3
S
S
U33
U33
8
D
7
D
6
D
5
D
AO4466_SO8
AO4466_SO8
12
1
2
1
S
2
S
3
S
4
G
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R648
R648 470_0402_5%
470_0402_5%
C769
C769
0.01U_0402_16V7K
0.01U_0402_16V7K
<BOM Structure>
<BOM Structure>
10U_0805_10V4Z
10U_0805_10V4Z
1
C763
C763
2
1
C764
C764
2
DIM LED
DIM_LED38
DIM_LED
+5VALW +5VALW_LED
SI2301BDS-T1-E3_SOT23-3
SI2301BDS-T1-E3_SOT23-3
S
S
12
R637
R637
10K_0402_5%
10K_0402_5%
13
D
D
Q35
Q35
2
2N7002_SOT23-3
2N7002_SOT23-3
G
G
S
S
Q33
Q33
D
D
13
G
G
2
1
C758
C758
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+1.8V to +1.8VS Transfer
B+
C C
SUSP
12
R651
R651 330K_0402_5%
330K_0402_5%
1
C766
C766 10U_0805_10V4Z
10U_0805_10V4Z
2
RUNON_1.8VS
13
D
D
Q46
Q46
2
2N7002_SOT23-3
2N7002_SOT23-3
G
G
S
S
U34
U34
8
D
7
D
6
D
5
D
AO4466_SO8
AO4466_SO8
12
R650
R650 10K_0402_5%
10K_0402_5%
1
C770
C770 1U_0402_6.3V6K
1U_0402_6.3V6K
2
S S S G
+1.8VS+1.8V
1 2 3 4
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C767
C767
2
10U_0805_10V4Z
10U_0805_10V4Z
1
C768
C768
2
100K_0402_5%
100K_0402_5%
SYSON#48 SUSP 48
SYSON31,38,39,47,50
SYSON#
SYSON
2
Q36
Q36 2N7002_SOT23-3
2N7002_SOT23-3
R639
R639
G
G
+3VL
12
13
D
D
S
S
+3VL
12
R640
R640 100K_0402_5%
100K_0402_5%
13
D
D
G
G
S
S
2N7002_SOT23-3
2N7002_SOT23-3
SUSP
SUSP#
2
SUSP# 31,33,38,44,46,47,48
Q37
Q37
H1
H2
H3
H4
H5
H6
H7
H8
H9
H10
Discharge circuit
R643
R643
470_0402_5%
470_0402_5%
2
G
G
4
+1.8V
12
13
D
D
S
S
2N7002_SOT23-3
2N7002_SOT23-3
Q40
Q40
B B
A A
5
+5VS +3VS
12
R641
R641
470_0402_5%
470_0402_5%
13
D
D
Q38
2
G
G
Q38
S
S
2N7002_SOT23-3
2N7002_SOT23-3
SUSP SUSP
SUSP SYSON# SUSP
R642
R642
470_0402_5%
470_0402_5%
2
G
G
12
13
D
D
Q39
Q39
S
S
2N7002_SOT23-3
2N7002_SOT23-3
R644
R644
470_0402_5%
470_0402_5%
2
G
G
+1.5VS
12
13
D
D
S
S
Q41
Q41
2N7002_SOT23-3
2N7002_SOT23-3
+VCCP +0.9V
12
R645
R645
470_0402_5%
470_0402_5%
13
D
D
Q42
Q42
2
G
G
S
S
2N7002_SOT23-3
2N7002_SOT23-3
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
12
R646
R646 470_0402_5%
470_0402_5%
13
D
D
Q43
Q43
2
G
G
S
S
2N7002_SOT23-3
2N7002_SOT23-3
Compal Secret Data
Compal Secret Data
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
+1.8VS
SUSPSUSP
2
G
G
Deciphered Date
Deciphered Date
Deciphered Date
12
R647
R647 470_0402_5%
470_0402_5%
13
D
D
Q44
Q44
S
S
2N7002_SOT23-3
2N7002_SOT23-3
2
HOLEAH1HOLEA
HOLEAH2HOLEA
HOLEAH3HOLEA
HOLEAH4HOLEA
HOLEAH5HOLEA
HOLEAH6HOLEA
HOLEAH7HOLEA
1
1
1
1
1
1
1
H11
H11
H12
H12
H13
H13
H14
H14
H15
H15
H16
H16
H17
HOLEA
HOLEA
HOLEA
HOLEA
HOLEA
HOLEA
HOLEA
HOLEA
HOLEA
HOLEA
1
1
1
1
1
FM2FM2
FM1FM1
1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
FM3FM3
1
Title
Title
Title
FM4FM4
1
1
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
DC/DC Interface
DC/DC Interface
DC/DC Interface
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
HOLEA
HOLEA
1
H17 HOLEA
HOLEA
1
1
HOLEAH8HOLEA
1
H18
H18 HOLEA
HOLEA
1
H10
HOLEAH9HOLEA
HOLEA
HOLEA
1
1
H20
H20
H19
H19
HOLEC
HOLEC
HOLEC
HOLEC
1
1
0.1
0.1
41 51Friday, October 05, 2007
41 51Friday, October 05, 2007
41 51Friday, October 05, 2007
0.1
5
4
3
2
1
R1034
R1034
+5VS_HDMI
@
@
HDMI_DETECT21
@
@
R1040
R1040
6.8K_0402_5%
6.8K_0402_5%
HDMIDAT
HDMICLK
HDMI Connector
Need to check A51 team circuit
R1037
HDMI_DETECT
D40
D40
SKS10-04AT_TSMA
SKS10-04AT_TSMA
R1037
1 2
1K_0402_1%
1K_0402_1%
12
R1038
R1038 10K_0402_1%
10K_0402_1%
2 1
9/21 remove ESD Cap.
9/21 change R1036 and R1035 from 10K to 2.2K for nvidia
L74
L74
1 2
FBML10160808121LMT_0603
FBML10160808121LMT_0603
330P_0402_50V7K
330P_0402_50V7K
C1248
C1248
1
2
RB411D T146 _SOT23-3
RB411D T146 _SOT23-3
R1036
R1036
2.2K_0402_5%
2.2K_0402_5%
1 2
HDMIDAT HDMICLK
HDMI_R_CLK­HDMI_R_CLK+
HDMI_R_TX0­HDMI_R_TX0+
HDMI_R_TX1­HDMI_R_TX1+
HDMI_R_TX2­HDMI_R_TX2+
+5VS
D41
D41
21
+5VS_HDMI
+5VS_HDMI
R1035
R1035
1 2
2.2K_0402_5%
2.2K_0402_5%
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z C1247
C1247
2
@
@
JP48
JP48
19
HP_DET
18
+5V
17
DDC/CEC_GND
16
SDA
15
SCL
14
Reserved
13
CEC
12
CK-
11
CK_shield
10
CK+
9
D0-
8
D0_shield
7
D0+
6
D1-
5
D1_shield
4
D1+
3
D2-
2
D2_shield
1
D2+
20
GND
21
GND
22
GND
23
GND
SUYIN_100042MR019SX53ZLCONN@
SUYIN_100042MR019SX53ZLCONN@
HDMI ESD
+3VS
@
@
R1039
D D
HDMIDAT_VGA21
HDMICLK_VGA21
C C
HDMI_CLK-21
HDMI_CLK+21
B B
A A
HDMI_TX0-21
HDMI_TX0+21
HDMI_TX1-21
HDMI_TX1+21
HDMI_TX2-21
HDMI_TX2+21
HDMI_CLK-
HDMI_TX0-
HDMI_TX0+
HDMI_TX1-
HDMI_TX1+
HDMI_TX2-
HDMI_TX2+
2.2K_0402_5%
2.2K_0402_5%
L70
L70
1
1
4
4
WCM-2012-900T_0805
WCM-2012-900T_0805
L71
L71
1
1
4
4
WCM-2012-900T_0805
WCM-2012-900T_0805
L72
L72
1
1
4
4
WCM-2012-900T_0805
WCM-2012-900T_0805
L73
L73
1
1
4
4
WCM-2012-900T_0805
WCM-2012-900T_0805
R1039
2
3
2
3
2
3
2
3
12
HDMI_R_CLK-
2
HDMI_R_CLK+HDMI_CLK+
3
HDMI_R_TX0-
2
HDMI_R_TX0+
3
HDMI_R_TX1-
2
HDMI_R_TX1+
3
HDMI_R_TX2-
2
HDMI_R_TX2+
3
R1033
R1033
1 2
@
@
2.2K_0402_5%
2.2K_0402_5%
2N7002_SOT23-3
2N7002_SOT23-3
Q101
Q101
1 2
1 2
+3VS
G
G
2
S
S
@
+3VS
G
G
2
S
S
@
6.8K_0402_5%
6.8K_0402_5%
13
D
D
R10230_0402_5%@R10230_0402_5%
2N7002_SOT23-3
2N7002_SOT23-3 Q102
Q102
13
D
D
R10240_0402_5%@R10240_0402_5%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
HDMI LS & Conn.
HDMI LS & Conn.
HDMI LS & Conn.
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
1
0.1
0.1
42 51Friday, October 05, 2007
42 51Friday, October 05, 2007
42 51Friday, October 05, 2007
0.1
A
hexainf@hotmail.com
B
C
D
+3VALW
PQ3
PQ3 TP0610K-T1-E3_SOT23-3
TP0610K-T1-E3_SOT23-3
1 1
2
AC_LED 47
ADP_ID 41
1 3
PR8
PR8 100_0402_5%
100_0402_5%
ACES_88334-057N
ACES_88334-057N
PJP1
PJP1
2 2
1 2
ADP_SIGNAL
5
5
4
4
3
3
2
2
1
1
ADPINADPIN
PR3
PR3 @10K_0402_5%
@10K_0402_5%
2
3
PD1
PD1
PJSOT24C_SOT23-3
PJSOT24C_SOT23-3
1
1 2
12
PC2
PC2
12
100P_0402_50V8J
100P_0402_50V8J
PR2
PR2 10K_0402_5%
10K_0402_5%
12
PC3
PC3 1000P_0402_50V7K
1000P_0402_50V7K
PL1
PL1
SMB3025500YA_2P
SMB3025500YA_2P
1 2
VIN +DOCKVIN
PL2
PL2
SMB3025500YA_2P
SMB3025500YA_2P
12
PC4
PC4
100P_0402_50V8J
100P_0402_50V8J
12
PC5
PC5
1000P_0402_50V7K
1000P_0402_50V7K
12
12
PC6
PC6
0.01U_0402_25V7K
0.01U_0402_25V7K
BATT
340K_0402_1%
340K_0402_1%
499K_0402_1%
499K_0402_1%
105K_0402_1%
105K_0402_1%
12
PR1
PR1
12
PR4
PR4
12
PR6
PR6
+5VALW
12
PC1
PC1
0.01U_0402_25V7K
0.01U_0402_25V7K
3 2
PU1A
PU1A
LM358ADT_SO8
LM358ADT_SO8
8
P
+
1
0
-
G
PR5
PR5
10K_0402_5%
10K_0402_5%
12
BATT_OVP <40>
4
VMB
PL3
PJP2
PJP2
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
GND
10
GND
3 3
SUYIN_200275MR008GXOLZR
SUYIN_200275MR008GXOLZR
1 2
10K_0402_5%
10K_0402_5%
PR16
PR16
6.49K_0402_1%
6.49K_0402_1%
1 2
12
PR17
PR17 1K_0402_5%
1K_0402_5%
4 4
100_0402_5%
100_0402_5%
PR9
PR9
BAT_ID <46>
A
EC_SMD EC_SMC
PR13
PR13
+3VL
+3VL
12
12
PR14
PR14 100_0402_5%
100_0402_5%
BATT_TEMP
PD2
PD2 @SM05_SOT23
@SM05_SOT23
3 2
1
2
3
PD3
PD3
1
@SM24.TC_SOT23-3
@SM24.TC_SOT23-3
SMB_EC_DA1
SMB_EC_CK1
PL3
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
1 2
PL4
PL4
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
1 2
12
PC8
PC8 1000P_0402_50V7K
1000P_0402_50V7K
12
B
BATT
PH1 under CPU botten side :
CPU thermal protection at 90 +-3 degree C
PC9
PC9
0.01U_0402_50V4Z
0.01U_0402_50V4Z
SMB_EC_DA1 <39,40>
SMB_EC_CK1 <39,40>
0.22U_0603_10V7K
0.22U_0603_10V7K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Recovery at 47 +-3 degree C
+5VS
CPU
12
PH1
PH1 10K_TH11-3H103FT_0603_1%
10K_TH11-3H103FT_0603_1%
PR10
PR10
15K_0402_1%
15K_0402_1%
1 2
+5VALW
12
12
PC10
PC10
2007/05/29 2008/05/29
2007/05/29 2008/05/29
2007/05/29 2008/05/29
2.55K_0402_1%
2.55K_0402_1%
1 2
PR11
PR11
150K_0402_1%
150K_0402_1%
PR12
PR12
150K_0402_1%
150K_0402_1%
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
PR15
PR15
C
12
12
PC11
PC11 1000P_0402_50V7K
1000P_0402_50V7K
PR7
PR7
47K_0402_1%
47K_0402_1%
1 2
8
5
+
6
-
4
P
G
LM358ADT_SO8
LM358ADT_SO8
0
PU1B
PU1B
ENTRIP1 <47>
13
D
D
PQ1
7
2
G
G
PQ1 SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
S
S
ENTRIP2 <47>
13
D
D
PQ2
2
G
G
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DC Connector/CPU_OTP
DC Connector/CPU_OTP
DC Connector/CPU_OTP
PQ2 SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
S
S
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
D
0.1
0.1
0.1
43 51Friday, October 05, 2007
43 51Friday, October 05, 2007
43 51Friday, October 05, 2007
A
VIN
PQ101
1 1
PR101
PR101
47K_0402 _5%
47K_0402 _5%
1 2
12
PC101
PC101
47P_0402 _50V8J
47P_0402 _50V8J
PR107
PR107 47K_0402 _1%
47K_0402 _1%
1 2
SSM3K7002FU_SC70 -3
SSM3K7002FU_SC70 -3
2 2
PQ107
PQ107
2
13
D
D
2
G
G
S
S
PACIN
ACOFF#
13
PQ105
PQ105 DTC115EUA_SC70 -3
DTC115EUA_SC70 -3
PR111
PR111
3K_0402_ 1%
3K_0402_ 1%
1 2
1 2
PD101
PD101
RLS4148_LL34-2
RLS4148_LL34-2
2
PQ101 AM4835EP-T1-PF_SO8
AM4835EP-T1-PF_SO8
8 7
5
PQ104
PQ104
DTA144EUA_SC70- 3
DTA144EUA_SC70- 3
1 3
PQ109
PQ109
13
D
D
2
G
G
S
S
VCTRL
SSM3K7002FU_SC70 -3
SSM3K7002FU_SC70 -3
4
1 2
1U_0603_10V6K
1U_0603_10V6K
1 2 36
12
PC106
PC106
0.22U_06 03_16V7K
0.22U_06 03_16V7K
PR114
PR114 @0_0402_5%
@0_0402_5%
PC117
PC117
P2
12
PR106
PR106
12
PR109
PR109 150K_040 2_5%
150K_040 2_5%
12
AM4835EP-T1-PF_SO8
AM4835EP-T1-PF_SO8
143K_040 2_1%
143K_040 2_1%
PQ103
PQ103
1 2 3 6
4
AC_SET<40>
200K_040 2_5%
200K_040 2_5%
12
PR113
PR113
12
PR115
PR115 100K_040 2_1%
100K_040 2_1%
8 7
5
SUSP#<3 2,34,40,43,48,49,50>
@0.01U_0402_16V7K
@0.01U_0402_16V7K
PC112
PC112
1 2
1U_0603_6.3V6M
1U_0603_6.3V6M
Charge Detector
ADP_I<40>
PR123
PR123 1M_0402_5%
3 3
VIN
12
PR131
PR131 133K_040 2_1%
133K_040 2_1%
12
PR135
PR135 10K_0603 _0.1%
10K_0603 _0.1%
1.24VREF
4 4
1M_0402_5%
1 2
P2
12
PR125
PR125 47_1206 _5%
47_1206 _5%
12
PC125
PC125
0.1U_0603_ 25V7K
0.1U_0603_ 25V7K
8
3
P
+
1
O
2
-
G
PU102A
PU102A LM393DG_SO8
LM393DG_SO8
4
+3VL
12
PR129
PR129
10K_0402 _1%
10K_0402 _1%
STD_ADP <40>
BQ24740VREF
12
PR128
PR128
10K_0402 _5%
10K_0402 _5%
13
2
G
G
FSTCHG<40 >
CHGEN#
D
D
PQ112
PQ112 SSM3K7002FU_SC70 -3
SSM3K7002FU_SC70 -3
S
S
FSTCHG#
1 2
PR137
PR137 20K_0402 _1%
20K_0402 _1%
+3VL
PR132
PR132
100K_040 2_5%
100K_040 2_5%
2
G
G
ACDET
12
PR104
PR104 0_0402_ 5%
0_0402_ 5%
1 2
PC107
PC107
PR110
PR110 0_0402_ 5%
0_0402_ 5%
1 2
PR116
PR116
39K_0402 _5%
39K_0402 _5%
12
PC120
PC120
0.22U_06 03_10V7K
0.22U_06 03_10V7K
12
13
D
D
PQ113
PQ113 SSM3K7002FU_SC70 -3
SSM3K7002FU_SC70 -3
S
S
PR138
PR138
100K_040 2_1%
100K_040 2_1%
B
12
BQ24740VREF
+3VL
12
PR118
PR118
10K_0402 _5%
10K_0402 _5%
1 2
0.1U_0402_ 10V7K
0.1U_0402_ 10V7K
10
11
12
13
14
ACSET
8
9
IADSLP
AGND
VREF
VDAC
VADJ
EXTPWR
ISYNSET
PC121
PC121
100P_040 2_50V8J
100P_040 2_50V8J
PC123
PC123
ACDET
7
LPREF
IADAPT
15
IADAPT
12
P4
0.012_2 512_1%
0.012_2 512_1%
1 2
1U_0603_6.3V6M
1U_0603_6.3V6M
12
PC108
PC108
0.1U_060 3_25V7K
0.1U_060 3_25V7K
4
5
6
LPMD
ACSET
ACDET
PU101
PU101 BQ24740RHDR_QFN28_5X5
BQ24740RHDR_QFN28_5X5
BAT
SRSET
SRN
17
16
18
BATT
12
12
PR121
PR121 200K_040 2_1%
200K_040 2_1%
PR102
PR102
1 2
PC102
PC102
3
2
ACP
ACN
SRP
CELLS
19
20
PR120
PR120
133K_040 2_1%
133K_040 2_1%
B+
PL101
PL101 HCB2012KF-12 1T50_0805
HCB2012KF-12 1T50_0805
1 2
12
PC109
PC109 @0.1U_0603_25V7K
@0.1U_0603_25V7K
CHGEN#
1
29
TP
CHGEN
28
PVCC
27
BTST
26
HIDRV
25
PH
24
REGN
23
LODRV
22
PGND
DPMDET
21
PQ111
PQ111
SSM3K7002FU_SC70 -3
SSM3K7002FU_SC70 -3
12
PC110
PC110 1U_0805_25V6K
1U_0805_25V6K
1 2
BST_CHG
DH_CHG
LX_CHG
REGNVADJ
DL_CHG
12
PC119
PC119 1U_0603_10V6K
1U_0603_10V6K
IREF <4 0>
12
PC103
PC103
PD102
PD102
RLS4148_LL34-2
RLS4148_LL34-2
100K_040 2_5%
100K_040 2_5%
1 2
13
D
D
G
G
S
S
12
4.7U_080 5_25V6- K
4.7U_080 5_25V6- K
PR108
PR108 10_1206 _5%
10_1206 _5%
1 2
12
PR117
PR117
2
12
PC104
PC104
PC105
PC105
4.7U_080 5_25V6- K
4.7U_080 5_25V6- K
PC111
PC111
0.1U_0402_ 10V7K
0.1U_0402_ 10V7K
1 2
BQ24740VREF
12
@47K_0402_5%
@47K_0402_5% PR119
PR119
PC124
PC124
0.1U_060 3_25V7K
0.1U_060 3_25V7K
C
D
BATT
PQ102
PQ102 AM4835EP-T1-PF_SO8
AM4835EP-T1-PF_SO8
1 2
AC_LED
3 6
+3VLP
CHG_B+
4.7U_080 5_25V6- K
4.7U_080 5_25V6- K
CHG_B+
578
PQ108
PQ108 AO4466_SO 8
AO4466_SO 8
PR112
3 6
241
1 2
PL102
PL102 10U_LF919 AS-100M-P3_4.5A_20%
10U_LF919 AS-100M-P3_4.5A_20%
PR112
0.015_1 206_1%
0.015_1 206_1%
1 2
578
12
PR126
PR126
12
12
PC113
PC113
PC114
PC114
4.7U_080 5_25V6- K
4.7U_080 5_25V6- K
VIN
12
PR130
PR130
2.15K_0402_1%
2.15K_0402_1%
1 2
12
PR133
PR133 10K_0603 _0.1%
10K_0603 _0.1%
PC127
PC127
22P_0402 _50V8J
22P_0402 _50V8J
1 2
4.7U_080 5_25V6- K
4.7U_080 5_25V6- K PC118
PC118
0.1U_0402_ 10V7K
0.1U_0402_ 10V7K
12
PQ110
PQ110 AO4466_SO 8
AO4466_SO 8
3 6
241
BAT_ID <45>
12
12
PC122
PC122
@0.1U_0603_25V7K
@0.1U_0603_25V7K
PC126
PC126
0.047U_040 2_16V7K
0.047U_040 2_16V7K
100K_040 2_1%
100K_040 2_1%
4
100K_040 2_5%
100K_040 2_5%
PACIN
PR122
PR122 681K_040 2_1%
681K_040 2_1%
1 2
5
+
6
-
8 7
5
ACOFF#
PR139
PR139
1 2
2
G
G
BATT
12
PC115
PC115
4.7U_080 5_25V6- K
4.7U_080 5_25V6- K
8
PU102B
PU102B
P
7
O
G
LM393DG_SO8
LM393DG_SO8
4
PR136
PR136
49.9K_0402_1%
49.9K_0402_1%
1 2
4
REF
5
ANODE
LMV431ACM5X_SOT23 -5
LMV431ACM5X_SOT23 -5
13
D
D
PQ114
PQ114
S
S
SSM3K7002FU_SC70 -3
SSM3K7002FU_SC70 -3
12
PC116
PC116
4.7U_080 5_25V6- K
4.7U_080 5_25V6- K
PD103
PD103
RLZ4.3B_LL34
RLZ4.3B_LL34
PU104
PU104
CATHODE
NC NC
VIN
12
PR127
PR127
10K_0402 _1%
10K_0402 _1%
12
P2
3 2 1
PR103
PR103
47K_0402 _5%
47K_0402 _5%
1 2
12
PR105
PR105 10K_0402 _5%
10K_0402 _5%
13
2
PQ106
PQ106 DTC115EUA_SC70 -3
DTC115EUA_SC70 -3
PR124
PR124 1K_0402_ 5%
1K_0402_ 5%
1 2
PACIN
12
PR134
PR134 10K_0402 _5%
10K_0402 _5%
1.24VREF
VIN
ACOFF <4 0>
ACIN <40,47>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHE ET OF ENGIN EERING D RAWING IS TH E PROPR IETARY PROPE RTY OF COMPAL ELE CTRON ICS, INC. AND CONTAINS CONFID ENTIAL
THIS SHE ET OF ENGIN EERING D RAWING IS TH E PROPR IETARY PROPE RTY OF COMPAL ELE CTRON ICS, INC. AND CONTAINS CONFID ENTIAL
THIS SHE ET OF ENGIN EERING D RAWING IS TH E PROPR IETARY PROPE RTY OF COMPAL ELE CTRON ICS, INC. AND CONTAINS CONFID ENTIAL AND TRADE S ECRE T INFORMATION. THIS S HEET MAY NOT BE TR ANSFERED FROM THE C USTODY OF TH E COMPETEN T DIVISION OF R& D
AND TRADE S ECRE T INFORMATION. THIS S HEET MAY NOT BE TR ANSFERED FROM THE C USTODY OF TH E COMPETEN T DIVISION OF R& D
AND TRADE S ECRE T INFORMATION. THIS S HEET MAY NOT BE TR ANSFERED FROM THE C USTODY OF TH E COMPETEN T DIVISION OF R& D DEPARTMEN T EXCEPT AS AUTHO RIZED BY CO MPAL ELECTR ONICS , INC. NEITH ER THIS S HEET NO R THE INF ORMATION IT CONTAINS
DEPARTMEN T EXCEPT AS AUTHO RIZED BY CO MPAL ELECTR ONICS , INC. NEITH ER THIS S HEET NO R THE INF ORMATION IT CONTAINS
DEPARTMEN T EXCEPT AS AUTHO RIZED BY CO MPAL ELECTR ONICS , INC. NEITH ER THIS S HEET NO R THE INF ORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
2007/05/29 2008/05/29
2007/05/29 2008/05/29
2007/05/29 2008/05/29
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Charger
Charger
Charger
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
D
44 51Frida y, Octobe r 05, 20 07
44 51Frida y, Octobe r 05, 20 07
44 51Frida y, Octobe r 05, 20 07
0.1
0.1
0.1
A
hexainf@hotmail.com
B
C
D
E
2VREF_51125
PC302
PC302
0.22U_0603_10V7K
0.22U_0603_10V7K
ENTRIP2
5
6
VFB2
ENTRIP2
SKIPSEL
EN0
14
13
1 2
PR312
PR312
@0_0402_5%
@0_0402_5%
B++
12
PR302
PR302
37.4K_0402_1%
37.4K_0402_1%
1 2
PR304
PR304
24K_0402_1%
24K_0402_1%
1 2
PR306
PR306
133K_0402_1%
133K_0402_1%
ENTRIP1
1 2
4
2
3
1
VFB1
VREF
TONSEL
GND
15
ENTRIP1
24
VO1
23
PGOOD
22
VBST1
21
DRVH1
20
LL1
19
DRVL1
TPS51125RGER_QFN24_4X4
TPS51125RGER_QFN24_4X4
VREG5
VIN
VCLK
17
16
18
UG_5V LX_5V LG_5V
PR308
PR308
0_0402_5%
0_0402_5%
1 2
VL
12
PC311
PC311
12
10U_0805_10V6K
10U_0805_10V6K
PR318
PR318
1 2
0_1206_5%
0_1206_5%
B++
12
PC304
PC304
2200P_0402_50V7K
2200P_0402_50V7K
PC308
PC308
0.1U_0402_10V7K
0.1U_0402_10V7K
1 2
PR310
PR310 0_0402_5%
0_0402_5%
1 2
12
PR316
PR316
@4.7_1206_5%
@4.7_1206_5%
12
12
12
PC317
PC317
PC305
PC305
10U_1206_25V6M
10U_1206_25V6M
PC315
PC315
@680P_0603_50V7K
@680P_0603_50V7K
578
@0.1U_0402_25V4K
@0.1U_0402_25V4K
UG1_5V
578
PQ302
PQ302
AO4466_SO8
AO4466_SO8
3 6
241
PL303
PL303
4.7UH_SIL1045R-4R7PF_6.3A_30%
4.7UH_SIL1045R-4R7PF_6.3A_30%
1 2
3 6
241
PQ304
PQ304
FDS6690AS_NL_SO8
FDS6690AS_NL_SO8
+5VALWP
1
+
+
PC310
PC310
2
220U_6.3VM_R15
220U_6.3VM_R15
1 1
PR301
PR301
13.7K_0402_1%
13.7K_0402_1%
1 2
PR303
B+
PL301
PL301
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
1 2
PC316
PC316
2 2
3 3
B++
+3VLP
12
+3VALWP
12
PC303
PC303
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7UH_SIQB74B-4R7PF_4A_20%
4.7UH_SIQB74B-4R7PF_4A_20%
1
+
+
2
PL302
PL302
PC309
PC309
220U_6.3VM_R15
220U_6.3VM_R15
ENTRIP2<45>ENTRIP1<45>
PQ301
PQ301 AO4466_SO8
AO4466_SO8
12
PQ303
PQ303 AO4466_SO8
AO4466_SO8
578
UG1_3V
PR309
PR309
0_0402_5%
3 6
241
0_0402_5%
1 2
578
PC306
PC306
10U_0805_6.3V6M
10U_0805_6.3V6M
LX_3V
LG_3V
12
1 2
1 2
0_0402_5%
0_0402_5%
PC307
PC307
0.1U_0402_10V7K
0.1U_0402_10V7K
PR307
PR307
12
PR315
PR315
@4.7_1206_5%
3 6
241
@4.7_1206_5%
12
PC314
PC314
@680P_0603_50V7K
@680P_0603_50V7K
12
PC301
PC301
2200P_0402_50V7K
2200P_0402_50V7K
@0.1U_0402_25V4K
@0.1U_0402_25V4K
PR303
20K_0402_1%
20K_0402_1%
1 2
PR305
PR305
137K_0402_1%
137K_0402_1%
1 2
PU301
PU301
25
P PAD
7
VO2
8
BST_3V BST_5V
UG_3V
VREG3
9
VBST2
10
DRVH2
11
LL2
12
DRVL2
12
PR311
PR311
620K_0402_5%
620K_0402_5%
2VREF_51125
13
D
D
PQ305
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
1 2
PR317
PR317
604K_0402_1%
604K_0402_1%
A
PQ305
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
ACIN<40,46> EC_ON <40>
4 4
2
G
G
S
S
PQ308
PQ308
13
D
D
D
2
G
G
12
PC318
PC318
0.022U_0603_25V7K
0.022U_0603_25V7K
D
S
S
S
S
13
D
D
2
G
G
S
S
1 2
PR313
PR313
100K_0402_5%
100K_0402_5%
13
PQ307
PQ307
2
G
G
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
PQ306
PQ306 SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
VL
12
100K_0402_5%
100K_0402_5% PR314
PR314
B
PJP302
PJP302
Issued Date
Issued Date
Issued Date
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m PJP303
PJP303
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
+5VALWP
+3VALWP
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SEC RET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SEC RET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SEC RET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPA RTMENT EXC EPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPA RTMENT EXC EPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPA RTMENT EXC EPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+5VALW
+3VALW
2007/05/29 2008/05/29
2007/05/29 2008/05/29
2007/05/29 2008/05/29
C
PC312
PC312
0.1U_0603_25V7K
0.1U_0603_25V7K
(4.5A,180mils ,Via NO.= 9)
(3A,120mils ,Via NO.= 6)
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
VL
+3VLP
D
PJP304
PJP304
2 1
PAD-OPEN 2x2m
PAD-OPEN 2x2m
PJP301
PJP301
2 1
PAD-OPEN 2x2m
PAD-OPEN 2x2m
+5VL
+3VL
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
3.3VALWP/5VALWP
3.3VALWP/5VALWP
3.3VALWP/5VALWP
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
45 51Friday, October 05, 2007
45 51Friday, October 05, 2007
45 51Friday, October 05, 2007
E
0.1
0.1
0.1
A
1 1
PR401
PR401
0_0402_5%
0_0402_5%
SUSP#
2 2
1 2
12
PR410
PR410 @10K_0402_5%
@10K_0402_5%
+1.05V_VCCP
12
PC401
PC401 @1000P_0402_50V7K
@1000P_0402_50V7K
316_0402_1%
316_0402_1%
PR405
PR405
0_0402_5%
0_0402_5%
+5VALW
PC415
PC415
12
12
4.7U_0805_10V6K
12
PC409
PC409 1U_0603_10V6K
1U_0603_10V6K
+1.05V_VCCP
4.7U_0805_10V6K
PR408
PR408
1 2
10.5K_0402_1%
10.5K_0402_1%
1 2
PC413
PC413 @10P_0402_50V8J
@10P_0402_50V8J
PR404
PR404 255K_0402_1%
255K_0402_1%
1 2
2 3 4 5 6
PU401
PU401
TON VOUT V5FILT VFB PGOOD
PR403
PR403
12
1
EN_PSV
GND7PGND
B
1 2
PR402
PR402
0_0402_5%
0_0402_5%
14TP15
VBST
13
DRVH
12
LL
11
TRIP
10
V5DRV
9
DRVL
TPS51117RGYR_QFN14_3.5x3.5
TPS51117RGYR_QFN14_3.5x3.5
8
DH_1.05V LX_1.05V
BST1_1.05VBST_1.05V
0.1U_0402_10V7K
0.1U_0402_10V7K
+5VALW
1 2
PC402
PC402
1 2
PR406
PR406 15K_0402_1%
15K_0402_1%
PR411
PR411
1 2
0_0402_5%
0_0402_5%
DL_1.05V
578
3 6
578
3 6
241
241
C
PQ401
PQ401 AO4466_SO8
AO4466_SO8
PQ402
PQ402 AO4466_SO8
AO4466_SO8
1.05V_B+
12
12
PC403
PC403
PC414
PC414
4.7U_0805_25V6-K
4.7U_0805_25V6-K
@0.1U_0402_25V4K
@0.1U_0402_25V4K
2.2UH_PCMC063T-2R2MN_8A_20%
2.2UH_PCMC063T-2R2MN_8A_20%
12
PR407
PR407
@4.7_1206_5%
@4.7_1206_5%
PC412
PC412 @680P_0603_50V7K
@680P_0603_50V7K
1 2
12
12
PC404
PC404
@4.7U_0805_25V6-K
@4.7U_0805_25V6-K
PL402
PL402
1 2
PL401
PL401
HCB1608KF-121T30_0603
HCB1608KF-121T30_0603
1 2
PC405
PC405
2200P_0402_50V7K
2200P_0402_50V7K
1
+
+
PC408
PC408
220U_6.3VM_R15
220U_6.3VM_R15
2
12
12
PC410
PC410
B+
PC406
PC406 @680P_0402_50V7K
@680P_0402_50V7K
12
PC411
PC411
@0.1U_0402_10V7K
@0.1U_0402_10V7K
@0.1U_0402_10V7K
@0.1U_0402_10V7K
D
+1.05V_VCCP
12
PR409
PR409
25.5K_0402_1%
25.5K_0402_1%
3 3
PJP401
PJP401
+1.05V_VCCP
4 4
A
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SEC RET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SEC RET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SEC RET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPA RTMENT EXC EPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPA RTMENT EXC EPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPA RTMENT EXC EPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
(6A,240mils ,Via NO.=12)
+VCCP
Compal Secret Data
Compal Secret Data
2007/05/29 2008/05/29
2007/05/29 2008/05/29
2007/05/29 2008/05/29
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
1.05V_VCCP
1.05V_VCCP
1.05V_VCCP
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
D
46 51Friday, October 05, 2007
46 51Friday, October 05, 2007
46 51Friday, October 05, 2007
0.1
0.1
0.1
5
hexainf@hotmail.com
D D
C C
B+++
12
12
PC501
PC501
4.7U_0805_25V6-K
4.7U_0805_25V6-K
12
PC520
PC520
PC502
PC502
2200P_0402_50V7K
2200P_0402_50V7K
@0.1U_0402_25V4K
@0.1U_0402_25V4K
PQ502
PQ502
1
D1
2
D1
3
G2
4
S2
SP8K10S-FD5_SO8
SP8K10S-FD5_SO8
1S/2D 1S/2D 1S/2D
8
1G
7 6 5
+1.5VSP
PL503
PC509
PC509
PL503
12
3.3UH_PCMC063T-3R3MN_6A_20%
3.3UH_PCMC063T-3R3MN_6A_20%
1
12
+
+
4.7U_0805_6.3V6K
2
220U_B2_2.5VM
220U_B2_2.5VM
4.7U_0805_6.3V6K
PC517
PC517
B B
SUSP#<32,34,40,43,46,48,50>
4
PR501
PR501
73.2K_0402_1%
73.2K_0402_1%
+1.5VSP +NVVDDP1
1 2
PR502
PR502
75K_0402_1%
75K_0402_1%
1 2
0_0402_5%
0_0402_5%
3
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
PR505
PR505
PQ504
PQ504
G
G
2
S
S
75K_0402_1%
75K_0402_1%
1 2
105K_0402_1%
105K_0402_1%
13
1 2
D
D
PR503
PR503
PR520
PR520
200K_0402_1%
200K_0402_1%
1 2
12
PC522
PC522
0.01U_0402_16V7K
0.01U_0402_16V7K
PR504
PR504
15K_0402_1%
15K_0402_1%
1 2
PC516
PC516
@0.1U_0402_10V7K
@0.1U_0402_10V7K
1 2
1 2
2
5
3
PC506
PC506
0.1U_0402_10V7K
0.1U_0402_10V7K
0_0402_5%
0_0402_5%
PR506
PR506 0_0402_5%
0_0402_5%
12
PR5080_0402_5% PR5080_0402_5%
12
PR515
PR515 @4.7_1206_5%
@4.7_1206_5%
12
PC518
PC518
@680P_0603_50V7K
@680P_0603_50V7K
PR513
PR513
12
12
12
12
BST_1.5V UG_1.5VUG1_1.5V
LX_1.5V
LG_1.5V
1U_0603_10V6K
1U_0603_10V6K
PC513
PC513 @0.1U_0402_10V7K
@0.1U_0402_10V7K
25
7 8
9 10 11 12
16.5K_0402_1%
16.5K_0402_1%
1 2
PC514
PC514
PU501
PU501
P PAD
PGOOD2 EN2 VBST2 DR VH2 LL2 DR VL2
PR510
PR510
12
6
VO2
VFB2
TRIP2
PGND2
14
13
1 2
PR514
PR514
3.3_0402_5%
3.3_0402_5%
4
15
GND
TONSEL
V5FILT
V5IN
16
12
PC515
PC515
4.7U_0805_10V6K
4.7U_0805_10V6K
VFB1
TRIP1
17
1 2
1
VO1
24
PGOOD1
23
EN1
BST_VGA
22
VBST1
DR VH1
DR VL1
PGND1
TPS51124RGER_QFN24_4x4
TPS51124RGER_QFN24_4x4
18
PR511
PR511
12.4K_0402_1%
12.4K_0402_1%
+5VALW
UG_VGA
21
LX_VGA
20
LL1
LG_VGA
19
12
PR521
PR521
PR518
PR518 0_0402_5%
0_0402_5%
+NVVDD_SENSE
PR507
PR507
0_0402_5%
0_0402_5%
12
PR509
PR509
0_0402_5%
0_0402_5%
PR512
PR512
0_0402_5%
0_0402_5%
1 2
PC512
PC512 @0.1U_0402_16V7K
@0.1U_0402_16V7K
2
GPU_VID <32,40,41,43,52>
High: +NVVDDP 1.0V Low: +NVVDDP 0.9V
12
12
PR519
PR519 10_0402_5%
10_0402_5%
+NVVDDP
+NVVDD_SENSE
PC507
PC507
0.1U_0402_10V7K
0.1U_0402_10V7K
1 2
12
UG1_VGA
12
PR516
PR516 @4.7_1206_5%
@4.7_1206_5%
12
PC519
PC519
@680P_0603_50V7K
@680P_0603_50V7K
12
PR517
PR517
@100K_0402_5%
@100K_0402_5%
B+++
578
PQ501
PQ501
AO4466_SO8
AO4466_SO8
3 6
241
1UH_PCMC063T-1R0MN_11A_20%
1UH_PCMC063T-1R0MN_11A_20%
578
FDS6670AS_NL_SO8
FDS6670AS_NL_SO8
3 6
241
SYSON <32,40,41,43,52>
PL502
PL502
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
12
12
PC504
PC504
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PL501
PL501
1 2
PC510
PC510
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
PQ503
PQ503
1
B+
12
12
PC505
PC505
PC511
PC511
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2200P_0402_50V7K
2200P_0402_50V7K
12
PC521
PC521
@0.1U_0402_25V4K
@0.1U_0402_25V4K
+NVVDDP
12
12
1
+
+
PC508
PC508
1 2
2
330U_D2_2.5VY_R9M
330U_D2_2.5VY_R9M
PC525
PC525
PC524
PC524
@0.1U_0402_10V7K
@0.1U_0402_10V7K
@0.1U_0402_10V7K
@0.1U_0402_10V7K
PJP501
PJP501
5
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m PJP502
PJP502
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m PJP503
PJP503
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
+1.5VSP
+NVVDDP
A A
+1.5VS
(4A,160mils ,Via NO.=8)
(12A,480mils ,Via NO.= 24)
+NVVDD
Security Classification
Security Classification
Security Classification
2007/05/29 2008/05/29
2007/05/29 2008/05/29
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SEC RET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SEC RET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SEC RET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPA RTMENT EXC EPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPA RTMENT EXC EPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPA RTMENT EXC EPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2007/05/29 2008/05/29
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
1.5VSP/VGA_CORE
1.5VSP/VGA_CORE
1.5VSP/VGA_CORE
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
47 51Friday, October 05, 2007
47 51Friday, October 05, 2007
47 51Friday, October 05, 2007
1
0.1
0.1
0.1
5
D D
C C
PJP601
PJP601
+0.9VP
B B
+1.1V_PCIE
1 2
PAD-OPEN 3x3m
PAD-OPEN 3x3m
PJP603
PJP603
1 2
PAD-OPEN 3x3m
PAD-OPEN 3x3m
(2A,80mils ,Via NO.= 4)
+0.9V
(2A,80mils ,Via NO.= 4)
+PCIE
4
+1.8V
12
12
PC601
PC601
10U_0805_10V4Z
10U_0805_10V4Z
SYSON#<42,43>
SUSP<43>
1 2
PR602
PR602
@0_0402_5%
@0_0402_5%
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
1 2
PR604
PR604
0_0402_5%
0_0402_5%
PQ601
PQ601
12
PC606
PC606 @0.1U_0402_16V7K
@0.1U_0402_16V7K
12
PC602
PC602
PR601
PR601 1K_0402_1%
1K_0402_1%
@10U_0805_10V4Z
@10U_0805_10V4Z
12
PR603
PR603
13
D
D
1K_0402_1%
2
G
G
1K_0402_1%
S
S
3
PU601
PU601
VIN1VCNTL
2
GND
3
VREF
4
VOUT
G2992F1U_SO8
G2992F1U_SO8
6 5
NC
7
NC
8
NC
9
TP
12
PC603
PC603 1U_0603_16V6K
1U_0603_16V6K
+5VALW
2
1
+0.9VP
12
12
PC605
PC605 10U_0805_6.3V6M
10U_0805_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K
PC604
PC604
+5VALWP
12
PC609
PC609 1U_0603_6.3V6M
1U_0603_6.3V6M
6
PU603
PU603
7
POK
1 2
SUSP#<32,34,40,43,46,48,49>
@0.01U_0402_16 V7K
@0.01U_0402_16 V7K
PR606
PR606
0_0402_5%
0_0402_5%
PC611
PC611
8
EN
12
APL5913-KAC-TRL_SO8
APL5913-KAC-TRL_SO8
5
VIN
9
VIN
VCNTL
3
VOUT
4
VOUT
2
GND
FB
1
PR607
PR607
40.2K_0402_1%
40.2K_0402_1%
12
12
PC613
PC613 47P_0402_50V8J
47P_0402_50V8J
+1.5VS
12
12
PC612
PC612 22U_0805_6.3V6M
22U_0805_6.3V6M
PC610
PC610 10U_0805_10V6K
10U_0805_10V6K
+1.1V_PCIE
12
PR608
PR608
105K_0402_1%
105K_0402_1%
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/11/23 2007/11/23
2006/11/23 2007/11/23
2006/11/23 2007/11/23
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
0.9VP/1.1V_PCIE
0.9VP/1.1V_PCIE
0.9VP/1.1V_PCIE
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
1
0.1
0.1
48 51Friday, October 05, 2007
48 51Friday, October 05, 2007
48 51Friday, October 05, 2007
0.1
5
hexainf@hotmail.com
4
3
2
1
+5VS
5
5
32
CPU_VID6
VR_ON
PR204 0_0402_5%PR204 0_0402_5%
PR206 0_0402_5%PR206 0_0402_5%
1 2
12
PC201
PC201
PR216
PR216
1U_0603_6.3V6M
1U_0603_6.3V6M
1.91K_0402_1%
1.91K_0402_1%
PR236
PR236
1 2
@0_0402_5%
@0_0402_5%
PC226 820P_0603_50V7KPC226 820P_0603_50V7K
1 2
12
PC227
PC227 @0.022U_0603_50V7K
@0.022U_0603_50V7K
1 2
PR243 1K_0402_1%PR243 1K_0402_1%
0.22U_0603_10V7K
0.22U_0603_10V7K
PR201 499_0402_1%PR201 499_0402_1%
1 2
PR203 0_0402_5%PR203 0_0402_5%
1 2
1 2
12
49
47
48
3V3
GND
1
PGOOD PSI# PMON RBIAS VR_TT# NTC SOFT OCSET VW COMP FB FB2
CLK_EN#
2 3 4 5 6 7 8
9 10 11 12
VDIFF13VSEN14RTN15DROOP16DFB17VO18VSUM19VIN20GND21VDD22ISEN223ISEN1
12
PR237
PR237
1K_0402_1%
1K_0402_1%
12
PC229 180P_0402_50V8JPC229 180P_0402_50V8J
1 2
1 2
PR244 3.57K_0402_1%PR244 3.57K_0402_1%
PC231
PC231
PR207
PR207
12
0_0402_5%
0_0402_5%
44
45
46
VR_ON
DPRSTP#
DPRSLPVR
ISL6262ACRZ-T_QFN48_7X7
ISL6262ACRZ-T_QFN48_7X7
PC228
PC228
0.01U_0603_50V7K
0.01U_0603_50V7K
PC230 0.1U_0402_16V7KPC230 0.1U_0402_16V7K
1 2
PC232 0.22U_0402_6.3V6KPC232 0.22U_0402_6.3V6K
12
PR208
PR208
12
0_0402_5%
0_0402_5%
43
12
D D
PR215
PR215
@499_0402_1%
@499_0402_1%
+3VS
DPRSLPVR7,20
H_DPRSTP#5,7,19
CLK_ENABLE#
+3VS
1 2
VGATE15,20
H_PSI#5
PR221
PR221
1 2
@0_0402_5%
@0_0402_5%
PR222 147K_0402_1%PR222 147K_0402_1%
1 2
C C
PR226 13K_0402_1%PR226 13K_0402_1%
VR_TT#
PC2150.022U_0603_25V7K PC2150.022U_0603_25V7K
1 2
1 2 1 2
PC2161000P_0402_50V7K PC2161000P_0402_50V7K
PR228 6.81K_0402_1%PR228 6.81K_0402_1%
1 2
1 2
PC218 1000P_0402_50V7KPC218 1000P_0402_50V7K
PC220
470P_0402_50V7K
470P_0402_50V7K
1 2
1 2
PR238
PR238
1 2
PR240 1K_0402_1%PR240 1K_0402_1%
VSSSENSE5
PC220
12
PC224 1000P_0402_50V7KPC224 1000P_0402_50V7K
1 2
VCC_PRM
PR235 97.6K_0402_1%PR235 97.6K_0402_1%
1 2
PC222 220P_0402_50V7KPC222 220P_0402_50V7K 255_0402_1%
B B
VCCSENSE5
255_0402_1%
CPU_VID55CPU_VID35CPU_VID4
PR209
PR209
12
PR210
PR210
12
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
12
12
PR242
PR242
5
PR211
PR211
PR212
PR212
PR205
PR205
12
12
12
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
12
PC221
PC221 1U_0402_6.3V6K
1U_0402_6.3V6K
PR239
PR239
10_0603_5%
10_0603_5%
1 2
PC225
PC225
0.1U_0603_25V7K
0.1U_0603_25V7K
VSUM
12
PR241
PR241
PH201
PH201
11K_0402_1%
11K_0402_1%
1 2
CPU_VID05CPU_VID15CPU_VID2
PR213
PR213
12
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
BOOT_CPU1
VID037VID138VID239VID340VID441VID542VID6
36
BOOT1 UGATE1 PHASE1
PGND1 LGATE1
LGATE2
PGND2 PHASE2 UGATE2
BOOT2
1 2
2.61K_0402_1%
2.61K_0402_1%
UGATE_CPU1-1
35
PHASE_CPU1
34 33 32 31
PVCC
LGATE_CPU2
30 29
PHASE_CPU2
28
UGATE_CPU2-1
27
BOOT_CPU2
26 25
NC
PU201
PU201
24
ISEN1 ISEN2
PR234 1_0603_5%PR234 1_0603_5%
CPU_B+
10KB_0603_5%_ERTJ1VR103J
10KB_0603_5%_ERTJ1VR103J
PC202
PC202
0.022U_0402_16V7K
0.022U_0402_16V7K
0_0603_5%
0_0603_5%
LGATE_CPU1
1 2
PR227
PR227
0_0603_5%
0_0603_5%
+5VS
12
0.22U_0603_10V7K
0.22U_0603_10V7K
PR214
PR214
1 2
1 2
0_0603_5%
0_0603_5%
PR217
PR217
PR225
PR225
1 2
0_0603_5%
0_0603_5%
1 2
PC217
PC217
0.22U_0603_10V7K
0.22U_0603_10V7K
PR202
PR202 1_0603_5%
1_0603_5%
1 2
12
PC203
PC203
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
PC209
PC209
1 2
PQ202
PQ202
AO4456_SO8
AO4456_SO8
PQ205
PQ205
AO4456_SO8
AO4456_SO8
UGATE_CPU1-2
578
3 6
241
UGATE_CPU2-2
578
3 6
241
5
4
578
3 6
5
4
578
241
3 6
PC204
PC204
PQ201
PQ201
D8D7D6D
SI4684DY-T1-E3_SO8
SI4684DY-T1-E3_SO8
S1S2S3G
PR218
PR218
PQ203
PQ203
AO4456_SO8
AO4456_SO8
PQ204
PQ204
D8D7D6D
SI4684DY-T1-E3_SO8
SI4684DY-T1-E3_SO8
S1S2S3G
PQ206
PQ206
241
AO4456_SO8
AO4456_SO8
CPU_B+
1
12
+
+
PC233
PC233
PC234
2
68U_25V_M_R0.44
68U_25V_M_R0.44
PC234
4.7U_0805_25V6-K
4.7U_0805_25V6-K
12
PR219
PR219
12
@4.7_1206_5%
@4.7_1206_5%
PC210
PC210
3.65K_0805_1%
3.65K_0805_1%
@680P_0603_50V7K
@680P_0603_50V7K
12
PC212
PC212
4.7U_0805_25V6-K
4.7U_0805_25V6-K
12
PR229
PR229
PR230
PR230
12
@4.7_1206_5%
@4.7_1206_5%
3.65K_0805_1%
3.65K_0805_1%
PC219
PC219
@680P_0603_50V7K
@680P_0603_50V7K
12
PC205
PC205
PC206
PC206
4.7U_0805_25V6-K
4.7U_0805_25V6-K
12
PR220
PR220
@0_0603_5%
@0_0603_5%
10K_0402_1%
10K_0402_1%
1 2
ISEN1
0.22U_0603_10V7K
0.22U_0603_10V7K
12
PC235
PC235
PC214
PC214
2200P_0402_50V7K
2200P_0402_50V7K
12
PR231
PR231
10K_0402_1%
10K_0402_1%
PR233 @0_0603_5%PR233 @0_0603_5%
0.22U_0603_10V7K
0.22U_0603_10V7K
ISEN2
12
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PL202
PL202
PR224
PR224
PC211
PC211
1 2
12
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PL203
PL203
1 2
PC223
PC223
1 2
PC207
PC207
12
PC236
PC236
4.7U_0805_25V6-K
4.7U_0805_25V6-K
12
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0.36UH_PCMC104T-R36MN1R17_30A_20%
0.36UH_PCMC104T-R36MN1R17_30A_20%
12
VSUM
12
PC213
PC213
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0.36UH_PCMC104T-R36MN1R17_30A_20%
0.36UH_PCMC104T-R36MN1R17_30A_20%
12
VSUM
2200P_0402_50V7K
2200P_0402_50V7K
12
12
12
1_0402_5%
1_0402_5%
VCC_PRM
12
12
VCC_PRM
PL201
PL201
SMB3025500YA_2P
SMB3025500YA_2P
12
PC237
PC237
@0.1U_0402_25V4K
@0.1U_0402_25V4K
PR223
PR223
CPU_B+
12
PC238
PC238
@0.1U_0402_25V4K
@0.1U_0402_25V4K
PR232
PR232
1_0402_5%
1_0402_5%
12
+VCC_CORE
B+
12
PC208
PC208
1000P_0402_50V7K
1000P_0402_50V7K
A A
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
+CPU_CORE
+CPU_CORE
+CPU_CORE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
49 51Friday, October 05, 2007
49 51Friday, October 05, 2007
49 51Friday, October 05, 2007
1
0.1
0.1
0.1
5
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
A
1 1
PR701
PR701
0_0402_5%
0_0402_5%
SYSON
2 2
1 2
+1.8VP
12
PC702
PC702
@1000P_0402_50V7K
@1000P_0402_50V7K
316_0402_1%
316_0402_1%
PR705
PR705
12
0_0402_5%
0_0402_5%
PR703
PR703
+5VALW
12
12
PC710
PC710 1U_0603_10V6K
1U_0603_10V6K
+1.8VP
12
PC716
PC716
4.7U_0805_10V6K
4.7U_0805_10V6K
PR708
PR708
1 2
28K_0603_0.1%
28K_0603_0.1%
PR704
PR704 255K_0402_1%
255K_0402_1%
1 2
PU701
PU701
2 3 4 5 6
TON VOUT V5FILT VFB PGOOD
1
EN_PSV
GND7PGND
B
1 2
0_0402_5%
0_0402_5%
14TP15
VBST
DRVH
LL
TRIP
V5DRV
DRVL
TPS51117RGYR_QFN14_3.5x3.5
TPS51117RGYR_QFN14_3.5x3.5
8
PR702
PR702
13 12 11 10 9
DH_1.8V LX_1.8V
+5VALW DL_1.8V
BST1_1.8VBST_1.8V
0.1U_0402_10V7K
0.1U_0402_10V7K
1 2
PC703
PC703
1 2
PR706
PR706
17.8K_0402_1%
17.8K_0402_1%
PR711
PR711
1 2
0_0402_5%
0_0402_5%
578
3 6
578
3 6
241
241
C
12
PC701
PC701
@0.1U_0402_25V4K
@0.1U_0402_25V4K
PQ701
PQ701 AO4466_SO8
AO4466_SO8
PQ702
PQ702 FDS6690AS_NL_SO8
FDS6690AS_NL_SO8
1.8V_B+
12
12
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2.2UH_PCMC063T-2R2MN_8A_20%
2.2UH_PCMC063T-2R2MN_8A_20%
12
PR707
PR707
@4.7_1206_5%
@4.7_1206_5%
1 2
12
PC705
PC705
PC704
PC704
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PL702
PL702
1 2
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
PC713
PC713 @680P_0603_50V7K
@680P_0603_50V7K
2200P_0402_50V7K
2200P_0402_50V7K
PC717
PC717
PC706
PC706
PL701
PL701
HCB1608KF-121T30_0603
HCB1608KF-121T30_0603
1 2
1
12
+
+
PC709
PC709
1 2
2
330U_D2_2VY_R15M
330U_D2_2VY_R15M
12
PC707
PC707 @680P_0402_50V7K
@680P_0402_50V7K
12
PC711
PC711
@0.1U_0402_10V7K
@0.1U_0402_10V7K
PC712
PC712
B+
+1.8VP
@0.1U_0402_10V7K
@0.1U_0402_10V7K
D
12
PR709
PR709
19.6K_0603_0.1%
19.6K_0603_0.1%
3 3
PJP701
PJP701
+1.8VP
4 4
A
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m PJP702
PJP702
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
+1.8V
B
(7A,280mils ,Via NO.= 14)
Security Classification
Security Classification
Security Classification
2007/05/29 2008/05/29
2007/05/29 2008/05/29
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SEC RET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SEC RET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SEC RET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPA RTMENT EXC EPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPA RTMENT EXC EPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPA RTMENT EXC EPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2007/05/29 2008/05/29
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
1.8VP
1.8VP
1.8VP
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
D
50 51Friday, October 05, 2007
50 51Friday, October 05, 2007
50 51Friday, October 05, 2007
0.1
0.1
0.1
5
hexainf@hotmail.com
4
3
2
1
Item Reason for changeFixed Issue PAGE Modify List Note
D D
C C
B B
A A
5
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/26 2007/09/26
2007/09/26 2007/09/26
2007/09/26 2007/09/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
PIR
PIR
PIR
Montevina Consumer Discrete
Montevina Consumer Discrete
Montevina Consumer Discrete
1
0.1
0.1
51 51Friday, October 05, 2007
51 51Friday, October 05, 2007
51 51Friday, October 05, 2007
0.1
Loading...