HP DV4000 Schematics REV 4

Page 1
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Leopard Block Diagram
CLK GEN
3
ICS954206AG
4 4
26
1394 Conn
24 22
PCMCIA 1 SLOT
24
SD/MS 6 in 1
Power Switch
TPS2220A
22,23
PCI 7411
CARDBUS 1394 SD/MS/MMC/SM
Card Slost
3 3
Mini-PCI
29
802.11a/b/g
RJ45 CONN
RJ11 CONN
26
10/100 RTL8100C
25
MODEM
MDC Card
25,26
PCI BUS
30
AC97-LINK
B
4,5
Mobile CPU
C
Project code: 91.49Q01.001 PCB P/N : 48.49Q01.021 REVISION : 04216-4 FF
D
E
SYSTEM DC/DC
36
MAX1999
INPUTS
DCBATOUT
OUTPUTS
5V_S3 3V_S5
Dothan
11,12
LVDS
SVIDEO/COMP
RGB CRT
BLUE THUMB
MASTER
SLAVE
14
LCD
13
CRT
DAUGHTER BOARD
USB x 2
30
USB x 2
21
HDD
21
DVD/ CD-RW
SYSTEM DC/DC
37
TPS5130
INPUTS
DCBATOUT
OUTPUTS
1D05V_S0 1D2V_S0 2D5V_S3
MAXIM CHARGER
34
MAX1909
INPUTS
OUTPUTS
BT+
DCBATOUT
18V 4.0A
5V 100mA
CPU DC/DC
35
MAX1907
INPUTS
DCBATOUT
OUTPUTS VCC_CORE
0.844~1.3V 27A
6,7,8,9,10
Alviso
GM/GML
16,17,18,19
ICH6-M
Host BUS 400/533MHz
DMI I/F 100MHz
DDR1*2 333MHz
USB 2.0
P IDE
13
2 2
MIC IN
AC'97 CODEC
27
AD1981B
PCI EXPRESS/ USB2.0
LPC Bus
EXPRESSCARD
LINE OUT
13
NS97551
29 3231
Comsumer IR
B
31\
Touch Pad
C
OP AMP
28
Docking
G1420BF3U
SPEAKER 2CH
1 1
A
31
KBC
Int. KB
X-BUS
Thermal & Fan
G768D
19
FlashRom
4Mb (512kB)
LPC Debug Conn
D
33
21
PCB LAYER
Signal 1
L1:
GND
L2:
Signal 2
21
Power Switch
TPS2231
Title
Size Document Number Rev
A3
Date: Sheet of
L3:
Signal 3
L4:
VCC
L5:
Signal 4
L6:
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Block Diagram
Leopard
141Sunday, February 27, 2005
E
-4
Page 2
A
B
C
D
E
ICH6-M Integrated Pull-up and Pull-down Resistors
ACZ_BIT_CLK, EE_DOUT, EE_CS, GNT[5]#/GPO[17], GNT[6]#/GPO[16],
4 4
LAD[3:0]#/FB[3:0]#, LDRQ[0], PME#, PWRBTN#,
LAN_RXD[2:0]
ACZ_RST#, ACZ_SDIN[2:0],ACZ_SYNC, ACZ_SDOUT,ACZ_BITCLK, SPKR
USB[7:0][P,N]
DD[7],
LAN_CLK
3 3
ICH6-M IDE Integrated Series
DPRSLP#, EE_DIN,
TP[3]
SDDREQ
LDRQ[1]/GPI[41],
DPRSLPVR,
ICH6 internal 20K pull-ups
ICH6 internal 10K pull-ups
ICH6 internal 20K pull-downs
ICH6 internal 15K pull-downs
ICH6 internal 11.5K pull-downs
ICH6 internal 100K pull-downs
ICH6-M EDS 14308 0.8V1
Termination Resistors
DD[15:0], DDACK#, DCS3#,
IDEIRQ
IORDY,
DIOR#, DREQ,DIOW#,
DA[2:0],
DCS1#,
approximately 33 ohm
Power name description
5V_S0= 5 Voltage power up on system work(S0 state) 5V_S3= 5 Voltage suspend to RAM(S3 state) 5V_S5= 5 Voltage soft off(S5 state) 3D3V_S0= 3.3 Voltage power up on system work(S0 state) 3D3V_S3= 3.3 Voltage suspend to RAM(S3 state) 3D3V_S5= 3.3 Voltage soft off(S5 state) LVDDR_2D5V= 2.5 Voltage power up on system work(S0 state) 2D5V_S3= 2.5 Voltage suspend to RAM(S3 state) 2D5V_S0= 2.5 Voltage power up on system work(S0 state)
VCC_CORE_S0= CPU VID Voltage power up on system work(S0 state) 1D5V_VCCA_S0= 1.5 Voltage power up on system work(S0 state) 1D5V_S0= 1.5 Voltage power up on system work(S0 state) 1D5V_S5= 1.5 Voltage soft off(S5 state) DDR_VREF_S3= 1.25 Voltage suspend to RAM(S3 state) 1D25V_S0= 1.25 Voltage power up on system work(S0 state) 1D2_VGA_S0= 1.2 Voltage power up on system work(S0 state) for VGA 1D05V_S0= 1.05 Voltage power up on system work(S0 state) CORE_GMCH_S0= 1.05 Voltage power up on system work(S0 state) for ALVISO core power VCCP_GMCH_S0= 1.05 Voltage power up on system work(S0 state)for ALVISO BUSIO power
1D05V_S038,39,40,41
VCCP_GMCH_S04,5,6,7,9,10,16,18,36,40,41
CORE_GMCH_S06,9,10,40,41
1D25V_S012,39
DDR_VREF_S37,11,40
1D5V_S05,7,9,17,18,21,38,39,41 1D5V_S518,39
1D5V_VCCA_S05
VCC_CORE_S04,5,36
2D5V_S07,9,15,18,40 2D5V_S37,9,10,11,12,38,39,40,41 3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41 3D3V_S313,14,30,40 3D3V_S517,18,19,21,25,29,31,35,37,39,40
3D3V_LAN_S525,41
3D3V_AUX16,20,31,32,34,35,36,37
5VA_OP_S028
5V_S013,14,18,19,20,21,23,27,28,29,32,36,39,40,41 5V_S313,14,26,30,32,37,38,40,41 5V_S514,18,20,36,38
5V_AUX14,15,35,37,38,39
DCBATOUT14,35,37,38,39,40,41
AD+13,34,35,41 BT+31,34,35,41
1D05V_S0 VCCP_GMCH_S0 CORE_GMCH_S0
1D25V_S0
DDR_VREF_S3
1D5V_S0
1D5V_S5 1D5V_VCCA_S0 VCC_CORE_S0
2D5V_S0
2D5V_S3
3D3V_S0
3D3V_S3
3D3V_S5
3D3V_LAN_S5
3D3V_AUX
5VA_OP_S0
5V_S0
5V_S3
5V_S5
5V_AUX
DCBATOUT
AD+
BT+
PCI RESOURCE TABLE
2 2
1 1
A
B
C
DEVICE IDSEL
Mini-PCI
Cardbus Controller TI7411
LAN
Blue Thumb
D
PCI IRQ
AD21
AD22
AD23
P_INTE#
(CARBUS)P_INTG# (1394)P_INTF# (CARD READER)P_INTG#
P_INTE#
REQ# / GNT#
REQ0#/GNT0#
REQ1#/GNT1#
REQ2#/GNT2#
AD24
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev A3
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
ITP
Leopard
E
241Sunday, February 27, 2005
of
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Page 3
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L17
1 2
MLB-201209-11
4 4
3D3V_S0
L34
1 2
MLB-201209-11
3D3V_APWR_S0
12
C362 SC10U10V6ZY-U
C156
SC4D7U10V5ZY
12
C374
SCD1U16V
12
C373
DUMMY-SCD1U16V
3D3V_CLKGEN_S0
12
SCD1U16V
C371
3D3V_S03D3V_S0
B
12
R114
1 2
4D7R3
C378
SCD1U16V
3D3V_48MPWR_S0
12
C154
SC4D7U10V5ZY
12
C379
SCD1U16V
12
C155
DUMMY-SCD1U16V
12
C372
DUMMY-SCD1U16V
C
12
C361
DUMMY-SCD1U16V
12
C382
DUMMY-SCD1U16V
3D3V_S0
12
12
R118 10KR2
ITP_EN
R125 dummy10KR2
D
DummyR118(up side),Mounting R125(down side)
--SRC7 on
Mounting R118(up side),DummyR125(down side)
--CPU2_ITP on
E
3D3V_S0
3D3V_S05,7,9,11,13,14,16,17,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41
CLK_SRCT0
1013 -1
CLK_CPUT2 CLK_CPUC2
CLK_CPUT0 CLK_CPUC0
FS_A
CLK_SRCC0
CLK_SRCT1 CLK_SRCC1
CLK_SRCT3 CLK_SRCC3
CLK_SRCT5 CLK_SRCC5
CLK_SRCT6 CLK_SRCC6
CLK_CPUC1 CLK_CPUT1
DUMMY-SRN33-2-U2
1 2 1 2
1 2
3D3V_CLKGEN_S0
3D3V_APWR_S0 3D3V_48MPWR_S0
ICS954206AG Spread Spectrum Select
REQSEL CLK_PCI3 CLK_PCI4 CLK_PCI5
SS_SEL
ITP_EN
DOT96T DOT96C
CLK_IREF
U57
56
PCI0
3
PCI1
4
PCI2
5
PCI3
9
PCIF1/SEL100/96#
8
PCIF0/ITP_EN
55
PCI_STOP#
46
SCL
47
SDA
14
DOT96
15
DOT96#
50
XTAL_IN
49
XTAL_OUT
52
REF
39
IREF
10
VTT_PWRGD#/PD
2
VSS_PCI
6
VSS_PCI
51
VSS_REF
45
VSS_CPU
38
VSSA
13
VSS48
29
VSS_SRC
ICS954206AG
LVDS
LVDS#
SRC1
SRC1#
SRC2
SRC2#
SRC3
SRC3#
SRC4
SRC4#
SRC5
SRC5#
SRC6
SRC6#
CPU2_ITP/SRC7
CPU2_ITP#/SRC7#
CPU0
CPU0#
CPU1
CPU1#
CPU_STOP#
FSC/TEST_SEL
FSB/TEST_MODE
USB48/FSA
VDD_SRC VDD_SRC
VDD_PCI VDD_PCI
VDD_REF VDD_CPU
VDDA
VDD48
VDD_SRC
17 18
19 20 22 23 24 25 26 27 31 30 33 32
36 35
44 43 41 40
54 53 16 12
34 21
7 1
48 42 37 11 28
1005-1
R466 33R2
PCLK_PCM22
PCLK_LAN25
PCLK_MINI29
PCLK_KBC31
CLK_ICHPCI17
PM_STPPCI#17
3 3
1228 -3
C380
1 2
SC22P
C381
1 2
SC22P
X6 X-14D31818M-17
1 2
3D3V_S0
SMBC_ICH11,19 SMBD_ICH11,19
DREFCLK7
DREFCLK#7
CLK_ICH1417
CLK_CODEC27
CLK_PWRGD#20,36
1 2
R123 33R2
1 2
R124 33R2
1 2
R458 22R2
1 2
R126 33R2
1 2
SD 0803
R116 33R2
1 2
R117 33R2
1 2
R468 22R2
1 2
R467 22R2
1 2
R115 475R2F
1 2
SD 0803
CLK_XIN CLK_XOUT
CLK_REF14
SD 0817
12
R525
REQSEL
12
10KR2
R526 DUMMY-R2
2 2
NEAR CLKGEN
3D3V_CLKGEN_S0
1 2
1 1
A
R113 10KR2
FS_B
FS_C
0 0
0 1 1 100M 1 1
0 0 1 1 0 0 1 1
FS_A
CPU
FS_A
0
266M 133M
01200M
166M
1 00333M 1 0
400M
1 Reserved
B
C
RN56
R522
2 3 1
2 3 1
2 3 1
2 3 1
1 2 1 2
1 2 3
RN60
1 2 3
1 2 3
RN58
RN40
RN41
R523Dummy0R2-0
R524Dummy0R2-0
RN61
SRN33-2-U2
RN59
2K2R2 SRN33-2-U2 R45910R2 R46010R2
SD 0803
4
SRN33-2-U2
4
SRN33-2-U2
4
SRN33-2-U2
4
SRN33-2-U2
TP_SRCC6 TP_SRCT6
4
4
4
CLK48_USB 17 CLK48_CARDBUS 22
DREFSSCLK 7 DREFSSCLK# 7
CLK_PCIE_NEW 21 CLK_PCIE_NEW# 21
CLK_MCH_3GPLL 7 CLK_MCH_3GPLL# 7
CLK_PCIE_ICH 17 CLK_PCIE_ICH# 17
TP57 TP56
CLK_MCH_BCLK 6 CLK_MCH_BCLK# 6
SC 0705
del R279,R280
CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4 PM_STPCPU# 17,36 CPU_SEL0 4,7 CPU_SEL1 4,7
SC 0630
SD 0817
PREQ2# 21
CLK_CPU_BCLK
CLK_CPU_BCLK#
close to CPU 1013 -1
SS3 SS2 SS1 SS0 Spread Amount%
000 0000
0
0
0
0
1
0
1 1
0
11
0
0
1 +-0.3
00
1
001
1
0
1
1
1 1
1
11
1
11
0 1 0
1
1
1 0
0 1
0
0
1
1 0
0
1 0 1
1
0
0
1 0
1
1
-0.8
-1.0
-1.25
-1.5
-1.75
-2.0
-2.5
-3.0
+-0.4 +-0.5 +-0.6 +-0.8 +-1.0 +-1.25 +-1.5
D
CLK_XDP_CPU 4 CLK_XDP_CPU# 4
DREFCLK DREFCLK#
CLK_PCIE_NEW CLK_PCIE_NEW# CLK_XDP_CPU CLK_XDP_CPU# CLK_CPU_BCLK
TP87
CLK_CPU_BCLK#
TP88
CLK_MCH_BCLK CLK_MCH_BCLK#
DREFSSCLK DREFSSCLK# CLK_MCH_3GPLL CLK_MCH_3GPLL#
CLK_PCIE_ICH CLK_PCIE_ICH#
Title
Size Document Number Rev A3
Date: Sheet
Clock Generator (ICS954206AG )
3D3V_S0
12
R453 10KR2
SS_SEL
12
R455 DUMMY-10KR2
SD 0803
R520 49D9R2F
1 2
R521 49D9R2F
1 2
R451 49D9R2F
1 2
R452 49D9R2F
1 2
R470 DUMMY-49D9R2F
1 2
R465 DUMMY-49D9R2F
1 2
R461 49D9R2F
1 2
R464 49D9R2F
1 2
R463 49D9R2F
1 2
R462 49D9R2F
1 2
R450 49D9R2F
1 2
R457 49D9R2F
1 2
R441 49D9R2F
1 2
R442 49D9R2F
1 2
R444 49D9R2F
1 2
R443 49D9R2F
1 2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Leopard
E
H/L: 100/96MHz
of
341Monday, February 28, 2005
-4
Page 4
A
H_A#[31..3]6
H_A#3
4 4
H_ADSTB#06
H_REQ#[4..0]6
3 3
H_ADSTB#16
H_A20M#16
H_FERR#16
H_IGNNE#16
H_STPCLK#16
H_INTR16
H_NMI16
H_SMI#16
H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
AA3 AA2
AF4 AC4 AC7 AC3 AD3 AE4 AD2 AB4 AC6 AD5 AE2 AD6 AF3 AE1 AF1 AE5
P4 U4 V3 R3 V2
W1
T4
W2
Y4 Y1 U1
Y3 U3 R2
P3 T2 P1 T1
C2 D3 A3
C6 D1 D4 B4
CPU
2 2
SD 0817
U45A PZ47903
A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# ADSTB#0
REQ0# REQ1# REQ2# REQ3# REQ4#
A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29#
ADDR GROUP 1 ADDR GROUP 0
A30# A31# ADSTB#1
A20M# FERR# IGNNE#
STPCLK# LINT0 LINT1 SMI#
THERMTRIP#
HCLK THERM XTP/ITP SIGNALS CONTROL
ITP Conn.
TCK(PIN 5)
TCK(PIN A13)
FBO(PIN 11)
VCCP_GMCH_S0
R283 54D9R2F
H_CPURST#
XDP_TDO
R275 54D9R2F
CPU_PROCHOT#
1 1
XDP_TDI XDP_TMS XDP_TRST# XDP_TCK
R274 56R2J
R277 150R2 R279 39D2R2F R278 680R2 R280 27D4R2F
1 2 1 2 1 2 1 2
12 12 12
SB-04-2
All place within 2" to CPU
A
ADS# BNR# BPRI#
DEFER#
DRDY# DBSY#
BR0#
IERR#
INIT#
LOCK#
RESET#
RS0# RS1# RS2#
TRDY#
HIT#
HITM#
BPM#0 BPM#1 BPM#2 BPM#3 PRDY# PREQ#
TCK
TDO TMS
TRST#
DBR#
PROCHOT#
THERMDA THERMDC
ITP_CLK1 ITP_CLK0
BCLK1 BCLK0
TDI
B
N2 L1 J3
L4 H2 M2
N4 A4
B5 J2 B11
H1 K1 L2 M3
K3 K4
C8 B8 A9 C9 A10 B10 A13 C12 A12 C11 B13 A7
B17 B18 A18
C17 A15
A16 B14 B15
B
H_RS#0 H_RS#1 H_RS#2
XDP_BPM#5
XDP_TCK XDP_TDI XDP_TDO XDP_TMS XDP_TRST# DBR#
CPU_PROCHOT#
H_ADS# 6 H_BNR# 6 H_BPRI# 6
H_DEFER# 6 H_DRDY# 6 H_DBSY# 6
H_BREQ#0 6
H_INIT# 16 H_LOCK# 6
H_TRDY# 6 H_HIT# 6
H_HITM# 6
THERMDP1 20 THERMDN 20 PM_THRMTRIP-A# 7,16
PM_THRMTRIP-I# 7,16 CLK_XDP_CPU# 3 CLK_XDP_CPU 3 CLK_CPU_BCLK# 3 CLK_CPU_BCLK 3
VCCP_GMCH_S0
H_IERR#
H_CPURST# 6
H_RS#[2..0] 6
VCCP_GMCH_S0
12
R285
56R2J
VCC_CORE_S0
Dothan A: R43,R44=DUMMY Dothan B: R43,R44=0R
12
R289 56R2J
Place testpoint on H_IERR# with a GND
0.1" away
12
R16 150R2
SB-04-1
PM_THRMTRIP# should connect to ICH6 and Alviso without T-ing
SB-04-2
( No stub)
CPU_SEL03,7 CPU_SEL13,7
VCCP_GMCH_S0
C
R273 0R2-0 R276 0R2-0
1 2
R23 1KR2F
C
H_DSTBN#06 H_DSTBP#06
H_DINV#06
H_DSTBN#16 H_DSTBP#16
H_DINV#16
1 2 1 2
12
R22 2KR2F
TP3
CPU_SEL0_CPU CPU_SEL1_CPU
TP1 TP5 TP6 TP38
Layout Note:
0.5" max length.
BSEL[1:0] Freq.(MHz) L H 100 L L 133
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15
H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31
CPU_TP3 CPU_TP4 CPU_TP5 CPU_TP6
GTLREF
PSI#
A25 A22 B21 A24 B26 A21 B20 C20 B24 D24 E24 C26 B23 E23 C25 C23 C22 D25
H23 G25
M26 H24
G24 M23
N24 M25 H26 N25 K25 K24
C16 C14
AF7 AC1 E26
AD26
D
E
VCCP_GMCH_S0
VCCP_GMCH_S05,6,7,9,10,16,18,36,40,41
3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41
3D3V_S0
SD 0817
U45B PZ47903
D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# DSTBN0# DSTBP0# DINV0#
D16# D17#
L23
D18# D19# D20#
F25
D21# D22#
J23
D23# D24#
J25
D25#
L26
D26# D27# D28# D29# D30# D31# DSTBN1#
L24
DSTBP1#
J26
DINV1#
E1
PSI# BSEL0
BSEL1
MISC
C3
RSVD2 RSVD3 RSVD4 RSVD5
GTLREF0
D32#D0# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43#
DATA GRP 2
DATA GRP 0DATA GRP 1
D44# D45# D46#
D47# DSTBN2# DSTBP2#
DINV2#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
DATA GRP 3
D60#
D61#
D62#
D63# DSTBN3# DSTBP3#
DINV3#
COMP0 COMP1 COMP2 COMP3
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
TEST1 TEST2
D
H_D#32
Y26A19
H_D#33
AA24
H_D#34
T25
H_D#35
U23
H_D#36
V23
H_D#37
R24
H_D#38
R26
H_D#39
R23
H_D#40
AA23
H_D#41
U26
H_D#42
V24
H_D#43
U25
H_D#44
V26
H_D#45
Y23
H_D#46
AA26
H_D#47
Y25 W25 W24 T24
H_D#48
AB25
H_D#49
AC23
H_D#50
AB24
H_D#51
AC20
H_D#52
AC22
H_D#53
AC25
H_D#54
AD23
H_D#55
AE22
H_D#56
AF23
H_D#57
AD24
H_D#58
AF20
H_D#59
AE21
H_D#60
AD21
H_D#61
AF25
H_D#62
AF22
H_D#63
AF26 AE24 AE25 AD20
P25 P26 AB2 AB1
G1 B7 C19 E4 A6
C5 F23
DUMMY-1KR2
NO STUFF
R302 27D4R2F
COMP0
R301 54D9R2F
COMP1
R25 27D4R2F
COMP2
R24 54D9R2F
COMP3
TEST1 TEST2
12
12
R18
Title
Size Document Number Rev A3
Date: Sheet
H_DSTBN#2 6 H_DSTBP#2 6 H_DINV#2 6
Layout Note: Comp0, 2 connect with Zo=27.4 ohm, make trace length shorter than 0.5" . Comp1, 3 connect with Zo=55 ohm, make trace length shorter than 0.5" .
H_DSTBN#3 6 H_DSTBP#3 6 H_DINV#3 6
1 2 1 2 1 2 1 2
H_DPRSLP# 16 H_DPSLP# 16 H_DPWR# 6
H_CPUSLP# 6,16
R284 DUMMY-1KR2
12/11 Iris use R28 Alviso dummy R28
H_D#[63..0] 6
VCCP_GMCH_S0
12
R288 200R2J
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
CPU (1 of 2)
Leopard
441Monday, February 28, 2005
E
H_PWRGD 16
of
-4
Page 5
A
hexainf@hotmail.com GRATIS - FOR FREE
SD 0817
VCC_CORE_S0 VCC_CORE_S0
4 4
3 3
2 2
1 1
AA11 AA13 AA15 AA17 AA19 AA21
AA5 AA7
AA9 AB10 AB12 AB14 AB16 AB18 AB20 AB22
AB6
AB8 AC11 AC13 AC15 AC17 AC19
AC9 AD10 AD12 AD14 AD16 AD18
AD8 AE11 AE13 AE15 AE17 AE19
AE9 AF10 AF12 AF14 AF16 AF18
AF8
D18
D20
D22
D6
D8 E17 E19 E21
E5
E7
E9 F18 F20 F22
F6
F8
G21
Layout Note:
U45C
PZ47903
VCC0 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58
VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71
VCCA0 VCCA1 VCCA2 VCCA3
VCCP0 VCCP1 VCCP2 VCCP3 VCCP4 VCCP5 VCCP6 VCCP7 VCCP8
VCCP9 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16 VCCP17 VCCP18 VCCP19 VCCP20 VCCP21 VCCP22 VCCP23 VCCP24
VCCQ0 VCCQ1
VID0 VID1 VID2 VID3 VID4 VID5
VCCSENSE
VSSSENSE
VCCSENSE and VSSSENSE lines should be of equal length.
Layout Note: Provide a test point (with no stub) to connect a differential probe between VCCSENSE and VSSSENSE at the location where the two 54.9ohm resistors terminate the 55 ohm transmission line.
G5 H22 H6 J21 J5 K22 U5 V22 V6 W21 W5 Y22 Y6
F26 B1 N1 AC26
D10 D12 D14 D16 E11 E13 E15 F10 F12 F14 F16 K6 L21 L5 M22 M6 N21 N5 P22 P6 R21 R5 T22 T6 U21
P23 W4
E2 F2 F3 G3 G4 H4
AE7 AF6
CPU_D10
1.8V is for Dothan A2 before.
1D5V OR 1D8V
Intel suggest Dothan A2 or later only use
1.5V
1D5V_VCCA_S0
TP_VCCA1 TP_VCCA2 TP_VCCA3
SCD01U25V2KX
TP2 TP4
TPAD30 TP39
R286 0R2-0
1 2
TP_VCCSENSE
TP_VSSSENSE
R34
DUMMY-54D9R2F
NO STUFF
C15
SB-05-01
H_VID0 36 H_VID1 36 H_VID2 36 H_VID3 36 H_VID4 36 H_VID5 36
12
12
SC10U10V6ZY-U
VCCP_GMCH_S0
12
R33 DUMMY-54D9R2F
NO STUFF
C10
B
AA1 AA4 AA6
AA8 AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA25
AB3
AB5
AB7
AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB26
AC2
AC5
AC8 AC10 AC12 AC14 AC16 AC18 AC21 AC24
AD1
AD4
AD7
AD9 AD11 AD13 AD15 AD17 AD19 AD22 AD25
AE3
AE6
AE8 AE10 AE12 AE14 AE16 AE18 AE20 AE23 AE26
AF2
AF5
AF9 AF11 AF13 AF15 AF17 AF19 AF21 AF24
C10
C13
C15
C18
C21
C24
D11
A11 A14 A17 A20 A23 A26
B12 B16 B19 B22 B25
U45D
A2
VSS0
A5
VSS1
A8
VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74
B3
VSS75
B6
VSS76
B9
VSS77 VSS78 VSS79 VSS80 VSS81 VSS82
C1
VSS83
C4
VSS84
C7
VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91
D2
VSS92
D5
VSS93
D7
VSS94
D9
VSS95 VSS96
VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191
D13 D15 D17 D19 D21 D23 D26 E3 E6 E8 E10 E12 E14 E16 E18 E20 E22 E25 F1 F4 F5 F7 F9 F11 F13 F15 F17 F19 F21 F24 G2 G6 G22 G23 G26 H3 H5 H21 H25 J1 J4 J6 J22 J24 K2 K5 K21 K23 K26 L3 L6 L22 L25 M1 M4 M5 M21 M24 N3 N6 N22 N23 N26 P2 P5 P21 P24 R1 R4 R6 R22 R25 T3 T5 T21 T23 T26 U2 U6 U22 U24 V1 V4 V5 V21 V25 W3 W6 W22 W23 W26 Y2 Y5 Y21 Y24
PZ47903
C
SD 0817
VCCP_GMCH_S0
12
C18
3D3V_S0
12
BC53 dummySC1U10V3ZY
0.1u *10 150u *1
12
12
C27
C19
SCD1U10V2MX-1
SCD1U10V2MX-1
SCD1U10V2MX-1
VCC_CORE_S0
C16
C17
12
12
SC10U6D3V5MX
PUMA SC
I max = 120 mA
U44
1
SHDN#
2
GND
3 4
IN OUT
DY-G913C-U
12
12
SC10U6D3V5MX
SET
12
12
C33
C22
SCD1U10V2MX-1
SCD1U10V2MX-1
C21
C23
C29
12
12
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
1D5V_VCCA_S0
5
12
C11
SCD1U10V2MX-1
C31
12
SC10U6D3V5MX
12
BC2 DummySC1U10V3ZY
12
C28
SCD1U10V2MX-1
C36
C32
12
12
SC10U6D3V5MX
D
12
BC54 DummySC22P
12
C34
SCD1U10V2MX-1
C37
12
SC10U6D3V5MX
1D5V_VCCA_SET
12
12
C20
SCD1U10V2MX-1
C38
12
12
SC10U6D3V5MX
DYSC10U10V5ZY-L
R296 Dummy49K9R2F
SD 0817
12
TC1 ST100U6D3VM-U
C26
SCD1U10V2MX-1
NO STUFF
C44
C39
12
12
SC10U6D3V5MX
DYSC10U10V5ZY-L
12
R295
Dummy12K7R3F
ZZ.12725.651
C276
C277
12
DYSC10U10V5ZY-L
1D5V_VCCA_S0 1D5V_S0
C279
C280
12
12
DYSC10U10V5ZY-L
DYSC10U10V5ZY-L
C281
12
DYSC10U10V5ZY-L
R17
1 2
0R2-0
C282
12
DYSC10U10V5ZY-L
DYSC10U10V5ZY-L
VCCP_GMCH_S04,6,7,9,10,16,18,36,40,41
12
E
VCC_CORE_S04,36
C283
DYSC10U10V5ZY-L
VCC_CORE_S0
VCCP_GMCH_S0
3D3V_S0
3D3V_S03,7,9,11,13,14,16,17,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41
C284
12
1013 -1
DYSC10U10V5ZY-L
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev A3
B
C
D
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
CPU (2 of 2)
Leopard
541Monday, February 28, 2005
E
-4
of
Page 6
A
12/12 Trace 10 mil wide with 20 mil spacing
H_XRCOMP
12
R69 24D9R2F
4 4
VCCP_GMCH_S0
R70 54D9R2F
1 2
H_XSCOMP
VCCP_GMCH_S0
12
R67 221R3F
H_XSWING
12
R68
3 3
100R2F
1 2
C73 SCD1U16V
12
R87 24D9R2F
VCCP_GMCH_S0
R89 54D9R2F
1 2
VCCP_GMCH_S0
12
R86 221R3F
12
R88 100R2F
H_YRCOMP
H_YSCOMP
H_YSWING
1 2
C91 SCD1U16V
H_D#[63..0]4 H_A#[31..3] 4
12/12 Trace 10 mil wide with 20 mil spacing
Alviso Strapping Signals and Configuration
Pin Name
CFG[2:0]
CFG[4:3] Reserved CFG5 DMI x2 Select
2 2
CFG6 Reserved 0 = DDR2
CFG7
CFG8
CFG9
CFG[11:10] CFG[13:12]
CFG[15:14] Reversed CFG16
CFG17 CFG18
1 1
CFG19
CFG20 SDVOCRTL
_DATA
All strap signals are sampled with respect to the leading
NOTE:
edge of the Alviso GMCH PWORK In signal.
Strap Description Configuration
CPU Strap
Reserved PCI Express Graphics
Lane Reversal Reserved
XOR/ALL Z test straps
FSB Dynamic ODT
Reversed GMCH core VCC
Select CPU VTT Select
Reversed SDVO Present
A
REV.NO. 1.0 REF. NO. 15577
001 = FSB533FSB Frequency Select
101 = FSB400
others = Reversed
0 = DMI x2
1 = DMI x4
1 = DDR1
0 = Reserved
1 = Dothan
0 = Reserve Lanes
1 = Normal
00 = Reserved 01 = XOR mode enabled 10 = All Z mode enabled
11 = Normal Operation
0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled
0 = 1.05V
1 = 1.5V
0 = 1.05V
1 = 1.2V
(Default)
(Default)
(Default)
(Default)
(Default)
(Default)
0 = No SDVO device present
1= SDVO device present
page 183
(Default)
(Default)
(Default)
B
C
D
E
CORE_GMCH_S0
CORE_GMCH_S09,10,40,41
VCCP_GMCH_S0
VCCP_GMCH_S04,5,7,9,10,16,18,36,40,41
Power On Sequencing
U17A
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_XRCOMP H_XSCOMP H_XSWING H_YRCOMP H_YSCOMP H_YSWING
ALVISO-GM:71.0GMCH.08U ALVISO-PM:71.0GMCH.0BU ALVISO-GML:71.0GMCH.0JU
B
E4 E1 F4
H7
E2 F1 E3
D3
K7 F2
J7 J8
H6
F3 K8
H5 H1 H2
K5 K6
J4 G3 H3
J1
L5 K4
J5
P7 L7
J3
P5 L3
U7
V6 R6 R5
P3
T8 R7 R8 U8 R4
T4
T5 R1
T3
V8 U6 W6 U3
V5 W8 W7 U2 U1
Y5
Y2
V4
Y7 W1 W3
Y3
Y6 W2
C1 C2 D1
T1
L1
P1
HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8# HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#
HXRCOMP HXSCOMP HXSWING HYRCOMP HYSCOMP HYSWING
ALVISO-GM
HOST
HA3# HA4# HA5# HA6# HA7# HA8#
HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31#
HADS# HADSTB#0 HADSTB#1
HVREF
HBNR#
HBPRI#
HBREQ0#
HCPURST#
HCLKINN HCLKINP
HDBSY#
HDEFER#
HDINV#0 HDINV#1 HDINV#2 HDINV#3
HDPWR#
HDRDY# HDSTBN#0 HDSTBN#1 HDSTBN#2 HDSTBN#3 HDSTBP#0 HDSTBP#1 HDSTBP#2 HDSTBP#3
HEDRDY#
HHIT#
HHITM#
HLOCK#
HPCREQ#
HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
HRS0# HRS1# HRS2#
HCPUSLP#
HTRDY#
G9 C9 E9 B7 A10 F9 D8 B10 E10 G10 D9 E11 F10 G11 G13 C10 C11 D11 C12 B13 A12 F12 G12 E12 C13 B11 D13 A13 F13
F8 B9 E13 J11 A5 D5 E7 H10
AB1 AB2
C6 E6 H8 K3 T7 U5 G6 F7 G4 K1 R3 V3 G5 K2 R2 W4 F6 D4 D6 B3 A11 A7 D7 B8 C7 A8 A4 C5 B4 G8 B5
C
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3
H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 TP_H_EDRDY#
TP_H_PCREQ# H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_RS#0 H_RS#1 H_RS#2
H_CPUSLP#_GMCH
H_ADS# 4 H_ADSTB#0 4 H_ADSTB#1 4
H_BNR# 4 H_BPRI# 4 H_BREQ#0 4 H_CPURST# 4
CLK_MCH_BCLK# 3 CLK_MCH_BCLK 3
H_DBSY# 4 H_DEFER# 4
H_DPWR# 4 H_DRDY# 4
TP42
H_HIT# 4 H_HITM# 4 H_LOCK# 4
TP9
H_TRDY# 4
VCCP_GMCH_S0
12
R336 100R2F
H_VREF
12
12
C308
R337 200R2F
SCD1U10V2KX
H_DINV#[3..0] 4
H_DSTBN#[3..0] 4
H_DSTBP#[3..0] 4
H_REQ#[4..0] 4
H_RS#[2..0] 4
R311
12
0R2-0
For Banias/Celeron-M:R93=DUMMY For Dothan A:R93=DUMMY For Dothan B:R93=0R
D
VID
VR_ON
Vcc_core
Vccp
Vcc_mch
MCH_PWERGD
CLK_ENABLE#
VGATE TO ICH6
2/10 HM1-SC Intel Sightings issue 54489
SC 0630
H_CPUSLP# 4,16
Title
Size Document Number Rev A3
Date: Sheet
>3mS
10~30uS
Vboot
<10uS
CORE_GMCH_S0
H_DPWR#
GMCH (1 of 5)
Leopard
Vboot Vvid
>100uS
3~10mS
12
R391 DUMMY-0R2-0
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
641Monday, February 28, 2005
E
of
-4
Page 7
A
hexainf@hotmail.com GRATIS - FOR FREE
U17B
AA31
DMIRXN0
AB35
DMIRXN1
AC31
DMIRXN2
AD35
DMIRXN3
Y31
DMIRXP0
AA35
DMIRXP1
AB31
DMIRXP2
AC35
DMIRXP3
AA33
DMITXN0
AB37
DMITXN1
AC33
DMITXN2
AD37
DMITXN3
Y33
DMITXP0
AA37
DMITXP1
AB33
DMITXP2
AC37
DMITXP3
AM33
SM_CK0
AL1
SM_CK1
AE11
SM_CK2
AJ34
SM_CK3
AF6
SM_CK4
AC10
SM_CK5
AN33
SM_CK0#
AK1
SM_CK1#
AE10
SM_CK2#
AJ33
SM_CK3#
AF5
SM_CK4#
AD10
SM_CK5#
AP21
SM_CKE0
AM21
SM_CKE1
AH21
SM_CKE2
AK21
SM_CKE3
AN16
SM_CS0#
AM14
SM_CS1#
AH15
SM_CS2#
AG16
SM_CS3#
AF22
SM_OCDCOMP0
AF16
SM_OCDCOMP1
AP14
SM_ODT0
AL15
SM_ODT1
AM11
SM_ODT2
AN10
SM_ODT3
AK10
SMRCOMPN
AK11
SMRCOMPP
AF37
SMVREF0
AD1
SMVREF1
AE27
SMXSLEWIN
AE28
SMXSLEWOUT
AF9
SMYSLEWIN
AF10
SMYSLEWOUT
ALVISO-GM
Ref ALVISO EDS-1 Page 115
For Dothan-B
SB-07-03
CFG2 CFG1 CFG0
CFG2=0(R51):133MHZ
Dummy4K7R2
CFG2=1(R50):100MHZ
CPU_SEL0 3,4 CPU_SEL1 3,4
CFG(2..1) FREQ.(MHz) 10 400 00 533 11 Reserved
R405 40D2R2F
FOR DDR1
R403 80D6R2F
M_RCOMPN M_RCOMPP
R429 80D6R2F
DMI_TXN[3..0]17
DMI_TXP[3..0]17
DMI_RXN[3..0]17
DMI_RXP[3..0]17
CLK_DDR011 CLK_DDR111
CLK_DDR311 CLK_DDR411
CLK_DDR0#11 CLK_DDR1#11
CLK_DDR3#11 CLK_DDR4#11
M_CKE0_R#11,12 M_CKE1_R#11,12 M_CKE2_R#11,12 M_CKE3_R#11,12
M_CS0_R#11,12 M_CS1_R#11,12 M_CS2_R#11,12 M_CS3_R#11,12
M_OCDCOMP0 M_OCDCOMP1
12
R404 40D2R2F
DDR_VREF_S3
C109
SCD1U10V2MX-1
PM_EXTTS#0
PM_EXTTS#1
A
12
4 4
3 3
Layout Note: Route as short as possible
12
2 2
2D5V_S0
R375 10KR2
1 2
R378 10KR2
1 2
2D5V_S3
12
1 1
12
R344 10KR2
DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3
DMI_TXP0 DMI_TXP1 DMI_TXP2
DMI_TXP3
DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3
DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3
M_RCOMPN M_RCOMPP
SMXSLEW SMYSLEW
VCCP_GMCH_S0
SD 0817
12
12
R50
R49
10KR2
1KR2
12
R48
Dummy4K7R2
12
12
R51
B
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8
CFG/RSVD
RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27
BM_BUSY#
EXT_TS0# EXT_TS1#
THRMTRIP#
PM
PWROK
DREF_CLKN
DREF_CLKP
CLK
DREF_SSCLKN DREF_SSCLKP
CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20
RSTIN#
DMI
DDR MUXING
NC
NC10
NC11
B
CFG0
G16
CFG1
NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9
H13 G14 F16 F15 G15 E16 D17 J16 D15 E15 D14 E14 H12 C14 H15 J15 H14 G22 G23 D23 G25 G24 J17 A31 A30 D26 D25
J23 J21 H22 F5 AD30 AE29
A24 A23 C37 D37
AP37 AN37 AP36 AP2 AP1 AN1 B1 A2 B37 A36 A37
R534
1 2
CFG3 PEG_COMP CFG4 CFG5
1KR2
CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20 RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27
PM_EXTTS#0 PM_EXTTS#1
RST1#
1 2
GMCH_TP3 GMCH_TP4 GMCH_TP5 GMCH_TP6 GMCH_TP7 GMCH_TP8 GMCH_TP9 GMCH_TP10 GMCH_TP11 GMCH_TP12 GMCH_TP13
When Low 2.2K Ohm
R350 DUMMY-R2
1 2
R348 DUMMY-R2
1 2
R343 DUMMY-R2
1 2
R351 DUMMY-R2
1 2
R352 DUMMY-R2
1 2
R340 DUMMY-R2
1 2
R347 DUMMY-R2
1 2
R349 DUMMY-R2
1 2
R52 DUMMY-R2
1 2
R345 DUMMY-R2
1 2
R338 DUMMY-R2
1 2
R346 DUMMY-R2
1 2
R342 DUMMY-R2
1 2
R339 DUMMY-R2
1 2
R341 DUMMY-R2
1 2
SD 0817
CFG2
GMCH_DDCCLK15
GMCH_DDCDATA15
TP48 TP44 TP43 TP11 TP10 TP47 TP45
1228 -3
PM_BMBUSY# 17
PM_THRMTRIP-A# 4,16 PWROK 20
R406 100R2
DREFCLK# 3 DREFCLK 3 DREFSSCLK# 3 DREFSSCLK 3
TP20 TP18 TP19 TP15 TP16 TP17 TP7 TP8 TP14 TP13 TP12
CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17
C
Alviso will provide SDVO_CTRLCLK and CTRLDATA pulldowns on-die
Intel suggest NC Due to votusly DVO
SDVO_DAT
TP46
SDVO_CLK
TP49
CLK_MCH_3GPLL#3
12
R55
150R2F
CLK_MCH_3GPLL3
R373
1 2
12
TV_REFSET
4K99R2F
SD 0817
COMP_VGA13 LUMA_VGA13
CRMA_VGA13
R53 150R2F
12
R54
150R2F
H24
H25 AB29 AC29
A15
C16
A17
B15
B16
B17
J18
SB-07-01
VSYNC HSYNC CRTIREF
L_LVBG L_VREFH L_VREFL
34 2 1
E24
E23
E21
D21
C20
B20
A19
B19
H21
G21
J20
E25
F25
C23
C22
F23
F22
F26
C33
C31
F28
F27
B30
B29
C25
C24
B34
B33
B32
A34
A33
B31
C29
D28
C27
C28
D27
C26
SC 0701
LDDC_DATA
VGA_BLUE15
VGA_GREEN15
VGA_RED15
R59 Dummy150R2F
1 2
R57 Dummy150R2F
1 2
R56 Dummy150R2F
1 2
VGA_VSYNC13
VGA_HSYNC13
SB-07-01
PLT_RST1# 19,21
PUMA SC
SB-07-02
LCTLA_CLK LCTLB_DATA LDDC_CLK LDDC_DATA
BL_ON LBKLT_CRTL LIBG
RN39
1 2 3 4 5
SRN2K2
R382
1 2
R381
1 2
R379 1K5R2F
1 2
EDID_CLK14
EDID_DAT14
8 7 6
100KR2 100KR2
Strapping
Less than 0.5", trace impendance 37.5ohmTrace impendance 50ohm
R60 39R2J
1 2
R58 39R2J
1 2
R374 255R2F
1 2
BL_ON31
LCDVDD_ON14
TP41 TP51 TP50
NO STUFF
2D5V_S0
3D3V_S0
2
14
SRN4D7KJ
3
RN38
TXAOUT0+14 TXAOUT1+14 TXAOUT2+14
TXBOUT0+14 TXBOUT1+14 TXBOUT2+14
LDDC_CLK
TXACLK+14 TXBCLK+14
TXAOUT0-14 TXAOUT1-14 TXAOUT2-14
TXBOUT0-14 TXBOUT1-14 TXBOUT2-14
LBKLT_CRTL LCTLA_CLK
LCTLB_DATA LDDC_CLK LDDC_DATA
LIBG
TXACLK-14 TXBCLK-14
2D5V_S0
U14
5 6
2N7002DW
CFG[17:3] have internal pullup resistors. CFG[19:18] have internal pulldown resistors
C
D
U17G
SDVOCTRL_DATA SDVOCTRL_CLK GCLKN GCLKP
TVDAC_A TVDAC_B TVDAC_C TV_REFSET TV_IRTNA TV_IRTNB TV_IRTNC
DDCCLK DDCDATA BLUE BLUE# GREEN GREEN# RED RED# VSYNC HSYNC REFSET
LBKLT_CRTL LBKLT_EN LCTLA_CLK LCTLB_DATA LDDC_CLK LDDC_DATA LVDD_EN LIBG LVBG LVREFH LVREFL
LACLKN LACLKP LBCLKN LBCLKP
LADATAN0 LADATAN1 LADATAN2
LADATAP0 LADATAP1 LADATAP2
LBDATAN0 LBDATAN1 LBDATAN2
LBDATAP0 LBDATAP1 LBDATAP2
ALVISO-GM
D
E
2D5V_S09,15,18,40 2D5V_S39,10,11,12,38,39,40,41 1D5V_S05,9,17,18,21,38,39,41
CORE_GMCH_S06,9,10,40,41
DDR_VREF_S311,40
EXP_RXN0 EXP_RXN1 EXP_RXN2 EXP_RXN3 EXP_RXN4 EXP_RXN5 EXP_RXN6 EXP_RXN7 EXP_RXN8 EXP_RXN9
EXP_RXP0 EXP_RXP1 EXP_RXP2 EXP_RXP3 EXP_RXP4 EXP_RXP5 EXP_RXP6 EXP_RXP7 EXP_RXP8 EXP_RXP9
EXP_TXN0 EXP_TXN1 EXP_TXN2 EXP_TXN3 EXP_TXN4 EXP_TXN5 EXP_TXN6 EXP_TXN7 EXP_TXN8 EXP_TXN9
EXP_TXP0 EXP_TXP1 EXP_TXP2 EXP_TXP3 EXP_TXP4 EXP_TXP5 EXP_TXP6 EXP_TXP7 EXP_TXP8 EXP_TXP9
D36 D34
E30 F34 G30 H34 J30 K34 L30 M34 N30 P34 R30 T34 U30 V34 W30 Y34
D30 E34 F30 G34 H30 J34 K30 L34 M30 N34 P30 R34 T30 U34 V30 W34
E32 F36 G32 H36 J32 K36 L32 M36 N32 P36 R32 T36 U32 V36 W32 Y36
D32 E36 F32 G36 H32 J36 K32 L36 M32 N36 P32 R36 T32 U36 V32 W36
2D5V_S0
When High 1K Ohm
R380 DUMMY-R2
1 2
R376 DUMMY-R2
1 2
R377 DUMMY-R2
1 2
R71 24D9R2F
EXP_COMPI
EXP_ICOMPO
MISCTVVGALVDS
EXP_RXN10 EXP_RXN11 EXP_RXN12 EXP_RXN13 EXP_RXN14 EXP_RXN15
EXP_RXP10 EXP_RXP11 EXP_RXP12 EXP_RXP13 EXP_RXP14 EXP_RXP15
PCI-EXPRESS GRAPHICS
EXP_TXN10 EXP_TXN11 EXP_TXN12 EXP_TXN13 EXP_TXN14 EXP_TXN15
EXP_TXP10 EXP_TXP11 EXP_TXP12 EXP_TXP13 EXP_TXP14 EXP_TXP15
PUMA SC
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev A3
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
GMCH (2 of 5)
Leopard
E
741Monday, February 28, 2005
2D5V_S0 2D5V_S3
1D5V_S0 CORE_GMCH_S0 DDR_VREF_S3
1D5V_S0
12
of
CFG18 CFG19 CFG20
-4
Page 8
A
B
C
D
E
SUPPORT DDR333 ONLY
4 4
M_DATA[63..0]12
3 3
2 2
M_DATA0 M_DATA1 M_DATA2 M_DATA3 M_DATA4 M_DATA5 M_DATA6 M_DATA7 M_DATA8 M_DATA9 M_DATA10 M_DATA11 M_DATA12 M_DATA13 M_DATA14 M_DATA15 M_DATA16 M_DATA17 M_DATA18 M_DATA19 M_DATA20 M_DATA21 M_DATA22 M_DATA23 M_DATA24 M_DATA25 M_DATA26 M_DATA27 M_DATA28 M_DATA29 M_DATA30 M_DATA31 M_DATA32 M_DATA33 M_DATA34 M_DATA35 M_DATA36 M_DATA37 M_DATA38 M_DATA39 M_DATA40 M_DATA41 M_DATA42 M_DATA43 M_DATA44 M_DATA45 M_DATA46 M_DATA47 M_DATA48 M_DATA49 M_DATA50 M_DATA51 M_DATA52 M_DATA53 M_DATA54 M_DATA55 M_DATA56 M_DATA57 M_DATA58 M_DATA59 M_DATA60 M_DATA61 M_DATA62 M_DATA63
AG35 AH35
AL35 AL37
AH36
AJ35
AK37
AL34 AM36 AN35 AP32 AM31 AM34 AM35
AL32 AM32 AN31 AP31 AN28 AP28
AL30 AM30 AM28
AL28 AP27 AM27 AM23 AM22
AL23 AM24 AN22 AP22
AM9
AL9 AL6
AP7 AP11 AP10
AL7 AM7 AN5 AN6 AN3 AP3 AP6 AM6
AL4 AM3 AK2 AK3 AG2 AG1
AL3 AM2 AH3 AG3
AF3 AE3 AD6 AC4
AF2
AF1 AD4 AD5
U17C
SADQ0 SADQ1 SADQ2 SADQ3 SADQ4 SADQ5 SADQ6 SADQ7 SADQ8 SADQ9 SADQ10 SADQ11 SADQ12 SADQ13 SADQ14 SADQ15 SADQ16 SADQ17 SADQ18 SADQ19 SADQ20 SADQ21 SADQ22 SADQ23 SADQ24 SADQ25 SADQ26 SADQ27 SADQ28 SADQ29 SADQ30 SADQ31 SADQ32 SADQ33 SADQ34 SADQ35 SADQ36 SADQ37 SADQ38 SADQ39 SADQ40 SADQ41 SADQ42 SADQ43 SADQ44 SADQ45 SADQ46 SADQ47 SADQ48 SADQ49 SADQ50 SADQ51 SADQ52 SADQ53 SADQ54 SADQ55 SADQ56 SADQ57 SADQ58 SADQ59 SADQ60 SADQ61 SADQ62 SADQ63
ALVISO-GM
AK15
SA_BS0#
AK16
SA_BS1#
AL21
SA_BS2#
AJ37
SA_DM0
AP35
SA_DM1
AL29
SA_DM2
AP24
SA_DM3
AP9
SA_DM4
AP4
SA_DM5
AJ2
SA_DM6
AD3
SA_DM7
AK36
SA_DQS0
AP33
SA_DQS1
AN29
SA_DQS2
AP23
SA_DQS3
AM8
SA_DQS4
AM4
SA_DQS5
AJ1
SA_DQS6
AE5
SA_DQS7
AK35
SA_DQS0#
AP34
SA_DQS1#
AN30
SA_DQS2#
AN23
SA_DQS3#
AN8
SA_DQS4#
AM5
SA_DQS5#
AH1
SA_DQS6#
AE4
SA_DQS7#
AL17
SA_MA0
AP17
SA_MA1
AP18
SA_MA2
AM17
SA_MA3
AN18
SA_MA4
AM18
SA_MA5 SA_MA6 SA_MA7 SA_MA8
SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13
SA_CAS# SA_RAS#
SA_WE#
AL19 AP20 AM19 AL20 AM16 AN20 AM20 AM15
AN15 AP16 AF29 AF28 AP15
DDR SYSTEM MEMORY A
SA_RCVENIN#
SA_RCVENOUT#
M_SDM_0 M_SDM_1 M_SDM_2 M_SDM_3 M_SDM_4 M_SDM_5 M_SDM_6 M_SDM_7
M_DQS0 M_DQS1 M_DQS2 M_DQS3 M_DQS4 M_DQS5 M_DQS6 M_DQS7
M_A0 M_A1 M_A2 M_A3 M_A4 M_A5 M_A6 M_A7 M_A8 M_A9 M_A10 M_A11 M_A12 M_A13
GMCH_TP48 GMCH_TP49
M_A_BS0# 11,12 M_A_BS1# 11,12
M_SDM_[7..0] 12
M_DQS[7..0] 12
M_A[13..0] 11,12
M_A_CAS# 11,12 M_A_RAS# 11,12
TP55
M_A_WE# 11,12
AE31 AE32 AG32 AG36 AE34 AE33 AF31 AF30 AH33 AH32 AK31 AG30 AG34 AG33 AH31
AJ31
AK30
AJ30 AH29 AH28 AK29 AH30 AH27 AG28 AF24 AG23
AJ22 AK22 AH24 AH23 AG22
AJ21 AG10
AG9 AG8
AH8 AH11 AH10
AJ9
AK9
AJ7
AK6
AJ4 AH5 AK8
AJ8
AJ5 AK4 AG5 AG4 AD8 AD9 AH4 AG6 AE8 AD7 AC5 AB8 AB6 AA8 AC8 AC7 AA4 AA5
U17D
SBDQ0 SBDQ1 SBDQ2 SBDQ3 SBDQ4 SBDQ5 SBDQ6 SBDQ7 SBDQ8 SBDQ9 SBDQ10 SBDQ11 SBDQ12 SBDQ13 SBDQ14 SBDQ15 SBDQ16 SBDQ17 SBDQ18 SBDQ19 SBDQ20 SBDQ21 SBDQ22 SBDQ23 SBDQ24 SBDQ25 SBDQ26 SBDQ27 SBDQ28 SBDQ29 SBDQ30 SBDQ31 SBDQ32 SBDQ33 SBDQ34 SBDQ35 SBDQ36 SBDQ37 SBDQ38 SBDQ39 SBDQ40 SBDQ41 SBDQ42 SBDQ43 SBDQ44 SBDQ45 SBDQ46 SBDQ47 SBDQ48 SBDQ49 SBDQ50 SBDQ51 SBDQ52 SBDQ53 SBDQ54 SBDQ55 SBDQ56 SBDQ57 SBDQ58 SBDQ59 SBDQ60 SBDQ61 SBDQ62 SBDQ63
ALVISO-GM
AJ15
SB_BS0#
AG17
SB_BS1#
AG21
SB_BS2#
AF32
SB_DM0
AK34
SB_DM1
AK27
SB_DM2
AK24
SB_DM3
AJ10
SB_DM4
AK5
SB_DM5
AE7
SB_DM6
AB7
SB_DM7
AF34
SB_DQS0
AK32
SB_DQS1
AJ28
SB_DQS2
AK23
SB_DQS3
AM10
SB_DQS4
AH6
SB_DQS5
AF8
SB_DQS6
AB4
SB_DQS7
AF35
SB_DQS0#
AK33
SB_DQS1#
AK28
SB_DQS2#
AJ23
SB_DQS3#
AL10
SB_DQS4#
AH7
SB_DQS5#
AF7
SB_DQS6#
AB5
SB_DQS7#
AH17
SB_MA0
AK17
SB_MA1
AH18
SB_MA2
AJ18
SB_MA3
AK18
SB_MA4
AJ19
SB_MA5
AK19
SB_MA6
AH19
SB_MA7 SB_MA8
SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13
SB_CAS# SB_RAS#
SB_WE#
AJ20 AH20 AJ16 AG18 AG20 AG15
AH14 AK14 AF15 AF14 AH16
DDR SYSTEM MEMORY B
SB_RCVENIN#
SB_RCVENOUT#
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13
GMCH_TP50 GMCH_TP51
M_B_BS0# 11,12 M_B_BS1# 11,12
INTEL SUGGEST
M_B_A[13..0] 11,12
M_B_CAS# 11,12 M_B_RAS# 11,12
TP53TP54 TP52
M_B_WE# 11,12
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev A3
A
B
C
D
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
GMCH (3 of 5)
Leopard
E
841Monday, February 28, 2005
-4
of
Page 9
A
hexainf@hotmail.com GRATIS - FOR FREE
1D5V_TVDAC_S0
3D3V_S0
4 4
R35
1 2
0R3-U
3D3V_VGA_S0
R36 10R2
1 2
R313
1 2
0R3-U
TVDAC_PWR
3D3V_ATVBG_S0
12
C310 SCD1U10V2MX-1
D2
SSM5818SL
1D5V_S0
21
1D5V_QTVDAC_S0
1210 -2
R312
3D3V_VGA_S0
12
3 3
C461
1 2
1 2
SC10U6D3V5MX
1 2
11/29 -2
3D3V_S0 2D5V_CRTDAC_S0
U66
VOUT
3
VIN
12
C465
GND
APL5308-25AC-TR
0R3-U
R355
0R3-U
R356
0R3-U
2 1
3D3V_TVDACC_S0
12
C309 SCD1U10V2MX-1
3D3V_TVDACB_S0
12
C311 SCD1U10V2MX-1
3D3V_TVDACA_S0
12
C314 SCD1U10V2MX-1
12
C466
F17
E17
D18
C18
F18
E18
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
H18
VCCA_TVBG
VCCA_TVDACC1
G18
D19
H17
VSSA_TVBG
VCCD_TVDAC
1D5V_DLVDS_S0
B26
B25
VCCD_LVDS0
VCCDQ_TVDAC
VCCD_LVDS1
A25
VCCD_LVDS2
A35
VCCA_LVDS
B
12
C299 SCD1U10V2MX-1
12
C300 SCD1U10V2MX-1
B22
B21
A21
VCCHV0
VCCHV1
VCCHV2
R353
1 2
12
C127 SCD1U10V2MX-1
12
C126 SCD1U10V2MX-1
V1.8_DDR_CAP1
V1.8_DDR_CAP2
V1.8_DDR_CAP5
AM37
AH37
AP29
AD28
VCCSM0
VCCSM1
VCCSM2
VCCSM3
0R3-U
C54
SCD1U10V2MX-1
Note: All VCCSM pins shorted internally
C125
1 2
SCD1U10V2MX-1
AD27
AC27
AP26
AN26
AM26
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8
1 2
12
AL26
AK26
AJ26
VCCSM9
VCCSM10
VCCSM11
R354
AH26
VCCSM12
0R3-U
AG26
AF26
VCCSM13
VCCSM14
AE26
VCCSM15
1D5V_S0
AP25
AN25
VCCSM16
VCCSM17
C55
1 2
12
GAP-CLOSE-PWR
1013 -1
SC10U10V5ZY-L
AM25
AL25
AK25
AJ25
VCCSM18
VCCSM19
VCCSM20
POWER
G9
1013 -1
AH25
AG25
AF25
VCCSM21
VCCSM22
VCCSM23
VCCSM24
AE25
VCCSM25
2D5V_S02D5V_TVDAC_S0
AE24
VCCSM26
AE23
VCCSM27
C
1D5V_S0
G10
1 2
SCD1U10V2MX-1
2D5V_S0 2D5V_ALVDS_S0
G12
1 2
SCD1U10V2MX-1
2D5V_S0 2D5V_TXLVDS_S0
G11
1 2
SCD1U10V2MX-1
PUMA SC
C339
C351
12
12
SC10U10V5ZY-L
SC10U10V5ZY-L
AE22
AE21
AE20
AE19
AE18
AE17
AE16
AE15
AE14
AP13
AN13
AM13
AL13
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
GAP-CLOSE-PWR
12
C59
GAP-CLOSE-PWR
12
C63
GAP-CLOSE-PWR
12
C61
12
TC7
DYST100U4VBM
AK13
AJ13
AH13
AG13
AF13
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
1D5V_DLVDS_S0
C58
12
SC10U10V5ZY-L
12
C62
SCD01U16V2KX
12
C60 SC4D7U10V5ZY
FOR DDR1
2D5V_S3
Note: All VCCSM
pins shorted internally
SCD1U10V2MX-1
AE13
AP12
AN12
AM12
AL12
AK12
AJ12
AH12
AG12
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
1 2
AF12
VCCSM54
VCCSM55
C124
AE12
VCCSM56
AD11
VCCSM57
AC11
VCCSM58
AB11
VCCSM59
AB10
VCCSM60
AB9
VCCSM61
D
12
C123
SCD1U10V2MX-1
12
C122 SCD1U10V2MX-1
2D5V_TXLVDS_S02D5V_ALVDS_S0
V1.8_DDR_CAP4
V1.8_DDR_CAP3
V1.8_DDR_CAP6
AP8
AM1
AE1
VCCSM62
VCCSM63
VCCSM64
B28
VCCTX_LVDS0
A28
VCCTX_LVDS1
A27
VCCTX_LVDS2
SCD1U10V2MX-1
1013 -1
AF20
AP19
AF19
AF18
VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3
AE37
VCC3G0
C340
W37
VCC3G1
12
U37
R37
VCC3G2
VCC3G3
12
C343
12
SC10U10V5ZY-L
SCD1U10V2MX-1
N37
L37
J37
VCC3G4
VCC3G5
VCC3G6
G29
1 2
12
GAP-CLOSE-PWR C131 ST100U6D3VM-U
PUMA SC
C92
12
SC10U10V5ZY-L
1D5V_3GPLL_S0
C330
12
12
C342
2D5V_3GBG_S0 2D5V_S0
Y27
Y29
F37
Y28
G37
VSSA_3GBG
VCCA_3GBG
VCCA_3GPLL2
VCCA_3GPLL0
VCCA_3GPLL1
E
1D5V_S01D5V_DDRDLL_S0
1D5V_S01D5V_PCIE_S0
G51
1 2
GAP-CLOSE-PWR
TC16
DYST100U6D3VM-U
SB-09-01
1D5V_S0
G50
1 2
GAP-CLOSE-PWR
SC10U10V5ZY-L
G13
1 2
12
GAP-CLOSE-PWR
C74 SCD1U10V2MX-1
U17E ALVISO-GM
SC10U6D3V5MX
VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCCH_MPLL1
VCCH_MPLL0
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC
VCC_SYNC
VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
SCD1U10V2MX-1
T29
R29
N29
M29
K29
J29
V28
U28
T28
R28
P28
N28
M28
L28
K28
J28
H28
G28
V27
U27
T27
R27
P27
N27
M27
L27
K27
J27
H27
K26
H26
K25
J25
K24
K23
K22
K21
W20
U20
T20
K20
V19
U19
K19
W18
V18
T18
K18
K17
AC2
AC1
B23
C35
AA1
AA2
F19
E19
G19
H20
K13
J13
K12
W11
V11
U11
T11
R11
P11
N11
M11
L11
K11
W10
V10
U10
T10
R10
P10
N10
M10
K10
2 2
CORE_GMCH_S0
1013 -1
C326
C341
12
SC10U10V5ZY-L
1D5V_S0
2D5V_S0
2D5V_S3
1 1
VCCP_GMCH_S0
CORE_GMCH_S0
C325
12
12
SC10U10V5ZY-L
SC10U10V5ZY-L
1D5V_S0 5,7,17,18,21,38,39,41
2D5V_S0 7,15,18,40
2D5V_S3 7,10,11,12,38,39,40,41
VCCP_GMCH_S0 4,5,6,7,10,16,18,36,40,41
CORE_GMCH_S0 6,10,40,41
A
GMCH_CORE_VCC
C329
12
SCD1U10V2MX-1
12
C328
SCD1U10V2MX-1
12
C327
SCD1U10V2MX-1
1D5V_S0
12
G43
GAP-CLOSE-PWR
L4
1 2
IND-D1UH
L22
1 2
IND-D1UH
L14
1 2
IND-D1UH
L13
1 2
IND-D1UH
B
12
C56
DUMMY-SC10U6D3V5MX
12
C302
DUMMY-SC10U6D3V5MX
12
C108
DUMMY-SC10U6D3V5MX
12
C107
DUMMY-SC10U6D3V5MX
1D5V_HMPLL_S0
1D5V_DPLLA_S0
12
C57 SCD1U10V2MX-1
1D5V_DPLLB_S0
12
C315 SCD1U10V2MX-1
1D5V_HPLL_S0
12
C110 SCD1U10V2MX-1
1D5V_MPLL_S0
12
C111 SCD1U10V2MX-1
C
1015 -1
SCD022U16V
VCCP_GMCH_S0
12
C72
SCD1U10V2MX-1
12
C312
0218 -3
C459
12
12
12
dummy SC22U10V6MX
SD 0818
12
C88
ST100U6D3VM-U
R357
1 2
0R5J C301 SCD1U10V2MX-1
C313 SCD1U10V2MX-1
C89 SC10U10V6ZY-U
J10Y9W9U9R9P9N9M9L9J9N8M8N7M7N6M6A6N5M5N4M4N3M3N2M2B2V1N1M1
VCCP_GMCH_CAP1
1201-2
R560
SCD47U16V3ZY
2D5V_S0
VCCP_GMCH_S0
D22
SSM5818SL
2D5V_CRTDAC_S0
1 2
Dummy0R3-U
1 2
R358 10R2
Route VSSA_CRTDAC gnd from GMCH to decoupling cap ground lead and then connect to the gnd plane.
Layout Notes: VSSA_CRTDAC Route caps within 250mil of Alviso. Route FB within 3" of Alviso.
D
12
C52
C53
SCD47U16V3ZY
VCCP_GMCH_S0
21
C324
SC4D7U10V5ZY
SB-09-01
Title
Size Document Number Rev A3
Date: Sheet
12
C90
SCD22U16V3ZY
12
VTT51
G1
VCCP_GMCH_CAP2
VCCP_GMCH_CAP3
VCCP_GMCH_CAP4
12
12
C71 SCD22U16V3ZY
12
C323 SC4D7U10V5ZY
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
GMCH (4 of 5)
Leopard
941Monday, February 28, 2005
E
-4
of
Page 10
A
4 4
L29
H29
G29
F29
E29
D29
A29
AC28
AB28
AA28
W28
E28
AN27
AL27
AJ27
AG27
AF27
AB27
AA27
W27
G27
E27
B27
J26
G26
E26
A26
AN24
AL24
U17F
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
U29
P29
VSS107
VSS108
W29
V29
VSS105
VSS106
B
AD29
AA29
VSS103
VSS104
AJ29
AG29
VSS101
VSS102
C30
AM29
VSS99
VSS100
Y30
VSS97
VSS98
AA30
VSS96
AB30
VSS95
AC30
VSS94
AE30
VSS93
AP30
VSS92
D31
VSS91
E31
VSS90
F31
VSS89
G31
VSS88
H31
VSS87
J31
VSS86
K31
VSS85
L31
VSS84
M31
VSS83
N31
VSS82
P31
VSS81
R31
VSS80
T31
VSS79
U31
VSS78
V31
VSS77
W31
VSS76
AD31
VSS75
AG31
VSS74
AL31
VSS73
A32
VSS72
C32
VSS71
C
Y32
VSS70
AA32
VSS69
AB32
VSS68
AC32
VSS67
AD32
VSS66
AJ32
VSS65
AN32
VSS64
D33
VSS63
E33
VSS62
F33
VSS61
G33
VSS60
H33
VSS59
J33
K33
VSS57
VSS58
L33
VSS56
M33
VSS55
N33
VSS54
P33
VSS53
R33
VSS52
T33
VSS51
U33
VSS50
V33
VSS49
W33
VSS48
AD33
VSS47
AF33
VSS46
AL33
VSS45
C34
VSS44
AA34
VSS43
AB34
VSS42
AC34
VSS41
AD34
VSS40
AH34
VSS39
AN34
VSS38
D
B35
VSS37
D35
VSS36
E35
VSS35
G35
F35
VSS34
H35
VSS32
VSS33
J35
VSS31
K35
VSS30
L35
VSS29
M35
VSS28
N35
VSS27
P35
VSS26
R35
VSS25
T35
VSS24
U35
VSS23
V35
VSS22
W35
VSS21
Y35
VSS20
AE35
VSS19
C36
VSS18
AA36
VSS17
AB36
VSS16
AC36
VSS15
AD36
VSS14
AE36
VSS13
AF36
VSS12
AJ36
VSS11
AL36
VSS10
AN36
VSS9
E37
H37
VSS8
K37
VSS7
CORE_GMCH_S06,9,40,41
VCCP_GMCH_S04,5,6,7,9,16,18,36,40,41
VSS6
M37
E
P37
VSS5
T37
VSS4
2D5V_S37,9,11,12,38,39,40,41
V37
VSS3
Y37
VSS2
AG37
VSS1
VSS0
CORE_GMCH_S0
VCCP_GMCH_S0
2D5V_S3
VSS
VSS196
VSS195
VSS194
VSS193
VSS192
VSS191
VSS190
VSS189
VSS188
VSS187
VSS186
VSS185
VSS184
VSS183
VSS182
VSS181
VSS180
VSS179
VSS178
VSS177
VSS176
VSS175
VSS174
VSS173
VSS172
VSS171
VSS170
VSS169
VSS168
VSS167
VSS166
VSS165
VSS164
VSS163
VSS162
VSS161
VSS160
VSS159
VSS158
VSS157
VSS156
VSS155
VSS154
VSS153
VSS152
VSS151
VSS150
VSS149
VSS148
VSS147
VSS146
VSS145
VSS144
VSS143
VSS142
VSS141
VSS140
VSS139
VSS138
VSS137
VSS136
VSS135
VSS134
VSS133
VSS132
VSS131
B24
VSS130
D24
F24
J24
AG24
AJ24
VSS259
VSS258
VSS257
VSS256
VSS255
VSS254
VSS253
VSS252
VSS251
VSS250
VSS249
VSS248
VSS247
VSS246
VSS245
VSS244
VSS243
VSS242
VSS241
VSS240
VSS239
VSS238
VSS237
VSS236
VSS235
VSS234
VSS233
VSS232
VSS231
VSS230
VSS229
VSS228
VSS227
VSS226
VSS225
VSS224
VSS223
VSS222
VSS221
VSS220
VSS219
VSS218
VSS217
VSS216
VSS215
VSS214
VSS213
VSS212
VSS211
VSS210
VSS209
VSS208
VSS207
VSS206
VSS205
VSS204
VSS203
VSS202
VSS201
VSS200
VSS199
VSS198
VSSALVDS
B36
ALVISO-GM
3 3
VSS270
VSS271
VSS268
VSS269
L2J2G2D2Y1
VSS260
P2T2V2
AD2
AE2
AH2
AL2
AN2A3C3
AA3
AB3
AC3
AJ3C4H4L4P4U4Y4
AF4
AN4E5W5
AL5
AP5B6J6L6P6T6AA6
AC6
AE6
AJ6G7V7
AA7
AG7
AK7
AN7C8E8L8P8Y8AL8A9H9K9T9V9AA9
AC9
AE9
AH9
AN9
VSS197
Y11
AA11
AF11
AG11
AJ11
AL11
AN11
B12
D12
J12
A14
B14
F14
J14
K14
AG14
AJ14
AL14
AN14
C15
K15
A16
D16
H16
K16
AL16
C17
G17
AF17
AJ17
AN17
A18
B18
U18
AL18
C19
H19
J19
T19
W19
AG19
AN19
A20
D20
E20
F20
G20
V20
AK20
C21
F21
AF21
AN21
A22
D22
E22
J22
AH22
AL22
H23
D10
L10
Y10
AA10
F11
H11
AF23
AC13
VCCSM_NCTF27
AD13
VCCSM_NCTF26
AC14
VCCSM_NCTF25
FOR DDR1
AC17
AD16
AC16
AD15
AC15
AD14
VCCSM_NCTF19
VCCSM_NCTF20
VCCSM_NCTF21
VCCSM_NCTF22
VCCSM_NCTF23
VCCSM_NCTF24
VCCP_GMCH_S0
AD17
VCCSM_NCTF18
AC18
VCCSM_NCTF17
AD18
VCCSM_NCTF16
AC19
VCCSM_NCTF15
AD19
VCCSM_NCTF14
AC20
VCCSM_NCTF13
AD20
VCCSM_NCTF12
AD22
AC22
AD21
AC21
VCCSM_NCTF8
VCCSM_NCTF9
VCCSM_NCTF10
VCCSM_NCTF11
VTT_NCTF17
VTT_NCTF16
VTT_NCTF15
VTT_NCTF14
L12
M12
N12
P12
AD24
AC24
AD23
AC23
VCCSM_NCTF4
VCCSM_NCTF5
VCCSM_NCTF6
VCCSM_NCTF7
VTT_NCTF13
VTT_NCTF12
VTT_NCTF11
VTT_NCTF10
R12
T12
U12
V12
B
AC26
AD25
AC25
VCCSM_NCTF1
VCCSM_NCTF2
VCCSM_NCTF3
VTT_NCTF9
VTT_NCTF8
VTT_NCTF7
W12
L13
M13
AD26
M17
L17
VCC_NCTF78
VCCSM_NCTF0
VTT_NCTF6
VTT_NCTF5
VTT_NCTF4
N13
P13
R13
T13
U17
T17
P17
N17
VCC_NCTF74
VCC_NCTF75
VCC_NCTF76
VCC_NCTF77
VTT_NCTF3
VTT_NCTF2
VTT_NCTF1
VTT_NCTF0
U13
V13
W13
VCC_NCTF73
V17
VCC_NCTF72
W17
L18
VCC_NCTF70
VCC_NCTF71
R18
P18
N18
M18
VCC_NTTF69
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VSS_NCTF68
VSS_NCTF67
VSS_NCTF66
Y12
AA12
Y13
N19
M19
L19
Y18
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VSS_NCTF65
VSS_NCTF64
VSS_NCTF63
VSS_NCTF62
AA13
L14
M14
N14
L20
Y19
R19
P19
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VSS_NCTF61
VSS_NCTF60
VSS_NCTF59
VSS_NCTF58
P14
R14
T14
U14
R20
P20
N20
M20
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
NCTF
VSS_NCTF57
VSS_NCTF56
VSS_NCTF55
VSS_NCTF54
V14
W14
Y14
AA14
N21
M21
L21
Y20
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VSS_NCTF53
VSS_NCTF52
VSS_NCTF51
AB14
L15
M15
N15
C
P21
V21
U21
T21
VCC_NCTF49
VCC_NCTF50
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VSS_NCTF50
VSS_NCTF49
VSS_NCTF48
VSS_NCTF47
VSS_NCTF46
P15
R15
T15
U15
N22
M22
L22
W21
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VSS_NCTF45
VSS_NCTF44
VSS_NCTF43
VSS_NCTF42
V15
W15
Y15
AA15
U22
T22
R22
P22
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VSS_NCTF41
VSS_NCTF40
VSS_NCTF39
VSS_NCTF38
AB15
L16
M16
N16
M23
L23
W22
V22
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VSS_NCTF37
VSS_NCTF36
VSS_NCTF35
P16
R16
T16
U16
T23
R23
P23
N23
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VSS_NCTF34
VSS_NCTF33
VSS_NCTF32
VSS_NCTF31
VSS_NCTF30
V16
W16
Y16
AA16
L24
W23
V23
U23
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VSS_NCTF29
VSS_NCTF28
VSS_NCTF27
VSS_NCTF26
AB16
R17
Y17
AA17
R24
P24
N24
M24
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VSS_NCTF25
VSS_NCTF24
VSS_NCTF23
VSS_NCTF22
AB17
AA18
AB18
AA19
W24
V24
U24
T24
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VSS_NCTF21
VSS_NCTF20
VSS_NCTF19
VSS_NCTF18
AB19
AA20
AB20
R21
D
P25
N25
M25
L25
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VSS_NCTF17
VSS_NCTF16
VSS_NCTF15
VSS_NCTF14
Y21
AA21
AB21
Y22
M26
L26
W25
V25
U25
T25
R25
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VSS_NCTF13
VSS_NCTF12
VSS_NCTF11
VSS_NCTF10
VSS_NCTF9
VSS_NCTF8
VSS_NCTF7
AA22
AB22
Y23
AA23
AB23
Y24
AA24
Title
Size Document Number Rev A3
Date: Sheet
2D5V_S3
AB13
AD12
AC12
AB12
U17H
2 2
VCCSM_NCTF28
VCCSM_NCTF29
VCCSM_NCTF30
VCCSM_NCTF31
ALVISO-GM
1 1
A
T26
R26
P26
N26
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VSS_NCTF6
VSS_NCTF5
VSS_NCTF4
AB24
Y25
AA25
AB25
CORE_GMCH_S0
W26
V26
U26
VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VSS_NCTF3
VSS_NCTF2
VSS_NCTF1
VSS_NCTF0
Y26
AA26
AB26
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
GMCH (5 of 5)
Leopard
10 41Monday, February 28, 2005
E
-4
of
Page 11
M_A[13..0]8,12
hexainf@hotmail.com GRATIS - FOR FREE
2D5V_S3 2D5V_S3
CLK_DDR07
CLK_DDR0#7
M_CKE1_R#7,12
PUMA SC
M_A_BS0#8,12
M_A_WE#8,12
M_CS0_R#7,12
TP24
TP-2
PUMA SC
M_DATA_R_0 M_DATA_R_1
M_DQS_R0 M_DATA_R_2
M_DATA_R_3 M_DATA_R_8
M_DATA_R_9 M_DQS_R1
M_DATA_R_10 M_DATA_R_11
M_DATA_R_16 M_DATA_R_17
M_DQS_R2 M_DATA_R_18
M_DATA_R_19 M_DATA_R_24
M_DATA_R_25 M_DQS_R3
M_DATA_R_26 M_DATA_R_27
CLK_DDR2 CLK_DDR2#
M_A12 M_A9
M_A7 M_A5 M_A3 M_A1
M_A10
M_A13 M_DATA_R_32
M_DATA_R_33 M_DQS_R4
M_DATA_R_34 M_DATA_R_35
M_DATA_R_40 M_DATA_R_41
M_DQS_R5 M_DATA_R_42
M_DATA_R_43
M_DATA_R_48 M_DATA_R_49
M_DQS_R6 M_DATA_R_50
M_DATA_R_51 M_DATA_R_56
M_DATA_R_57 M_DQS_R7
M_DATA_R_58 M_DATA_R_59
SMBD_ICH SMBC_ICH
3D3V_S0
DDR_VREF_S3
DM2
MH1
1 3
5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99
101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199
MH2
SKT-SODIMM200-7U
62.10024.481
12
C366
M_DATA_R_4 M_DATA_R_5
M_SDM_R0 M_DATA_R_6
M_DATA_R_7 M_DATA_R_12
M_DATA_R_13 M_SDM_R1
M_DATA_R_14 M_DATA_R_15
M_DATA_R_20 M_DATA_R_21
M_SDM_R2 M_DATA_R_22
M_DATA_R_23 M_DATA_R_28
M_DATA_R_29 M_SDM_R3
M_DATA_R_30 M_DATA_R_31
M_A11 M_A8
M_A6 M_A4 M_A2 M_A0
M_DATA_R_36 M_DATA_R_37
M_SDM_R4 M_DATA_R_38
M_DATA_R_39 M_DATA_R_44
M_DATA_R_45 M_SDM_R5
M_DATA_R_46 M_DATA_R_47
M_DATA_R_52 M_DATA_R_53
M_SDM_R6 M_DATA_R_54
M_DATA_R_55 M_DATA_R_60
M_DATA_R_61 M_SDM_R7
M_DATA_R_62 M_DATA_R_63
SCD1U16V
SUPPORT DDR333 ONLY
CLK_DDR2 CLK_DDR5
CLK_DDR2# CLK_DDR5#
12/15 INTEL Ref. schematic
201 2 4
6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154
High 9.2mm NORMAL TYPE
156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
202
M_DATA_R_[63..0]12
R147 200R2J R122 200R2J
R146 200R2J R120 200R2J
M_CKE0_R# 7,12
M_A_BS1# 8,12 M_A_RAS# 8,12 M_A_CAS# 8,12 M_CS1_R# 7,12
CLK_DDR1# 7 CLK_DDR1 7
M_B_A[13..0]8,12
1 2 1 2
1 2 1 2
M_B_BS0#8,12 M_B_BS1#8,12
2D5V_S3
PUMA SC
M_B_RAS#8,12 M_B_CAS#8,12
M_B_WE#8,12
DDR_VREF_S3
TP58
TP-2
SCD1U10V2MX-1
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12
M_DATA_R_0 M_DATA_R_1 M_DATA_R_2 M_DATA_R_3 M_DATA_R_4 M_DATA_R_5 M_DATA_R_6 M_DATA_R_7 M_DATA_R_8 M_DATA_R_9 M_DATA_R_10 M_DATA_R_11 M_DATA_R_12 M_DATA_R_13 M_DATA_R_14 M_DATA_R_15 M_DATA_R_16 M_DATA_R_17 M_DATA_R_18 M_DATA_R_19 M_DATA_R_20 M_DATA_R_21 M_DATA_R_22 M_DATA_R_23 M_DATA_R_24 M_DATA_R_25 M_DATA_R_26 M_DATA_R_27 M_DATA_R_28 M_DATA_R_29 M_DATA_R_30 M_DATA_R_31 M_DATA_R_32 M_DATA_R_33 M_DATA_R_34 M_DATA_R_35 M_DATA_R_36 M_DATA_R_37 M_DATA_R_38 M_DATA_R_39 M_DATA_R_40 M_DATA_R_41 M_DATA_R_42 M_DATA_R_43 M_DATA_R_44 M_DATA_R_45 M_DATA_R_46 M_DATA_R_47 M_DATA_R_48 M_DATA_R_49 M_DATA_R_50 M_DATA_R_51 M_DATA_R_52 M_DATA_R_53 M_DATA_R_54 M_DATA_R_55 M_DATA_R_56 M_DATA_R_57 M_DATA_R_58 M_DATA_R_59 M_DATA_R_60 M_DATA_R_61 M_DATA_R_62 M_DATA_R_63
M_B_A13
12
3D3V_S0
C182
DM1
112
A0
111
A1
110
A2
109
A3
108
A4
107
A5
106
A6
105
A7
102
A8
101
A9
115
A10 / AP
100
A11
99
A12
117
BA0
116
BA1
5
DQ0
7
DQ1
13
DQ2
17
DQ3
6
DQ4
8
DQ5
14
DQ6
18
DQ7
19
DQ8
23
DQ9
29
DQ10
31
DQ11
20
DQ12
24
DQ13
30
DQ14
32
DQ15
41
DQ16
43
DQ17
49
DQ18
53
DQ19
42
DQ20
44
DQ21
50
DQ22
54
DQ23
55
DQ24
59
DQ25
65
DQ26
67
DQ27
56
DQ28
60
DQ29
66
DQ30
68
DQ31
127 57
DQ32 VDD
129
DQ33
135
DQ34
139
DQ35
128
DQ36
130
DQ37
136
DQ38
140
DQ39
141
DQ40
145
DQ41
151
DQ42
153
DQ43
142
DQ44
146
DQ45
152
DQ46
154
DQ47
163
DQ48
165
DQ49
171
DQ50
175
DQ51
164
DQ52
166
DQ53
172
DQ54
176
DQ55
177
DQ56
181
DQ57
187
DQ58
189
DQ59
178
DQ60
182
DQ61
188
DQ62
190
DQ63
71
CB0
73
CB1
79
CB2
83
CB3
72
CB4
74
CB5
80
CB6
84
CB7
85
NC
86
NC/(RESET#)
97
NC/A13
98
NC/BA2
123
NC
124
NC
200
NC
118
/RAS
120
/CAS
119
/WE
1
VREF
2
VREF
197
VDDSPD
199
VDDID
DDR-SODIMM200-U1
/CS0 /CS1
CKE0 CKE1
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8
CK0
/CK0
CK1
/CK1
CK2
/CK2
SCL SDA
SA0 SA1 SA2
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
VSS VSS VSS VSS
Low 5.2mm NORMAL TYPE
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
GNDGND
121 122
96 95
11 25 47 61 133 147 169 183 77
12 26 48 62 134 148 170 184 78
35 37 160 158 89 91
195 193
194 196 198
9 10 21 22 33 34 36 45 46
58 69 70 81 82 92 93 94 113 114 131 132 143 144 155 156 157 167 168 179 180 191 192
3 4 15 16 27 28 38 39 40 51 52 63 64 75 76 87 88 90 103 104 125 126 137 138 149 150 159 161 162 173 174 185 186
202201
M_CS2_R# 7,12 M_CS3_R# 7,12
M_CKE2_R# 7,12 M_CKE3_R# 7,12
M_DQS_R0 M_DQS_R1 M_DQS_R2 M_DQS_R3 M_DQS_R4 M_DQS_R5 M_DQS_R6 M_DQS_R7
M_SDM_R0 M_SDM_R1 M_SDM_R2 M_SDM_R3 M_SDM_R4 M_SDM_R5 M_SDM_R6 M_SDM_R7
CLK_DDR3 7 CLK_DDR3# 7 CLK_DDR4 7
CLK_DDR5 CLK_DDR5#
CLK_DDR4# 7
SMBC_ICH 3,19 SMBD_ICH 3,19
3D3V_S0
2D5V_S3
Title
Size Document Number Rev Custom
Date: Sheet
DDR Socket
Leopard
3D3V_S03,5,7,9,13,14,16,17,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41
2D5V_S37,9,10,12,38,39,40,41
DDR_VREF_S37,40
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
11 41Monday, February 28, 2005
3D3V_S0
2D5V_S3
DDR_VREF_S3
M_DQS_R[7..0] 12 M_SDM_R[7..0] 12
of
-4
Page 12
SERIES DAMPING
RN44 SRN10-1
M_DATA60 M_DATA_R_60
1
8 2 3 4 5
RN43 SRN10-1
M_DATA63
1
M_DATA62
2 3
M_DATA61
4 5
RN55 SRN10-1
1 2 3
M_DATA4 M_DATA_R_4
4 5
RN54 SRN10-1
1
M_DATA13
2
M_DATA12
3
M_DATA7
4 5
RN11 SRN10-1
M_DQS2
1
M_DATA19
2
M_DATA18
3
M_DATA24
4 5
RN10 SRN10-1
1
M_DQS3
2
M_DATA26
3
M_DATA27
4 5
RN6 SRN10-1
M_DATA32
1 2
M_DQS4
3
M_DATA34
4 5
RN5 SRN10-1
M_DATA35
1
M_DATA40 M_DATA_R_40
2
M_DATA41
3
M_DQS5
4 5
RN14 SRN10-1
M_DATA0 M_DATA_R_0
1
M_DATA1
2
M_DQS0
3
M_DATA2
4 5
RN13 SRN10-1
M_DATA3 M_DATA_R_3
1
M_DATA8 M_DATA_R_8
2
M_DATA9
3 4 5
RN47 SRN10-1
M_DATA38
1 2
M_DATA37
3
M_DATA36 M_DATA_R_36
4 5
RN46 SRN10-1
1
M_DATA45
2
M_DATA44 M_DATA_R_44
3
M_DATA39
4 5
PLACE CAPS BETWEEN AND NEAR DDR SKTS PLACE EACH 0.1UF CAP CLOSE TO POWER
2D5V_S3
PIN
12
C200 SCD1U16V
12
C146 SCD1U16V
12
C203 SCD1U16V
M_DATA_R_55M_DATA55
7
M_DATA_R_54M_DATA54
6
M_SDM_R6M_SDM_6 M_DATA_R_63
8
M_DATA_R_62
7
M_SDM_R7M_SDM_7
6
M_DATA_R_61
M_DATA_R_6M_DATA6
8
M_SDM_R0M_SDM_0
7
M_DATA_R_5M_DATA5
6
M_SDM_R1M_SDM_1
8
M_DATA_R_13
7
M_DATA_R_12
6
M_DATA_R_7
M_DQS_R2
8
M_DATA_R_19
7
M_DATA_R_18
6
M_DATA_R_24 M_DATA_R_25M_DATA25
8
M_DQS_R3
7
M_DATA_R_26
6
M_DATA_R_27
M_DATA_R_32
8
M_DATA_R_33M_DATA33
7
M_DQS_R4
6
M_DATA_R_34 M_DATA_R_35
8
7
M_DATA_R_41
6
M_DQS_R5
8
M_DATA_R_1
7
M_DQS_R0
6
M_DATA_R_2
8
7
M_DATA_R_9
6
M_DQS_R1M_DQS1
M_DATA_R_38
8
M_SDM_R4M_SDM_4
7
M_DATA_R_37
6
M_SDM_R5M_SDM_5
8
M_DATA_R_45
7
6
M_DATA_R_39
12
C175 SCD1U16V
12
C365 SCD1U16V
C375
12
SC10U10V5ZY-L
12
12
12
C164 SCD1U16V
C147 SCD1U16V
C383
SC10U10V5ZY-L
PUMA-SC
Change RN to small size
RN4 SRN10-1
M_DATA42 M_DATA43 M_DATA48 M_DATA49
RN53 SRN10-1
M_DATA21 M_DATA20 M_DATA15 M_DATA14
RN12 SRN10-1
M_DATA10 M_DATA11 M_DATA17 M_DATA16
RN45 SRN10-1
M_DATA53 M_DATA52 M_DATA47 M_DATA46
RN3 SRN10-1
M_DQS6 M_DATA50
M_DATA56
RN2 SRN10-1
M_DQS7 M_DATA57 M_DATA59 M_DATA58
RN52 SRN10-1
M_DATA28 M_DATA23 M_DATA22 M_SDM_2
RN51 SRN10-1
M_DATA31 M_DATA30
12
12
C157 SCD1U16V
C170 SCD1U16V
12
12
12
C165 SCD1U16V
C174 SCD1U16V
EC39 SCD1U16V
12
12
12
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
C166 SCD1U16V
C198 SCD1U16V
EC36 SCD1U16V
8 7 6
8 7 6
8 7 6
8 7 6
8 7 6
8 7 6
8 7 6
8 7 6
12
12
12
M_DATA_R_42 M_DATA_R_43 M_DATA_R_48 M_DATA_R_49
M_DATA_R_21 M_DATA_R_20 M_DATA_R_15 M_DATA_R_14
M_DATA_R_10 M_DATA_R_11 M_DATA_R_17 M_DATA_R_16
M_DATA_R_53 M_DATA_R_52 M_DATA_R_47 M_DATA_R_46
M_DQS_R6 M_DATA_R_50
M_DATA_R_51M_DATA51 M_DATA_R_56
M_DQS_R7 M_DATA_R_57 M_DATA_R_59 M_DATA_R_58
M_DATA_R_28 M_DATA_R_23 M_DATA_R_22 M_SDM_R2
M_DATA_R_31 M_DATA_R_30 M_SDM_R3M_SDM_3 M_DATA_R_29M_DATA29
C364 SCD1U16V
C192 SCD1U16V
EC42 SCD1U16V
12
12
12
C363 SCD1U16V
C186 SCD1U16V
EC44 SCD1U16V
M_DATA_R_4 M_DATA_R_5 M_SDM_R0 M_DATA_R_6
M_DATA_R_7 M_DATA_R_13
M_DATA_R_12
M_SDM_R1
M_DATA_R_2 M_DQS_R0 M_DATA_R_1 M_DATA_R_0
M_DQS_R1 M_DATA_R_9 M_DATA_R_8 M_DATA_R_3
M_DATA_R_24 M_DATA_R_19 M_DATA_R_18 M_DQS_R2
M_DATA_R_27 M_DATA_R_26 M_DQS_R3 M_DATA_R_25
M_DATA_R_14 M_DATA_R_15 M_DATA_R_21 M_DATA_R_20
M_DATA_R_17 M_DATA_R_16 M_DATA_R_11 M_DATA_R_10
M_SDM_R2 M_DATA_R_23 M_DATA_R_22 M_DATA_R_28
M_SDM_R3 M_DATA_R_29 M_DATA_R_30 M_DATA_R_31
M_DATA_R_47 M_DATA_R_46 M_DATA_R_52 M_DATA_R_53
M_DATA_R_49 M_DATA_R_48 M_DATA_R_43 M_DATA_R_42
M_DATA_R_37 M_DATA_R_36 M_SDM_R4 M_DATA_R_38
M_DATA_R_39 M_DATA_R_44 M_DATA_R_45 M_SDM_R5
M_DATA_R_34 M_DQS_R4 M_DATA_R_33 M_DATA_R_32
M_DQS_R5 M_DATA_R_41
M_DATA_R_40 M_DATA_R_35
M_SDM_R6 M_DATA_R_54 M_DATA_R_55 M_DATA_R_60
M_DATA_R_61 M_SDM_R7 M_DATA_R_62 M_DATA_R_63
M_DATA_R_56 M_DATA_R_51 M_DATA_R_50 M_DQS_R6
M_DATA_R_59 M_DATA_R_58
M_DQS_R7
M_DATA_R_57
RN27 SRN56-1
1
8
2
7
3
6
4 5
RN26 SRN56-1
1
8
2
7
3
6
4 5
RN73 SRN56-1
1
8
2
7
3
6
4 5
RN72 SRN56-1
1
8
2
7
3
6
4 5
RN70 SRN56-1
1
8
2
7
3
6
4 5
RN69 SRN56-1
1
8
2
7
3
6
4 5
RN25 SRN56-1
1
8
2
7
3
6
4 5
RN71 SRN56-1
1
8
2
7
3
6
4 5
RN24 SRN56-1
1
8
2
7
3
6
4 5
RN23 SRN56-1
1
8
2
7
3
6
4 5
RN18 SRN56-1
1
8
2
7
3
6
4 5
RN64 SRN56-1
1
8
2
7
3
6
4 5
RN20 SRN56-1
1
8
2
7
3
6
4 5
RN19 SRN56-1
1
8
2
7
3
6
4 5
RN66 SRN56-1
1
8
2
7
3
6
4 5
RN65 SRN56-1
1
8
2
7
3
6
4 5
RN17 SRN56-1
1
8
2
7
3
6
4 5
RN16 SRN56-1
1
8
2
7
3
6
4 5
RN63 SRN56-1
1
8
2
7
3
6
4 5
RN62 SRN56-1
1
8
2
7
3
6
4 5
1D25V_S0
C199 SCD1U16V
1 2
C400 DUMMY-SCD01U16V2KX
1 2
C201 SCD1U16V
1 2
C384 SCD1U16V
1 2
C393 DUMMY-SCD01U16V2KX
1 2
C394 SCD1U16V
1 2
C390 SCD1U16V
1 2
C179 DUMMY-SCD01U16V2KX
1 2
C176 SCD1U16V
1 2
C188 SCD1U16V
1 2
C190 DUMMY-SCD01U16V2KX
1 2
C397 SCD1U16V
1 2
C191 SCD1U16V
1 2
C392 DUMMY-SCD01U16V2KX
1 2
C158 SCD1U16V
1 2
C159 SCD1U16V
1 2
C178 DUMMY-SCD01U16V2KX
1 2
C389 SCD1U16V
1 2
C160 SCD1U16V
1 2
C189 DUMMY-SCD01U16V2KX
1 2
C402 SCD1U16V
1 2
C162 SCD1U16V
1 2
C173 DUMMY-SCD01U16V2KX
1 2
C195 SCD1U16V
1 2
C205 SCD1U16V
1 2
C355 DUMMY-SCD01U16V2KX
1 2
C386 SCD1U16V
1 2
C172 SCD1U16V
1 2
C163 DUMMY-SCD01U16V2KX
1 2
C398 SCD1U16V
1 2
PARALLEL TERMINATION
PULL HIGH STUBS < 0.8", PLACE RPs CLOSE TO DM2 NO EQUAL LENGTH LIMITATION
1D25V_S039 2D5V_S37,9,10,11,38,39,40,41
M_A78,11 M_A58,11 M_A18,11 M_A38,11
M_A98,11 M_A108,11 M_A118,11 M_A128,11
M_A68,11
M_A88,11
M_A28,11
M_A48,11
M_B_A108,11
M_B_BS0#8,11
M_B_WE#8,11
M_CS2_R#7,11
M_B_A68,11 M_B_A48,11 M_B_A28,11 M_B_A08,11
R472 56R2J R471 56R2J R128 56R2J R473 56R2J
Address / Command
M_A_BS1#8,11 M_A_RAS#8,11 M_A_CAS#8,11 M_CS1_R#7,11
M_B_A118,11
M_B_A88,11
M_B_BS1#8,11 M_B_RAS#8,11 M_B_CAS#8,11 M_CS3_R#7,11
M_A138,11
M_CS0_R#7,11
M_A_WE#8,11
M_A_BS0#8,11
M_B_A128,11
M_B_A58,11 M_B_A38,11 M_B_A18,11
Control
M_CKE2_R#7,11 M_CKE3_R#7,11
M_CKE1_R#7,11 M_CKE0_R#7,11
M_B_A98,11 M_B_A78,11
M_B_A138,11
M_A08,11
Title
DDR Serial/Terminator Resistor
Size Document Number Rev A3
Date: Sheet
1D25V_S0 2D5V_S3
1D25V_S0
RN68 SRN56-1
1
8
2
7
3
6
4 5
1 2 1 2 1 2 1 2
RN22 SRN56-1
1
8
2
7
3
6
4 5
RN7 SRN56-1
1
8
2
7
3
6
4 5
RN49 SRN56-1
1
8
2
7
3
6
4 5
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
1 2 1 2
1 2 1 2
RN9
1 2 3
SRN56-2-U2
1 2 1 2
1D25V_S0
8 7 6
8 7 6
8 7 6
8 7 6
8 7 6
4
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
RN21 SRN56-1
RN50 SRN56-1
RN48 SRN56-1
RN67 SRN56-1
RN8 SRN56-1
R445 56R2J R121 56R2J
R474 56R2J R129 56R2J
R119 56R2J R127 56R2J
Leopard
C180 DUMMY-SCD01U16V2KX
1 2
C404 SCD1U16V
1 2
C358 DUMMY-SCD01U16V2KX
1 2
C196 SCD1U16V
1 2
C356 DUMMY-SCD01U16V2KX
1 2
C399 SCD1U16V
1 2
C197 DUMMY-SCD01U16V2KX
1 2
C202 SCD1U16V
1 2
C396 SCD1U16V
1 2
C403 DUMMY-SCD01U16V2KX
1 2
C194 SCD1U16V
1 2
C357 DUMMY-SCD01U16V2KX
1 2
C161 SCD1U16V
1 2
C388 DUMMY-SCD01U16V2KX
1 2
C181 SCD1U16V
1 2
C385 DUMMY-SCD01U16V2KX
1 2
C405 SCD1U16V
1 2
C177 DUMMY-SCD01U16V2KX
1 2
C401 SCD1U16V
1 2
C187 DUMMY-SCD01U16V2KX
1 2
1D25V_S0
C193 SCD1U16V
C387 SCD1U16V
C395 SCD1U16V
C171 DUMMY-SCD01U16V2KX C204 SCD1U16V
12 41Monday, February 28, 2005
M_DATA[63..0] 8 M_DATA_R_[63..0] 11 M_DQS[7..0] 8 M_DQS_R[7..0] 11 M_SDM_[7..0] 8 M_SDM_R[7..0] 11
1 2
1 2
1 2
1 2 1 2
of
-4
Page 13
A
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Digital Signal CONN
CN5
21
1005-1
4 4
22
JST-CON20
Analog Signal CONN
1006 -1
CN6
11 1 2 3 4 5
3 3
2 2
6 7 8 9 10 12
MOLEX-CON10-1
BC0EX126
BC0EX226
HP suggest
DOCK_PRESENT SPDIF_OUT
0218 -3
1 1
USB_P_CON0
1
USB_N_CON0
2 3
USB_P_CON1
4
USB_N_CON1
5 6
CRMA_CN5
7
LUMA_CN5
8 9 10 11 12 13 14 15 16 17 18 19 20
MIC_PR
AUD_AGND
5V_S0
EXT_MIC_1 27 EXT_MIC_2 27
HP_OUT_R 27 HP_OUT_L 27
EARPHONE 28 LID_SW 14
3D3V_S0
12
R432 47KR2
63.47334.1D1
R495 DUMMY-R2
1 2
R225 DUMMY-R2
1 2
Please close to ICH6
R63
1 2
47R2
12
R64
dummy2K2R2
LUMA_CN5
5V_S3
CRMA_CN5
5V_S3
DDC_DATA 15 DDC_CLK 15
JVGA_HS 7 JVGA_VS 7
CRT_R 15 CRT_G 15 CRT_B 15
LINE-OUT
MIC-IN
EARPHONE
5V_S0
12
3
Q17
1
MMBT3904-U1
2
SD 0817
R309 10KR2
PR_INSERT#
PR_PRESENT#
PUMA SC
L12 BLM11B750S
12
12
BC12
BC13
SC3P50V2CN
Close to Docking CN
USB_PN617 USB_PP617
USB_PN017 USB_PP017
ICH_PME# 17,25,29
PCI_AD24 17,22,25,29
PR_INSERT# 31
B
1 2
L15 BLM11B750S
1 2
SC3P50V2CN
USB_N_CON1 USB_P_CON1
LID_SW
3
12
C99
DUMMY-SC3P50V2CN
3D3V_S3
D31
BAV99LT1
C
5V_S0 5V_S0
1015 -1
12
C102
LUMA
CRMA
DUMMY-SC3P50V2CN
VOL_UP_DK# VOL_DWN_DK#
12
12
R91
R94
150R2F
150R2F
3
SD 0812
USB_N_CON6
USB_P_CON6
USB_N_CON0 USB_P_CON0
USB_PN1 17 USB_PP1 17
D29
2
1
DummyBAV99LT1
DK_SPKR_R+28 DK_SPKR_L+28
3/15 HM1-SD
AUD_AGND
VOL_UP_DK#31
VOL_DWN_DK#31
DCBATOUT_BEAD
D30
2
3
DummyBAV99LT1
RJ45-426 RJ45-526 RJ45-126 RJ45-226
TP40
R333 0R2-0
1 2
5V_DOCK
12
R65
AD+ AD+
1KR2
Docking Connector
1
PR_PRESENT#
MIC_PR
USB_N_CON6 USB_P_CON6
IR_OUT
COMP_PR
LUMA_PR
CRMA_PR
CIR_PR
1209 -2
CN12
MH1
MH2
FOX-CONN58D-U3
11/29 -2
2
1
1209 -2
5V_S3 AD+
12
C337
SCD1U25V3KX
SCD1U16V
DCBATOUT_BEAD
5V_S0
12
12
C70
C458
SCD1U16V
12
SCD1U25V3KX
C69
5V_S0
12
C338 SCD1U16V
PUMA SC
SPDIF_OUT27
EC124 DUMMY-SCD1U16V
1 2
AUD_AGND
1011 -1
1 2
L19 BLM18PG600SN1
12
C464 SC470P25V2KN
PUMA SC
SPDIF
1011 -1
12
C51 SC470P25V2KN
D
60
5556
12 34
56 78 910 1112
5V_Dock_S0
1 2
1314 1516 1718 1920 2122 2324 2526 2728 2930 3132 3334 3536 3738 3940 4142 4344 4546 4748 4950 5152 5354
5758
59
DOCK_PRESENT
HIGH B1
L26
LUMA_PR
1 2
12
IND-1D2UH
C296
SC47P50V2JN
SD 0817
L24
CRMA_PR
1 2
12
IND-1D2UH
C294
SC47P50V2JN
COMP_PR
1 2
IND-1D2UH
12
C295
SC47P50V2JN
L25
Place near the DOCK
SPDIF
0R2-0
R43
5V_DOCK
FUNCTIONINPUT
B0LOW
12
CRMA_PR_1
12
SC47P50V2JN
12
C298
SC47P50V2JN
3/15 HM1-SD
RJ45-7 26 RJ45-8 26
RJ45-3 26 RJ45-6 26 JACK_DETECT# 28
5V_S0
MUTE_LED 14,31
1394_TPA1P_PR 26 1394_TPA1N_PR 26 1394_TPB1P_PR 26 1394_TPB1N_PR 26
SD 0812
LUMA
LUMA_PR_1
12
C297
150R2F
SC47P50V2JN
C307
12
R335
150R2F
R334
12
R372
150R2F
JACK_DETECT# MUTE_LED
AUD_AGND
MIC_PR DK_SPKR_R+ DK_SPKR_L+ COMP_PR VOL_UP_DK# VOL_DWN_DK# DOCK_PRESENT PR_PRESENT#
BT_LED 14,26
EC8 SCD1U16V EC11 SCD1U16V EC93 SCD1U16V EC95 SC1000P16V2KX EC94 SC1000P16V2KX EC102 SC1000P16V2KX EC100 SC1000P16V2KX EC101 SC1000P16V2KX EC103 SC1000P16V2KX EC20 SC1000P16V2KX EC92 SC1000P16V2KX
BT_LED
EC19 SC1000P16V2KX
Place near the GMCH
U7
1
B1
2
GND
3 4
B0 A
NC7SB3157P6X-U
U8
1
B1
2
GND
3 4
B0 A
NC7SB3157P6X-U
1 2
R536
0R2-0
VCC
VCC
6
S
5
6
S
5
E
3D3V_S03,5,7,9,11,14,16,17,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41
5V_S014,18,19,20,21,23,27,28,29,32,36,39,40,41
5V_S314,26,30,32,37,38,40,41
DCBATOUT14,35,37,38,39,40,41
5V_AUX14,15,35,37,38,39
SD 0812
HM1-SD FOR EMI
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
5V_S0
PR_INSERT#
LUMA_VGA 7
PR_INSERT#CRMA
CRMA_VGA 7
SB-13-01
COMP_VGA 7
3D3V_S0
5V_S0
5V_S3
DCBATOUT
5V_AUX
5V_S3
F3
1 2
C306
SC4D7U10V5ZY
FUSE-2A8V
A
12
5V_DOCK
12
C305 SCD1U16V
100 mil
12
TC15 DUMMY-ST47U6D3V-U1
R259 0R2-0
C
1 2 1 2
0R2-0
CIR_KBC 31
Title
Size Document Number Rev
A3
D
Date: Sheet of
Board to board conn/ Docking
CIR15
CIR_PR
CIR,CIR_PR,CIR_KBC are connect togather. default setting 12/12
B
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Leopard
13 41Monday, February 28, 2005
E
-4
Page 14
A
INVERTER/LCD
3D3V_LCD_S0
12
4 4
3 3
BRIGHTNESS31
FPBACK31
BC11
SCD1U16V
TXAOUT0+7
TXAOUT1-7
TXAOUT1+7
TXAOUT2-7
TXAOUT2+7
TXACLK-7 TXACLK+7
TXBOUT0-7
TXBOUT0+7
TXBOUT1-7
TXBOUT1+7
TXBOUT2-7
TXBOUT2+7
TXBCLK-7 TXBCLK+7
EDID_CLK7
EDID_DAT7
5V_S0
C292
BC55
12
12
SD 0813
SC1000P16V2KX
SC1000P16V2KX
2 2
PR
Botton
PA
Top
SC 0705
change R from 100 to 200 ohm
5V_S0_PR
R546
1 2
1K2R2J-1
5V_S0_PR
R547
1 2
1K2R2J-1
5V_S0_PR
1 1
5V_AUX_PR
5V_S3_PR
R258
1 2
1K2R2J-1
R257
1 2
1K2R2J-1
R256
1 2
1K2R2J-1
1 2
1 2
SE 0830
Amber
LED4
Blue
LED8
LED10
LED-O-10
LED11
LED-O-10
A
Amber
Amber
LED5 LED6 LED2LED1
Blue
Blue
LED9
LED7
PUMA SC
CAPS_LED#
7421_LED#
NC
NC
LED4
NC
3D3V_S0
12
C291
SCD1U16V
U42
U64
LED6
LED-O-11-U
IDE_LED#
12
LED5
LED-O-11-U
12
LED-O-11-U
12
BC10 SC10U10V6ZY-U
DCBATOUT
12
12
BC56
BC59
SCD1U16V
SCD1U
IRCHRPWR HDD
CAPS 7421
Amber Amber
Blue Blue
LED1 LED2
CHG_LED#
PWR_LED#
41 43
1 2
3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
SE 0830
B
CN3
IPEX-CON40-1-U
ID_DET31,32
5V_S0_PA
5V_S0_PA
5V_S0_PA
5V_AUX_PA
B
MH1
45
46 MH2 4442
1 2
R112
1 2
200R2J
R549
1 2
200R2J
5V_S3_PA
1 2
SE 0904
1209 -2
R93
100R2
R550
1 2
200R2J
R548
200R2J
5V_AUX
12
LCDVDD_ON7
R543 100KR2
1
G
LCDVDD_ON
7421_LED22
CAPS_LED31
NUM_LED31
12
ID_DET
D
S
2 3
2N7002
LED1
1 2
LED-B-53 LED2
1 2
R542
Dummy10KR2
Q38
NC
NC
1 2
2
IN
12
R544 47KR2
ID_DET#
LED-B-53
LED9 LED-B-54-U
12
LED8 LED-B-54-U
NC
LED7 LED-B-54-U
12
R315 1KR2
Q18
R1
R2
DTC114EUA-U1
Q9
R1
2
IN
DTC114EUA-U1 Q6
R1
2
IN
DTC114EUA-U1 Q22
R1
2
IN
DTC114EUA-U1
SD 0823
R545
1 2
47KR2
CAPS_LED#
7421_LED#
IDE_LED#
12
PWR_LED#
C
LCDVDD_ON_1
BC60
SC1U10V3ZY
OUT
3
GND
1
R2
R2
R2
5V_AUX
2
1
3
CHG_LED#
C
Q37
1
5V_S5
OUT
3
GND
1
OUT
3
GND
1
OUT
3
GND
1
MMBT3906-U
3D3V_S0
SB-14-1
270KR2F
1 2
12
12
R314 10KR2
2
Q39
3
MMBT3906-U
R317
BC57
12
3D3V_LCD_S0
1
G
7421_LED#
CAPS_LED#
SE 0830
5V_AUX_PA
SE 0830
5V_AUX_PR
SI3865_R1C1
6 5
SCD1U16V
12
R316 150R2
SB-14-1
D
Q19 2N7002
S
2 3
NUM_LED# 32
SC6800P50V3KX
U49
R1/C1 ON/OFF
SI3865DV
84.03865.03D
ID_DET
ID_DET#
MUTE_LED13,31
BC61
1 2
1 2
1
R2
2
D2
34
D2S2
802_BT_LED#32
R538
47KR2
SD 0823
SI3865_R2
1
R540
1 2
47KR2
Q20
R1
2
IN
DTC114EUA-U1
D
3D3V_LCD_S0
12
R318 47KR2
5V_S3
2
Q33
3
1
R2
D
OUT
GND
MMBT3906-U
OUT
3
GND
1
Q21
3 1
R2
DTC114EUA-U1
2
Q35
3
MMBT3906-U
E
3D3V_S03,5,7,9,11,13,16,17,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41
3D3V_S313,30,40
5V_S013,18,19,20,21,23,27,28,29,32,36,39,40,41
5V_S518,20,36,38
3D3V_S3
R431 100KR2
1 2
12
C352 SC1000P50V
D19
R1
2
IN
802_BT_LED
3
SE 0830
5V_S3_PA
SE 0830
5V_S3_PR
Title
Size Document Number Rev
Date: Sheet
ID_DET
1 2
ID_DET#
MUTE_LED# 32
CHG_LED31
PWR_LED31
A3
R539
47KR2
SD 0823
1 2
1
R541
47KR2
IDE_LED#
Inverter/LCD
SB-14-1
R430 4K7R2
LID_SW
DCBATOUT35,37,38,39,40,41TXAOUT0-7
LID_SW 13KBC_LID#31
2
1
802_ACT_LED 29
BT_LED 13,26
12
CH715F
5V_S0
SE 0830
5V_S0_PA
2
Q34
3
MMBT3906-U
1
Q14
R1
2
IN
R2
DTC114EUA-U1 Q13
R1
2
IN
R2
DTC114EUA-U1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Leopard
2
Q36
3
E
MMBT3906-U
OUT
3
GND
1
OUT
3
GND
1
SE 0830
5V_S0_PR
HDD_LED# 21 CDROM_LED# 21
CHG_LED#
14 41Monday, February 28, 2005
of
3D3V_S0
3D3V_S3
5V_S0
5V_S5
DCBATOUT
PWR_LED# 32
-4
Page 15
A
hexainf@hotmail.com GRATIS - FOR FREE
B
C
D
E
PA & PR diffent parts
PA PR
LED1
83.00190.Y70
LED2
83.00190.Y70
LED4
Dummy
LED5
Dummy
LED6
4 4
LED7 LED8 LED9 U64 U42 R256 R257 R258 R93 R112
Dummy
83.00110.E70
83.00110.E70
83.00110.E70
56.15006.001 Dummy
63.20134.1D1
63.20134.1D1
63.20134.1D1
63.20134.1D1
63.20134.1D1
CBUS1 21.H0088.001 21.H0088.001 R176 R177 Dummy
3 3
83.00190.W70
83.00190.W70
83.00110.D70
83.00110.D70
83.00110.D70 Dummy Dummy Dummy Dummy
56.15006.001
63.12234.1D1
63.12234.1D1
63.12234.1D1
63.12234.1D1
63.12234.1D1
Dummy63.10334.1D1
63.10334.1D1
VGA_GREEN7
VGA_BLUE7
VGA_RED7
JVGA_HS7,13 JVGA_VS7,13
1228 -3
2D5V_S0
CRT
SD 0813
R85 75R2F
L8 BLM11B750S
1 2
L7 BLM11B750S
1 2
12
R84 75R2F
DDC_CLK13 DDC_DATA13
JVGA_HS JVGA_VS
12
12
R92 75R2F
12
C101
DDC_CLK_CON DDC_DATA_CON
C100
12
12
VGA_HSYNC 7,13 VGA_VSYNC 7,13
L6 BLM11B750S L5 BLM11B750S
L9 BLM11B750S
C84
1008 -1
SE 0904
1 2 1 2
1 2
U12
GMCH_DDCDATA7
DDC_CLK_CON
12
12
C103
C87
SC3P50V2CN
SC3P50V2CN
12
C86
5 6
CRT_B CRT_G
CRT_R
SC3P50V2CN
34 2 1
2N7002DW
2D5V_S0
DDC_DATA_CON
CRT_B 13
CRT_G 13
CRT_R 13
4
RN37 SRN2K2J
1
2 3
GMCH_DDCCLK 7
1008 -1
SC15P50V2JN-1
SC15P50V2JN-1
SC15P50V2JN-1
Close to CN5
Close to U17 (N/B)
010804 Modified on Astro ID request
2 2
1 1
A
CIR
FOR FF
U64
GND GND
VS
OUT
IR-TSOP6236
56.15006.001
U42
GND GND
VS
OUT
DummyIR-TSOP6236
ZZ.15006.001
5V_AUX
12
12
R261
R260
100R2
10KR2
1 2 3
CIR
4
1 2 3 4
C273
1 2
SC4D7U10V5ZY
CIR 13
B
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
C
D
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
CRT/ CIR
Leopard
15 41Monday, February 28, 2005
E
-4
Page 16
A
3D3V_AUX RTC_AUX_S5
D13
21
RTC_VCC
CH751H-40-U
R250 1KR2
12
BAT
12345
D14
CH751H-40-U
4 4
21
R508 1MR2
1 2
12
1006 -1
RTC1 ETY-CON3-S1
The symbol use 2nd source The P/N is the main source Main source:20.D0152.103 2nd source:20.D0012.103
RSMRST#20,31,39
3 3
2 2
R507
20KR2
12
3D3V_S0
12
12
C257 SC1U10V3ZY
RTC circuitry
21
G66
C455
GAP-OPEN
SC1U10V3ZY
R249 DUMMY-10KR2
D
Q11
1
DUMMY-2N7002
G
S
2 3
SB-16-01
AC97_BITCLK27,30
B
1223 -3
AC97_SYNC27,30
AC97_RST#27,30
AC97_DIN027 AC97_DIN130
AC97_DOUT27,30
Place within 500 mils of ICH6 ball
C256
1 2
SC4D7P50V3CN
XTAL-32D768K-4P
C255
1 2
SC3D9P16V3JN
R194
1 2
SB-16-04
R192 33R2
1 2
R191 33R2
1 2
R493 33R2
1 2
1 2
41
12
X4
2 3
RCT_RST# INTRUDER#
1 2
IDE_IORDY21
IDE_IRQ1421
IDE_DACK#21
IDE_IOW#21
IDE_IOR#21
TP67
LAN_RSTSYNC
AC97_SYNC_ICH AC97_RST#_ICH
AC97_DOUT_ICH
SATA_RBIAS_PN
DUMMY-10KR2
R496 0R2-0
0R2-0 R195
R228 10MR2J
RCT_X1 RCT_X2
ICH_TP5
AA2 AA3
AA5
D12 B12 D11
B11 E12
E11 C13
C12 C11 E13
C10
A10
B10
AC19
AE3 AD3 AG2
AF2 AD7
AC7
AF6 AG6
AC2 AC1
AG11 AF11
AF16 AB16 AB15 AC14 AE16
Y1 Y2
F13 F12
B9
F11 F10
C9
C
RTCX1 RTCX2
RTCRST# INTRUDER#
INTVRMEN
EE_CS EE_SHCLK EE_DOUT EE_DIN
LAN_CLK LAN_RSTSYNC LANRXD[0]
LANRXD[1] LANRXD[2]
LANTXD[0] LANTXD[1] LANTXD[2]
ACZ_BIT_CLK ACZ_SYNC
ACZ_RST# ACZ_SDIN[0]
ACZ_SDIN[1] ACZ_SDIN[2]
ACZ_SDO
SATALED# SATA[0]RXN
SATA[0]RXP SATA[0]TXN SATA[0]TXP
SATA[2]RXN SATA[2]RXP SATA[2]TXN SATA[2]TXP
SATA_CLKN SATA_CLKP
SATARBIAS# SATARBIAS
IORDY IDEIRQ DDACK# DIOW# DIOR#
U35A
LAD[0]/FWH[0] LAD[1]/FWH[1] LAD[2]/FWH[2] LAD[3]/FWH[3]
LPC
RTCLAN
LDRQ[0]#
LDRQ[1]#/GPI[41]
LFRAME#/FWH[4]
A20GATE
CPUSLP# DPRSLP#
CPU
CPUPWRGD/GPO[49]
INIT3_3V#
STPCLK#
THRMTRIP#
SATA AC-97/AZALIA
IDE
ICH6M
A20M#
DPSLP#
FERR#
IGNNE#
INIT#
INTR
RCIN#
NMI
SMI#
DA[0] DA[1] DA[2]
DCS1# DCS3#
DD[0] DD[1] DD[2] DD[3] DD[4] DD[5] DD[6] DD[7] DD[8]
DD[9] DD[10] DD[11] DD[12] DD[13] DD[14] DD[15]
DDREQ
P2 N3 N5 N4
N6 P4
P3
AF22 AF23
AE27 AE24
AD27 AF24 AG25 AG26
AE22 AF27 AG24
AD23 AF25
AG27 AE26 AE23
AC16 AB17 AC17
AD16 AE17
AD14 AF15 AF14 AD12 AE14 AC11 AD11 AB11 AE13 AF13 AB12 AB13 AC13 AE15 AG15 AD13
AB14
LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3
LPC_LDRQ1#
H_CPUSLP#_ICH H_DPRSLP#_R
H_DPSLP#_R H_FERR_R
1007 -1
H_THERMTRIP_R
D
LPC_LAD[3..0] 31
Open J5G1 for Dothan A step
LPC_LDRQ0# 31
LPC_LFRAME# 31
ICH_A20GATE 31 H_A20M# 4
R310 DUMMY-0R2-0 R160 0R2-0
R148 0R2-0 R159 56R2J
H_PWRGD 4 H_IGNNE# 4 H_INIT# 4
H_INTR 4 RCIN# 31 H_NMI 4
H_SMI# 4 H_STPCLK# 4
IDE_A0 21 IDE_A1 21 IDE_A2 21
IDE_CS#0 21 IDE_CS#1 21
IDE_D0 21 IDE_D1 21 IDE_D2 21 IDE_D3 21 IDE_D4 21 IDE_D5 21 IDE_D6 21 IDE_D7 21 IDE_D8 21 IDE_D9 21 IDE_D10 21 IDE_D11 21 IDE_D12 21 IDE_D13 21 IDE_D14 21 IDE_D15 21
IDE_DREQ 21
Shunt for Dothan B step & all Yonah
1 2 1 2
1 2 1 2
SB-16-02
R158
1 2
R6V7
VCCP_GMCH_S0
H_CPUSLP# 4,6 H_DPRSLP# 4
H_DPSLP# 4
56R2J
Layout Note: R6V7 needs to placed within 2" of ICH6, R6V9 must be placed within 2" of R6V7 w/o stub.
12
VCCP_GMCH_S0
R6V9
SB-16-05
VCCP_GMCH_S0
12
R149 DUMMY-56R2J
H_DPSLP#
R162 56R2J
12
H_DPRSLP#
E
3D3V_S03,5,7,9,11,13,14,17,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41
3D3V_AUX20,31,32,34,35,36,37
VCCP_GMCH_S04,5,6,7,9,10,18,36,40,41
RCIN#
R488 10KR2
Dothan A
Dothan B
12
R161 DUMMY-56R2J
1 2 1 2
R501
R717 R388
DUMMY0R56R
LPC_LDRQ1#
12/12 INTEL check list
H_FERR# 4
R157 75R2
PM_THRMTRIP-I# 4,7
VCCP_GMCH_S0
3D3V_S0
3D3V_AUX
VCCP_GMCH_S0
3D3V_S0
10KR2
R370
0R
0R
DUMMY
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev A3
A
B
C
D
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
ICH6-M (1 of 4)
Leopard
E
16 41Monday, February 28, 2005
-4
of
Page 17
A
hexainf@hotmail.com GRATIS - FOR FREE
PCI_AD[31..0]13,22,25,29
4 4
PCI_FRAME#22,25,29
3 3
TP79 TP80 TP34 TP33 TP78
PCI_FRAME# PCI_IRDY# PCI_TRDY# PCI_STOP#
3D3V_S0
PCI_SERR# PCI_DEVSEL# PCI_PERR# PCI_LOCK#
3D3V_S0
2 2
PCI_REQ#5 INT_PIRQA# INT_PIRQC# INT_PIRQB#
3D3V_S0
1 1
1 2 3 4 5 6
1 2 3 4 5 6
1 2 3 4 5 6
RP4
SRP10K RP1
SRP10K RP2
SRP10K
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#
ICH_TP8 ICH_TP9 ICH_TP10 ICH_TP11 ICH_TP12
3D3V_S0
10
INT_PIRQD#
9
INT_PIRQG#
8
INT_PIRQF#
7
INT_PIRQE#
10
INT_PIRQH#
9
PCI_REQ#2
8
PCI_REQ#3
7
PM_CLKRUN#
10 9 8 7
12
R246
10KR2
12
R245
DUMMY-R2
E2
AD[0]
E5
AD[1]
C2
AD[2]
F5
AD[3]
F3
AD[4]
E9
AD[5]
F2
AD[6]
D6
AD[7]
E6
AD[8]
D3
AD[9]
A2
AD[10]
D2
AD[11]
D5
AD[12]
H3
AD[13]
B4
AD[14]
J5
AD[15]
K2
AD[16]
K5
AD[17]
D4
AD[18]
L6
AD[19]
G3
AD[20]
H4
AD[21]
H2
AD[22]
H5
AD[23]
B3
AD[24]
M6
AD[25]
B2
AD[26]
K6
AD[27]
K3
AD[28]
A5
AD[29]
L1
AD[30]
K4
AD[31]
J3
FRAME#
N2
PIRQ[A]#
L2
PIRQ[B]#
M1
PIRQ[C]#
L3
PIRQ[D]#
AC5
RSVD[1]
AD5
RSVD[2]
AF4
RSVD[3]
AG4
RSVD[4]
AC9
RSVD[5]
3D3V_S0
3D3V_S0
3D3V_S0
PCI_SERIRQ MCH_SYNC#
PCI_REQ#0 PM_THRM#
12
R247
10KR2
12
R248
DUMMY-R2
U35B
REQ[0]#
PCI
GNT[0]# REQ[1]# GNT[1]# REQ[2]# GNT[2]# REQ[3]# GNT[3]#
REQ[4]#/GPI[40]
GNT[4]#/GPO[48]
REQ[5]#/GPI[1]
GNT[5]#/GPO[17]
REQ[6]#/GPI[0]
GNT[6]#/GPO[16]
C/BE[0]# C/BE[1]# C/BE[2]# C/BE[3]#
IRDY#
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR# STOP# TRDY#
PLTRST#
PCICLK
PIRQ[E]#/GPI[2] PIRQ[F]#/GPI[3] PIRQ[G]#/GPI[4] PIRQ[H]#/GPI[5]
RSVD[6] RSVD[7] RSVD[8]
ICH6M
PME#
TP[3]
Interrupt I/F
RESERVED
ICH6 Pullups
PM_SUS_STAT#31
11/29 -2
PCB_VER0 PCB_VER1
PCI_REQ#0
L5 C1
PCI_REQ#1
B5 B6
PCI_REQ#2
M5 F1
PCI_REQ#3
B8
ICH_GNT3
C8
ICH_GPI40_R
F7
ICH_GPO48
E7
PCI_REQ#5
E8
ICH_GPO17
F6
ICH_GPI0_R
B7
ICH_GPO16
D8 J6
H6 G4 G2
A3 E1
PAR
R2 C3 E3
PCI_LOCK#
C5 G5 J1 J2
R5 G6 P6
D9 C7 C6 M3
AD9 AF8 AG8 U3
PM_RI# SMB_LINK_ALERT# SMLINK0 SMLINK1
PCIE_WAKE# PM_BATLOW#_R
PM_SUS_STAT#
PCI_REQ#1 ICH_GPI7 GPI12
1 2 3 4 5
PUMA Board Version Setting
Ver. DB
PV 0 MV
1D5V_S0 3D3V_S5 3D3V_S0
1D5V_S0 5,7,9,18,21,38,39,41 3D3V_S5 18,19,21,25,29,31,35,37,39,40 3D3V_S0 3,5,7,9,11,13,14,16,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41
A
B
PCI_REQ#0 29 PCI_GNT#0 29 PCI_REQ#1 22 PCI_GNT#1 22 PCI_REQ#2 25 PCI_GNT#2 25
TP72 R492
TP74
R193 TP73
PCI_C/BE#0 22,25,29 PCI_C/BE#1 22,25,29 PCI_C/BE#2 22,25,29 PCI_C/BE#3 22,25,29
PCI_IRDY# 22,25,29 PCI_PAR 22,25,29 ICH_PCIRST# 19 PCI_DEVSEL# 22,25,29 PCI_PERR# 22,25,29
PCI_SERR# 22,25,29 PCI_STOP# 22,25,29 PCI_TRDY# 22,25,29
PLT_RST# 19 CLK_ICHPCI 3 ICH_PME# 13,25,29
INT_PIRQE# INT_PIRQF# INT_PIRQG# INT_PIRQH#
ICH_TP13 ICH_TP14 ICH_TP15 ICH_TP16ICH_TP16
R504
R505 8K2R2 R506 Dummy10KR2
INT_PIRQE# 25,29 INT_PIRQF# 22 INT_PIRQG# 22
PUMA SE
RN35
1 2 3 4 5
SRN10K
1 2
5K6R2
1 2 1 2
SD 0823
R190 10KR2
1 2
R172 10KR2
1 2
R500 10KR2
1 2
RN36
SRN0
8 7 6
ICH_TP16ICH_TP16 ICH_TP9 ICH_TP8 ICH_TP13
PCB_VER0
0 1 1
B
1 2
1 2
TP81 TP31 TP32 TP83
8 7 6
PCB_VER1
3D3V_S5
3D3V_S0
00 1SI
1
3D3V_S0
10KR2
10KR2
SD 0809
PM_DPRSLPVR36
1223 -3
SB-16-01
SD 0809
3D3V_S5TP75
10KR2
CPPE#21
12
R227
PM_BMBUSY#7
PM_STPPCI#3
PM_STPCPU#3,36
NEWCARD_RST#21
PM_CLKRUN#22,25,29,31
PCIE_WAKE#21
PCI_SERIRQ22,29,31
VRM_PWRGD20
CLK48_USB3
PM_SLP_S3#21,28,31,37,38,40 PM_SLP_S4#21,31,37,38
ICH6_PWROK20
11/29 -2
12
3D3V_S0
SMB_CLK19,21
SMB_DATA19,21
ICH_SPKR27
D34
DummyS1N4148-U
1223 -3
BT_EN26 WIRELESS_EN#29
PM_THRM#20
CLK_ICH143
TP77
TP76
R489 100R2
1 2
R481 100KR2
C
1 2 3 4 5
12
TP68 TPAD30
TP69 TP89
PM_PWRBTN#31
RSMRST#_KBC31
C
RN33
SRN100K
SMB_LINK_ALERT# SMLINK0 SMLINK1 MCH_SYNC#
PM_SUS_STAT# SYS_RESET#
PM_SUS_CLK
PM_RI#
8
SATA0_R1
7
SATA0_R2
6
SATA0_R3
ICH_GPI7
ECSMI# ECSCI# GPI12
ECSWI#
ICH6_GPO19
ICH6_GPO21
ICH_GPO27
PCB_VER0
PCB_VER1
ICH_SLP_S5#
PM_DPRSLPVR_R PM_BATLOW#_R
PLT_RST#
T2
RI#
AF17
SATA[0]GP/GPI[26]
AE18
SATA[1]GP/GPI[29]
AF18
SATA[2]GP/GPI[30]
AG18
SATA[3]GP/GPI[31]
Y4
SMBCLK
W5
SMBDATA
Y5
LINKALERT#
W4
SMLINK[0]
U6
SMLINK[1]
AG21
MCH_SYNC#
F8
SPKR
W3
SUS_STAT#/LPCPD#
U2
SYS_RESET#
AD19
BMBUSY#
AE19
GPI[7]
R1
GPI[8]
W6
SMBALERT#/GPI[11]
M2
GPI[12]
R6
GPI[13]
AC21
STP_PCI#
AB21
GPO[19]
AD22
STP_CPU#
AD20
GPO[21]
AD21
GPO[23]
V3
GPIO[24]
P5
GPIO[25]
R3
GPIO[27]
T3
GPIO[28]
AF19
CLKRUN#
AF20
GPIO[33]
AC18
GPIO[34]
U5
WAKE#
AB20
SERIRQ
AC20
THRM#
AF21
VRMPWRGD
E10
CLK14
A27
CLK48
V6
SUSCLK
T4
SLP_S3#
T5
SLP_S4#
T6
SLP_S5#
AA1
PWROK
AE20
DPRSLPVR
V2
BATLOW#
U1
PWRBTN#
V5
LAN_RST#
Y3
RSMRST#
3D3V_S5
12
12
R226
100KR2
ECSMI#
ECSCI#
ECSWI#
HM1-SB To avoide leakage current
R502 100KR2
12
6
5
ICH6M
R503 100KR2
D12
CH731U-U
U35C
GPIO
OC[5]#/GPI[10] OC[6]#/GPI[14] OC[7]#/GPI[15]
USB
POWER MGT CLOCKS
DMI_ZCOMP DMI_IRCOMP OC[4]#/GPI[9]
1
2
34
D
PERn[1] PERp[1]
PETn[1] PETp[1]
PERn[2] PERp[2]
PETn[2] PETp[2]
PERn[3] PERp[3]
PETn[3] PETp[3]
PCI-EXPRESSDirect Media Interface
PERn[4] PERp[4]
PETn[4] PETp[4]
DMI[0]RXN
DMI[0]RXP DMI[0]TXN DMI[0]TXP
DMI[1]RXN
DMI[1]RXP DMI[1]TXN DMI[1]TXP
DMI[2]RXN
DMI[2]RXP DMI[2]TXN DMI[2]TXP
DMI[3]RXN
DMI[3]RXP DMI[3]TXN DMI[3]TXP
DMI_CLKN
DMI_CLKP
OC[0]# OC[1]# OC[2]# OC[3]#
USBP[0]N USBP[0]P USBP[1]N USBP[1]P USBP[2]N USBP[2]P USBP[3]N USBP[3]P USBP[4]N USBP[4]P USBP[5]N USBP[5]P USBP[6]N USBP[6]P USBP[7]N USBP[7]P
USBRBIAS#
USBRBIAS
ECSMI#_KBC 31
ECSCI#_KBC 31
ECSWI#_KBC 31
D
E
PCIE AC coupling caps
H25 H24
PCIE_TXN0_RSATA0_R0
G27
PCIE_TXP0_R
G26 K25
K24 J27 J26
M25 M24 L27 L26
P24 P23 N27 N26
T25 T24 R27 R26
V25 V24 U27 U26
Y25 Y24 W27 W26
AB24 AB23 AA27 AA26
AD25 AC25
F24 F23 C23
D23 C25 C24
C27 B27 B26 C26
C21 D21 A20 B20 D19 C19 A18 B18 E17 D17 B16 A16 C15 D15
USB_PN7
A14
USB_PP7
B14 A22
B22
Place within 500 mils of ICH
USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7
USB_OC#0
USB_OC#1 USB_OC#2 USB_OC#3
DMI_RXN0 7 DMI_RXP0 7 DMI_TXN0 7 DMI_TXP0 7
DMI_RXN1 7 DMI_RXP1 7 DMI_TXN1 7 DMI_TXP1 7
DMI_RXN2 7 DMI_RXP2 7 DMI_TXN2 7 DMI_TXP2 7
DMI_RXN3 7 DMI_RXP3 7 DMI_TXN3 7 DMI_TXP3 7
CLK_PCIE_ICH# 3 CLK_PCIE_ICH 3
DMI_IRCOMP_R
USB_PN0 13 USB_PP0 13 USB_PN1 13 USB_PP1 13 USB_PN2 26 USB_PP2 26 USB_PN3 30 USB_PP3 30 USB_PN4 30 USB_PP4 30 USB_PN5 21 USB_PP5 21 USB_PN6 13 USB_PP6 13
TP27 TP28
USB_RBIAS_PN
need to be within 250 mils of the driver.
PCIE_RXN0 21 PCIE_RXP0 21
C207 SCD1U16V
1 2
C208 SCD1U16V
1 2
Layout Note: PCIE AC coupling caps need to be within 250 mils of the driver.
1D5V_S0
Place within 500 mils of ICH
12
R479 24D9R2F
USB_OC#0 USB_OC#1 USB_OC#3 USB_OC#4 USB_OC#2
3D3V_S5
R156 22D6R2F
1 2
RP3
1 2 3 4 5 6
SRP10K
Intel 22.6 ohm 1%
ICH6-M Strapping Options
REF
FUNCTION
R7F9
No Reboot
R7F8
A16 Swap Override
R7F7
Boot BIOS
Title
Size Document Number Rev A3
Date: Sheet
DEFAULT OPTIONAL OVERRIDE
NO_STUFF
NO_STUFF
NO_STUFF
STUFF
STUFF
STUFF
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
ICH6-M (2 of 4)
Leopard
E
PCIE_TXN0 21 PCIE_TXP0 21
3D3V_S5
10
USB_OC#5
9 8
USB_OC#7
7
USB_OC#6
17 41Monday, February 28, 2005
-4
of
Page 18
A
Layout Note: Place above caps within 100 mils of ICH near F27, P27, AB27
1D5V_S0
12
4 4
3 3
Place within 100 mils of ICH near pin AG5
2 2
1 1
1D5V_S0
Place within 100 mils of ICH
Place within 100 mils of ICH near E26, E27
Place within 100 mils of ICH pin AG10
G32
1 2
GAP-CLOSE-PWR
TC9
DUMMY-ST220U10V-U
Layout Note: IDE decoupling
3D3V_S0
Layout Note: PCI decoupling
3D3V_S0
Place within 100 mils of ICH near pin AG9
1D5V_GPLL_ICH_S0
3D3V_S0
12
C426
SCD1U10V2MX-1
3D3V_S0
12
C236 SCD1U10V2MX-1
A
C252
12
C225
12
DUMMY-SCD1U10V2MX-1
12
1D5V_S0
Place within 100 mils of ICH pin AE1
Intel dummy
Place within 100 mils of ICH pin A13
C409
SCD1U10V2MX-1
SC10U10V5ZY-L
SC10U10V5ZY-L
1D5V_S0
C442
1D5V_S0
DUMMY-SCD1U10V2MX-1
C444
C210
12
SC10U10V5ZY-L
1 2
GAP-CLOSE-PWR
3D3V_S0
3D3V_S5
SCD1U10V2MX-1
12
C424
SCD1U10V2MX-1
1013 -1
12
NO_STUFF NO_STUFF
C445
DUMMY-SCD1U10V2MX-1
12
NO_STUFF NO_STUFF
C238
DUMMY-SCD1U10V2MX-1
C211
1013 -1
1D5V_ICH_S0
SCD01U16V2KX
G37
12
C456
DYSCD1U10V2MX-1
12
C441
12
12
DUMMY-SCD1U10V2MX-1
12
DUMMY-SCD1U10V2MX-1
Place within 100 mils of ICH pin V7
B
12
C209
SCD1U10V2MX-1
12
C237
12
C443
ICH6_VCCLAN3D3V
B
U35E
AA22 F9
VCC1_5_B VCC1_5_A
AA23
VCC1_5_B
AA24
VCC1_5_B
AA25
VCC1_5_B
AB25
VCC1_5_B
AB26
VCC1_5_B
AB27
VCC1_5_B
F25
VCC1_5_B
F26
VCC1_5_B
F27
VCC1_5_B
G22
VCC1_5_B
G23
VCC1_5_B
G24
VCC1_5_B
G25
VCC1_5_B
H21
VCC1_5_B
H22
VCC1_5_B
J21
VCC1_5_B
J22
VCC1_5_B
K21
VCC1_5_B
K22
VCC1_5_B
L21
VCC1_5_B
L22
VCC1_5_B
M21
VCC1_5_B
M22
VCC1_5_B
N21
VCC1_5_B
N22
VCC1_5_B
N23
VCC1_5_B
N24
VCC1_5_B
N25
VCC1_5_B
P21
VCC1_5_B
P25
VCC1_5_B
P26
VCC1_5_B
P27
VCC1_5_B
R21
VCC1_5_B
R22
VCC1_5_B
T21
VCC1_5_B
T22
VCC1_5_B
U21
VCC1_5_B
U22
VCC1_5_B
V21
VCC1_5_B
V22
VCC1_5_B
W21
VCC1_5_B
W22
VCC1_5_B
Y21
VCC1_5_B
Y22
VCC1_5_B
AA6
VCC1_5_A
AB4
VCC1_5_A
AB5
VCC1_5_A
AB6
VCC1_5_A
AC4
VCC1_5_A
AD4
VCC1_5_A
AE4
VCC1_5_A
AE5
VCC1_5_A
AF5
VCC1_5_A
AG5
VCC1_5_A
AA7
VCC1_5_A
AA8
VCC1_5_A
AA9
VCC1_5_A
AB8
VCC1_5_A
AC8
VCC1_5_A
AD8
VCC1_5_A
AE8
VCC1_5_A
AE9
VCC1_5_A
AF9
VCC1_5_A
AG9
VCC1_5_A
AC27
VCCDMIPLL
E26
VCC3_3
AE1
VCCSATAPLL
AG10
VCC3_3
A13
VCCLAN3_3/VCCSUS3_3
F14
VCCLAN3_3/VCCSUS3_3
G13
VCCLAN3_3/VCCSUS3_3
G14
VCCLAN3_3/VCCSUS3_3
A11
VCCSUS3_3
U4
VCCSUS3_3
V1
VCCSUS3_3
V7
VCCSUS3_3
W2
VCCSUS3_3
Y7
VCCSUS3_3
A17
VCCSUS3_3
B17
VCCSUS3_3
C17
VCCSUS3_3
F18
VCCSUS3_3
G17
VCCSUS3_3
G18
VCCSUS3_3
PCIE
SATA
VCCLAN1_5/VCCSUS1_5 VCCLAN1_5/VCCSUS1_5
ICH6M
VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A
COREIDEPCI
VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A
VCCSUS1_5 VCCSUS1_5
VCCSUS1_5
VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A
USB CORE USB
VCC1_5_A VCC1_5_A
VCC1_5_A
PCI/IDE
REF
V5REF_SUS
VCCUSBPLL
VCCSUS3_3
V_CPU_IO V_CPU_IO V_CPU_IO
VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3
VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3
VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3
VCC2_5 VCC2_5
V5REF V5REF
VCCRTC
SCD1U10V2MX-1
U17 U16 U14 U12 U11 T17 T11 P17 P11 M17 M11 L17 L16 L14 L12 L11 AA21 AA20 AA19
AA10 AG19 AG16 AG13 AD17 AC15 AA17 AA15 AA14 AA12
P1 M7 L7 L4 J7 H7 H1 E4 B1 A6
U7 R7
G19 G20
F20 E24 E23 E22 E21 E20 D27 D26 D25 D24
G8 AB18
P7
AA18 A8
F21 A25
A24 AB3
G11 G10
AG23 AD26 AB22
G16 G15 F16 F15 E16 D16 C16
C416
C
12
C417
SCD1U10V2MX-1
12
C438
DUMMY-SCD1U10V2MX-1
NO_STUFF
Place within 100 mils of ICH pin AG13, AG16
C224
SCD1U10V2MX-1
Layout Note: Distribute in PCI section near pin A2-A6 near D1-H1
C435
SCD1U10V2MX-1
ICH_VCC1_5
12
C407
SCD1U10V2MX-1
V2D5S_PCI_IDE
12
C427
SCD1U10V2MX-1
V5REF_S0 V5REF_S5
ICH6_VCCLAN1D5V
C410
SCD1U10V2MX-1
12
C419
SCD1U10V2MX-1
C
1D5V_S0
12
C420
SCD1U10V2MX-1
12
12
Place within 100 mils of ICH pin G10
12
C423
SCD1U10V2MX-1
12
C439
DUMMY-SCD1U10V2MX-1
NO_STUFF NO_STUFF NO_STUFF NO_STUFF NO_STUFF
3D3V_S0
12
C226
SCD1U10V2MX-1
12
C253
SCD1U10V2MX-1
1D5V_ICH_S5
C437
SCD1U10V2MX-1
1D5V_S0
12
C406
SCD1U10V2MX-1
Place both within 100 mils of ICH near D27
G65
1 2
GAP-CLOSE-PWR
Layout Note: Place near AB18
VCCP_GMCH_S0
12
Layout Note: Place near AG23
12
C415
SCD1U10V2MX-1
NO_STUFF NO_STUFF mils of ICH
12
C422
DUMMY-SCD1U10V2MX-1
3D3V_S0
12
C254
SCD1U10V2MX-1
12
2D5V_S0
12
12
C428
SCD1U10V2MX-1
12
C421
DUMMY-SCD1U10V2MX-1
ALL NO_STUFF Caps do not have layout requirements but if layout allows then place next to ICH6
1D5V_ICH_S5 1D5V_S5
12
C440
SCD1U10V2MX-1
1D5V_ICH_S5
12
C418 SCD1U10V2MX-1
3D3V_S5
Place within 100
12
mils of ICH
C218
SCD1U10V2MX-1
C453
SCD1U10V2MX-1
12
C223 SCD1U10V2MX-1
Place within 100
pin A17
D
12
C425
Layout Note: Place near pin AA19
SCD1U10V2MX-1
12
12
C436
DUMMY-SCD1U10V2MX-1
DUMMY-SC22U10V6ZY-U
Layout Note: Place near U7
1D5V_ICH_S0
Place within 100
12
mils of ICH
C217 SCD01U16V2KX
RTC_AUX_S5
Layout Note: Place near AB3
12
12
C454 DUMMY-SCD1U10V2MX-1
3D3V_S5
D
E
C239
*Within a given well, 5VREF needs to be up before the corresponding 3.3V rail
V5REF_S0
V5REF_S5
ICH6_VCCLAN1D5V
Title
Size Document Number Rev A3
Date: Sheet
VCCP_GMCH_S04,5,6,7,9,10,16,36,40,41
5V_S0
3D3V_S0
2 1 12
2 1 12
D8 CH751H-40-U
C235 SCD1U16V
D28 CH751H-40-U
C391 SCD1U16V
12
2 1
12
5V_S53D3V_S5
12
12
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
ICH6-M (3 of 4)
Leopard
E
3D3V_S03,5,7,9,11,13,14,16,17,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41 3D3V_S517,19,21,25,29,31,35,37,39,40
5V_S013,14,19,20,21,23,27,28,29,32,36,39,40,41 1D5V_S05,7,9,17,21,38,39,41 1D5V_S539 2D5V_S07,9,15,40
VCCP_GMCH_S0
D11 CH751H-40-U
R189 100R2
Intel 10 ohm
C234 SC1U10V3ZY
SB-17-01
R480 10R2
Intel 10 ohm
C408 SC1U10V3ZY
SB-17-01
1D5V_S0
18 41Monday, February 28, 2005
of
3D3V_S0 3D3V_S5 5V_S0 1D5V_S0 1D5V_S5 2D5V_S0
-4
Page 19
A
hexainf@hotmail.com GRATIS - FOR FREE
4 4
3 3
2 2
SMBUS(ICH6 ---> SODIMM,CLKGEN)
3D3V_S0
SMB_ICH_CTL
U32
5 6
2N7002DW
SC 0630
3D3V_S0
34 2 1
2
14
3
PUMA SC
3D3V_S5
2
14
3
RN32 SRN10KJ
1 1
SMB_CLK17,21
SMB_DATA17,21
A
RN31 SRN4D7KJ
B
SMBD_ICH 3,11
SMBC_ICH 3,11
B
C
PUMA SC
5V_S0
U61A
PLT_RST#
147
1 2
3
TSAHCT32
RSTDRV#_R
PCIRST# 3V to 5V level shift for HDD & CDROM
3D3V_S0
U37B
147
4
PLT_RST#17
ICH_PCIRST#17
5
3D3V_S0
9
10
TSLCX08-U
U37C
147
TSLCX08-U
6
ICH_PCIRST#_R
8
PCIRST# Buffer to enhance the driving strength
C
R511 33R2
1 2
PLT_RST#_R
R187
1 2
33R2
ICH6 asserts PLTRST# to reset devices on the platform.
R188
1 2
33R2
Secondary PCI Bus reset signal.
D
3D3V_S03,5,7,9,11,13,14,16,17,18,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41
3D3V_S517,18,21,25,29,31,35,37,39,40
5V_S013,14,18,20,21,23,27,28,29,32,36,39,40,41
RSTDRV#_5 21
PLT_RST1# 7,21
PCIRST1# 22,23,25,29,31
D
3D3V_S0
3D3V_S5
5V_S0
Title
Size Document Number Rev A3
Date: Sheet
W25 W24 W23
M27 M26 M23 M16 M15 M14 M13 M12
E27 Y27
Y26 Y23
V27 V26 V23 U25 U24 U23 U15 U13
T27 T26 T23 T16 T15 T14 T13 T12
R25 R24 R23 R17 R16 R15 R14 R13 R12 R11 P22 P16 P15 P14 P13 P12
N17 N16 N15 N14 N13 N12 N11
L25 L24 L23 L15 L13
K27 K26 K23
J25 J24 J23 H27 H26 H23
G21 G12
VSS
Y6
VSS VSS VSS VSS
W7
VSS VSS VSS VSS
W1
VSS
V4
VSS VSS VSS VSS VSS VSS VSS VSS VSS
T7
VSS VSS VSS VSS VSS VSS VSS VSS VSS
T1
VSS
R4
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
N7
VSS VSS VSS VSS VSS VSS VSS VSS
N1
VSS
M4
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
K7
VSS VSS VSS VSS
K1
VSS
J4
VSS VSS VSS VSS VSS VSS VSS
G9
VSS
G7
VSS VSS VSS
G1
VSS
ICH6-M (4 of 4)
Leopard
E
U35D
F4
VSS
F22
VSS
F19
VSS
F17
VSS
E25
VSS
E19
VSS
E18
VSS
E15
VSS
E14
VSS
D7
VSS
D22
VSS
D20
VSS
D18
VSS
D14
VSS
D13
VSS
D10
VSS
D1
VSS
C4
VSS
C22
VSS
C20
VSS
C18
VSS
C14
VSS
B25
VSS
B24
VSS
B23
VSS
B21
VSS
B19
VSS
B15
VSS
B13
VSS
AG7
VSS
AG3
VSS
AG22
VSS
VSS
AG20
VSS
AG17
VSS
AG14
VSS
AG12
VSS
AG1
VSS
AF7
VSS
AF3
VSS
AF26
VSS
AF12
VSS
AF10
VSS
AF1
VSS
AE7
VSS
AE6
VSS
AE25
VSS
AE21
VSS
AE2
VSS
AE12
VSS
AE11
VSS
AE10
VSS
AD6
VSS
AD24
VSS
AD2
VSS
AD18
VSS
AD15
VSS
AD10
VSS
AD1
VSS
AC6
VSS
AC3
VSS
AC26
VSS
AC24
VSS
AC23
VSS
AC22
VSS
AC12
VSS
AC10
VSS
AB9
VSS
AB7
VSS
AB2
VSS
AB19
VSS
AB10
VSS
AB1
VSS
AA4
VSS
AA16
VSS
AA13
VSS
AA11
VSS
A9
VSS
A7
VSS
A4
VSS
A26
VSS
A23
VSS
A21
VSS
A19
VSS
A15
VSS
A12
VSS
A1
VSS
ICH6M
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
19 41Monday, February 28, 2005
E
-4
of
Page 20
A
5V_S0 5V_G768_S0
4 4
G8
1 2
GAP-CLOSE-PWR
SC1000P50V
EC12
12
Close to G768D
12
12
BC5
BC7
DUMMY-SC10U10V6ZY-U
SCD1U16V
RUNPWROK
Put these two Caps near the thermal diode.
3 3
THERMDP2
THERMDNTHERMDN
THERMDP1
BC1
DUMMY-SC470P50V3JN
BC4 SC2K2P
1 2
VGATE36
VCCP_PWGD38
THERMDP2
BC9
DUMMY-SC470P50V3JN
THERMDN
3 2
Q5
1
MMBT3904-U1
SYSTEM SENSOR
THERMDP1
12
BC8 SC2K2P
THERMDP1/DP2/THERMDN ON THE SAME LAYER W/S = 10/5 MIL, 12 MIL AWAY FROM OTHERS
2 2
CAPS CLOSE TO G768B
180 ms after VCC_G768 > 4.38v, p2, 7
5V_S0
12
R435
FAN1
5
FAN_FB
3 2
VCC_FAN
1 4
ETY-CON3-S1
1 1
The symbol use 2nd source The P/N is the main source Main source:20.D0152.103 2nd source:20.D0012.103
10KR2
D26
S1N4148-U
1 2
A
BC65 SC10U10V6ZY-U
12
BC66 SCD1U16V
12
BC67 SCD1U16V
THERMDP14
THERMDN4
R32 10KR2
RUNPWROK
B
Reserve for G768B works at High Speed
VCC_FAN
THERMDP2
1 2
R31 4K7R2
12
SD 0817
R532
1 2
0R2-0 R533
1 2
0R2-0
SMBC_KBC31
B
12 13
G768_RST#
CLK_PWRGD#3,36
3D3V_S0
147
SMBD_KBC31
5V_G768_S0
SD 0817
U37D
TSLCX08-U
U6
1
OUT1
2
VCC
3
DXP1
4
DXN
5
DXP2
6
RESET#
7
GND
8
GND
G768D
74.00768.A79
PWROK 7
VRM_PWRGD 17
11
PUMA SC
16
OUT2
15
VCC
14
SMBCLK
13
FG2
12
SMBDATA
11
ALERT#
10
FG1
9
CLK
SD 0817
U65
1
NC
2
A
3 4
GND Y
DummyNC7S14-U
ICH6_PWROK 17
C
SMBC_G768D SMBD_G768D
FAN_FB
VCC
C
5
3D3V_S0
VRM_PWRGD
RN1 SRN10KJ
CLK32_G768 31
5V_S0
2
14
3
SMBD_G768D
SMBC_G768D
PM_THRM# 17
3D3V_AUX
12
R47 10KR2
SD 0727
D
R47:5K SET TO 120°C Must close to MAX6509
1015-1
12
3
D3
DummyBAT54-1
1
2
12
BC6 DummySCD1U16V
D
M6509_SET
R19 22KR3F
E
3D3V_S03,5,7,9,11,13,14,16,17,18,19,21,22,23,24,25,27,29,30,31,32,36,38,40,41
3D3V_S517,18,19,21,25,29,31,35,37,39,40
3D3V_AUX16,31,32,34,35,36,37
5V_S013,14,18,19,21,23,27,28,29,32,36,39,40,41
5V_S514,18,36,38
U4
1
SET
2
GND
3 4
OUT# HYST
MAX6509HAUK-T-U
VCC
5
5V_S5
12
C30 SCD1U25V3KX
Put under CPU Socket
RSMRST# 16,31,39
U13
1
A
VCC
S5_ENABLE31
Title
Size Document Number Rev
A3
Date: Sheet
2
B
3 4
GND Y
NC7S08-U
G768D
Leopard
3D3V_AUX
5
1999_S5ENABLE 37,38
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
20 41Monday, February 28, 2005
E
of
3D3V_S0
3D3V_S5
3D3V_AUX
5V_S0
5V_S5
-4
Page 21
A
hexainf@hotmail.com GRATIS - FOR FREE
HDD Connector
IDE_D[15..0]16
IDE_D8 IDE_D9 IDE_D10
5V_S0
IDE_D11 IDE_D12 IDE_D13 IDE_D14 IDE_D15
DIAG
4 4
HDDCSEL1
12
R400
470R2
3 3
IDE_A216
IDE_CS#116
C354
SCD1U16V
HDD1
47 45
2
1
4
3
6
5
8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44
SPD-CONN44D-3-U1
20.F0362.044
7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 46 48
C353
12
12
SC10U10V5ZY-L
1013 -1
NEWCARD Connector
Place them Near to Chip Place them Near to Connector
3D3V_S5 1D5V_S0 3D3V_NEW_LAN_S53D3V_NEW_S0 1D5V_NEW_S0
12
C216
12
C215
2 2
1013 -1
C232
12
SC10U10V5ZY-L
PBRSTDRV1#_5 IDE_D7
IDE_D6 IDE_D5 IDE_D4 IDE_D3 IDE_D2 IDE_D1 IDE_D0
PBIDDACK#
1015 -1
21
D25 DummySSM24L-U
C231
12
SCD1U16V
B
IDE_DREQ 16 IDE_IOW# 16 IDE_IOR# 16
C221
12
1013 -1
SC 0712
Delete R138
RSTDRV#_5 19
R425
DUMMY-4K7R2
R424 0R2-0
1 2
IDE_A1 16 IDE_A0 16 IDE_CS#0 16
SC10U10V5ZY-L
SB-20-01
12
C220
3D3V_S0
12
R421 4K7R2
HDD_LED#
SCD1U16V
5V_S0
12
3D3V_S0
12
C219 SCD1U16V
C
R423 10KR2
R422
2
CD_AUDR27
5V_S0
5V_S0
12
TP35
BC38 SC10U10V6ZY-U
IDE_D8 IDE_D9 IDE_D10 IDE_D11 IDE_D12 IDE_D13 IDE_D14 IDE_D15 IDE_DREQ IDE_IOR#
IDE_DACK# BAY_ID0 DIAG IDE_A2 IDE_CS#1
12
R401 4K7R2
IDE_IORDY 16 IDE_DACK# 16 IDE_IRQ14 16
HDD_LED# 14
5V_S0
1 2 12
DUMMY-2K7R2J
SKT3
1
3 4
CARD-SKT21-U1
D
CDROM
2 4
6
8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46
C258
48
12
50
SCD1U16V
PIN 49,50 DON'T USE
CN16
SYN-CONN50-4R1U1
The symbol use 2nd source The P/N is the main source Main source:20.10150.050 2nd source:20.B0040.050
51 MH1 1
3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 MH2 52
RSTDRV#_5 IDE_D7 IDE_D6 IDE_D5 IDE_D4 IDE_D3 IDE_D2 IDE_D1 IDE_D0
IDE_IOW# IDE_IORDY IDE_IRQ14 IDE_A1 IDE_A0 IDE_CS#0
CSEL
CDROM_CSEL
IDE_IRQ14
3D3V_LAN_S525,41
CD_AUDL 27 CD_AGND 27
CDROM_LED# 14
5V_S0
1 2
R229 8K2R2
E
1 2 12
3D3V_S0 3D3V_LAN_S5 5V_S0 1D5V_S0
R230 10KR2
R196 DUMMY-R2
3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,22,23,24,25,27,29,30,31,32,36,38,40,41
5V_S013,14,18,19,20,23,27,28,29,32,36,39,40,41
1D5V_S05,7,9,17,18,38,39,41
5V_S0
3D3V_S0
For Newcard socket
DUMMY-SCD1U16V
DUMMY-SCD1U16V
3D3V_S5
U34
1D5V_S0
1D5V_NEW_S0
3D3V_S0
3D3V_NEW_S0
TP-2
TP26
NEWCARD_OC#
3D3V_S5
1 1
3D3V_NEW_LAN_S5
PERST#
19 18
17 16
5 6
7 8
23 24 21
9
20
TPS2231
A
CPUTSB#
1.5VIN
1.5VIN
1.5VOUT
1.5VOUT
SYSRST#
3.3VIN
3.3VIN
3.3VOUT
3.3VOUT OC# NC#24
3.3VAUX_IN PERST# AUX_OUT
RCLKEN
CPPE#
STBY#
SHDN#
NC#1 NC#10 NC#12 NC#13
GND GND
CPUSB#
14
CPPE#
15 4 3
TPS2231_RST#
2 22
1 10 12 13
11 25
NEWCARD_RST#17
PLT_RST1#7,19
1 2
R183 0R2-0
SD 0809
RN30
2 1 4
SRN100KJ
PLT_RST1#
SD 0817
PREQ2# 3
CPPE#
3
CPUSB#
PM_SLP_S3# 17,28,31,37,38,40 PM_SLP_S4# 17,31,37,38
1223 -3
Q30 2N7002
D
CONN_CLKREQ#
1
G
S
2 3
0218 -3
U68
1
A
2
B
3 4
GND Y
DummyNC7SZ08-U
B
VCC
5
3D3V_S5
TPS2231_RST#
3D3V_S0
12
R569 10KR2
PCIE_WAKE#17
PCIE_RXP017 PCIE_RXN017
SMB_DATA17,19 SMB_CLK17,19
PUMA SC
PCIE_TXP017
PCIE_TXN017
CLK_PCIE_NEW3
CLK_PCIE_NEW#3
CPPE#17
3D3V_NEW_S0
3D3V_NEW_LAN_S5
1D5V_NEW_S0
USB_PP517 USB_PN517
C
TP65
TP66 TP61
PCIE_RXP0_R PCIE_RXN0_R
CONN_CLKREQ#
PERST# CONN_WAKE#
SMB_DATA_C SMB_CLK_C CONN_TP2 CONN_TP3 CPUSB#
MH2
MH1
26 25 24
23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4
3 2
1
CN14
SMBUS(ICH6--NEWCARD,LAN)
Title
JAE-CON26-U
D
Size Document Number Rev
A3
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
HDD / CDROM/NEWCARD
Leopard
21 41Monday, February 28, 2005
E
-4
Page 22
A
U39A
3D3V_S0
W3
VCCP VCCP
AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
C/BE0# C/BE1# C/BE2# C/BE3#
PAR FRAME# TRDY# IRDY# STOP# DEVSEL# IDSEL PERR# SERR# REQ# GNT# PCLK PRST# GRST# RI_OUT#/PME#
SUSPEND# DATA
CLOCK LATCH SPKROUT
B_USB_EN A_USB_EN
SDA SCL
NC RSVD TEST0
RSVD RSVD RSVD RSVD RSVD RSVD RSVD
PCI7411
U1-1
CARD BUS
U1-10
U1-5
MS_SDIO(DATA0)/SD_DAT0/SM_D0
U1-6
U1-9
UNUSED TERMINALS
PCI_AD[31..0]13,17,25,29
4 4
3 3
2 2
1 1
12
PCI_FRAME#17,25,29
PCI_DEVSEL#17,25,29
3D3V_S0
R236 150R2
PCI_C/BE#017,25,29 PCI_C/BE#117,25,29 PCI_C/BE#217,25,29 PCI_C/BE#317,25,29
PCI_PAR17,25,29
PCI_TRDY#17,25,29
PCI_IRDY#17,25,29 PCI_STOP#17,25,29
PCI_AD22
PCI_PERR#17,25,29 PCI_SERR#17,25,29 PCI_REQ#117
PCI_GNT#117 PCLK_PCM3
PCIRST1#19,23,25,29,31
3D3V_S0
CB_DATA23
CB_CLOCK23
CB_LATCH23
PCI_SPKR27
TP82
R211 10KR2
R233 10KR2
1 2 1 2
R234 10KR2
3D3V_S0
TP85
TP84
TP86
TP37
1 2
R210 100R2
1 2
7421_PME#
CS_SUSPEND#
B_USB_EN A_USB_EN
PCI7421_TP1
PCI7421_TP2 PCI7421_TP3
PCI7421_TP5
PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0
CS_IDSEL
W10
V10 U10 R10 N10 V11 U11 R11
W12
V12 U12 N11
W13 W11
W17
P12
U2 V1 V2 U3
W2
V3 U4 V4 V5 U5 R6 P6
W6
V6 U6 R7 V9 U9 R9 N9
W9 W7 W4
P9 V7 R8 U7
W8
N8
W5
V8 U8 U1 T2 P5 R3 T1 T3
R2 N1
L6 N2 L7
E1 E2
M2 M3
T19
L5 L2 K5 K3 K7 L1 L3
B
U1-7
VDPLL_33
VSPLL_33
VDPLL_15
VSPLL_15
1394
U1-8
MS_CLK/SD_CLK/SM_EL_WP#
SD/SDIO
PHY_TEST_MA
PC0(TEST1) PC1(TEST2) PC2(TEST3)
MC_PWR_CTRL_0 MC_PWR_CTRL_1
MS_BS/SD_CMD/SM_WE#
MS_DATA3/SD_DAT3/SM_D3 MS_DATA2/SD_DAT2/SM_D2 MS_DATA1/SD_DAT1/SM_D1
SD_CLK/SM_RE#/SC_GPIO1
SD_CMD/SM_ALE/SC_GPIO2
SD_DAT0/SM_D4/SC_GPIO6 SD_DAT1/SM_D5/SC_GPIO5 SD_DAT2/SM_D6/SC_GPIO4 SD_DAT3/SM_D7/SC_GPIO3
SD_WP/SM_CE
SM_CLE/SC_GPIO0
SM_R#/B#/SC_RFU
SM_PHYS_WP#/SC_FCB
MFUNC0 MFUNC1 MFUNC2 MFUNC3 MFUNC4 MFUNC5 MFUNC6
CLK_48
AVDD AVDD AVDD
TPBIAS0
TPA0P TPA0N
TPB0P TPB0N
CPS CNA
AGND AGND AGND
TPBIAS1
TPA1P TPA1N
TPB1P TPB1N
SD_CD# MS_CD# SM_CD#
R0 R1
XO
XI
N3
PCM_INTB#
M5 P1 P2 P3
CB_MFUNC5
N5 R1
M1
R13 R14 V17
VDPLL_33
V19 P14
T18 T17
1394_R0
U18
1394_R1
U19 U15 V15
W15 V14
W14
1394_PHYTEST
R17
1394_CPS
M11
1394_CNA
P15 R19
R18
PC[2:0]=000
R12 U13 V13
N12 U14 U16
U17 V18
W18 V16
W16
F1 F2
E3 F5 F6 G5 F3
H5 G3 G2
G1 J5 J3
H3 J6 J1 J2
H7 J7 K1 K2
INT_PIRQG#
VDPLL_15
1 2
R198 6K34R3F
1 2 1 2
SB-21-02
1394_XO 1394_XI
1394_TPBIAS1
1394_TPB1P 1394_TPB1N
MC_PWR_CTRL-1
R570
1 2
0R2-0
R237 0R2-0
1 2
SB-21-02
CLK48_CARDBUS 3
3D3V_PLL_S0
R2324K7R2 R2314K7R2
X2 X-24D576M-2
1 2
1394_TPA1P 26 1394_TPA1N 26
SD_CD# 24 MS_CD# 24 SM_CD# 24
MS_BS 24
MS_D3 24 MS_D2 24 MS_D1 24
MS_SDIO 24 SM_RE# 24 SM_ALE 24
SM_D4 24 SM_D5 24 SM_D6 24 SM_D7 24
SD_WP 24 SM_CLE 24 SM_R/B# 24
INTA# CARBUS 1 INTB# NONE INTC# 1394 INTD# CARD READER
1 2
C243
1 2
SC12P
C259
1 2
SC15P
TP36 TPAD30
MS_CLK 24
C
INT_PIRQG# 17 INT_PIRQF# 17
PCI_SERIRQ 17,29,31 7421_LED 14
PM_CLKRUN# 17,25,29,31
2/10 HM1-SC TI Ref. schematic
C242 SCD1U16V
1394_TPBIAS0 26 1394_TPA0P 26
1394_TPA0N 26 1394_TPB0P 26
1394_TPB0N 26
3D3V_S0
SD 0813
12
C240 SCD1U16V
MC_PWR_CTRL#
MS/MS_pro
SM
D
3D3V_S0
* All 1394 signals must be routed on top side only * Differential pairs of each ports should have equal trace length * Stubs must be keep as short as possible
1394_TPBIAS1 26
1394_TPB1P 1394_TPB1N
XD
1394_TPB1P 26 1394_TPB1N 26
SD MS/MS_pro
SD_CD#
SM_CD#
1
2
D9
BAW56-1
3D3V_S0
1 2
3
Bypass/Decupoling Capacitors Should be places as close to PCI7421 as possible
3D3V_S0
C270
C269
3D3V_S0
12
34
12
12
12
R184 10KR2
2
5
C247
SCD1U16V
C271 SCD1U16V
C228
SC10U10V5ZY-L
1
6
U36 2N7002DW
7421_LED
12
DUMMY-SC1000P50V
3D3V_S0
12
SC1000P50V
G34
1 2
GAP-CLOSE-PWR
MC_PWR_CTRL#
R180 100KR2
E
12
C248 SCD1U16V
12
C260 DUMMY-SCD1U16V
12
C229
SC1000P50V
3D3V_S0
12
R182 10KR2
3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,23,24,25,27,29,30,31,32,36,38,40,41
12
C249
DUMMY-SCD1U16V
12
C261
DUMMY-SCD1U16V
3D3V_PLL_S03D3V_S0
12
C227 SC1U10V3KX
SB-21-01
MC_PWR_CTRL 24
3D3V_S0
7411:71.07411.00U 7421:71.07421.00U
A
B
HM1-SE TI update sepc.
Title
Size Document Number Rev A3
C
D
Date: Sheet
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
TI SNC1Q21 (1 of 2)
Leopard
22 41Monday, February 28, 2005
E
-4
of
Page 23
A
hexainf@hotmail.com GRATIS - FOR FREE
VCC_ASKT_S0
4 4
3 3
2 2
1 1
U39B
A_CAD31/A_D10
A_CAD30/A_D9 A_CAD29/A_D1 A_CAD28/A_D8 A_CAD27/A_D0 A_CAD26/A_A0 A_CAD25/A_A1 A_CAD24/A_A2 A_CAD23/A_A3 A_CAD22/A_A4 A_CAD21/A_A5 A_CAD20/A_A6
A_CAD19/A_A25
A_CAD18/A_A7 A_CAD17/A_A24 A_CAD16/A_A17
A_CAD15/A_IOWR#
A_CAD14/A_A9
A_CAD13/A_IORD#
U1-2
CARDBUS A
A_CSTSCHG/A_BVD1(STSCHG#/RI#)
A_CAD12/A_A11 A_CAD11/A_OE#
A_CAD10/A_CE2#
A_CAD9/A_A10
A_CAD8/A_D15
A_CAD7/A_D7
A_CAD6/A_D13
A_CAD5/A_D6
A_CAD4/A_D12
A_CAD3/A_D5
A_CAD2/A_D11
A_CAD1/A_D4 A_CAD0/A_D3
A_CC/BE3#/A_REG#
A_CC/BE2#/A_A12
A_CC/BE1#/A_A8
A_CC/BE0#/A_CE1#
A_CPAR/A_A13
A_CFRAME#/A_A23
A_CTRDY#/A_A22
A_CIRDY#/A_A15
A_CSTOP#/A_A20
A_CDEVSL#/A_A21
A_CBLOCK#/A_A19
A_CPERR#/A_A14
A_CSERR#/A_WAIT#
A_CREQ#/A_INPACK#
A_CGNT#/A_WE#
A_CCLKRUN/A_WP(IOIS16#)
A_CCLK/A_A16
A_CINT#/A_READY(IREQ#)
A_CRST#/A_RESET
A_CAUDIO/A_BVD2(SPKR#)
A_CCD1#/A_CD1# A_CCD2#/A_CD2#
A_CVS1/A_VS1# A_CVS2/A_VS2#
A_RSVD/A_D14
A_RSVD/A_D2
A_RSVD/A_A18
PCI7411
A
VCCA VCCA
A5 A11
D1 C1 D3 C2 B1 B4 A4 E6 B5 C6 B6 G9 C7 B7 A7 A10 E11 G11 C11 B11 C12 B12 A12 E12 C13 F12 A13 C14 E13 A14 B14 E14
C5 F9 B10 G12
G10 C8
A8 B8 A9 C9 E10
F10 B3
E7 B9
B2 C3 E9
C4 A6
A2 C15
E5 A3 E8
B13 D2 C10
C448
1 2
SCD01U16V2KX
CBB_D10 24 CBB_D9 24 CBB_D1 24 CBB_D8 24 CBB_D0 24 CBB_A0 24 CBB_A1 24 CBB_A2 24 CBB_A3 24 CBB_A4 24 CBB_A5 24 CBB_A6 24 CBB_A25 24 CBB_A7 24 CBB_A24 24 CBB_A17 24 CBB_IOWR# 24 CBB_A9 24 CBB_IORD# 24 CBB_A11 24 CBB_OE# 24 CBB_CE2# 24 CBB_A10 24 CBB_D15 24 CBB_D7 24 CBB_D13 24 CBB_D6 24 CBB_D12 24 CBB_D5 24 CBB_D11 24 CBB_D4 24 CBB_D3 24
CBB_REG# 24 CBB_A12 24 CBB_A8 24 CBB_CE1# 24
CBB_A13 24 CBB_A23 24
CBB_A22 24 CBB_A15 24 CBB_A20 24 CBB_A21 24 CBB_A19 24
CBB_A14 24 CBB_WAIT# 24
CBB_INPACK# 24 CBB_WE# 24
CBB_BVD1# 24 CBB_WP 24 CBB_A16 24
CBB_RDY 24 CBB_RESET 24
CBB_BVD2# 24 CBB_CD1# 24
CBB_CD2# 24 CBB_VS1# 24 CBB_VS2# 24
CBB_D14 24 CBB_D2 24 CBB_A18 24
B
U39C
B_CAD31/B_D10
B_CAD30/B_D9 B_CAD29/B_D1 B_CAD28/B_D8 B_CAD27/B_D0
B_CAD26/B_A0 B_CAD25/B_A1 B_CAD24/B_A2 B_CAD23/B_A3 B_CAD22/B_A4 B_CAD21/B_A5 B_CAD20/B_A6
B_CAD19/B_A25
U1-3
CARDBUS B
B_CSTSCHG/B__BVD1(STSCHG#/RI#)
B
B_CAD18/B_A7 B_CAD17/B_A24 B_CAD16/B_A17
B_CAD15/B_IOWR#
B_CAD14/B_A9
B_CAD13/B_IORD#
B_CAD12/B_A11
B_CAD11/B_OE#
B_CAD10/B_CE2
B_CAD9/B_A10
B_CAD8/B_D15
B_CAD7/B_D7
B_CAD6/B_D13
B_CAD5/B_D6
B_CAD4/B_D12
B_CAD3/B_D5
B_CAD2/B_D11
B_CAD1/B_D4 B_CAD0/B_D3
B_CC/BE3#/B_REG#
B_CC/BE2#/B_A12
B_CC/BE1#/B_A8
B_CC/BE0#/B_CE1#
B_CPAR/B_A13
B_CFRAME#/B_A23
B_CTRDY#/B_A22
B_CIRDY#/B_A15
B_CSTOP#/B_A20 B_CDEVSL#/B_A21 B_CBLOCK#/B_A19
B_CPERR#/B_A14
B_CSERR#/B_WAIT
B_CREQ#/B_INPACK#
B_CGNT#/B_WE#
B_CCLKRUN#/B_WP(IOIS16
B_CCLK/B_A16
B_CINT#/B_READY(IREQ#)
B_CRST#/B_RESET
B_CAUDIO/B_BVD2(SPKR#)
B_CCD1#/B_CD1# B_CCD2#/B_CD2#
B_CVS1/B_VS1# V_CVS2/B_VS2#
B_RSVD/B_D14
B_RSVD/B_D2
B_RSVD/B_A18
PCI7411
VCCB VCCB
D19 K19
B15 A16 B16 A17 C16 D17 C19 D18 E17 E19 G15 F18 H14 H15 G17 K17 L13 K18 L15 L17 L18 L19 M17 M14 M15 N19 N18 N15 M13 P18 P17 P19
F15 G18 K14 M18
K13 G19
H17 J13 J17 H19 J19
J18 B18
E18 J15
F14 A18 H18
B19 F17 C17
N13 B17 C18 F19
N17 A15 K15
C
D
E
3D3V_S0
3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,24,25,27,29,30,31,32,36,38,40,41
5V_S013,14,18,19,20,21,27,28,29,32,36,39,40,41
5V_S0
Power switch
VCC_ASKT_S0VPP_ASKT_S0
9 10
8
15
23 22 19 18 17 16 14 6
E
12
VCC_ASKT_S0
23 41Monday, February 28, 2005
C433 SC4D7U10V5ZY
VPP_ASKT_S0
of
-4
12
C450
CB_DATA22
CB_CLOCK22
CB_LATCH22
PCIRST1#19,22,25,29,31
1 2
12
C447 SCD1U16V
M19 H1
H2
SCD1U16V
12
C446 SC1U10V3ZY
PT_PORT VR_PORT
12
C263
SCD1U16V
PUMA SC
PCIRST1#
12
C451 DYSC100P50V2JN
5V_S0
3D3V_S0
C452
12
3D3V_S0
C
DUMMY-SC4D7U10V5ZY
SCD1U16V
H8
H9 H10 H11 H12
J8
M7
J12
M9 M10 M12
K8
K12
N7
G7
G8
G13 H13
J9 J10 J11
K9 K10 K11
L8
L9 L10 L11 L12
M8
U39D
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
PCI7411
12
C434
VR_PORT VR_PORT
U1-4
D
R498 10KR2
5V_S0
VR_EN#
POWER TERMINALS
12
R497 100KR2
3 4 5
PS_SHDN#
12
C262
Title
Size Document Number Rev A3
Date: Sheet
12 21
13
1 2 24
7
20
11 25
SCD1U16V
12
C449 SCD1U16V
U60
DATA CLOCK LATCH RESET# SHDN#
3.3V
5V 5V NC
12V 12V
GND GND
TSP2220A
AVCC AVCC
AVPP
OC#
NC NC NC NC NC NC NC NC
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
TI PCI7411 GHK (2 of 2)
Leopard
Page 24
A
PCMCIA Socket
4 4
CBB_D3 CBB_D4
CBB_D11 CBB_D5 CBB_D12 CBB_D6 CBB_D13 CBB_D7 CBB_D14
CBB_D15
VCC_ASKT_S0
12
C431
12
C429 SCD1U16V
CBB_D0 CBB_D8 CBB_D1 CBB_D9 CBB_D2 CBB_D10
12
SB-23-01
3 3
C432
SC22U10V6ZY-U
2 2
VPP_ASKT_S0
CBB_A16
SC1000P50V
12
C430 SCD1U16V
12
R186 DUMMY-R2
Place close to pin 19.
12
C233 DUMMY-C2
Clock AC termination 33MHz clock for 32-bit
Cardbus card I/F
1 1
CBB_A10
CBB_A11 CBB_A9 CBB_A8
CBB_A17 CBB_A13 CBB_A18 CBB_A14 CBB_A19
CBB_A20 CBB_A21
CBB_A16 CBB_A22 CBB_A15 CBB_A23 CBB_A12 CBB_A24 CBB_A7 CBB_A25 CBB_A6
CBB_A5 CBB_A4 CBB_A3 CBB_A2 CBB_A1 CBB_A0
CBB_CD1#
CBB_CE1#
CBB_CE2# CBB_OE# CBB_VS1#
CBB_IORD# CBB_IOWR#
CBB_WE# CBB_RDY
CBB_VS2# CBB_RESET CBB_WAIT# CBB_INPACK# CBB_REG# CBB_BVD2# CBB_BVD1#
CBB_WP CBB_CD2#
B
69
1
35
2
36
3
37
4
38
5
39
6
40
7
41
8
42
9 43 10 44 11 45 12 46 13 47 14 48 15 49 16 50 17 51 18 52 19 53 20 54 21 55 22 56 23 57 24 58 25 59 26 60 27 61 28 62 29 63 30 64 31 65 32 66 33 67 34 68
70
SKT1
1 2 3 4
CARDBUS-SKT45-U1
CBUS1
CARDBUS68P-9
62.10024.491
VCC_ASKT_S0
12
12
C250 SCD01U16V3KX
Cardbus I/F
CBB_D[0..15] 23 CBB_A[0..25] 23
CBB_IORD# 23 CBB_IOWR# 23 CBB_OE# 23 CBB_WE# 23 CBB_REG# 23 CBB_RDY 23 CBB_WP 23 CBB_RESET 23 CBB_WAIT# 23 CBB_INPACK# 23
CBB_CE1# 23 CBB_CE2# 23 CBB_BVD1# 23 CBB_BVD2# 23 CBB_CD1# 23 CBB_CD2# 23 CBB_VS1# 23 CBB_VS2# 23
R212 DUMMY-R2
47K
CBB_RESET
3D3V_CR_S0 3D3V_CR_S0
3D3V_CR_S0 3D3V_CR_S0
C
3D3V_CR_S03D3V_CR_S0
12
R562 22KR2J
SM_RE#
12
R565 Dummy22KR2J
SM_ALE
12
R567 22KR2J
SM_R/B# SD_WP
12
12
12
MS_CLK MS_CLK_R
R563 22KR2J
MS_BS
R566 Dummy22KR2J
R568 47KR2
1223 -3
U67
1
A
2
B
3 4
GND SE
DummyNC7SZ66P5X
SM_CD#22
VCC
C359
SCD01U16V2KX
12
C377
MS_SDIO22 MS_D122 MS_D222 MS_D322
SM_D422 SM_D522 SM_D622 SM_D722
1217 -2
MC_PWR_CTRL22
3D3V_S0
5
12
SCD01U16V2KX
MS_SDIO MS_D1 MS_D2 MS_D3
SM_CD#SM_CLE
SD_CD#
D
6 in 1 Connector
3D3V_CR_S0
12
C360
12
C370
SKT2
40
XD-VCC
DY
29 20
9
7
6 12 11
15 14 16 18
33 32 31 21 22 23 24
25 30 34
12
R583
S.M-VCC MS-VCC SD-VCC
SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3
MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3
S.M/XD-D1 S.M/XD-D2 S.M/XD-D3 S.M/XD-D4 S.M/XD-D5 S.M/XD-D6 S.M/XD-D7
S.M-LVD S.M-CD# S.M-D0
DUMMY-R2
SKT-MEMO-9-U1
U30
2
GND
3
NC
4
ON/OFF#
AAT4250-U
74.04250.03F
SCD01U16V2KX
SCD01U16V2KX
R576 33R2
1 2
R577 33R2
1 2
R578 33R2
1 2
R579 33R2
1 2
MS_SDIO
MS_D1 MS_D2 MS_D3
MS_D1 MS_D2
MS_D3 SD_WP SM_D4 SM_D5 SM_D6 SM_D7
Dummy0R2-0
R555
1 2
MS_SDIO
SM-CD-COM
SM-CD-SW
SM-WP-SW
MS-BS
MS-INS
MS-SCLK
RSV#4 XD-CD
SD-CD-COM
SD-CD-SW
SD-WP-SW
SD-CLK
SD-CMD
S.M#/XD-CLE S.M#/XD-ALE
S.M#/XD-WE
S.M#/XD-CE S.M#/XD-RE
S.M#/XD-R/B
S.M/XD-WP-IN
GND GND GND GND
IN
OUT
SC1U10V3ZY
2
SM_CD#
3
MS_CLK_R0
43
MS_BS_1
13
MS_CD#
17
MS_CLK_R
19 4
SM_CD#
39 41
42 5 8 10
1 2
38 37
MS_BS_1
36 28 27
SM_R/B#
26
MS_CLK_R0
35
46 45 44 1
3D3V_S0 3D3V_CR_S0 5 1
12
C185
SD_CD#
SD_WP MS_CLK
R584 33R2
SM_CLE
SM_ALE
SM_RE#
R440
1 2
3K3R2
12
E
R449
1 2
33R2
MS_BS_1
R564
1 2
22R2
C169 SCD1U16V
3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,23,25,27,29,30,31,32,36,38,40,41
DCBATOUT14,35,37,38,39,40,41
MS_CD# 22
MS_CLK
SD_CD# 22 SD_WP 22
SM_CLE
SM_ALE 22
SM_RE# 22 SM_R/B# 22
MS_CLK_R
3D3V_S0
DCBATOUT
MS_CLK 22
22
MS_BS 22
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev A3
A
B
C
D
Date: Sheet
PCMCIA SLOT/ CARDBUS SKT
Taipei Hsien 221, Taiwan, R.O.C.
Leopard
24 41Monday, February 28, 2005
E
-4
of
Page 25
A
hexainf@hotmail.com GRATIS - FOR FREE
Close to RTL8100C Pin121,Pin122
LAN_X1
INT_PIRQE#17,29
PCIRST1#19,22,23,29,31 PCLK_LAN3 PCI_GNT#217
PCI_REQ#217
ICH_PME#13,17,29
R110
1 2
DUMMY-R2
1 2
12
C145 SC12P50V2JN
TX+26 TX-26
RX+26 RX-26
ISOLATE
X5
XTAL-25MHZ-43
12
TX+
TX-
12
12
R106
R107
49D9R2F
12
C140
SCD1U16V
3D3V_LAN_S5
3D3V_S0
12
R102 1KR2
PUMA SC
12
R101 Dummy15KR2
A
SD 0813
C144 SC12P50V2JN
49D9R2F
AVDD33
AVDD33 CTRL25
AVDD25
AVDD33
ISOLATE
VDD25 PCI_AD31 PCI_AD30
PCI_AD29 PCI_AD28
R108
12
5K6R3F
RX+
RX-
12
12
R105
R104
49D9R2F
49D9R2F
12
C137
SCD1U16V
U28
1
MDI0+
2
MDI0-
3
AVDDL
4
VSS
5
MDI1+
6
MDI1-
7
AVDDL
8
CTRL25
9
VSS
10
AVDDH
11
HSDAC+
12
HSDAC-
13
VSS
14
MDI2+
15
MDI2-
16
AVDDL
17
VSS
18
MDI3+
19
MDI3-
20
AVDDL
21
VSSPST
22
GND
23
ISOLATE#
24
VDD18
25
INTA#
26
VDD33
27
PCIRST#
28
PCICLK
29
GNT#
30
REQ#
31
PME#
32
VDD18
33
PCIAD31
34
PCIAD30
35
GND
36
PCIAD29
37
PCIAD28
38
VSSPST
RTL8100CL-U
128
TX+ TX­AVDD33 GND RX+ RX­AVDD33
NC NC NC AVDD25 NC NC NC NC GND NC NC AVDD33 GND NC ISOLATEB NC INTAB
PCIRSTB GNTB
REQB PMEB VDD25
GND
3D3V_LAN_S5
LAN_X2
4 4
SC 0708
Close to LAN chip
3 3
2 2
1 1
VSS
GND
127
B
R111 3K6R3
1 2
EECS_3 EESK EEDI EEDO
126
125
124
RSET
NC
VSS
CTRL18
AVDD18
NC
GND
PCIAD27
PCIAD26
VDD33
PCIAD25
PCIAD24
39404142434445464748495051525354555657585960616263
PCI_AD25
PCI_AD26
PCI_AD24
PCI_AD27
R109 100R2
PCI_AD23
B
1 2 3 4
HM1-SB Remove LED function
LAN_X1
LAN_X2
123
122
121
VSS
XTAL2
XTAL1
GND
NC
NC
CBEB3
VDD18
IDSEL
PCIAD23
GND
PCIAD22
PCIAD21
PCI_AD22
PCI_C/BE#3
PCI_AD21
PCI_AD23
LAN_IDSEL
1 2
U29
CS
VCC
SK
DC
DI
ORG
DO
GND
M93C46-W-3
TP21
LAN_LED0
120
119
118
117
116
GND
LED0
AVDDH
VSSPST
NCNCNCNCNC
GND
GND
VDD25
VSSPST
GND
PCIAD20
VDD18
PCIAD19
VDD33
PCI_AD20
PCI_AD19
VDD25
3D3V_LAN_S5
8 7 6 5
TP23
TP22
LAN_LED2
LAN_LED1
115
114
LED1
LED2
VDD18
PCIAD18
PCIAD17
PCIAD16
PCI_AD18
PCI_AD17
PCI_AD16
3D3V_LAN_S5
EESK
113
112
111
110
GND
LED3
EESK
NC
NC
FRAMEB
IRDYB
CBEB2
FRAME#
GND
PCI_C/BE#2
12
C168 SCD1U16V
EEDI
EECS_3
EEDO
109
108
107
106
105
EEDI
EECS
EEDO
VDD18
VDD33
VDD25
VDD25
SERRB
PERRB STOPB
DEVSELB
TRDYB
CLKRUNB
NC
IRDY#
VDD18
64
PCI_IRDY# 17,22,29 PCI_FRAME# 17,22,29
C
PCI_AD1
PCI_AD0
104
103
PCIAD0
PCIAD1
LANWAKE
GND
GND
NC
GND
NC
GND
CLKRUN#
C
PCIAD2
VSSPST
GND
VDD18 PCIAD3 PCIAD4 PCIAD5 PCIAD6
VDD33 PCIAD7
CBEB0
VSSPST
PCIAD8 PCIAD9
M66EN PCIAD10 PCIAD11 PCIAD12
VDD33 PCIAD13 PCIAD14
VSSPST
GND
PCIAD15
VDD18
CBEB1
PAR
SERR#
GND
VDD33
PERR# STOP#
DEVSEL#
TRDY#
VSSPST
102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74
NC
73 72
NC
71 70 69 68 67 66 65
SB-24-01
3D3V_LAN_S5
PCI_C/BE#0
PCI_C/BE#1 PCI_PAR PCI_SERR#
PCI_PERR# PCI_STOP# PCI_DEVSEL# PCI_TRDY#
PCI_AD2
VDD25 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6
PCI_AD7
PCI_AD8 PCI_AD9
PCI_AD10 PCI_AD11 PCI_AD12
PCI_AD13 PCI_AD14
PCI_AD15
VDD25
D
R103 0R2-0
CTRL25
PCI_PAR 17,22,29 PCI_SERR# 17,22,29
PCI_PERR# 17,22,29 PCI_STOP# 17,22,29 PCI_DEVSEL# 17,22,29 PCI_TRDY# 17,22,29
PM_CLKRUN# 17,22,29,31
D
PCI_C/BE#[0..3] 17,22,29 PCI_AD[0..31] 13,17,22,29
3D3V_LAN_S5
1 2
LAN_PWR_CTRL
Title
Size Document Number Rev A3
Date: Sheet of
C148
C143
12
12
SCD1U16V
3D3V_LAN_S5
3
Q8
1
2
BCP69T1-U
GAP-CLOSE-PWR
12
C130
SC22U10V6ZY-U
1 2
GAP-CLOSE-PWR
LAN RTL8100C
Leopard
E
AVDD25
C135
12
C150
C141
12
SCD1U16V
C132
12
3D3V_LAN_S5
12
C138
12
SCD1U16V
DummySCD1U16V
3D3V_LAN_S541
E
C151
12
SCD1U16V
C142
12
SCD1U16V
L16 BLM11A601S
C136
12
SCD1U16V
3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,23,24,27,29,30,31,32,36,38,40,41
3D3V_S517,18,19,21,29,31,35,37,39,40
25 41Monday, February 28, 2005
12
SCD1U16V
SCD1U16V
G30
1 2
C139
12
3D3V_LAN_S53D3V_S5
G31
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
R100
1 2
0R3-U
SCD1U16V
C153
12
SCD1U16V
C149
12
SCD1U16V
AVDD33
C134
12
SCD1U16V
3D3V_LAN_S5
VDD25
C133
12
SCD1U16V
VDD25
C152
12
SCD1U16V
3D3V_S0
3D3V_S5
-4
SCD1U16V
Page 26
A
PUMA SC
1201 -2
BT_PRIOR29 WLAN_ACT29
USB_PN217 BT_LED13,14
4 4
USB_PP217
POWER SWITCH
C322
BT_EN17
C24
SCD1U16V
SC1U10V3ZY
BT_EN#
1013 -1
XFR_RDC XFR_CMT XFR_RXC XFR_TDC
12
12
C25 DUMMY-SCD1U16V
A
3 3
2 2
TX-25 TX+25
1 1
Blue thumb
R556100R2
1 2 1 2
R557100R2
USB_N_CON2 USB_P_CON2
BC0EX2 connect to PCI_AD22 on main board. BC0EX1 connect to ICH_PME# on main board.
5V_S3
12
I max = 150 mA
U55
1
SHDN#
2
GND
3 4
IN OUT
G913C-U
5V_S3
12
R390 10KR2
BT_EN#
QB4
2N7002
D
1
G
S
2 3
10/100M Lan Transformer
U3
3 11 14
6
8
7
XFORM-187
CT CT CT CT
TD­TD+
RX-
RX+ RD-
RD+
TX-
TX+
1.route on bottom as different ia l p air s.
2.Tx+/Tx- are pairs. Rx+/Rx- are pai rs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except RJ-45 moat.
15 16
2 1
9 10
XFR_RXC XFR_CMT
5
SET
C321
SC4D7U10V5ZY
78.47593.411
1 2 1 2
BC0EX213 BC0EX113
3D3V_BT_S0
3D3V_BT_SET
12
R298 75R2F R297 75R2F
B
Place on bottom side
From NEW!
1004-1
CN4
10
8 7 6
USB_N_CON2 USB_P_CON2
C304 SC20P
12
C85 SCD1U16V
RX­RX+
TX­TX+
MAX 150mA
3D3V_BT_S0
RX- 25 RX+ 25
LAN_TERMINAL
B
5 4 3 2
1 9
JST-CON8-7
3D3V_BT_S0
12
R370 18KR3F
12
R369 11KR3F
TD+ --> TX+ RJ45-1 TD- --> TX-
RD+ --> RX+ RD- --> RX-
12
R300 75R2F
RJ45_END
CN1
1 2
3 4
ETY-CON2-R1
20.D0151.102
BC0EX2 BC0EX1 BT_LED
EC18 DUMMY-SCD1U
EC17
EC16
DUMMY-SCD1U
DUMMY-SCD1U
3D3V_BT_S0
EC110 SCD1U
Close to CN20
RJ45 PIN10/100 LAN Transformer
RJ45-2
RJ45-3 RJ45-6
RJ45_END1
RJ45_END2
12
R299 75R2F
SC 0708
C278
1 2
SC1500P2KV8KX
TIP_MDC TIP RING_MDC
SB-26-03
L20 MLB160808
1 2
L21 MLB160808
1 2
C
1394 Connector
1394_TPA0P22
1394_TPA0N22
1394_TPB0P22
1394_TPB0N22
R205 56R2F
1394_TPBIAS022
SB-25-01
1394_TPA1P22
1394_TPA1N22
1394_TPB1P22
1394_TPB1N22
1394_TPBIAS122
SB-26-01
SC1U10V3KX
R201 56R2F
SC1U10V3KX
These components near to chip side.
C
RJ45-8 RJ45-7 RJ45-6 RJ45-5 RJ45-4 RJ45-3 RJ45-2 RJ45-1
SB-26-02
RING
RJ45-8 13 RJ45-7 13 RJ45-6 13 RJ45-5 13 RJ45-4 13 RJ45-3 13 RJ45-2 13 RJ45-1 13
RJ45-1 RJ45-2
RJ45-3 RJ45-4 RJ45-5 RJ45-6 RJ45-7 RJ45-8
TIP RING
12
12
C241
R206 56R2F
C245
R200 56R2F
RJ45_1 RJ45_2
RJ45_3 RJ45_4 RJ45_5 RJ45_6 RJ45_7 RJ45_8
RJ11_1 RJ11_2
12
12
12
12
JK1
RJ45-74-U1
12
C246 SC220P
12
C244 SC220P
D
12
R207 56R2F
1394_TPB0_T
12
12
R203 56R2F
1394_TPB1_T
12
9
10
D
R208 56R2F
R209 5K1R2
R202 56R2F
R204 5K1R2
E
3D3V_LAN_S525,41
1006 -1
R98 0R2-0
1 2
R96 0R2-0
1 2
R97 0R2-0
1 2
R99 0R2-0
1 2
R66 0R2-0
1 2
R45 0R2-0
1 2
R62 0R2-0
1 2
R42 0R2-0
1 2
Title
Size Document Number Rev A3
Date: Sheet
TPA0+
TPA0­TPB0-
TPB0+
6 3
1 5
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
LAN / 1394 Connector
Leopard
E
1394_1
4 2
SKT-1394-4P-6-U1
1394_TPA1P_PR 13 1394_TPA1N_PR 13 1394_TPB1P_PR 13
1394_TPB1N_PR 13
26 41Monday, February 28, 2005
of
3D3V_LAN_S5
-4
Page 27
A
hexainf@hotmail.com GRATIS - FOR FREE
12
BC82 SCD1U16V
4 4
5V_AUDIO_S0
12
BC73 SCD1U16V
EXT_MIC_1 EXT_MIC_2
AUD_LOL28
AUD_LOR28
BC42 SCD1U16V
3 3
CD_AUDL21
CD_AUDR21
CD_AGND21
AUD_MDC_OUT30
AUD_PHONE30
R221 22R2
1 2
R218 22R2
1 2
R219
1 2
22R2
DUMMY-150KR2J
12
R220
1 2
BC36 SCD1U16V
1 2
CDAUDL
CDAUDR
CDAGND
DUMMY-150KR2J
DUMMY-150KR2J
12
R222
R217
12
BC31SC1U10V3ZY
1 2
BC35 SC1U25V5ZY
1 2
BC33 SC1U25V5ZY
1 2
BC34 SC1U25V5ZY
12 12
12
12
BC44
BC41
SCD1U16V
SCD1U16V
AUD_MICIN1 AUD_MICIN2
BC32SC1U10V3ZY
AUD_MDC_CODEC AUD_PHONE_CODEC
CDAUD_L CDAUD_R CDAUD_GND
AUD_PC_BEEP
SB-27-03
AUD_AGND
HP_OUT_L13 HP_OUT_R13
2 2
5V_AUDIO_S0
147
U39_PL
R252 10KR2
1 2
1 2
AUD_AGND
5V_AUDIO_S0
147
9
10
AUD_AGND
A
3
8
PCI_SPKR22
ICH_SPKR17
KBC_BEEP31
1 1
AUD_AGND
U40A
AUD_BEEP1
TSAHCT86
U40C
AUD_BEEP2
TSAHCT86
SB-27-04
PUMA SC
5V_AUDIO_S0
147
4 5
AUD_AGND
U40B
6
TSAHCT86
12
12
BC43 SCD1U16V
21
MIC1
22
MIC2
23
LINE_IN_L
35
LINE_OUT_L
24
LINE_IN_R
36
LINE_OUT_R
37
MONO_OUT
13
PHONE_IN
18
CD_L
20
CD_R
19
CD_GND_REF
39
HP_OUT_L
41
HP_OUT_R
14
AUX_L
15
AUX_R
B
BC81 SCD1U16V
R238
B
253843
AVDD1
AVDD2
AVSS1
AVSS2
264044
AUD_AGND
1 2
SCD1U16V
34
AVDD3
AVSS3
33
10KR2
C272
1
AVDD4
AVSS4
4
AUD_BEEP
3D3V_S0
9
DVDD1
DVDD2
DVSS1
DVSS2
7
12
12
BC80 SC1U10V3ZY
C267 SC270P50V3JN
C266 SC270P50V3JN
ADAF3
ADAF2
ADAF1
CODECVREF
VREFOUT
2728293031
VREF
AFILT1
AFILT2
VREFOUT
ID0#
ID1#
45
46
SB-27-02
C264 SCD1U16V
1 2
12
R251 1KR2
AUD_AGND
12
AUD_AGND
1 2
C265 SC270P50V3JN
1 2
1 2
C268 SC270P50V3JN
1 2
ADAF4
32
AFILT3
AFILT4
SDATA_OUT
NC
NC
12
42
AUD_PC_BEEPAUD_SYS_BEEP
EAPD
XTL_IN
XTL_OUT
SDATA_IN
BIT_CLK
SYNC
RESET#
SPDIF
JS0 JS1
U41
17 16 47
2 3
8 5
6 10 11 48
AD1981B-AS
C
BC79 SCD1U16V
AD1981_JS0
SB-27-02
XTALOUT_CODEC AC97_DIN0_CODEC
AC97_CBITCLK
SPDIF_OUT
12
R241 4K7R2
1 2
R223 22R2
1 2
R224 33R2
2/2 HM1-SB ADI suggest
DUMMY-SC1U10V3ZY
EXT_MIC_213
DUMMY-SC1U10V3ZY
EXT_MIC_113
C
AUD_AGNDAUD_AGND
R499 DUMMY-2K2R2
1 2
HPSENSE 28
BC29
AUD_AGND
BC30
AUD_AGND
EAPD 28,31
CLK_CODEC 3
AC97_BITCLK 16,30 AC97_SYNC 16,30 AC97_RST# 16,30 SPDIF_OUT 13
12
AUD_AGND
12
AUD_AGND
R243 0R2-0
1 2
BC37 DUMMY-C2
D
3D3V_S0
R213 10KR2
1 2
D10 S1N4148-U
12
1 2
AC97_DIN0 16 AC97_DOUT 16,30
HPSENSE_1 28
SB-27-01
VREFOUT
12
R215 3KR2F
BC27 SC1000P50V3KX
CLOSE TO CODEC
MIC2 PREAMP
SB-27-02
VREFOUT
12
R216 3KR2F
BC28 SC1000P50V3KX
CLOSE TO CODEC
MIC1 PREAMP
D
12
1 2
R242 DUMMY-R2
E
1 2
BC46 DUMMY-SC22P
X3 DY-X-24D576MHZ-3-U1
1 2
BC45 DUMMY-SC22P
XTALOUT_CODEC_R
BC85 SC1U10V3ZY
1 2
BC47 DUMMY-C2
5V_S0
U63
1
12
AUD_AGND
SHDN#
2
GND
3 4
IN OUT
MAX8863-S
UNDER CODEC
G68
1 2
GAP-CLOSE
AUD_AGND
G40
1 2
GAP-CLOSE
AUD_AGND
Title
Size Document Number Rev
A3
Date: Sheet of
AUDIO CODEC AD1981B
BC84 SC22P
5VA_SET
5
SET
5V_AUDIO_S0
BC83
SC10U10V6ZY-U
For High limit --> H45
G38
1 2
GAP-CLOSE
G36
1 2
GAP-CLOSE
CUT MOAT
G35
1 2
GAP-CLOSE
G39
1 2
GAP-CLOSE
SB-27-02
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Leopard
E
3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,23,24,25,29,30,31,32,36,38,40,41
5V_AUDIO_S0
12
12
AUD_AGND
AUD_AGND
27 41Monday, February 28, 2005
5V_S013,14,18,19,20,21,23,28,29,32,36,39,40,41
12
R515 28K7R3F
12
R516 10KR3F
AUD_AGND
AUD_AGND
AUD_AGND
3D3V_S0
5V_S0
12
EC156
SCD1U16V
-4
Page 28
A
4 4
AUD_LOL27
BC87 SC10U10V6ZY-U
3 3
AUD_LOR27
5V_S0
12
R510
2 2
JACK_DETECT#13
5V_S0
12
12
R509 100KR2
C457 SC1U10V3ZY
100KR2
HPSENSE_1
D
Q29
1
2N7002
G
S
2 3
B
1006 -1
BC50
1 2
SCD1U16V3KX
12
BC86
SCD1U16V3KX
R519 15KR2
1 2
CSOUTL2
R254 15KR2
1 2
L_BYPASS SPKR_L+
SPKR_L­SPKR_R+
SPKR_R­R_BYPASS
HP_R
L_LINE_IN
HP_L
18
22 15
19 20 21
1 2
5VA_OP_S0
12
AUD_AGND
BC78
CSOUTL2AUD_LOL
SC4D7U10V5ZY
BC74
AUD_AGND
SCD1U16V3KX
1006 -1
R240
BC40
CSOUTR1
1 2
SCD1U16V3KX
BC77
CSOUTR2AUD_LOR
1 2
SC4D7U10V5ZY
HPSENSE_1 27
EARPHONE13 HPSENSE 27
R513 15KR2
1 2
1 2
R214 22KR2J
15KR2
1 2
12
C251 SC1U10V3ZY
R_LINE_IN
EARPHONE_R
C
BC88
1 2
SC10P50V2JN-1
R518
1 2
20KR2
R253 24KR2
U62
7 8
LVDD SHUTDOWN RVDD
4
LLINEIN
5
LHPIN
6
LBYPASS
3
LOUT+
ROUT+ ROUT-
RBYPASS RHPIN RLINEIN
G1420BF3U
R239 24KR2
R514
1 2
BC76
20KR2
1 2
SC10P50V2JN-1
SPKR_L+
BC49 SC220P
1 2
SE/BTL#
HP/LINE#
TJ
NC#17 NC#23
MUTE_OUTLOUT-
MUTE_IN
GND/HS GND/HS GND/HS GND/HS
SD 0812
1 2
BC39
SC220P
SPKR_R+
14 16 2
17 23
910 11
1 12 13 24
AUD_AGND
SPKR_L+
1 2
G1420_SHUTDOWN#
HPSENSE_1
AUD_MUTE
SPKR_R+
TC21
SE100U16VGM-2
R517 Dummy10KR2
1 2
TC22
1 2
SE100U16VGM-2
1007 -1
DK_SPKR_L+ 13
1007 -1
D
1209 -2
AUD_AGND
DK_SPKR_R+ 13
R_BYPASS
L_BYPASS
12
PM_SLP_S3#17,21,31,37,38,40
5V_S0
BC48 SC4D7U10V5ZY
AUD_AGNDAUD_AGND
1217 -2
G67
1 2
GAP-CLOSE-PWR
12
BC75 SC4D7U10V5ZY
5V_S0
12
1
G
2 3
AUD_AGND
5VA_OP_S0
1223 -3
R561 100KR2
G1420_SHUTDOWN#
D
Q40 2N7002
S
E
5V_S0
5V_S013,14,18,19,20,21,23,27,29,32,36,39,40,41
SB-28-02
5V_S0
U61B
147
1 1
KBC_MUTE31
EAPD27,31
A
4 5
12
R512 10KR2
TSAHCT32
6
AUD_MUTE_1
HPSENSE
5V_S0
SD 0817
U61C
147
9
10
B
8
TSAHCT32
AUD_MUTE
SPKR_R+ SPKR_R-
SPKR_L+ SPKR_L-
Speaker
EC154 SC220P
EC159 SC220P
EC152 SC220P
C
EC153 SC220P
SPK1
6 4
3 2
1 5
ETY-CON4-11-U
20.D0151.104
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
D
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
AUDIO
Leopard
28 41Monday, February 28, 2005
E
-4
of
Page 29
A
hexainf@hotmail.com GRATIS - FOR FREE
MINI-PCI
4 4
B
3D3V_S0
C
D
E
3D3V_S0
3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,23,24,25,27,30,31,32,36,38,40,41
5V_S013,14,18,19,20,21,23,27,28,32,36,39,40,41
5V_S0
BC72 SCD1U16V
ICH_PME# 13,17,25
12
BC70 SCD1U16V
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
D
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
MINI-PCI
Leopard
29 41Monday, February 28, 2005
E
-4
12 PCI_AD[31..0] 13,17,22,25 PCI_C/BE#[3..0] 17,22,25
3D3V_S5
3D3V_S0
12
Q12
WIRELESS_EN
WIRELESS_EN#17
3 3
2 2
1 1
2N7002
PCI_PERR#17,22,25
A
D
1
G
S
2 3
3D3V_S0
R244 10KR2
12
R477 10KR2
1 2
R476 DUMMY-R2
802_ACT_LED14
PCLK_MINI3
PCI_REQ#017
1201 -2
WLAN_ACT26
PCI_IRDY#17,22,25
PM_CLKRUN#17,22,25,31
PCI_SERR#17,22,25
3D3V_S0
TP25
5V_S0
WIRELESS_EN
INT_PIRQE# MINI_PIN21
PCI_AD31 PCI_AD29
PCI_AD27 PCI_AD25
PCI_C/BE#3 PCI_AD23
PCI_AD21 PCI_AD19
PCI_AD17 PCI_C/BE#2
PCI_C/BE#1 PCI_AD14
PCI_AD12 PCI_AD10
PCI_AD8 PCI_AD7
PCI_AD5 PCI_AD3
PCI_AD1
B
CN13
125
1
2
3
4
5
6
7
8
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99
101 103 105 107 109 111 113 115 117 119 121
123
The symbol use 2nd source The P/N is the main source Main source:62.10032.001 2nd source:62.10032.031
10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122
124 126
PCIMODEM124A1U1
62.10032.001
BC71 SC4D7U10V5ZY
RINGTIP
MINI_PME#
MOD_IDSEL
12
3D3V_S5
1 2
R484 DUMMY-0R2-0
PCI_AD30 PCI_AD28
PCI_AD26 PCI_AD24
1 2
R485 10R2
PCI_AD22 PCI_AD20
PCI_AD18 PCI_AD16
PCI_AD15 PCI_AD13 PCI_AD11
PCI_AD9 PCI_C/BE#0
PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0
12
BC69 SCD1U16V
5V_S0
INT_PIRQE# 17,25
PCIRST1# 19,22,23,25,31
3D3V_S0
PCI_GNT#0 17
BT_PRIOR 26
1201 -2
PCI_AD21
PCI_PAR 17,22,25
PCI_FRAME# 17,22,25 PCI_TRDY# 17,22,25 PCI_STOP# 17,22,25
PCI_DEVSEL# 17,22,25
PCI_SERIRQ 17,22,31
3D3V_S5
C
Page 30
A
5V_S3
F1 MINISMDC110-U
1 2
C106
4 4
SC4D7U10V5ZY
B
USB POWER
12
5V_USB1_S3
12
C105 SCD1U16V
100 mil
12
C104 SC1000P50V
12
TC6 ST100U6D3VBM
C
D
E
5V_AUX
5V_AUX14,15,35,37,38,39
5V_S313,14,26,32,37,38,40,41
3D3V_S313,14,40
5V_S3
3D3V_S3
USB_PP317 USB_PN317
3 3
USB_PP417 USB_PN417
2 2
USB_P_CON3 USB_N_CON3
USB_P_CON4 USB_N_CON4
USB_N_CON3 USB_P_CON3
5V_USB1_S3
USB1
11
9 1
2 3
4 10 12
SKT-USB-76-U
5 6
7 8
USB_N_CON4 USB_P_CON4
MDC Connector
R155 DUMMY-R2
3D3V_S0
MDC_S3_1
12
AUD_MDCIN
12
C411 SCD1U16V
CN9
35
31
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29
33
36
32 2
4 6 8 10 12 14 16 18 20 22
ACSDATAIN1_A
24
ACSDATAIN1_B
26 28 30
34
AMP-CONN30A-1
20.F0099.030
B
Check with Ambit
1 2
R168 22R2
1 2
R169 DUMMY-22R2
SB-30-02
12
C222 DUMMY-SC22P
C
AUD_PHONE 27
AC97_SYNC 16,27
AC97_BITCLK 16,27
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
D
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
USB / MDC CONN.
Leopard
30 41Monday, February 28, 2005
E
-4
of
12
12
GAP-CLOSE-PWR
12
SC4D7U10V5ZY
1 2
G64
C412
AUD_MDC_OUT27
3D3V_S3
R486 DUMMY-R2
1 1
AC97_DOUT16,27 AC97_DIN1 16 AC97_RST#16,27
DUMMY-SCD1U16V
C413
A
Page 31
A
hexainf@hotmail.com GRATIS - FOR FREE
3D3V_AUX KBC_3D3V_AUX
G33
1 2
GAP-CLOSE-PWR
4 4
3 3
2 2
1 1
LPC_LAD[0..3]16
CN15
9 1
2 3 4 5 6 7 8
10
DY-MOLEX-CON8-2
SD 0813
12
BC19
SC3P50V2CN
12
BC18 SC3P50V2CN
ECSWI#_KBC
KBC_3D3V_AUX
KBC_D0 TINT# TCK TDO TDI TMS
3D3V_S0
45
678
14
KBC_32KX2_1
3D3V_S5
R134
1 2
100KR2
1 2
123
RN28 SRN10K-2
X1
X-32D768KHZ-12-U
3 2
R140
1 2
0R2-0
12
KBC_3D3V_AUX
1 2
R143
A5/SHBM
A
R173 DUMMY-R2
R141 20MR3
VOL_UP_DK#13
VOL_DWN_DK#13
CHG_I_SEL35
CHG_I_PRE_SEL35
ID_DET14,32
RSMRST#_KBC17
BC14 SC1U10V3ZY
KBCBIOS_CS#33
10KR2
PCI_SERIRQ17,22,29
LPC_LDRQ0#16
LPC_LFRAME#16
PCLK_KBC3 RSMRST#16,20,39
ECSMI#_KBC17
ECSCI#_KBC17
ICH_A20GATE16
KCOL[1..16]32
LI/NI#35
FPBACK14
AD_OFF34
3D3V_S0
BL_ON7
NI_BAT35
TP59 TP70
RCIN#16
TCLK_532
TDATA_532
CHG_I_SEL CHG_I_PRE_SEL
CHG_ON#
KROW[1..8]32
12
CHG_ON#35
S5_ENABLE20
LPC_LAD0 LPC_LAD1
LPC_LAD2 LPC_LAD3
KBC_PWUREQ#
KROW1 KROW2 KROW3 KROW4 KROW5 KROW6 KROW7 KROW8
KCOL1 KCOL2 KCOL3 KCOL4 KCOL5 KCOL6 KCOL7 KCOL8 KCOL9 KCOL10 KCOL11 KCOL12 KCOL13 KCOL14 KCOL15 KCOL16
TINT# TCK TDO TDI TMS
PSCLK1 PSDAT1 PSCLK2
PSDAT2
1 2
R151 10KR2
KBC_32KX1 KBC_32KX2
VCC_+3VSB
1004 -1
3D3V_S0
PSDAT4
KBC_SEL1 KBC_CLK
12
B
BC22 SCD1U16V
15 14 13 10 18 19 22 23
31
71 72 73 74 77 78 79 80
49 50 51 52 53 56 57 58 59 60 61 64 65 66 67 68
105 106 107 108 109
110 111 114 115 116 117 118 119
158 160
62 63 69 70 75 76
148 149 155 156
27 28
173 174
47
B
KBC_3D3V_AUX
D7 SSM5818SL
2 1
7
SERIRQ
8
LDRQ#
9
LFRAME# LAD0 LAD1 LAD2 LAD3 LCLK RESET1# SMI# PWUREQ#
IOPD3/ECSCI#
5
GA20/IOPB5
6
KBRST#/IOPB6
KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7
KBSOUT0 KBSOUT1 KBSOUT2 KBSOUT3 KBSOUT4 KBSOUT5 KBSOUT6 KBSOUT7 KBSOUT8 KBSOUT9 KBSOUT10 KBSOUT11 KBSOUT12 KBSOUT13 KBSOUT14 KBSOUT15
TINT# TCK TDO TDI TMS
PSCLK1/IOPF0 PSDAT1/IOPF1 PSCLK2/IOPF2 PSDAT2/IOPF3 PSCLK3/IOPF4 PSDAT3/IOPF5 PSCLK4/IOPF6 PSDAT4/IOPF7
32KX1/32KCLKIN 32KX2
IOPJ2/BST0 IOPJ3/BST1 IOPJ4/BST2 IOPJ5/PFS# IOPJ6/PLI IOPJ7/BRKL_RSTO#
IOPM0/D8 IOPM1/D9 IOPM2/D10 IOPM3/D11
3
IOPM4/D12
4
IOPM5/D13 IOPM6/D14 IOPM7/D15
SEL0# SEL1# CLK
1 2
DUMMY-SCD1U16V
12
BC15
VDD
Host Interface
Key Matrix Scan
JTAG Debug Port
PS2 Interface
GND
GND
GND
GND
GND
173546
122
137
L18
BLM11P600S
3445123
136
157
1661695
VCC
VCC
VCC
VCC
VCC
VCC
AD input
DA Output
PWM or PortA
PortB
IOPB7/RING#/PFAIL#/RESET2#
PortC
PortD-1
PortE
PortH
PortP
PortJ-2
PortJ-1
PortD-2
PortM
PortK
PortL
AGND
GND
GND
96
159
167
KBC_RTC_VCC
12
12
BC25
KBC_AVCC
AVCC
IOPE6/LPCPD#/EXWINT45
IOPE7/CLKRUN#/EXWINT46
NCNCNCNCNCNCNCNCNC
111220218586919297
BC17 SCD1U16V
SCD1U16V
161
VBAT
IOPE0/AD4 IOPE1/AD5 IOPE2/AD6 IOPE3/AD7
DP/AD8 DN/AD9
IOPA0/PWM0 IOPA1/PWM1 IOPA2/PWM2 IOPA3/PWM3 IOPA4/PWM4 IOPA5/PWM5 IOPA6/PWM6 IOPA7/PWM7
IOPB0/URXD
IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1
IOPB4/SDA1
IOPC0
IOPC1/SCL2
IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT
IOPD0/RI1#/EXWINT20 IOPD1/RI2#/EXWINT21
IOPD2/EXWINT24
IOPE4/SWIN
IOPE5/EXWINT40
IOPH0/A0/ENV0
IOPH1/A1/ENV1 IOPH2/A2/BADDR0 IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPH6/A6 IOPH7/A7
IOPI0/D0 IOPI1/D1 IOPI2/D2 IOPI3/D3 IOPI4/D4 IOPI5/D5 IOPI6/D6 IOPI7/D7
IOPJ0/RD#
IOPJ1/WR0#
SELIO#
IOPD4 IOPD5 IOPD6 IOPD7
IOPK0/A8
IOPK1/A9 IOPK2/A10 IOPK3/A11 IOPK4/A12
IOPK5/A13/BE0 IOPK6/A14/BE1
IOPK7/A15/CBRD
IOPL0/A16 IOPL1/A17 IOPL2/A18 IOPL3/A19
IOPL4/WR1#
NC
98
C
1 2
R139 1KR2
U33
81
AD0
82
AD1
83
AD2
84
AD3
87 88 89 90 93 94
99
DA0
100
DA1
101
DA2
102
DA3
32 33 36 37 38 39 40 43
153 154 162 163 164 165
168 169 170 171 172 175 176 1
26 29 30
2 44 24 25
124 125 126 127 128 131 132 133
138 139 140 141 144 145 146 147
150 151
152 41
42 54 55
143 142 135 134 130 129 121 120
113 112 104 103 48
PUMA SC
PC97551-VPC-U
KBC_PIN21
C
RTC_AUX_S5
BT_SENSE
THERMAL_DP THERMAL_DN
DA_BRI
CHG_ICTL CHG_VCTL
PWM_BRI
1 2
1201 -2
BT_SCL BT_SDA
KBC_PME#
R164
1 2
0R2-0
KBC_D0 KBC_D1 KBC_D2 KBC_D3 KBC_D4 KBC_D5 KBC_D6 KBC_D7
KBC_SEIO#
WR1#
KBC_3D3V_AUX
R558Dummy0R2-0
1 2
R5590R2-0
TP64
12
C214 SCD1U16V
For NS97551 use only
12
BC21
SCD1U16V
BT_TH 34,35 AIRLINE_VOLT 35 AD_IA 35 PM_SUS_STAT# 17 KBC_MATRIX1 32 KBC_MATRIX2 32 EAPD 27,28
TP30 TP29
1201 -2
BRIGHTNESS 14
TP63 TP62
KBC_BEEP 27 PWR_LED 14 CHG_LED 14 VOL_UP_BTN# 32 VOL_DWN_BTN# 32
MUTE_BTN# 32
802_BT_BTN# 32
BRIGHTNESS
CAPS_LED 14 NUM_LED 14 MUTE_LED 13,14 BT_SCL 34 BT_SDA 34 PCIRST1# 19,22,23,25,29
PM_PWRBTN# 17 SMBC_KBC 20 SMBD_KBC 20 MAINTAIN_CHG 35 DVD_BT# 32 PM_SLP_S4# 17,21,37,38 PM_SLP_S3# 17,21,28,37,38,40 CLK32_G768 20
CDROM_BT# 32 CIR_KBC 13 AC_IN# 35
KBC_PWRBTN# 32 KBC_LID# 14
PM_CLKRUN# 17,22,25,29 A0/ENV0 33
A1/ENV1 33 A2/BADDR0 33 A3/BADDR1 33 A4/TRIS 33 A5/SHBM 33 A6 33 A7 33
KBCBIOS_RD# 33 KBCBIOS_WE# 33
TP60
PR_INSERT# 13 KBC_MUTE 28 ECSWI#_KBC 17
A8 33 A9 33 A10 33 A11 33 A12 33 A13 33 A14 33 A15 33
A16 33 A17 33 A18 33
TP71
SC 0702
KBC_D[0..7] 33
12
BC16
SCD1U16V
12
SCD1U16V
BT_SENSE
AD_IA
D
BC20
D
12
BC23
SCD1U16V
BT+
12
R174 560KR3F
R175
1 2
100KR3F
C230
1 2
DVD_BT# CDROM_BT#
E
12
12
BC24
SCD1U16V
SCD1U16V3KX
1 2
R137 10KR2
1 2
R166 10KR2
BC26
SCD1U16V
VOL_UP_DK# VOL_DWN_DK#
SMBC_KBC SMBD_KBC
KBC_3D3V_AUX
VOL_UP_BTN#
VOL_DWN_BTN#
BT_SCL BT_SDA KBC_PME#
PM_PWRBTN#
RSMRST#_KBC
S5_ENABLE
3D3V_AUX16,20,32,34,35,36,37
3D3V_S517,18,19,21,25,29,35,37,39,40
RN34
1
8
2
7
3
6
4 5
SRN10K
RN15 DummySRN10KJ
2
3
1 4
R136 6K8R2F
1 2
R135 6K8R2F
1 2
R165 10KR2
1 2
R138
DUMMY-R2
R150
1 2
1 2
R142 10KR2
KBC HARDWARE SETTING
R152 DUMMY-R2
A0/ENV0
1 2
A1/ENV1 A2/BADDR0
SB-31-02
SHBM=1: Enable shared memory with host BIOS TRIS=1: While in IRE and OBD, float all the
signals for clip-on ISE use
BADDR1-0 Index
0 0
1 0 1 1
Title
Size Document Number Rev
Custom
Date: Sheet
RN29
2
3
1 4
SRN10KJ
R153 DUMMY-R2
A3/BADDR1
1 2
R144 DUMMY-R2
A4/TRIS
1 2
ENV1
ENV0 IRE OBD
PROG
00 1
1
0DEV
1
1
I/O Address
2E 4E
(HCFGBAH, HCFGBAL)+1(HCFGBAH, HCFGBAL)
Reserved
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
KBC NS87591
Leopard
E
TRIS
31 41Monday, February 28, 2005
3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,23,24,25,27,29,30,32,36,38,40,41
5V_AUX14,15,35,37,38,39
3D3V_S0
SB-31-02
KBC_3D3V_AUX
12
100KR2
KBC_3D3V_AUX
0 00 0 0
Data
2F 4F0 1
of
3D3V_S0
3D3V_AUX
5V_AUX
3D3V_S5
-4
Page 32
A
INTERNAL KEYBOARD CONNECTOR
1 2
3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
123
KCOL[1..16] 31KROW[1..8] 31
KROW2 KROW8
KROW7 KCOL10 KROW5 KROW6 KCOL1 KROW3 KROW4 KCOL6 KCOL2 KROW1 KCOL3 KCOL5 KCOL8 KCOL9 KCOL7 KCOL4 KCOL13 KCOL14 KCOL15 KCOL12 KCOL11 KCOL16
dummy10KR2
R179
10KR2
R176
10KR2
12 12
MATRIXID1#
KROW1 KCOL2 KCOL6
KROW4
678
RC3 SRC150P
4 5
123
123
678
4 5
for EMI
678
4 5
for EMI
4 4
CN7
25
3 3
26
ETY-CON24-1
20.K0170.001
2 2
KCOL9
KCOL8 KCOL5 KCOL3
678
RC4 SRC150P
123
4 5
for EMI
1 1
A
KBC_3D3V_AUX
R178
KCOL14
KCOL13
KCOL4 KCOL7
RC2 SRC150P
KROW3
KCOL1 KROW6
KROW5
RC6 SRC150P
B
3D3V_S0
12
R319 10KR2
802_BT_BTN# MUTE_BTN#
the matrix table for PCB
R177 dummy10KR2
1 2
1 2
KBC_MATRIX2 31 KBC_MATRIX1 31
Quick PlayNONE Quick Play
01
1012 -1
KCOL16
KCOL11 KCOL12 KCOL15
678
RC1 SRC150P
123
4 5
KCOL10 KROW7 KROW8
KROW2
678
RC5 SRC150P
123
4 5
B
3D3V_S0
12
R321 10KR2
KBC_MATRIX2,KBC_MATRIX1
PA PR
FFDF001001
11
SB-32-01
C
POWER BUTTON
KBC_PWRBTN#31
VOL_UP_BTN#
VOL_DWN_BTN#
C
LAUNCH Board
3D3V_AUX
12
R303 10KR2
R322 470R2
1 2
12
BC58 SCD1U16V
DVD_BT#31
CDROM_BT#31
3D3V_S0
D32
2
3
DummyBAV99LT1
3D3V_S0
D33
3
DummyBAV99LT1
11/29 -2
1
2
1
D
PWR_LED#14
MUTE_LED#14
802_BT_LED#14
VOL_UP_BTN#31
VOL_DWN_BTN#31
802_BT_BTN#31
ID_DET14,31
NUM_LED#14
EC89
12
SC1000P16V2KX
MUTE_BTN#31
EC88
12
SC1000P16V2KX
VOL_DWN_BTN# VOL_UP_BTN# 802_BT_LED# MUTE_LED# PWR_LED# NUM_LED#
PWRBTN#
DVD_BT# CDROM_BT#
TouchPad Connector
R433
10KR2
TDATA_531
TCLK_531
D
E
3D3V_S0
SCD1U10V2MX-1
SD 0813
C290
1 2
3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,23,24,25,27,29,30,31,36,38,40,41
3D3V_AUX16,20,31,34,35,36,37
5V_S013,14,18,19,20,21,23,27,28,29,36,39,40,41
5V_S3
C289SCD1U10V2MX-1
5V_S0
12
1 2
3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20
CN2
JST-CON20
3D3V_AUX
5V_S0
21
1005-1
22
SD 0813
EC85
EC82
EC83
EC87
12
12
SC1000P16V2KX
SC1000P16V2KX
5V_S3
12
BC68
PUMA SC 0628
12
DUMMY-SCD1U16V
DUMMY-SC1U10V3ZY
12
12
R434 10KR2
12
12
BC63
BC64
DUMMY-SC47P50V2JN
DUMMY-SC47P50V2JN
Title
KEYBOARD/TOUCH PAD/Launch key
Size Document Number Rev
A3
Date: Sheet
EC84
12
12
SC1000P16V2KX
SC1000P16V2KX
CN8
9 8 7 6 5 4 3 2
1
10
ETY-CON8-5
20.K0121.008
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Leopard
E
EC86
12
12
SC1000P16V2KX
SC1000P16V2KX
32 41Monday, February 28, 2005
of
-4
Page 33
A
hexainf@hotmail.com GRATIS - FOR FREE
4 4
B
KBC_D[0..7] 31
C
D
E
3D3V_S0
3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41
5V_S013,14,18,19,20,21,23,27,28,29,32,36,39,40,41
5V_S0
3 3
A0/ENV031 A1/ENV131 A2/BADDR031 A3/BADDR131 A4/TRIS31 A5/SHBM31 A631 A731 A831 A931 A1031 A1131 A1231 A1331 A1431 A1531
KBC_3D3V_AUX
2 2
A1631 A1731 A1831
A0/ENV0 A1/ENV1 A2/BADDR0 KBC_D2 A3/BADDR1 A4/TRIS
A5/SHBM
A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18
512KB Flash
U38
20 21
A0 DQ0
19
A1
18
A2
17
A3
16
A4
15
A5
14
A6
13
A7
3
A8
2
A9
1
A11
12
A12
4
A13
5
A14
11
A15
10
A16
6
A17
9
A18
8
VDD
PM39LV040-70VC
DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
CE#A10
WE#
OE#
VSS
KBC_D0 KBC_D1
22 23
KBC_D3
25
KBC_D4
26
KBC_D5
27
KBC_D6
28
KBC_D7
29
3031
7
32
24
KBCBIOS_CS# 31
KBCBIOS_WE# 31
KBCBIOS_RD# 31
1005-1
1 1
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
B
C
D
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
BIOS/GF
Leopard
33 41Monday, February 28, 2005
E
-4
Page 34
A
B
C
D
E
Adaptor in to generate DCBATOUT
D15 HZM24NBZ
Layout 200mil
4 4
3 3
DCIN1
SKT-JACK-103
SD 0817
Q2
R1
R2
DTC114EUA-U1
BT_SCL
AD_JK
3 1
OUT
GND
AD_OFF#
D17
3
BAV99LT1
BC52
SC1000P50V
1
3D3V_AUX
2
1
B
BT_SDA
12
2
C
3
3
200KR2J
E
12
R15
Q1 PDTA124EU
3D3V_AUX
D18
BAV99LT1
2
1
12
BC51
SCD1U50V3ZY
BT_TH
12
AD+_2
R14 100KR2
3D3V_AUX
D16
3
BAV99LT1
1 3
SC EMI
2 4 5
12
EC1
SCD1U50V3ZY
AD_OFF31
2
IN
23
U1
S
1 2 3 4 5
C274 SCD1U50V5KX
D
1 2
8
D
7
D
6
S S GD
AO4407
SB-33-02
2
1
AD+
SD 0813
EC165
12
SCD1U50V3ZY
3D3V_AUX16,20,31,32,35,36,37
AD+13,35,41
BT+31,35,41
5V_AUX14,15,35,37,38,39
3D3V_AUX
AD+
BT+
5V_AUX
2 2
G5
BT+SENSE35
1 1
A
1 2
GAP-CLOSE
BT+
1 2
F2 FUSE-10A125V
CN11
7 1
2 3
BT_SCL31 BT_SDA31 BT_TH31,35
12
BCC1 SCD1U
B
12
BC3 SC1000P50V
C
BAT+
4 5 6 8
SYN-CON6-2-U2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
D
Date: Sheet
Adaptor/ Bettery conn.
Taipei Hsien 221, Taiwan, R.O.C.
Leopard
34 41Monday, February 28, 2005
E
-4
of
BATTERY CONNECTOR
Page 35
A
hexainf@hotmail.com GRATIS - FOR FREE
AD+
12
4 4
3 3
When V(ICTL)<0.8V or DCIN<7V
2 2
-->Charge Disable SET CHG OFF BAT_CHG_I = (0.075/R624)*(VICTL/3.6) LI BAT : CHG_I_SET = H(6cell), Charge current = 3A CHG_I_SET = L(12cell), Charge current = 3.3A NI-MH BAT : NI_BAT = H, Charge current = 2.5A Pre-Charge (or Maintain Charge) : MAX8725 MAX1909 : Pre-Charge current = 300mA, MAX8725 : CHG_I_PRE_SEL = H, Pre-Charge current = 200mA Maintain charge current = 12.5mA ==> H 4sec, L 60sec
1 1
C275
DUMMY-SC1000P50V
AC_IN Threshold 2.089V Max. AC_IN > 2.089V --> AC DETECT
SET Vout MAX VCELL= 4.1998V/CELL VBAT=CELL*VCELL==>VCELL=VBAT/CELL =VREF+(VVCTL-1.8) /9.52 =4.1998V
12
R304
54K9R3F
22K6R3F
R305
2N7002
12
1208-2
LI/NI#31
3/19 HM1-SD Detect adaptor
AD_IA31
input current
CHG_I_PRE_SEL31
MAX1909_ICTL
MAX1909_LDO
R329
100KR3
R330
49K9R3F QB1
1
G
G6
1 2
GAP-CLOSE-PWR
UB1
1 2 3 4
RB1 Dummy100KR3F
1 2
CB1
1 2
SCD1U
1 2
R368 21K5R2F
AD+
12
12
CHG_I_SEL31
D
S
2 3
CHG_ON#31
Dummy2N7002S
CH521S-30
6 5
D4
Dummy2N7002
12
C43
1208-2
R332
1 2
Dummy1K5R3F
12
R366 100KR2F
12
R367 100KR2F
12
R365 19K1R3F
21
12
PUMA SC
Q24
1
G
Q23
2N7002
SCD1U16V3KX
MAX1909_ACIN
HM1-SB ACOK is 13V
C50 SCD1U
12
R41 Dummy200KR3F
D
S
2 3
1
G
12
R27 20KR3F
NI_BAT 31
AIRLINE_VOLT 31
U43
D
8
D
7
D
6
AO4407
PUMA SC
MAX1909_REF
MAX1909_LDO
D
S
2 3
12
R26 10KR2
C41
12
HM1-SB AD<=17V, disable charger function
12
12
PKPRES#
SCD01U50V3KX
If Charger is MAX1909,dummy them.
A
S
1
S
2
S
3
GD
45
R39 39KR3F
1208-2
R40 40K2R3F
R328 31K6R2F
1 2
R38 1KR2
C42
12
SCD01U50V3KX
B
DB1
2
BAV99-2
AD+_TO_SYS
C66
12
SCD1U25V3KX
1
GAP-CLOSE-PWR
EC166
12
SCD1U25V3KX
U11
27
PDS
24
SRC
1
DCIN
11
VCTL
10
ICTL
7
MODE
3
ACIN
8
IINP
9
CLS
6
ACOK
5
PKPRES
13
CCV
12
CCI
14
CCS
MAX1909ETI
MAX1909_REF
12
C48
3D3V_S5
D01R3720F
1 2
1 2
26
CSSP
DCBATOUT
MAINTAIN_CHG31
3
2/24 Close to MAX1909 pin 24
MAX1909_PDS
AD+_TO_SYS
MAX1909_DC_IN
MAX1909_VCTL
MAX1909_ICTL
MAX1909_MODE
MAX1909_IINP MAX1909_CLS
R327 49K9R2F
AC_OK
1 2
1 2
MAX1909_CCV MAX1909_CCI MAX1909_CCS
C40
12
SCD01U50V3KX
SC1U10V3ZY
Maintain Charge Current = 12.2mA MAINTAIN_CHG is H 4sec, L 1sec So, Avg. Current = 9.76mA
If Charger is MAX8725,dummy them.
B
DCBATOUT_BEAD
R272
G41
G42
1 2
GAP-CLOSE-PWR
12
C68
SCD1U
PUMA SC
REF
4
12
12
AD+_TO_SYS
12
C67
12
SCD1U
CSSN1
MAX1909_DHIV
25
CSSN
22
DHIV
28
PDL
2
LDO
MAX1909_DLOV
21
DLOV
MAX1909_DHI
23
DHI
MAX1909_DLO
20
DLO
19
PGND
29
PGND
18
CSIP
17
CSIN
16
BATT
15
GND
V_REF :4.2235V (<500uA)
ISOURCE_MAX =
R325 27KR3F
R326 19K6R3F
(0.075/R615)*(VCLS/VREF) = 3.16A
So,Constant Power=18.5*3.16=58.46W
MAX1909_CLS
(90%)
QB2
RB3
Dummy100KR2
1 2
DummyTP0610K
1
G
0218 -3
1217 -2
L35
1 2
BLM41PG600-GP
C65
SCD1U25V3KX
S
G
1
12
D
S
2 3
MAX1909_LDO
1 2
12
32
D
RB4 Dummy49K9R2F
QB3 Dummy2N7002
C
DCBATOUT
Near MAX1909 Pin 2
C49
1 2
SC1U10V3ZY
R37 33R2
Near MAX1909 Pin 21
C64 SC1U10V3ZY
PUMA SC
PUMA SC
BT+SENSE 34
RB2
1 2
Dummy499R5F
C
MAX1909_PDL
PUMA SC
G7
1 2
GAP-CLOSE-PWR
BT+
SE 0904
123
45
SSGD
U9 SI4431BDY
DDDS
678
SE 0904
678
DDD
U10 SI4800BDY
SSS
GD
123
4 5
5V_AUX
AC_IN#31
12
12
C47 SCD1U
1 2
R306 100KR2
U46
S
1
S
2
S
3
GD
4 5
AO4407
12
12
C45
SC10U25V0KX
L23
CHG_PWR-3CHG_PWR-2
IND-15UH-35
U47
5 6
2N7002DW
D
8
D
7
D
6
C46
34 2 1
D
12
SC10U25V0KX
D015R3720F-1
R324
1 2
MAX1909_ICTL
AC_OK
D
C288 SCD1U
DCBATOUT
BT_TH31,34
E
3D3V_AUX
3D3V_AUX16,20,31,32,34,36,37
5V_AUX14,15,37,38,39
U48
2N7002DW
DCBATOUT14,37,38,39,40,41
3D3V_AUX
R307 100KR2
34 2 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Leopard
E
BT+
BT+
12
12
TC13
TC12
SC10U25V0KX
SC10U25V0KX
MAX1909_LDO
12
R308 100KR2
12
R331 100KR2
PKPRES#
5 6
Title
CHARGER MAX1999
Size Document Number Rev
C
Date: Sheet
5V_AUX
DCBATOUT
AD+
AD+13,34,41
BT+
BT+31,34,41
12
-4
of
35 41Monday, February 28, 2005
Page 36
A
5V_S5 5V_S0 5V_S5
B
C
D
E
CPU_CORE-MAX1907
10
PM_STPCPU#
R585
0R2-0
R586
12
12
VCC
20
R262
R281
12
DPSLP#
35
12
DUMMY-R2
DUMMY-R2
SUS
R535 10R3
DUMMY-R2
DCBATOUT_BEAD
C7
1 2
SCD1U25V3KX
78.10422.2B1
34
39
12
U2
V+
30
VDD
31
BST
33
DH
32
LX
29
DL
28
PGND
18
CSP
19
CSN
17
OAIN+
16
OAIN-
15
FB
14
NEG
13
POS
11
GND
41
NC
TIME
MAX1907AETL-U
0223 -3
R3 47KR3
Boot-up Voltage : 1.2V , B0=L, B1=L, B2=Open
12
R267
DUMMY-R2
12
R292
20KR2
B
C12
SC4D7U10V5ZY
R10 0R3-0-U
1 2
MAX1907_DH
MAX1907_LX
MAX1907_DL
1907_CSP1 1907_CSN1
MAX1907_OAIN+ MAX1907_OAIN-
MAX1907_NEG MAX1907_POS
SC1000P50V
C6 SC470P50V2KX
1 2
1 2
1 2
1 2
12
12
MAX1907_VCC
3D3V_S0
4 4
CLK_PWRGD#3,20
VGATE20
PUMA SC
3 3
CPU_SHDN#38
Ton=NC, Freq.=300KHz
DUMMY-R2
MAX1907_REF
2 2
Deeper Sleep Voltage : 0.748V , S0=L, S1=H, S2=Open,
1 1
R13
R11
2K2R2F
1 2
H_VID05 H_VID15 H_VID25 H_VID35 H_VID45 H_VID55
1011 -1
12
R269
12
C3
SC1U10V3KX
R271
5V_S0 5V_S0 5V_S0 5V_S05V_S0
12
R264
DUMMY-R2
12
R287
20KR2
100KR2
1 2
MAX1907_S0 MAX1907_S1 MAX1907_S2
12
MAX1907_B0
R553
MAX1907_B1
100KR2
MAX1907_B2
R2
1 2
1KR2
C1
1 2
SC270P50V2JN
MAX1907_ILIM
12
R270 150KR2F
PM_DPRSLPVR17
100KR2
1 2
OCP=30A, Vally current = 27.5A, Vilim=550mV(55mVp-p*10)
0218 -3
A
C2
SC4D7U10V5ZY
1 2
R12
100KR2
1 2
38
SYSPOK
H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5
MAX1907_CC
PM_STPCPU#3,17
5V_S0
12
12
CLKEN#
36
SYSPOK
37
IMVPOK
4
S0
5
S1
6
S2
26
D0
25
D1
24
D2
23
D3
22
D4
21
D5
1
B0
2
B1
3
B2
7
SHDN#
40
TON
12
CC
8
REF
9
ILIM
27
DDO#
1 2
R263
DUMMY-R2
MAX1907_S2MAX1907_S0 MAX1907_S1 MAX1907_B0 MAX1907_B1 MAX1907_B2
R282
20KR2
12
R537
12
C5
SC100P50V2JN C4 R9
130R3F
Dummy0R3-0-U
21
D1
1 2
R6
1 2
offset 1.2%
R266
DUMMY-R2
R291
20KR2
12
SSM5818SL
C8
SCD1U25V3KX
1 2
R5 200R2F
1 2
SD 0723
R8
1 2
200R2F
R7
110R2F
698R2F
12
R294 1K18R3F
1 2
12
12
1011 -1
R554 0R3-0-U
R268 100KR2F
R265
DUMMY-R2
R290
DUMMY-R2
D
Q15 IRFR3707Z
1
G
3 4
S
D
Q16 IRFR3709Z
1
G
3 4
S
LS/IRFR3709Z/8.2mOhm/@4.5V
1907_CSP
VID
VID2
VID3 VID1 VID0
VID4
VID5
1
1
0
0
1
0
1 1
0
1
0
1 1
0
0
1
011 0
1
0
1
0 0
1 1
1
C
1
0
1
0
0
1
1
0
00
1
1 1 1 0 0
1 1 1 0
0
0
1
1
0
1
1
1
0
0
1
1
1
0
110
0
0
0
1
1
1
0
01
1 0
0
0
DCBATOUT_BEAD
D
Q4
1
G
IRFR3707Z
3 4
S
12
C14 SCD1U
HS/IRFR3707Z/12.5mOhm/@4.5V
12
D
Q3 IRFR3709Z
3 4
S
G1
1 2
GAP-CLOSE
VCCP_GMCH_S0
12
1907_CSP_G
12
3D3V_AUX
R529 4K7R2
V
C462
12
1
12
R530 22KR2J
SCD1U10V2MX-1
D
G
Vcore
1.340
1.324
1.292
1.260
1.244
1.212
1.180
1.148
1.100
1.052
1.020
0.972
0.940
1
C286
C285
12
12
SC4D7U25V6KX-L
L1
1 2
IND-D68UH-10
R21 698R2F
PUMA SC
R20
1 2
DUMMY-R3
C35
1 2
SCD47U10VKX
G4 GAP-CLOSE-PWR
R4
1 2
Dummy130R3F R293
1 2
698R2F
3D3V_S0
12
R528 10KR2
1
G
3
Q32 MMBT3904-1-U
2
1011 -1
DCBATOUT_BEAD
C9
C13
12
12
12
SC4D7U25V6KX-L
Title
Size Document Number Rev
Date: Sheet
SC4D7U25V6KX-L
SC4D7U25V6KX-L
12
G3 GAP-CLOSE-PWR
SD 0816
12
R527 Dummy100KR2
SYSPOK
D
Q31 2N7002
S
2 3
IMVP IV-CPU POWER-MAX1907
A3
12
C287
TC10
SCD1U
SE100U25V-U1
12
12
VCC_CORE_S0_G92
TC11
G2 GAP-CLOSE-PWR
ST220U2VDM-1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Leopard
E
VCC_CORE_S0
12
TC3
ST220U2VDM-1
36 41Monday, February 28, 2005
12
TC4
ST220U2VDM-1
of
12
TC2
ST220U2VDM-1
-4
Page 37
A
hexainf@hotmail.com GRATIS - FOR FREE
SYSTEM DC/DC 3D3V_S5 / 5V_S5
4 4
Sanyo / 6*7.7 / CV-AX
12
12
3V = 4Arms, OCP>6A
3D3V_DC_S5
L30
3 3
12
TC19 ST220U4VDM-L3
SC100P50V2JN
These components should be located near by MAX1977
2 2
5V_DC_S3
1 1
12
C78
BL3#39
5V_S3
3D3V_S53D3V_DC_S5
A
1 2
IND-8UH-2
12
R80 6K98R3F
12
R82 10KR3F
D6 dummy1SS400
D5 dummy1SS400
MAX1999_V+
12
R76
300KR3
12
R74 150KR3
PM_SLP_S3#17,21,28,31,38,40
PM_SLP_S3# high = PWM PM_SLP_S3# low = Ultrasonic
12
12
12
12
3D3V_S5
C120 C121 SCD1U
SC4D7U25V-U
C96 SC47P50V2JN
R90 2MR3
1999_S5ENABLE20,38
PM_SLP_S4#17,21,31,38
Q26
R1
2
IN
R2
DTC115EE-U
SKIP# > 2.4V : PWM mode SKIP# = GND( ,0.8V) : SKIP MODE SKIP# = REF (1.7V~2.3V)/FloatING Ultrasonic MODE(25KHz min)
OUT
3
GND
1
DCBATOUT
678
DDD
SSS
123
678
DDD
SSS
123
5V_AUX
12
B
U24 AO4422
GD
4 5
U25 AO4422
GD
Rds(on) = 24 mohm
4 5
1 2 1 2
R384 300KR2J
B
R83 4D7R5
1 2
MAX1999_REF
C
3
1
MAX1999_VCC
R387
1 2
47R2
D21 BAW56LT1
2
LDO5
18
12
17
VCC
BST5
DH5
LX5 DL5
OUT5OUT3
FB5
PRO#
NC
ILIM5
ILIM3
PGOOD
GND
MAX1999EEI
MAX1999_LDO5
C318 SC2D2U6D3V3MX-1
5V_AUX
MAX1999_V+
12
C80
SC1U25V5ZY
MAX1999_BST3
12
C336 SCD1U50V3KX
MAX1999_FB3 MAX1999_FB5
R3931KR2 R3861KR2
Vref = 2V
C316 SCD22U10V3KX
1 2
MAX1999_SKIP#
3D3V_AUX
12
C81
SCD1U
R399 0R3-U
1 2
MAX1977_BST3R MAX1999_BST5R
MAX1999_DH3
MAX1999_DL3 MAX1999_DL5
MAX1999_ON3 MAX1999_ON5
MAX1999_SHDN#
MAX1999_LDO3
G45
1 2
GAP-CLOSE-PWR
EC167
12
SCD1U25V3KX
20
28
26 27 24
13
12
V+
BST3
DH3 LX3 DL3
7
FB3
3
ON3
4
ON5
6
SHDN#
TON
8
REF
SKIP#
LDO3
25
12
C320
SC1U10V3KX
5V_S5 spec. = 10mA
MAX1999_ON3 MAX1999_ON5
12
C317
DUMMY-C2
12
C331 DUMMY-C2
C
1 2
12
C319 SC1U10V3ZY
U54
14
16 15 19 2122 9
10 1
11
5
2
23
G21
GAP-CLOSE
MAX1999_BST5
R362 0R3-U
1 2
MAX1999_DH5 MAX1999_LX5MAX1999_LX3
R385
MAX1999_PRO#
1 2
100KR2
MAX1999_ILIM
G44
1 2
GAP-CLOSE-PWR
5V = 5Arms, OCP>6.8A
12
C303 SCD1U50V3KX
CLOSE TO CMOS
5V_LDO=100mA3V_LDO=100mA
5V_AUX
D
DCBATOUT
678
DDD
SSS
GD
123
4 5
678
DDD
SSS
GD
Rds(on) = 24 mohm
123
4 5
MAX1999_VCC
R77
12
300KR3
R75 200KR3
1 2
ILIM5: 5V * 200K / (200K+300K) = 2.0V 200mV / 24 = 8.3A OCP point = 8.3A +1/2Iripple
ILIM3: 5V * 200K / (200K+300K) = 2.0V 200mV / 24 = 8.3A OCP point = 8.3A +1/2Iripple OCP point = 20A +1/2Iripple
ILIM*=Vcc 100mV ILIM*=Vref 200mV OCP= 0.1Vth/Rds(on) + 0.5Iripple
D
U16 AO4422
U19 AO4422
E
3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41 3D3V_S517,18,19,21,25,29,31,35,39,40
3D3V_AUX16,20,31,32,34,35,36
5V_S514,18,20,36,38
5V_AUX14,15,35,38,39
DCBATOUT14,35,38,39,40,41
12
12
C82
SC4D7U25V-U
Title
Size Document Number Rev
Date: Sheet of
C83
A3
12
C98 SCD1U
12
C79 SC47P50V2JN
12
R81 2MR3
5V_DC_S3
SC4D7U25V-U
L28
1 2
IND-8UH-2
DC/DC 3V_S5/5V_S5
12
R79
12
15K4R3
C77 SC100P50V2JN
12
R78 10KR3F
These components should be located near by MAX1977
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Leopard
37 41Monday, February 28, 2005
E
3D3V_S0 3D3V_S5 3D3V_AUX 5V_S5 5V_AUX DCBATOUT
12
TC14 ST150U6D3VDM-9
-4
Page 38
A
R409 3K9R2F
5130_INV1 5130_FB1
R414 2KR2F
5130_INV2 5130_FB2
R360
100KR2
R359
1 2
100KR2
PM_SLP_S3#
SD 0811
R413
1 2
680R2
R411
1 2
680R2
SC 0722
5
6
123 4
6
123 4
R361
1 2
100KR2
A
R410
1 2
7K87R2F
R412
1 2
20KR2F
5
5
6
123 4
C348
1 2
SC4700P50V2KX
SD 0823
C347
1 2
SC5600P25V2KX
U51 2N7002DW
U50 2N7002DW
U53 2N7002DW
PWM_1D5V
PWM_2D5V
5130_SS_STBY1
12
5130_SS_STBY2
5130_SS_STBY3
SC 0722
SD 0812
C119 SC1500P50V3KX
1999_S5ENABLE20,37
12
C118 SC4700P50V3KX
SD 0812
12
C335 SC1500P50V3KX
SC3300P50V2KX
For 1.5V SETTING=1.517V
R416
1 2
10KR3F
12
4 4
SC4700P50V2KX
1 2
SC3300P50V2KX
3 3
2 2
1 1
12
C349
For 2.5V SETTING=2.516V
R415
10K2R3F
12
12
C350
1 2
5V_AUX
PM_SLP_S3#
5V_AUX
PM_SLP_S4# 17,21,31,37
5V_AUX
B
C
TI TPS5130 for 2.5V, 1.5V, 1.05V.
(1D5V=>CH1 , 2D5V=>CH2 , 1D05V =>CH3)
For 1.05V SETTING=1.061V
R398
1 2
80K6R3F
C334
SD 0811
B
12
R397 2K7R2J
12
R392
1 2
1KR3
VCCP_PWGD20
R396
1 2
680R2
5130_INV3 5130_FB3
5130_FLT
12
C116 SCD01U16V3KX
5130_CT
12
C117 SC47P50V2JN
5130_REF
12
C97 SCD1U16V3KX
1 2
R395
1 2
20KR2F
5130_FB1 5130_SS_STBY1
5130_INV2 5130_FB2 5130_SS_STBY2
5130_PWM_SEL
5130_CT 5130_REF STBY_REF
SD 0820
C333
SC5600P25V2KX
1
FB1
2
SS_STBY1
3
INV2
4
FB2
5
SS_STBY2
6
PWM_SEL
8
GND
9
REF
10
STBY_VREF5
11
STBY_VREF3.3
5130_SS_STBY3 5130_FB3 5130_INV3
PWM_1D05V
5130_FLT 5130_INV1
48
46
47
FLT
LH1
INV1
TPS5130
FB3
INV3
SS_STBY3
14
15
13
C95
SC1000P25V
3D3V_S0
12
R170 10KR2
PM_SLP_S3#
HW Thermal Throttling
C115
1 2
SCD1U50V5KX
44
43
45
42
41
LL1
TRIP1
OUT1_D
OUT1_U
OUTGND1
LH3
TRIP3
PGOUT
PG_DELAY
VIN_SENSE3
20
18
19
16
17
12
3
5130_TRIP3
3D3V_S0
1 2
C
5130_OUT1U 5130_OUT1D
5130_TRIP1 5130_TRIP2
39
40
VIN_SENSE12
OUT3_U
22
21
5130_LH3
147
5130_LH1
5130_LL1
DCBATOUT
5130_OUT2D
37
38
TRIP2
OUT2_D
OUTGND2
OUT2_U
VREF3.3
VREF5
REG5V_INCT
LDO_IN
LDO_CUR
LDO_GATE
LDO_OUT
INV_LDOSTBY_LDO
LL3
OUT3_D
OUTGND3
23
24
TPS5130PT-U
5130_OUT3D 5130_LL3 5130_OUT3U
1 2
C94 SCD1U50V5KX
D23
BAT54-1
U37A
3
TSLCX08-U
LL2 LH2
VIN
5V_DC_S5
2 1
DCBATOUT
5V_DC_S5
1
5130_LL1 39
5130_OUT1U 39 5130_OUT1D 39
5130_OUT2D 39
U23
36 35 34 33 32 31
1 2
307 29 28 27 26 2512
1 2
For 1.5V SETTING=1.505V
5130_OUT3D 39 5130_OUT3U 39 5130_LL3 39
CPU_SHDN# 36
3
D24 BAW56
83.00056.A11
2
5130_LH2
5130_OUT2U
R552
0R2-0
1006 -1
C463 SCD1U
C114
1 2
SCD1U50V5KX
close to IC
D
SD 0811
5130_TRIP1
5130_TRIP2
5130_TRIP3
5130_LL2
DCBATOUT
5130_OUT2U 39
5V_S3
D
E
OCP_1.05V
1 2
1 2
SCD1U16V3KX
R408 15KR3
C346
DCBATOUT
close to IC
OCP_2.5V
R407
20KR3
C345
DCBATOUT
G28
1 2
GAP-CLOSE
1 2
1 2
SCD1U16V3KX
close to IC
OCP_1D5V
R394
20KR3 C332
DCBATOUT
1 2
1 2
SCD1U16V3KX
close to IC
5130_LL2 39
1 2
SCD1U
PM_SLP_S3#17,21,28,31,37,40
C344
5V_DC_S5
12
2
IN
Title
DC/DC 2D5V/1D5V/1D05V
Size Document Number Rev
A3
Date: Sheet
5V_S5
1 2
G52 GAP-CLOSE-PWR
C93 SC4D7U10V5ZY
5V_AUX
12
Q25
OUT
3
R1
GND
1
R2
DTC115EE-U
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Leopard
R383 300KR2J
5130_PWM_SEL
38 41Monday, February 28, 2005
E
-4
of
Page 39
A
hexainf@hotmail.com GRATIS - FOR FREE
TI TPS5130 for 2.5V, 1.5V, 1.05V
(1D5V=>CH1 , 2D5V=>CH2 , 1D05V =>CH3)
12
1008 -1
1 2
12
1008 -1
1 2
C128 SCD1U
L31
IND-4D7UH-56
C112 SCD1U
L29
IND-4D7UH-56
4 4
5130_OUT1U38 5130_LL138
5130_OUT1U
5130_LL1
Rds(on)=16mOhm
5130_OUT1D38
3 3
5130_OUT2U38 5130_LL238
5130_OUT1D
5130_OUT2U 5130_LL2
Rds(on)=16mOhm
2 2
5130_OUT2D38
5130_OUT2D
678
DDD
U27 SI4800BDY
SSS
GD
123
4 5
678
5
DDD
U26 IRF7807Z
S
GD
S
S
123
4
678
DDD
U22 SI4800BDY
SSS
GD
123
4 5
678
5
DDD
U21 IRF7807Z
S
GD
S
S
123
4
DCBATOUT
12
DCBATOUT
12
DCBATOUT
B
C129 SC4D7U25V6KX-L
PWM_1D5V
12
C113 SC4D7U25V6KX-L
TC18
ST220U2VDM-1
PWM_2D5V
12
1D5V/5A OCP=10A
2D5V/5A OCP=10A
TC17 ST220U4VDM-L3
PWM_1D5V 1D5V_S0
PWM_2D5V 2D5V_S3
C
D
1.5V_S5 (For ICH6)
PWM_1D05V
Power budget:1.25V/2.2Apeak (For DDR1_VTT)
1D05V_S0
1D25V / 1A
1D25V_S0
1013 -1
C460
TC8
12
12
SC10U10V5ZY-L
3D3V_S5
TC20
12
ST150U4VBM-L1
U59
VOUT
3
VIN
GND
APL5308-15AC-TR
Imax=300mA
C367
12
1013 -1
SC10U10V5ZY-L
U58
VINVOUT
VREF
VCNTLNC
7
NC
5 2
NC GND
GND
APL5331KAC-TR
14 3 68
9
2 1
2D5V_S3
1D5V_S5
5V_S0
11/29 -2
C414 SC10U10V6ZY-U
SCD1U10V2MX-1
C376
12
APL533_VREF1
12
C368
SCD1U10V2MX-1
L3# circuit
DummySE220U16VM-U
5V_AUX
2D5V_S3
12
12
R446 Dummy1KR2F
R133
1 2
R447
0R2-0
Dummy1KR2F
E
DCBATOUT14,35,37,38,40,41
3D3V_S517,18,19,21,25,29,31,35,37,40
5V_AUX14,15,35,37,38 1D5V_S518 2D5V_S37,9,10,11,12,38,40,41
5V_S013,14,18,19,20,21,23,27,28,29,32,36,40,41
1D25V_S012
DCBATOUT 3D3V_S5 5V_AUX 1D5V_S5 2D5V_S3 5V_S0 1D25V_S0
DDR_VREF_1 40
12
1008 -1
1 2
C75 SCD1U
L27
IND-4D7UH-56
678
DDD
U18 SI4800BDY
SSS
GD
123
4 5
5130_OUT3U38
5130_LL338
1 1
5130_OUT3D38
5130_OUT3U
5130_LL3
Rds(on)=16mOhm
5130_OUT3D
A
678
5
DDD
U15 IRF7807Z
S
GD
S
S
123
4
12
SD 0727
C76 SC4D7U25V6KX-L
12
R73
Dummy1KR2
B
PWM_1D05V
12
TC5 ST220U4VDM-10
1D05V/5A OCP=10A
L3# at 8.13V
SD 0727
DCBATOUT
12
12
HTH
12
R363 1MR2F
R364 6K04R2F
R323 174KR2F
C
U52
HTH
1
HTH
2
GND
3 4
LTH RESET#/RESET
G680LT1
12
C293 SCD1U10V2MX-1
5
VCC
BL3#37
D20
D
BAT54-1
2 1
RSMRST# 16,20,31
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
39.DC/DC 2D5V/1D5V/1D05 V - 2
Size Document Number Rev
A3
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
Leopard
39 41Monday, February 28, 2005
E
-4
3
Page 40
A
FOR GMCH Power
G27
1 2
4 4
CORE_GMCH_S0 1D05V_S0
VCCP_GMCH_S0 1D05V_S0
3 3
GAP-CLOSE-PWR
G26
1 2
GAP-CLOSE-PWR
G25
1 2
GAP-CLOSE-PWR
G14
1 2
GAP-CLOSE-PWR
G15
1 2
GAP-CLOSE-PWR
G16
1 2
GAP-CLOSE-PWR
B
DDR_VREF_139
C
2D5V_S3
12
C183 SCD1U16V3KX
12
C184 SCD1U16V3KX
12
R130 220R3F
12
R132 220R3F
D
U31
1
IN+
VDD
2
VSS
3 4
IN- OUT
dummyG1214
1 2
R131 0R3-U
5V_S3
5
C206 SCD1U16V
1 2
12
E
3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,41 3D3V_S313,14,30 3D3V_S517,18,19,21,25,29,31,35,37,39
5V_S013,14,18,19,20,21,23,27,28,29,32,36,39,41 5V_S313,14,26,30,32,37,38,41
5V_S514,18,20,36,38 2D5V_S07,9,15,18 2D5V_S37,9,10,11,12,38,39,41
DDR_VREF_S37,11
DCBATOUT14,35,37,38,39,41
1D05V_S038,39,41
VCCP_GMCH_S04,5,6,7,9,10,16,18,36,41 CORE_GMCH_S06,9,10,41
DDR_VREF_S3 need 10 mil and must neat NB and DIMM
DDR_VREF_S3
C167 SCD1U16V
VREFOUT = 1.25V
3D3V_S0 3D3V_S3 3D3V_S5 5V_S0 5V_S3 5V_S5 2D5V_S0 2D5V_S3
DDR_VREF_S3
DCBATOUT
1D05V_S0 VCCP_GMCH_S0 CORE_GMCH_S0
FOR DDR Power
Run Power
DCBATOUT
2 2
1 1
PM_SLP_S3#17,21,28,31,37,38
R437 10KR2
1 2
R438 330KR2
1 2
R448 100KR2
A
1 2
Q28 2N7002
Q27 TP0610K
S
1
G
5V_S0 5V_S3
U20
3D3V_S0
1 2 3 4 5
AO4422
U56
1
S
2
S
3
S
4 5
GD
AO4422
Q7 SI3456DV-U1
S
32
SD 0811
D
G
1
12
R436 1KR2
D
S
2 3
12
C369 SCD22U50V5KX
12
RB5 100R2
D
QB5
1
2N7002
G
S
2 3
PWR_S0_CTL
D27 RLZ12B
1 2
B
S S S GD
6 54
D
2 1
G
3
D D D
8
D
7
D
6
D
8 7 6
3D3V_S5
2D5V_S32D5V_S0
C
Suspend Power
R95 0R3-U
3D3V_S53D3V_S3
12
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
PWRPLANE&RESETLOGIC
Size Document Number Rev A3
D
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
Leopard
40 41Monday, February 28, 2005
E
-4
of
0223 -3
Page 41
A
hexainf@hotmail.com GRATIS - FOR FREE
5V_S0
4 4
12 13
3 3
SPR8 SPRING-18-U
1
SPR12 SPRING-4
1
2 2
147
SPR2 SPRING-18-U
1
SPR13 SPRING-4
1
U61D
11
TSAHCT32
5V_AUDIO_S0
12 13
AUD_AGND AUD_AGND
SPR3
SPR7 SPRING-18-U
SPRING-18-U
1
1
SPR14
SPR17
SPRING-4
SPRING-4
1
1
12
U40D
147
11
TSAHCT86
SPR4 SPRING-18-U
1
SPR15
SPR11 SPRING-4
1
SPRING-4
1
SPR16 SPRING-4
1
EC171
SCD1U16V
B
AUD_AGND
EC75
12
SCD1U16V
SPR10 SPRING-4
1
EC132
12
12
EC157
dummySCD1U16V
EC128
12
SCD1U16V
SPR1 SPRING-18-U
1
12
12
EC125
EC35
dummySCD1U16V
dummySCD1U16V
dummySCD1U16V
AUD_AGND AUD_AGND AUD_AGND
EC2
EC107
EC73
12
SCD1U16V
SPR9 SPRING-18-U
1
12
1
K70 GNDPAD
12
SCD1U16V
SCD1U16V
K71 GNDPAD
1
12
1
1
12
EC136
DUMMY-SCD1U16V
EC6
SCD1U16V
K72 GNDPAD
K69 GNDPAD
12
EC145
EC13
12
3D3V_S0
DUMMY-SCD1U16V
SCD1U16V
12
EC158
dummySCD1U16V
AUD_AGND
EC97
EC15
12
12
SCD1U16V
SCD1U16V
EC140
12
SCD1U16V
AUD_AGND AUD_AGND
EC55
12
DUMMY-SCD1U16V
EC67
12
DUMMY-SCD1U16V
C
EC151
12
5V_S0
12
EC155
DUMMY-SCD1U16V
12
SCD1U16V
12
1209 -2
EC78
SCD1U16V
EC131
SCD1U16V
12
12
EC50
EC147
DUMMY-SCD1U16V
DCBATOUT_BEAD
dummySCD1U16V
EC139
12
DUMMY-SCD1U16V
5V_S3
EC53
12
DUMMY-SCD1U16V
1D05V_S0
5V_S3
12
12
12
EC62
DUMMY-SCD1U16V
EC59
DUMMY-SCD1U16V
12
EC74
SCD1U25V3KX
EC169
12
EC21
SCD1U16V
SCD1U25V3KX
12
EC160
12
EC41
12
EC48
12
12
EC79
SCD1U25V3KX
SCD1U25V3KX
DUMMY-SCD1U16V
DUMMY-SCD1U16V
EC66
DUMMY-SCD1U16V
12
EC161
12
12
12
EC98
SCD1U25V3KX
EC57
DUMMY-SCD1U16V
EC65
DUMMY-SCD1U16V
12
SCD1U25V3KX
EC162
12
SCD1U25V3KX
EC72
SCD1U16V
12
12
12
EC129
SCD1U25V3KX
EC163
12
SCD1U25V3KX
EC32
12
SCD1U16V
EC137
DUMMY-SCD1U16V
EC58
DUMMY-SCD1U16V
EC64
12
SCD1U16V
D
DCBATOUT
EC105
12
SCD1U25V3KX
EC164
12
SCD1U25V3KX
EC119
12
EC150
12
DUMMY-SCD1U16V
3D3V_S0
EC47
12
DUMMY-SCD1U16V
EC29
12
E
DCBATOUT
EC108
12
EC52
12
SCD1U25V3KX
12
SCD1U16V
12
12
5V_S3
12
DUMMY-SCD1U16V
SCD1U25V3KX
BT+
12
EC26
SCD1U16V
EC141
DUMMY-SCD1U16V
EC43
DUMMY-SCD1U16V
EC51
DUMMY-SCD1U16V
12
12
EC99
EC106
SCD1U25V3KX
EC168
12
EC91
SCD1U25V3KX
SCD1U25V3KX
EC28
12
SCD1U16V
EC71
12
DUMMY-SCD1U16V
EC46
12
SCD1U16V
EC38
12
DUMMY-SCD1U16V
SCD1U25V3KX
12
12
12
12
EC104
12
EC27
SCD1U16V
EC143
DUMMY-SCD1U16V
EC45
DUMMY-SCD1U16V
12
EC76
EC109
SCD1U25V3KX
EC14
12
SCD1U16V
SCD1U16V
EC25
12
SCD1U16V
EC127
12
DUMMY-SCD1U16V
5V_S3
SCD1U25V3KX
12
12
12
12
EC24
SCD1U16V
3D3V_S03D3V_S0
EC123
DUMMY-SCD1U16V
EC23
DUMMY-SCD1U16V
EC90
12
12
12
SCD1U25V3KX
EC9
12
SCD1U16V
EC117
SCD1U16V
EC130
DUMMY-SCD1U16V
EC81 SC1000P50V
VCCP_GMCH_S0
EC96
12
SCD1U16V
2D5V_S3
EC122
12
SCD1U16V
12
12
12
EC7
12
EC116
SCD1U16V
EC70
DUMMY-SCD1U16V
12
EC3
SCD1U25V3KX
EC118
12
SCD1U16V
SCD1U16V
EC138
12
DUMMY-SCD1U16V
12
EC77
SCD1U25V3KX
EC111
12
3D3V_LAN_S5
3D3V_S0
AD+
12
EC5
EC4
SCD1U25V3KX
EC134
12
SCD1U16V
SCD1U16V
EC30
12
SCD1U16V
EC144
12
DUMMY-SCD1U16V
SCD1U25V3KX
H19 HOLE
H5 HOLE
1 1
H1 HOLE
H17 HOLE
1
H13 HOLE
1
H9 DYHOLE
1
H14 HOLE
1
H6 HOLE
1
H2 HOLE
1
A
H8 HOLE
1
H7 HOLE
1
H3 HOLE
1
H11 HOLE
1
H4 HOLE
1
H22 HOLE
1
H10 HOLE
1
H16 HOLE
1
H20 HOLE
1
H12 HOLE
1
H21 HOLE
1
H18 HOLE
1
B
H15 HOLE
12
EC33
SCD1U16V
EC170
SCD1U25V3KX
CORE_GMCH_S0
EC113
12
12
SCD1U16V
C
EC112
SCD1U16V
EC148
12
5V_S0 5V_S0 5V_S0
EC69
EC68
EC63
EC54
12
EC146
SCD1U16V
12
12
EC60
DUMMY-SCD1U16V
EC149
SCD1U16V
EC120
12
SCD1U16V
EC126
12
SCD1U16V
SCD1U16V
EC61
12
DUMMY-SCD1U16V
EC34
12
SCD1U16V
12
EC121
SCD1U16V
12
12
EC49
DUMMY-SCD1U16V
1D5V_S0
EC135
SCD1U16V
D
12
12
DUMMY-SCD1U16V
EC114
SCD1U16V
EC142
12
DUMMY-SCD1U16V
Title
Size Document Number Rev
A3
Date: Sheet of
EC37
12
12
DUMMY-SCD1U16V
DUMMY-SCD1U16V
MISC & EMI
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Leopard -4
EC40
12
DUMMY-SCD1U16V
41 41Monday, February 28, 2005
E
12
12
DUMMY-SCD1U16V
DUMMY-SCD1U16V
1
1
1
H23 HOLE
H24 HOLE
1
H25 HOLE
1
1
EC10
EC115
EC133
12
12
SCD1U16V
SCD1U16V
1
12
12
SCD1U16V
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