HP DV3000 DIABLO SI Build AX1 Schematics

DIABLO 13.3"
SI Build
2007.10.11
REV
DRAWER DESIGN CHECK RESPONSIBLE
FILE NAME :
XXXXXXXXXXXX
P/N
EE
XXXX-XXXXXX-XX
DATE
POWER
VER :
DATE
INVENTEC
TITLE
DIABLO
CODE
SIZE
A3
CS
SHEET
DOC. NUMBERSIZE = 3
161
REV
AX1Model_No
OF
TABLE OF CONTENTS
PAGE 5- DC& BATTERY CHARGER
6- BATTERY CONN 7- SYSTEM POWER(3V/5V) 8- SYSTEM POWER(+V1.8/+V1.25S)
9- GRAPHIC POWER(+VGFX_CORE) 10- SYSTEM POWER(+VCCP/+V1.5S) 11- CPU POWER(VCC_CORE) 12- DDR TERMINATION VOLTAGE 13- POWER(SLEEP) 14- POWER(SEQUENCE)
PAGE 15- CLOCK_ICS9LPRS355BGLFT
16- MEROM-1 17- MEROM-2 18- MEROM-3
19- THERMAL & FAN Conn 20- Crestline-1 21- Crestline-2
22- Crestline-3 23- Crestline-4 24- Crestline-5 25- Crestline-6 26- DDR2-DIMM0 27- DDR2-DIMM1 28- DDR2-DAMPING 29- CRT CONN 30- LCM CONN
31- ICH8-1 32- ICH8-2 33- ICH8-3 34- ICH8-4 35- ICH8-5
PAGE 36­37- HDD&ODD CONN 38- USB CONN 39- KBC & IR & SPI BIOS & T/P Conn 40- KB&TP Disable CONN 41- AUDIO CODEC 42- AUDIO AMP-HP MIC VOL 43- MDC CONN & Audio Jack 44- LAN CONTROLLER- RTL8111C
45- LAN POWER 46- RJ45 CONN 47- MINICARD CONN 48- HDMI CONN & NEW CARD CONN
49- LED & BUTTON 50- SCREW 51- TOUCHPAD BOARD 52- WEB CAM & FINGER PRINT Conn 53- AU6371 Cardreader & 4 IN 1 Conn
54- External Board 55- nVIDIA NB8MGS-1 56- nVIDIA NB8MGS-2 57- nVIDIA NB8MGS-3 58- nVIDIA NB8MGS-4 59- nVIDIA NB8MGS-5
60- VRAM-1 61- VRAM-2
INVENTEC
TITLE
DIABLO
SIZE
CODE
A3
CHANGE by SHEET
Drawer_Name
9-Oct-2007
CS
DOC. NUMBER
Model_No AX1
REV
OF
612
Clock Generator
ICS9LPRS355
P.15
MAIN BATT
System Charger &
DC/DC System power
CARD READER
AU6371
4 in 1
Conn
P.53
USB_5
P.53
USB_2
Conn
P.38
USB_3
WEB CAM
Conn
V-RAM
32M X 16
(256M)
LCM
VGA HDMI
USB_1
Conn
FINGER PRINTER
P.52
P.60,61
P.30
P.29
P.48
Conn
P.38
DDR2
LVDS
CRT
SIL3531CNU
ESATA + USB
USB_6
P.51
NVIDIA
NB8M-GS
G86
P.55~59
P.38
SATA
Conn
(USB_0) P.38
BLUE TOOTH
USB_7
Conn
PCI_EXPRESS
PCI_EXPRESS
P.38
P.47
Merom/Penrym
(478 uFCPGA)
Crestline
965PM
(1299 PCBGA)
P/N:6019B0226902
ICH8-M
676 BGA
USB2.0
FSB
DMI
P.17~19
P.20~25
P.31~35
PATA SATA
LAN
PCI_EXPRESS
DDR2
DDR2
ODD
MINI CARD
CONN
(WLAN)
(USB_8)
DDR II _SODIMM0
DDR II _SODIMM1
P.37
HDD
New Card
CONN
(USB_4)
P.47
P.37
P.48
P.26
P.27
NIC GIGA
RTL8111C
P.44
MDC V1.5
CONNECTOR
RJ11
P.43
DIGI MIC
P.52
AUDIO CODEC
IDT 92HD71B
Mic IN
Headphone
P.42
P.42
P.41
Headphone
P.43
HDA
Speaker
P.42
LPC
Keyboard
P.40
ITE 8512E
P.39
TouchPad
P.39
CHANGE by
KBC
CIR
P.39
Drawer_Name
SPI
SYSTEM
BIOS
P.36
9-Oct-2007
RJ45
P.46
INVENTEC
TITLE
DIABLO
SIZE
CODE
DOC. NUMBER
A3
Model_No AX1
CS
SHEET
REV
OF
613
Adapter
(90W)
Selector
(Discrete)
ADP_ID
(BQ24721)
+VBATR
Charger
+VBDC
+VBATA
CHGCTRL_3 BATT_IN
ADP_PRES I_ADP
BATT_CLK BATT_DATA
Main Battery
KBC_PW_ON
+1.8_ON
+V1.25S_ON
5/3.3V
(TPS51120)
+V0.9S_ON
IO POWER
(TPS51124)
+V5A +V3A
+V5AL
+V3AL
+1.8S_EN
+V1.25S
+V1.8
V1.8_PG
V1.25S_PG
+V1.5S_ON
+VCCP_ON
FDC655BN
LR
(G2997)
LR
(APL5913)
LR
(G9338)
+V1.8S
+V0.9S
FDC655BN
FDC655BN
V1.5S_PG
+VCCP
VCCP_PG
+V5S
+V3S
M_VREF
+V1.5S
+VCORE_ON
PM_DPRSLPVR
PSI#
H_DPRSTP#
+1.2S_ON
+VGAVCC_ON
nVIDIA
GPU POWER
(TPS51511)
IMVP VI
(ADP3208)
+VGAVCC
+V1.2S
VGA_PG
+VCC_CORE
VR_PWRGD
CHANGE by
INVENTEC
TITLE
DIABLO
SIZE
9-Oct-2007Drawer_Name
A3
CODE
CS
SHEET
DOC. NUMBER
461
REV
AX1Model_No
OF
C533
1
OPEN
2
1
C520
2
33uF_25v
+VBATR
1
2
R513
OPEN
5-,7-,8-,9-,11-,13-,36-
1
2
R512
OPEN
2
D505
3
1
OPEN
+VADP
5-
1
2
1
2
2VREF +V5AL
7-
1
2
R124
100K_1%
R733
8.25K_1%
R123
14.3K_1%
BAT54S_30V_0.2A_OPEN
+V5AL
5
+
OUT
6
-
3
+
OUT
2
-
C64
1
2
0.022uF_16v
Q507
1
8
D
S
2
7
3
6
4
5
G
FDS6675BZ
R122
2
1
1M_5%
5-,7-,49-
8
U7-B
7
ON_LM393DR2G_SOP_8P
4
5-,7-,49-
8
U7-A
1
ON_LM393DR2G_SOP_8P
4
R734
12
1M_5%
C130
1 2
0.1uF_10v
+V3AL
1
R515
15K_5%
2
+VADP
5-,6-,39-
1
2
5-,6-,7-,31-,39-,49-
1
2
R519
12
0_5%
5-
1
R30
200K_1%
2
1
R29
24.3K_1%
2
R121
10K_5%
R516
5-,6-,7-,31-,39-,49-
10K_5%
39-
1 2
1
2
ADP_PRES
AC_OK
C517
10pF_50v
C17
2.2uF_25v
1uF_10v
CHGCTRL_3
BATT_CLK
BATT_DATA
+VADP
5-
1 2
C516
0.1uF_25v
CHARGE_GND
C18
2
CHARGE_GND
L507
NFM60R30T222
12
3
4
C23
1 2
0.1uF_25v
+V5AL
5-,7-,49-
1
2
1
1
2
1
2
+V3AL
R514
1
10K_5%
6-,39-
6-,39-
6-,39-
+VADPTR
C518
1 2
10pF_50v
R511
12
0.01_1%_1W
C20
12
0.1uF_25v
Kevin sense
R25
8.06K_1%
R26
22.6K_1%
39-
BATT_IN
R17
39.2K_1%
2
R518
12
10_5%
R517
12
10_5%
+VADPTR
5A
6-
C502
1 2
0.1uF_25v
1 2
CHARGE_GND
BATT_TS
C22
0.1uF_25v
12
11
10
15
14 13 25
17
C503
1 2
1uF_25v
For EMI
U3
VCC
3
ACN
4
ACP
6
BYPASS#
5
ACDET
VREF5
AGND
TS
1
CHGEN#
SCL SDA ALARM#
IOUT
TI_BQ24721C_QFN_32P
CHARGE_GND
1 2
BATDRV#
C15
0.1uF_10v
C49
1 2
ACDRV#
SYS
PVCC
HIDRV
PH
BTST
REGN
LODRV
PGND SYNP SYNN
SRP SRN BAT
EAO
EAI
FBO
ISYNSET
TML
R18
12
0_5%
39-
I_ADP
4.7uF_25v
2
23
24
32
30
29
12
31
28
27 26 22 21 20 19 18
7
8 9
16 33
CHARGE_GND
PAD1
1 2 3
SMDPAD_3P_79X197
1
R49
10K_1%
2
39-
1
R48
18K_1%
2
C50
1 2
0.01uF_50v
D507
R530
4.7_5%
13
BAT54_30V_0.2A
1
R520
100K_5%
2
ADP_ID
R737
12
20K_5%
1 2 3 4
C48
12
1uF_6.3v
1
R28
200K_5%
2
Q510
S
G
FDS6675BZ
C537
0.1uF_25v
12
1
R27
18K_5%
2
C19
1 2
100pF_50v
+VADP
5-
1
R735
1_5%
2
R736
12
1M_5%
3
+
OUT
2
-
R738
12
OPEN
8
D
7 6 5
1
8
FAIR_FDMS9620S_MLP_8P
C21
1
56pF_50v
2
5
+
OUT
6
-
8
U517-A
1
6-
ON_LM393DR2G_SOP_8P
4
Q511
2
1
Q1
Q2
C545
3 4
2
0.1uF_25v
9
10
5 6 7
L509
12
PCMB063T_100MS
1
R31
10K_5%
2
C24
1
1500pF_50v
2
CHANGE by
C764
1
8
U517-B
2
7
ON_LM393DR2G_SOP_8P
4
1uF_25v
BATTDRV#
C535
1
1
4.7uF_25v
2
2
C546
1 2
4.7uF_25v
C547
1
4.7uF_25v
2
CHARGE_GND
Drawer_Name
For DC JACK LED
SMDPAD_2P_39X118
ADP_PRES
+VBATR
5-,7-,8-,9-,11-,13-,36-
C534
1 2
4.7uF_25v
C536
4.7uF_25v
R531
12
0.01_1%_1W
Kevin sense
C16
12
0.1uF_25v
1 2
C13
0.1uF_25v
C12
1 2
CHARGE_GND
0.1uF_25v
9-Oct-2007
PAD2
5-,6-,39-
C519
1 2
0.01uF_50v
1 2
C14
1 2
CHARGE_GND
12
1 2
Q506
3
D
G
1
S
2
SSM3K7002F
1
S
2 3
FDS6675BZ
C548
1 2
4.7uF_25v
C549
4.7uF_25v
0.1uF_25v
INVENTEC
TITLE
DIABLO
DC &BATTERY CHARGER
CODE
A3
CS
SHEET
+V5AL
5-,7-,49-
R32
12
270_5%
+VBDC
6-,36-
Q512
8
D
7 6 54
G
DOC. NUMBERSIZE
Model_No AX1
OF
615
REV
CHGCTRL_3
ADP_PRES
+VBATT
6-
CHENKO_LL4148_2P
5-,39-
5-,39-
BATTDRV#
D510
21
12
D511
R549
12
1.5M_5%
3
BAT54A
5-
+V3AL
5-,6-,7-,31-,39-,49-
1
R552
10K_5%
2
Q513
S1
2
G1
D1 D2
5
G2
S2
2N7002DW
+VBDC
5-,36-
Q3
8
D
7 6 54
FDS4435BZ
1 6
3 4
+VBATT
6-
1
S
2
1
R550
3
G
470K_5%
2
1
R548
4.7K_5%
2
BATT_DATA
BATT_CLK
BATT_TS
5-,39-
5-,39-
+V3AL
5-
5-,6-,7-,31-,39-,49-
1
R544
3.6K_5%
2
1
3
2
D508
+V3AL
5-,6-,7-,31-,39-,49-
1
D509
2
1
R543
3.6K_5%
2
12
10_5%
3
R545
R542
12
10_5%
C5211
2
OPEN
R547
12
1K_1%
1 2
BAT_ID
5-,6-,7-,31-,39-,49-
R546
10K_5%
C8
0.1uF_25v
39-
+V3AL
1
2
SYN_200275MR008G10NZL_8P
CN502
8
8
G
7
G2
7
G
6
G1
6
5
5
4
4
3
3
2
2
1
1
CHENMKO_BAV99
CHENMKO_BAV99
CHANGE by
Drawer_Name
9-Oct-2007
INVENTEC
TITLE
DIABLO
BATTERY CONN
A3
CS
SHEET OF
661
REVSIZE CODE DOC. NUMBER
AX1Model_No
13-,30-,32-,33-,34-,36-,41-,43-,45-,47-,48-
+V3A
PAD504
POWERPAD_2_0610
C749 1
1uF_10v
2
KBC_PW_ON
17.4K_1%
C730
4.7uF_25v
L523
SLF7055T_4R7N5R1
1
C750
2
330uF_4v
R709
39-
+VBATP
7-
1 2
12
R719
OPEN
C732
OPEN
+VBATR +VBATP
5-,8-,9-,11-,13-,36-
PAD503
3 4
POWERPAD_4A
R705
12
1 2
1
2
1 2
7.32K_1%
C731
4.7uF_25v
12
51120GND
S1_D2
5 67
4
S2
Q526
FDS6900AS
D1
1 23 8
G1
G2
C724
0.1uF_16v
12
7-
R710
0_5%
R711
12
4.7_5%
+V3AL
5-,6-,31-,39-,49-
1
C726
4.7uF_6.3v
2
12
1000pF_50v
10 11 12 13 14 15 16
14.7K_1%
R690
12
0_5%
2VREF
5-,7-
1
C723
2
51120GND
6
8
7
VO2
VFB2
COMP2
TI_TPS51120_QFN_32P
9
EN5 EN3 PGOOD2 EN2 VBST2 DRVH2 LL2 DRVL2
VREG3
CS2
PGND2
19
18
17
1
R714
2
+V5AL
5-,49-
C7291
4.7uF_6.3v
2
4
5
GND
VREF2
VREG5
V5FILT
21
20
C727
1
0.1uF_16v
2
VFB1
VIN
R706
12
0_5%
U515
3
1
2
VO1
COMP1
SKIPSEL
TONSEL
PGOOD1
EN1 VBST1 DRVH1
LL1 DRVL1
CS1
PGND1
22
23
24
1
R713
8.87K_1%
2
R712
12
10_5%
33 32 31 30 29 28 27 26 25
51120GND
30K_1%
7.32K_1%
R708
R707
12
12
51120GND
+VBATP
1 2
C714
4.7uF_25v
1 2
7-
C715
1 2
4.7uF_25v
L522
12
SLF10155T_4R7N6R2
1
R666
OPEN
2
C706
220uF_6.3v
OPEN
C712
8-,9-,10-,11-,12-,13-,30-,34-,36-,39-,41-,42-
POWERPAD_2_0610
1
1
C701
2
1uF_10v
2
+V5A
PAD502
SLP_S3#_3R
14-,32-,38-,39-,41-,48-
2VREF
5-,7-
C713
R691
12
12
4.7_5%
0.1uF_16v
C725
1 2
4.7uF_25v
C728
1 2
1uF_10v
8
765
G
1S23
4
765
G
23
41
D
Q525
SI7326DN
8
D
S
Q527
FDS6690AS
Drawer_Name 9-Oct-2007
INVENTEC
TITLE
DIABLO
SYSTEM POWER(3V/5V/12V)
CODE
DOC. NUMBERSIZE
A3
Model_No AX1
CS
SHEET OFCHANGE by
REV
617
R536
12
43.2K_1%
R539
12
30K_1%
51124GND
51124GND
R538
12
30K_1%
R537
1
20.5K_1%
2
+V1.8
9-,10-,12-,13-,20-,23-,24-,26-,27-,36-
PAD3
POWERPAD_2_0610
+VBATR
5-,7-,8-,9-,11-,13-,36-
C11
1 2
4.7uF_25v
L2
12
PCMC063T_1R0MN
1
C9
2
330uF_2v_9mR_Panasonic
C10
1 2
4.7uF_25v
1
R47
OPEN
2
C47
1
OPEN
2
FDS6676AS
SI7326DN
14-
V1.8_PG
12-,39-
+V1.8_ON
1
C540
0.1uF_16v
R535
0_5%
1
2
12
2
4.7_5%
R534
8
765
D
Q5
G
S
123
4
65
87
D
G
41S23
Q4
R532
12
0_5%_OPEN
6
VO2
7
PGOOD2
8
EN2
9
VBST2
10
DRVH2
TI_TPS51124RGER_QFN_24P
LL2
12
DRVL2
PGND2
13
R541
12
0_5%
51124GND
5
VFB2
TRIP2
14
1
R540
12K_1%
2
4
TONSEL
V5FILT
15
GND
V5IN
3
16
U502
2
VO1
VFB1
PGOOD1
TRIP1
PGND1
17
1
R556
15.4K_1%
2
1
18
GND
VBST1
DRVH1
DRVL1
25 24
23
EN1
22
21
2011
LL1
19
1 2
7-,9-,10-,11-,12-,13-,30-,34-,36-,39-,41-,42-
C539
14-
C550
R554
12
4.7_5%
R533
12
10_5%
1uF_10v
R555
0_5%
V1.25S_PG
12
0.1uF_16v
+V5A
1 2
12
+V1.25S_ON
G
4
G
4S123
C538
4.7uF_6.3v
8
765
D
S
123
8
765
D
39-
Q6
SI7326DN
Q8
FDS6690AS
+VBATR
5-,7-,8-,9-,11-,13-,36-
C129
1 2
4.7uF_25v
1
R55
OPEN
2
C63
1 2
C128
1 2
4.7uF_25v
L4
12
PCMC063T_2R2MN
OPEN
POWERPAD_2_0610
1
C62
220uF_2.5v_R35
2
PAD4
+V1.25S
10-,20-,24-,34-
INVENTEC
TITLE
DIABLO
CHANGE by
Drawer_Name
9-Oct-2007
SYSTEM POWER(+V1.8/+V1.25S)
A3
DOC. NUMBERSIZE
CODE
Model_No AX1
CS
SHEET
REV
OF
618
+V1.2S_ON
+VGAVCC_ON
+V1.2S
55-,56-,58-
39-
1 2
C687
1 2
1uF_10v
39-
Hi=0.95V of VGAVCC Lo=1.15V of VGAVCC
R255
12
150K_1%
C686
22uF_6.3v
R631
12
0_5%
1
2
1
2
VGAP_AGND
C377
1 2
0.1uF_16v
R633
12.4K_1%
R632
20K_1%
1
R630
39K_1%
2
+V1.8
8-,10-,12-,13-,20-,23-,24-,26-,27-,36-
876
C688
12
10uF_6.3v
20
1
U510
2
NC
3
VLDO
4
VLDOFB
5
GND
6
ODOFF
7
OD
8
COMP
9
VOSW
21
TML-PAD
C685
1 2
OPEN
R244
12
0_5%
VBST
VLDOIN
PGOOD
ENLDO
VSWFB
TI_TPS51511_RHL_20P
11
10
C378
19
DRVH
18
LL
17
DRVL
16
PGND
15
CS
14
V5IN
13 12
ENSW
R628
12
0_5%
0.1uF_16v
12
R635
12
0_5%
12
R650
12
10K_1%
R256
12
10K_1%
14-
VGA_PG
C700
0.1uF_16v
+V5A
7-,8-,10-,11-,12-,13-,30-,34-,36-,39-,41-,42-
C699
1 2
4.7uF_6.3v
5
G
412
3
G
Q524
FDS6676AS
Q523
8D7654
S
123
SI7326DN
+VBATR
5-,7-,8-,11-,13-,36-
C709
1
C401
2
1 2
1
R257
OPEN
2
C379
1
OPEN
2
4.7uF_25v
4.7uF_25v
L521
12
PCMC063T_1R0MN
1 2
C684
1000pF_50v
VGAP_AGND
1
R629
C683
10K_1%
330uF_2v_9mR_Panasonic
2
1
R627
36.5K_1%
2
PAD501
POWERPAD_4A
12
+VGAVCC
55-
2 3
1
4
1
C354
10uF_6.3v_OPEN
2
CHANGE by
Drawer_Name
9-Oct-2007
INVENTEC
TITLE
DIABLO
GRAPHIC POWER (+VGFX_CORE)
SIZE DOC. NUMBER
CODE
A3
CS
SHEET
OF
961
REV
AX1Model_No
+V5A
7-,8-,9-,10-,11-,12-,13-,30-,34-,36-,39-,41-,42-
+V1.8
8-,9-,12-,13-,20-,23-,24-,26-,27-,36-
G9338
SC339
+V5A
7-,8-,9-,10-,11-,12-,13-,30-,34-,36-,39-,41-,42-
1
C42
0.1uF_16v
2
+VCCP_PG
R579
0 ohm
OPEN
R576
OPEN
0 ohm
+V1.25S
GMT_G9338_ADJTBUf_SOT23_6P
1
R24
0_5%
2
14-,57-
R578
OPEN
0 ohm
1 2
R577
0 ohm
OPEN
1
2
3
8-,20-,24-,34-
C552
4.7uF_6.3v
12
OPEN
VCC
GND
PGD
U6
Q516
FDS6690AS
8
D
7 6 54
G
R41
6
DRV
5
ADJ
4
EN
+VCCP
15-,16-,17-,18-,21-,23-,24-,31-,34-,36-
1
S
2 3
1
R40
47_5%
2
C41
1 2
0.033uF_16v
1
R23
0_5%
2
39-
+VCCP_ON
1
R22
113_1%
2
1
R39
100_1%
2
1 2
C553
10uF_6.3v
PAD500
POWERPAD_2_0610
C554
1 2
10uF_6.3v
+V1.5S_ON
1
R591
0_5%
2
39-
C649
1 2
1uF_10v
U13
6
VCNTL
7
POK
8
EN FB
VIN
GND
9
1
ANPEC_APL5913_KAC_TRL_SOP_8P
14-
VOUT VOUT
VIN
1 2
5
3 4
2
V1.5S_PG
C328
22uF_6.3v
C345
1 2
22uF_6.3v
1 2
C659
1uF_10v
1 2
C660
39pF_50v
PAD5
POWERPAD_2_0610
1
R605
27.4K_1%
2
1
R606
30K_1%
2
+V1.5S
13-,18-,24-,34-,36-,47-,48-
CHANGE by
Drawer_Name
9-Oct-2007
INVENTEC
TITLE
DIABLO
SYSTEM POWER(+VCCP/+V1.5S)
SIZE
A3
CODE
CS
SHEET
DOC. NUMBER
OF
10 61
REV
AX1Model_No
1
VCOREGND
+VCORE_ON
VR_PWRGD
C135
330pF_50v
C137
1000pF_50v
PM_DPRSLPVR
39-
32-
12
12
R132
1.65K_1%
0.012uF_16v
2
R161
12
0_5%
PSI#
H_DPRSTP#
C134
220pF_25v
1
C133
2
VCOREGND
17-
17-,20-,31-
20-,32-
R133
0_5%
1
12
R131
12
68K_1%
C132
680pF_50v
CSREF
18-
VCCSENSE
18-
VSSSENSE
R134
1
499_1%
2
VCOREGND
C138
4700pF_25v
12
1
C136
18pF_50v
2
1 2
+V5S
13-,19-,29-,30-,32-,34-,36-,37-,38-,41-,48-,49-,52-,57-
11-
1000pF_50v
C168
H_VID6 H_VID5 H_VID4 H_VID3 H_VID2 H_VID1 H_VID0
2
1
EN
2
PWRGD
3
PGDELAY
4
CLKEN
5
FBRTN
6
FB
7
COMP
8
SS
9
ST
10
VARFREQ
11
VRTT
12
TTSEN
VCOREGND
1 2
VCOREGND
113K_1%
18­18­18­18­18­18­18-
45
44
43
42
41
40
PSI
CLIM
39
VID0
VID1
VID2
VID3
VID4
VID5
RAMP20RPM22RT
CSCOMP
CSFEF19CSSUM
VRPM
LLINE
17
18
21
16
49
48
47
46
TML
DPRSLP
DPRSTP
U9
ADI_ADP3208_LFCSP_48P
PMON
PMONFS
15
13
14
2
1
2
R129
1
1
C165
1000pF_50v
2
2
R159
100K_5%
1
37
SP
VCC
VID6
GND
23 38
24
215K_1%
1
R156
150K_1%
0.01uF_16v
R130
274K_1%
2
VCOREGND
BST1
DRVH1
SW1 PVCC1 DRVL1
PGND1 PGND2
DRVL2 PVCC2
SW2
DRVH2
BST2
R157
2
12
C166
1
1 2
VCOREGND
12
169K_1%
12
169K_1%
R154
12
220K_1%
1
C167
2
330pF_50v
2
R160
10_5%
1
C171
1 2
2.2uF_6.3v
36 35 34 33 32 31 30 29 28 27 26 25
VCOREGND
C131
1000pF_50v
R155
R153
+V5A
7-,8-,9-,10-,12-,13-,30-,34-,36-,39-,41-,42-
C170
1 2
2.2uF_6.3v
D4
BAT54A
1
R164
12
12
2
R127
76.8K_1%
1
12
4.7_5% 1uF_16v
R158
12
4.7_5%
C191
1uF_16v
+VBATR
5-,7-,8-,9-,11-,13-,36-
R128
12
100_5%
1
R587
220K_5%
2
NTC thermistor, place near L16
C192
+VBATR
5-,7-,8-,9-,11-,13-,36-
1
2
C664
100uF_25v
1 2
2
1
C198
C197
4.7uF_25v
1 2
C189
4.7uF_25v
1 2
C199
4.7uF_25v
4.7uF_25v
3
2
C169
1 2
OPEN
C255
1 2
4.7uF_25v
1 2
FDS6676AS
C256
4.7uF_25v
Q9
1 2
C254
4.7uF_25v
765
G
3
4
X 3
G
23
41
Q11
FDS6676AS
G
43
8
D
G
1S2
4
G
4
8765
D
G
S
41S23
56789
Q10
SI7686DP_T1_E3
21
Q517
8765
FDS6676AS
D
S
123
56789
Q12
SI7686DP_T1_E3
321
8765
D
Q13
FDS6676AS
R163
OPEN
C190
OPEN
C330
OPEN
ETQP4LR36WFC_PANASONIC
1
2
1 2
1
R213
OPEN
2
1 2
L512
12
2 R174
10_1%
1
11-
CSREF
2 R175
10_1%
1
L515
12
ETQP4LR36WFC_PANASONIC
+VCC_CORE
18-
INVENTEC
TITLE
DIABLO
CPU POWER(VCC_CORE)
CHANGE by
CODE
SIZE
A3
CS
9-Oct-2007Drawer_Name
SHEET
11 61
REVDOC. NUMBER
AX1Model_No
OF
+V1.8_ON
+V0.9S_ON
8-,39-
39-
+V1.8
8-,9-,10-,13-,20-,23-,24-,26-,27-,36-
1 2
C578
4.7uF_6.3v
+V5A
7-,8-,9-,10-,11-,13-,30-,34-,36-,39-,41-,42-
U503
GMT_G2997F6U_MSOP10_10P
TML11VDDQSNS
10 2
VIN
9
S5 GND8PGND
7
S3
6
C577
1uF_10v
C576
1 2
VTTREF
VREF_R
0.1uF_16v
12
1 2
NOTE: DDR2 REGULATOR
R753
0_5%
VLDOIN
VTTSNS
VTT
1
3 4 5
20-,26-,27-
M_VREF
+V0.9S
1 2
28-
C575
10uF_6.3v
1 2
C562
10uF_6.3v
CHANGE by
Drawer_Name 9-Oct-2007
INVENTEC
TITLE
DIABLO
DDR TERMINATION VOLTAGE
SIZE
A3
DOC. NUMBERCODE
Model_No AX1
CS
SHEET
OF
REV
6112
7-,30-,32-,33-,34-,36-,41-,43-,45-,47-,48-
Q532 1
+V3S_EN#
39-
+V3A
+VBATR_S +VBATR_S
13-
100K_1%
D
G
S
R589
3
2
SSM3K7002F
12
6 5 2
1
FDC655BN
+V3S
14-,15-,16-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,36-,37-,38-,39-,40-,41-,44-,47-,48-,49-,52-,53-,55-,57-,58-,59-
Q535
4
D
S
3
G
C747
12
0.1uF_25v
+V5S_EN#
1
R692
47_5%
2
7-,8-,9-,10-,11-,12-,30-,34-,36-,39-,41-,42-
100K_1%
Q533 1
39-
G
R718
3
D
S
SSM3K7002F
2
+V5S+V5A
13-
12
Q534
6
D
5 2
13
G
FDC655BN
11-,19-,29-,30-,32-,34-,36-,37-,38-,41-,48-,49-,52-,57-
4
S
C746
12
0.1uF_25v
1
100_5%
2
+V1.8S_EN#
Added for VGA
100K_1%
Q518
39-
1
G
+VBATR_S
R590
3
D
S
2
SSM3K7002F
13-
12
+V1.8
8-,9-,10-,12-,20-,23-,24-,26-,27-,36-
Q520
6
D
5 2
1
G
FDC655BN
Q521
6
D
5 2
13
G
FDC655BN
4
S
3
4
S
C628
12
0.1uF_25v
R592R695
100_5%
+V1.8S
36-,38-,56-,57-,60-,61-
1
2
C790
12
100uF_6.3v
R588
100_5%
+V1.5S
10-,18-,24-,34-,36-,47-,48-
1
2
+VBATR
CHENMKO_BAV99
5-,7-,8-,9-,11-,36-
Q531
3
Q529
3
D
1
G
S
SSM3K7002F
3
+VBATR_S
2
1
2
13-
1
G
SSM3K7002F
D
S
2
Q519
1
G
SSM3K7002F
3
D
S
2
Q522 1
G
SSM3K7002F
3
D
S
2
D515
INVENTEC
TITLE
DIABLO
POWER(SLEEP)
CODE REV
SIZE
CHANGE by OF
Drawer_Name 9-Oct-2007
A3
DOC. NUMBER
Model_No AX1
CS
SHEET
6113
SLP_S3#_3R
7-,32-,38-,39-,41-,48-
VGA_PG
9-
+VCCP_PG
12
V1.25S_PG
V1.5S_PG
V1.8_PG
12
R335
1K_5%
DAP202K
R334
1K_5%
8-
10-
8-
10-,57-
D10
R336
1
10K_5%
R333
12
10K_5%
R332
12
10K_5%
R337
12
10K_5%
12
3
2
+V3S
13-,15-,16-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,36-,37-,38-,39-,40-,41-,44-,47-,48-,49-,52-,53-,55-,57-,58-,59-
R643
10K_5%
12
39-
ALLPWR_GOOD
CHANGE by
INVENTEC
TITLE
DIABLO
POWER(SEQUENCE)
SIZE CODE
A3
CS
SHEET
9-Oct-2007Drawer_Name
14 61
REVDOC. NUMBER
AX1Model_No
OF
CLKREQ_R_SATA#
17-,20­17-,20­15-
1 2
FSB FSC
0
1
0
1
+VCCP
L519
BLM18AG471SN1D
1
2
13-,14-,15-,16-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,36-,37-,38-,39-,40-,41-,44-,47-,48-,49-,52-,53-,55-,57-,58-,59-
15-,32-
+VCCP
10-,15-,16-,17-,18-,21-,23-,24-,31-,34-,36-
2
10K_5%
R221
1
R222
12
C331
OPEN
20-
CLK_PWRGD
FSB CLOCK FREQUENCY
32-
667 800
10-,15-,16-,17-,18-,21-,23-,24-,31-,34-,36-
CPU_BSEL1
CPU_BSEL2
CLK_3S_REF
CLKREQ_R_MCH#
FSA
1 0
*CLKREQ# pin controls SRC Table.
Byte5: bit6 =0(PWD)
SRC0
CR#_A
Byte5: bit7=0, disable CR#_A; 1,enable CR#_A
Byte5: bit2 =0(PWD)
SRC0
CR#_C
Byte5: bit3=0, disable CR#_C; 1,enable CR#_C
Byte5: bit6 =1
SRC2
Byte5: bit2 =1
SRC2
Layout note: All decoupling 0.1uF disperse closed to pin
C350
1 2
0.1uF_16v
1 2
1 2
10uF_6.3v
C693
+V3S
10K_5%R651
12
C704
1
CLK_R3S_ICH48
2
22pF_50v
10K_5%
R223
12
10K_5%
13-,14-,15-,16-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,36-,37-,38-,39-,40-,41-,44-,47-,48-,49-,52-,53-,55-,57-,58-,59-
R653
475_1%
12
R220
12
0_5%
HOST CLOCK
FREQUENCY
CLKREQ_R_SATA#
ICH_3S_SMCLK
ICH_3S_SMDATA
166 200
C702
0.1uF_16v
CPU_BSEL0
C690
33pF_50v
C691
1 2
C347
1 2
0.1uF_16v
0.1uF_16v
10-,15-,16-,17-,18-,21-,23-,24-,31-,34-,36-
R663
32-
R652 1 2
15-,32-
+V3S
R654 10K_5%
12
CLK_R3S_MINICARD
26-,27-,32-,47-,48­26-,27-,32-,47-,48-
X502
14.31818MHZ
12
30PPM
1 2
1 2
10K_5%_OPEN
12
2.2K_5%
12
33_5%
C689
33pF_50v
Please place close to CLKGEN within 500mils
Byte5: bit4 =0(PWD)
CR#_B
SRC1
Byte5: bit5=0, disable CR#_B; 1,enable CR#_B
Byte5: bit0 =0(PWD)
CR#_D
SRC1
Byte5: bit1=0, disable CR#_D; 1,enable CR#_D
C349
1 2
0.1uF_16v
R661
R660
OPEN
R655
47-
Byte5: bit4 =1
SRC4
Byte5: bit0 =1
SRC4
+VCCP
12
R662
2
1
475_1%
12
1 2
0.1uF_16v
C692
33_5%
CLK_3S_ICH48
CLKREQ_SATA#
CLKREQ_MCH#
CLK_3S_MINICARD
CR#_E
CR#_F
CR#_G
CR#_H
+V3S
13-,14-,15-,16-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,36-,37-,38-,39-,40-,41-,44-,47-,48-,49-,52-,53-,55-,57-,58-,59-
Layout note: All decoupling 0.1uF disperse closed to pin
L14
BLM18AG471SN1D
1
2
U511
26 45 36 12 39 61 20 49
9
2 55 16
10 57 62
1
3
4
5
56
64 63
60
59
8 11 15 19 23 29 42 58 52
ICS_ICS9LPRS355BGLFT_TSSOP_64P
Byte6: bit7=0, disable CR#_E; 1,enable CR#_E
SRC6
Byte6: bit6=0, disable CR#_F; 1,enable CR#_F
SRC8
Byte6: bit5=0, disable CR#_G; 1,enable CR#_G
SRC9
Byte6: bit4=0, disable CR#_H; 1,enable CR#_H
SRC10
C705
C352
1
11
12
C353
10uF_6.3v
VDDSRC_IO VDDSRC_IO VDDSRC_IO VDD96_IO VDDSRC VDDREF VDDPLL3_IO VDDCPU_IO
VDD48 VDDPCI VDDCPU VDD
SUB_48MHZ_FSLA FSLB_TEST_MODE REF0_FSLC_TEST_SEL
PCI0_CR#_A PCI1_CR#_B PCI2_TME PCI3
CK_PWRGD_PD#
SCLK SDTAT
X1
X2
GNDPCI GND48 GND GND GNDSRC GNDSRC GNDSRC GNDREF GNDCPU
2
2
0.1uF_16v
0.1uF_16v
PCI_STOP#
CPU_STOP#
CPUT1_F CPUC1_F
CPUT0
CPUC0
CPUT2_ITP_SRCT8
CPUC2_ITP_SRCC8
SRCT11_CR#_H SRCC11_CR#_G
SRCT10
SRCC10
SRCT9
SRCC9
SRCT7_CR#_F SRCC7_CR#_E
SRCT6
SRCC6
PCI4_27_Select
PCI_F5_ITP_EN
SRCT4
SRCC4
SRCT3_CR#_C
SRCC3_CR#_D
SRCT2_SATAT
SRCC2_SATAC
27MHz_NonSS_SRCT1_SE1
27MHz_SS_SRCC1_SE2
SRCC0_DOTT_96 SRCT0_DOTC_96
C703
C351
1
1
2
2
2
0.1uF_16v
0.1uF_16v
48
NC
38 37
CLK_R_MCHBCLK
51
CLK_R_MCHBCLK#
50
CLK_R_CPUBCLK
54
CLK_R_CPUBCLK#
53
47 46
CLK_REQH#
33
CLK_REQG#
32
CLK_R_PCIE_NEWCARD
34
CLK_R_PCIE_NEWCARD#
35
CLK_R_PCIE_MINI2
30
CLK_R_PCIE_MINI2#
31
44 43
CLK_R_PEG_REF
41
CLK_R_PEG_REF#
40
CLK_3S_KBPCI
6
CLK_3S_ICHPCI
7
CLK_R_PEG_MCH
27
CLK_R_PEG_MCH#
28
CLK_R_PCIE_ICH
24
CLK_R_PCIE_ICH#
25
CLK_R_SATA1
21
CLK_R_SATA1#
22
17 18
13 14
13-,14-,15-,16-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,36-,37-,38-,39-,40-,41-,44-,47-,48-,49-,52-,53-,55-,57-,58-,59-
12
R664
12
R665
13-,14-,15-,16-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,36-,37-,38-,39-,40-,41-,44-,47-,48-,49-,52-,53-,55-,57-,58-,59-
+V3S
C348
0.1uF_16v
CLK_3S_REF
CHANGE by
33_5% 33_5%
R218
10K_5%_OPEN
58­58-
38­38-
ITP_EN =0 SRC8/SRC8#
ITP_EN =1 ITP/ITP#
15-
Drawer_Name
1
1
R216
10K_5%_OPEN
2
2
475_1% 475_1%
12 12
33_5%
27MNONSSC 27MSSC
CLK_R_PCIE_ESATA CLK_R_PCIE_ESATA#
2
12
R224
9-Oct-2007
12 12
R65622_5% R658
R659
10K_5%
R214 R667
22_5%
1
1
R215
R668
10K_5%
10K_5%
2
2
48­48-
R657
12
10K_5%
1
32-
INVENTEC
TITLE
DIABLO
CLOCK_GENERATOR
CODE
SIZE
A3
CS
SHEET
32-17-,20-
PCISTOP#_3
32-
CPUSTOP#_3
21-
CLK_R_MCHBCLK
21-
CLK_R_MCHBCLK#
16-
CLK_R_CPUBCLK
16-
CLK_R_CPUBCLK#
48-
CLK_R_REQH#
47-
CLK_R_REQG#
CLK_R_PCIE_NEWCARD CLK_R_PCIE_NEWCARD#
47-
CLK_R_PCIE_MINI2
47-
CLK_R_PCIE_MINI2#
44-
CLK_R_PCIE_LAN
44-
CLK_R_PCIE_LAN#
55-
CLK_R_PEG_REF
55-
CLK_R_PEG_REF#
39-
CLK_R3S_KBPCI
33-
CLK_R3S_ICHPCI
20-
CLK_R_PEG_MCH
20-
CLK_R_PEG_MCH#
32-
CLK_R_PCIE_ICH
32-
CLK_R_PCIE_ICH#
31-
CLK_R_SATA1
31-
CLK_R_SATA1#
+V3S
27_Selet =0
LCD_SST 100MHZ
27_Selet =1
27MHZ non-spread clock
CLK_R3S_ICH14
DOC. NUMBER
OF
15 61
REV
AX1Model_No
H_A#(35:3)
H_ADSTB#1
H_STPCLK#
H_A20M# H_FERR#
H_IGNNE#
H_INTR
H_NMI
H_SMI#
21-
H_A#(3) H_A#(4) H_A#(5) H_A#(6) H_A#(7) H_A#(8) H_A#(9) H_A#(10) H_A#(11) H_A#(12) H_A#(13) H_A#(14) H_A#(15) H_A#(16)
H_REQ#(4:0) H_RS#(2:0)
H_A#(17) H_A#(18) H_A#(19) H_A#(20) H_A#(21) H_A#(22) H_A#(23) H_A#(24) H_A#(25) H_A#(26) H_A#(27) H_A#(28) H_A#(29) H_A#(30) H_A#(31) H_A#(32) H_A#(33) H_A#(34) H_A#(35)
21-
31­31­31-
16-,31­31­31­31-
21-
H_REQ#(0) H_REQ#(1) H_REQ#(2) H_REQ#(3) H_REQ#(4)
H_ADSTB#0
21-
PM_THRMTRIP# should be T at CPU
CN509-1
J4
A3#
L5
A4#
L4
A5#
K5
A6#
M3
A7#
N2
A8#
J1
A9#
N3
A10#
P5
A11#
P2
A12#
L2
A13#
P4
A14#
P1
A15#
R1
A16#
M1
ADSTB0#
K3
REQ0#
H2
REQ1#
K2
REQ2#
J3
REQ3#
L1
REQ4#
Y2
A17#
U5
A18#
R3
A19#
W6
A20#
U4
A21#
Y5
A22#
U1
A23#
R4
A24#
T5
A25#
T3
A26#
W2
A27#
W5
A28#
Y4
A29#
U2
A30#
V4
A31#
W3
A32#
AA4
A33#
AB2
A34#
AA3
A35#
V1
ADSTB1#
A6
A20M#
A5
FERR#
C4
IGNNE#
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
M4
RSVD01
N5
RSVD02
T2
RSVD03
V3
RSVD04
B2
RSVD05
C3
RSVD06
D2
RSVD07
D22
RSVD08
D3
RSVD09
F6
RSVD010
FOX_PZ4782K_274M_41_478P
GMCH
CPU
ADS# BNR#
BPRI#
DEFER#
DRDY# DBSY#
BR0#
IERR#
ADDR GROUP 0
INIT#
CONTROL
LOCK#
RESET#
RS0# RS1# RS2#
TRDY#
HIT#
HITM#
BPM0# BPM1# BPM2# BPM3# PRDY# PREQ#
TCK
ADDR GROUP 1
TDO TMS
XDP/ITP SIGNALS
TRST#
DBR#
THERMAL
PROCHOT#
THERMDA THERMDC
THERMTRIP#
ICH
H CLK
BCLK0 BCLK1
RESERVED
H1 E2 G5
H5 F21 E1
F1
D20 B3
H4
C1 F3 F4 G3 G2
G6 E4
AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6
TDI
AB3 AB5 AB6 C20
+VCCP
10mils/10mils
ICH8
10-,15-,16-,17-,18-,21-,23-,24-,31-,34-,36-
1K_5%
12
R177
D21 A24 B25
C7
A22 A21
39-
PROC_CPU#
+VCCP
21-
H_ADS#
21-
H_BNR#
21-
H_BPRI#
21-
H_DEFER#
21-
H_DRDY#
21-
H_DBSY#
21-
H_BREQ#0
31-
H_INIT#
21-
H_LOCK#
R195
21-
21-
21­21-
16­16-
16­16­16-
19-
19-
20-,31-
15­15-
+VCCP
10-,15-,16-,17-,18-,21-,23-,24-,31-,34-,36-
CHANGE by
12
51_5%_
H_CPURST#
H_TRDY# H_HIT#
H_HITM#
H_BPM5_PREQ# H_TCK TDI_FLEX
H_TDO
H_TMS
13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,36-,37-,38-,39-,40-,41-,44-,47-,48-,49-,52-,53-,55-,57-,58-,59-
R178 1K_5%_OPEN
12
H_THERMDA H_THERMDC
PM_THRMTRIP#
CLK_R_CPUBCLK CLK_R_CPUBCLK#
R217
12
OPEN
R193
12
150_5%
R194
12
39.2_1%
R283
12
150_5%_OPEN
R219
12
56_5%_OPEN
R189
12
27_5%
Drawer_Name
+VCCP
10-,15-,16-,17-,18-,21-,23-,24-,31-,34-,36-
21-
OPEN
H_RS#(0) H_RS#(1) H_RS#(2)
+V3S
R153 Value should be 51ohm
16-
H_BPM5_PREQ#
16-
TDI_FLEX
16-
H_TMS
16-,31-
H_STPCLK#
16-
H_TDO
16-
H_TCK
9-Oct-2007
+VCCP
10-,15-,16-,17-,18-,21-,23-,24-,31-,34-,36-
1
R176
56_5%
CLOSED TO CPU
2
51 ohm +/-1% pull-up to +VCCP (VCCP) if ITP is implemented
1
R190
665_1%
2
INVENTEC
TITLE
DIABLO
MEROM-1
SIZE
CODE
A3
CS
SHEET
DOC. NUMBER
OF
16 61
REV
AX1Model_No
H_D#(63:0)
H_DSTBN#0 H_DSTBP#0
H_DINV#0
H_D#(63:0)
+VCCP
10-,15-,16-,17-,18-,21-,23-,24-,31-,34-,36-
1
R166
1K_1%
2
1
2
R165
2K_1%
GTLREF
Layout note: Zo=55 ohm,
0.5" max for GTLREF.
17-,21-
21­21­21-
17-,21-
H_DSTBN#1 H_DSTBP#1
H_DINV#1
CPU_BSEL0 CPU_BSEL1 CPU_BSEL2
CN509-2
H_D#(0) H_D#(1) H_D#(2) H_D#(3) H_D#(4) H_D#(5) H_D#(6) H_D#(7) H_D#(8)
H_D#(10) H_D#(11) H_D#(12) H_D#(13) H_D#(14) H_D#(15)
H_D#(16) H_D#(17) H_D#(18) H_D#(19) H_D#(20) H_D#(21) H_D#(22) H_D#(23) H_D#(24) H_D#(25) H_D#(26) H_D#(27) H_D#(28) H_D#(29) H_D#(30) H_D#(31)
21­21­21-
15-,20­15-,20­15-,20-
1
2
R169
OPEN
1
2
R170
OPEN
C193
1 2
0.1uF_16v_OPEN
Place C549(0.1uF_16V) close to the TEST4 pin. Make sure TEST4 routing is reference to GND and away from other noisy signals.
E22
D0#
F24
D1#
E26
D2#
G22
D3#
F23
D4#
G25
D5#
E25
D6#
E23
D7#
K24
D8#
G24
DATA GRP 0
D9#
J24
D10#
J23
D11#
H22
D12#
F26
D13#
K22
D14#
H23
D15#
J26
DSTBN0#
H26
DSTBP0#
H25
DINV0#
N22
D16#
K25
D17#
P26
D18#
R23
D19#
L23
D20#
M24
D21#
L22
D22#
M23
D23#
P25
D24#
P23
D25#
P22
DATA GRP 1
D26#
T24
D27#
R24
D28#
L25
D29#
T25
D30#
N25
D31#
L26
DSTBN1#
M26
DSTBP1#
N24
DINV1#
AD26
GTLREF
C23
TEST1
D25
TEST2
C24
TEST3
MISC
AF26
TEST4
AF1
TEST5
A26
TEST6
B22
BSEL0
B23
BSEL1
C21
BSEL2
FOX_PZ4782K_274M_41_478P
D32# D33# D34# D35# D36# D37# D38# D39# D40#
DATA GRP 2DATA GRP 3
D41# D42# D43# D44# D45# D46#
D47# DSTBN2# DSTBP2#
DINV2#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63# DSTBN3# DSTBP3#
DINV3#
COMP0 COMP1 COMP2 COMP3
DPRSTP#
DPSLP# DPWR#
PWRGOOD
SLP#
PSI#
Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22
AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20
R26 U26 AA1 Y1
E5 B5 D24 D6 D7 AE6
1
2
R586
OPEN
11-,20-,31-
12
R168 27.4_1%
12
R167 R192 54.9_1%
H_DPRSTP#
54.9_1%
12
27.4_1%R191
12
CLOSED TO CPU
+VCCP
10-,15-,16-,17-,18-,21-,23-,24-,31-,34-,36-
H_D#(32) H_D#(33) H_D#(34) H_D#(35) H_D#(36) H_D#(37) H_D#(38) H_D#(39) H_D#(40) H_D#(41)H_D#(9) H_D#(42) H_D#(43) H_D#(44) H_D#(45) H_D#(46) H_D#(47)
H_D#(48) H_D#(49) H_D#(50) H_D#(51) H_D#(52) H_D#(53) H_D#(54) H_D#(55) H_D#(56) H_D#(57) H_D#(58) H_D#(59) H_D#(60) H_D#(61) H_D#(62) H_D#(63)
31­21­31­21­11-
21­21­21-
H_DPSLP# H_DPWR# H_PWRGD H_CPUSLP# PSI#
H_DSTBN#3 H_DSTBP#3 H_DINV#3
17-,21-
17-,21-
21­21­21-
H_D#(63:0)
H_DSTBN#2 H_DSTBP#2 H_DINV#2
H_D#(63:0)
CHANGE by
INVENTEC
TITLE
DIABLO
MEROM-2
CODE
SIZE
9-Oct-2007Drawer_Name
A3
CS
SHEET
DOC. NUMBER
17 61
REV
AX1Model_No
OF
PLACE THESE INSIDE SOCKET
CAVITY ON L8 (NORTH SIDE
SECONDARY)
PLACE THESE INSIDE SOCKET
CAVITY ON L8 (SOUTH SIDE
SECONDARY)
PLACE THESE INSIDE SOCKET CAVITY ON L1 (NORTH SIDE PRIMARY)
PLACE THESE INSIDE SOCKET
CAVITY ON L1 (SOUTH SIDE
PRIMARY)
SOUTH SIDE SECONDARY
NORTH SIDE SECONDARY
C639
1 2
10uF_6.3v
C621
1 2
10uF_6.3v
C643
1 2
10uF_6.3v
C201
12
2.2uF_6.3v
C620
1 2
10uF_6.3v
C625
1 2
10uF_6.3v
1
C648
2
330uF_2v_6mR
1
C627
2 330uF_2v_6mR
330uF_2v_6mR
1 2
1 2
C635
1 2
10uF_6.3v
C638
1
10uF_6.3v
2
C626
1 2
10uF_6.3v
C646
1 2
2.2uF_6.3v
C262
10uF_6.3v
C200
10uF_6.3v
1
C261
2
1
C260
2
C264
1 2
10uF_6.3v
C258
1 2
10uF_6.3v
330uF_2v_6mR
C206
1 2
10uF_6.3v
C637
1
10uF_6.3v
2
C644
1 2
10uF_6.3v
C647
1 2
2.2uF_6.3v
1 2
1 2
C263
10uF_6.3v
C257
10uF_6.3v
C205
1 2
10uF_6.3v
C636
1 2
10uF_6.3v
C202
1 2
10uF_6.3v
C645
12
2.2uF_6.3v
1 2
1 2
C204
10uF_6.3v
C259
10uF_6.3v
+VCC_CORE +VCC_CORE
11-,18-
CN509-3
A7
VCC001
A9
VCC002
A10
VCC003
A12
VCC004
A13
VCC005
A15
VCC006
A17
VCC007
A18
VCC008
A20
VCC009
B7
VCC010
B9
VCC011
B10
VCC012
B12
VCC013
B14
VCC014
B15
VCC015
B17
VCC016
B18
VCC017
B20
VCC018
C9
VCC019
C10
VCC020
C12
VCC021
C13
VCC022
C15
VCC023
C17
VCC024
C18
VCC025
D9
VCC026
D10
VCC027
D12
VCC028
D14
VCC029
D15
VCC030
D17
VCC031
D18
VCC032
E7
VCC033
E9
VCC034
E10
VCC035
E12
VCC036
E13
VCC037
E15
VCC038
E17
VCC039
E18
VCC040
E20
VCC041
F7
VCC042
F9
VCC043
F10
VCC044
F12
VCC045
F14
VCC046
F15
VCC047
F17
VCC048
F18
VCC049
F20
VCC050
AA7
VCC051
AA9
VCC052
AA10
VCC053
AA12
VCC054
AA13
VCC055
AA15
VCC056
AA17
VCC057
AA18
VCC058
AA20
VCC059
AB9
VCC060
AC10
VCC061
AB10
VCC062
AB12
VCC063
AB14
VCC064
AB15
VCC065
AB17
VCC066
AB18
VCC067
FOX_PZ4782K_274M_41_478P
VCC068 VCC069 VCC070 VCC071 VCC072 VCC073 VCC074 VCC075 VCC076 VCC077 VCC078 VCC079 VCC080 VCC081 VCC082 VCC083 VCC084 VCC085 VCC086 VCC087 VCC088 VCC089 VCC090 VCC091 VCC092 VCC093 VCC094 VCC095 VCC096 VCC097 VCC098 VCC099
VCC0100
VCCP01 VCCP02 VCCP03 VCCP04 VCCP05 VCCP06 VCCP07 VCCP08 VCCP09 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16
VCCA01 VCCA02
VCCSENSE
VSSSENSE
AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20
G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21
B26 C26
AD6
VID0
AF5
VID1
AE5
VID2
AF4
VID3
AE3
VID4
AF3
VID5
AE2
VID6
AF7
AE7
11-,18-
I = 4500mA
+VCCP
10-,15-,16-,17-,18-,21-,23-,24-,31-,34-,36-
47uF_6.3v
11-
H_VID0
11-
H_VID1
11-
H_VID2
11-
H_VID3
11-
H_VID4
11-
H_VID5
11-
H_VID6
LAYOUT NOTE: ROUTE VCCSENSE AND VSSSENSE TRACE AT
24.7 OHM WITH 50 MIL SPACEING PLACE PU AND PD WITHIN I INCH OF CPU
I = 44000mA
12
C203
+VCC_CORE
11-,18-
1
R188
100_1%
2
1
R182
100_1%
2
CHANGE by
11-
11-
+VCCP
10-,15-,16-,17-,18-,21-,23-,24-,31-,34-,36-
C640
1
1
2
2
0.1uF_16v
VCCSENSE
VSSSENSE
Drawer_Name 9-Oct-2007
PLACE THESE INSIDE SOCKET CAVITY ON L8 (NORTH SIDE SECONDARY)
C642
C641
1 2
0.1uF_16v
0.1uF_16v
10-,13-,24-,34-,36-,47-,48-
LAYOUT NOTE: PLACE C2461 NEAR PIN B26
C622
0.1uF_16v
C623
1 2
0.1uF_16v
1 2
+V1.5S
0.01uF_16v
2
1
C194
INVENTEC
TITLE
DIABLO
MEROM-3
CODE
SIZE
A3
CS
SHEET
C624
1 2
0.1uF_16v
I = 130mA
1
C195
10uF_6.3v
2
DOC. NUMBER
Model_No AX1
OF
REV
6118
CN509-4
A4
VSS001
A8
VSS002
A11
VSS003
A14
VSS004
A16
VSS005
A19
VSS006
A23
VSS007
AF2
VSS008
B6
VSS009
B8
VSS010
B11
VSS011
B13
VSS012
B16
VSS013
B19
VSS014
B21
VSS015
B24
VSS016
C5
VSS017
C8
VSS018
C11
VSS019
C14
VSS020
C16
VSS021
C19
VSS022
C2
VSS023
C22
VSS024
C25
VSS025
D1
VSS026
D4
VSS027
D8
VSS028
D11
VSS029
D13
VSS030
D16
VSS031
D19
VSS032
D23
VSS033
D26
VSS034
E3
VSS035
E6
VSS036
E8
VSS037
E11
VSS038
E14
VSS039
E16
VSS040
E19
VSS041
E21
VSS042
E24
VSS043
F5
VSS044
F8
VSS045
F11
VSS046
F13
VSS047
F16
VSS048
F19
VSS049
F2
VSS050
F22
VSS051
F25
VSS052
G4
VSS053
G1
VSS054
G23
VSS055
G26
VSS056
H3
VSS057
H6
VSS058
H21
VSS059
H24
VSS060
J2
VSS061
J5
VSS062
J22
VSS063
J25
VSS064
K1
VSS065
K4
VSS066
K23
VSS067
K26
VSS068
L3
VSS069
L6
VSS070
L21
VSS071
L24
VSS072
M2
VSS073
M5
VSS074
M22
VSS075
M25
VSS076
N1
VSS077
N4
VSS078
N23
VSS079
N26
VSS080
P3
VSS081
FOX_PZ4782K_274M_41_478P
VSS082 VSS083 VSS084 VSS085 VSS086 VSS087 VSS088 VSS089 VSS090 VSS091 VSS092 VSS093 VSS094 VSS095 VSS096 VSS097 VSS098 VSS099 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163
P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25
+V5S
+V5S
11-,13-,19-,29-,30-,32-,34-,36-,37-,38-,41-,48-,49-,52-,57-
U2
5
1
H_THERMDA H_THERMDC
39-
19-,58-
16­16­19-,58-
2
3
12
R584 R585
12
R583
12
2.2K_5%
4
TC7SET08F
0.1uF_16v_OPEN
100_1%
100_1%
PWM_3S_FAN#
THERM_3S_WARN#
THERM_3S_WARN#
13-,14-,15-,16-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,36-,37-,38-,39-,40-,41-,44-,47-,48-,49-,52-,53-,55-,57-,58-,59-
+V3S
11-,13-,19-,29-,30-,32-,34-,36-,37-,38-,41-,48-,49-,52-,57-
Q2
3
2
D
AO3409
C5
S
G
C6
1
1
2
0.01uF_16v
1 2
CN503
1
VCC
2
GND
3
REFENCE
MLX_53398_0371_3P
G1
G
G2
G
FAN CONN
+V3S
13-,14-,15-,16-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,36-,37-,38-,39-,40-,41-,44-,47-,48-,49-,52-,53-,55-,57-,58-,59-
C633
1 2
0.1uF_16v
SMBus Address is "4C"
H_THERMDA_R
THERM_MINUS_R
ADI_ADT7421ARMZ_REEL_MSOP_8P
12
C634
1000pF_50v
1 2 3 4
U506
VDD D+ D­THERM#
SCLK
SDATA
ALERT#_THERM2#
8 7 6 5
GND
39-,58-
39-,58-
EC_SMCLK_THM EC_SMDATA_THM
CHANGE by
Drawer_Name 9-Oct-2007
INVENTEC
TITLE
DIABLO
THERMAL&FAN
SIZE
A3
DOC. NUMBER
CODE
Model_No AX1
CS
SHEET
REV
OF
6119
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